From: Nabih Estefan Diaz
- Implementation of Transmit function for packets
- Implementation for reading and writing from and to descriptors in
memory for Tx
Added relevant trace-events
NOTE: This function implements the steps detailed in the datasheet for
transmitting messages from the GMAC.
The const_le64() macro introduced in commit 845d80a8c7b187 turns out
to have a bug which means that on big-endian systems the compiler
complains if the argument isn't already a 64-bit type. This hasn't
caused a problem yet, because there are no in-tree uses, but it
means it's not possible for
From: Hao Wu
The PCI Mailbox Module is a high-bandwidth communcation module
between a Nuvoton BMC and CPU. It features 16KB RAM that are both
accessible by the BMC and core CPU. and supports interrupt for
both sides.
This patch implements the BMC side of the PCI mailbox module.
Communication
Hello,
On Mon, Jan 22, 2024 at 8:05 PM Peter Maydell wrote:
>
> On Thu, 18 Jan 2024 at 16:03, Manolo de Medici
> wrote:
> >
> > Compilation fails on systems where copy_file_range is already defined as a
> > stub.
>
> What do you mean by "stub" here ? If the system headers define
> a prototype
On Mon, Jan 22, 2024 at 9:23 PM Sergey Bugaev wrote:
> call such a function. For example on GNU/Linux, remove(2) is a stub,
(That was supposed to say revoke(2), of course.)
This bug tracker for QEMU has been obsolete for years. If you think
there's a problem with QEMU, please file a full report in the gitlab
bugtracker: https://gitlab.com/qemu-project/qemu/-/issues . Thanks.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is
On Mon, Jan 22, 2024 at 03:54:32PM +, Alex Bennée wrote:
> Ilya Leoshkevich writes:
>
> > Make sure that qemu gdbstub, like gdbserver, allows reading from and
> > writing to PROT_NONE pages.
> >
> > Signed-off-by: Ilya Leoshkevich
> > ---
> > tests/tcg/multiarch/Makefile.target | 9
From: Nabih Estefan Diaz
- Implementation of Receive function for packets
- Implementation for reading and writing from and to descriptors in
memory for Rx
When RX starts, we need to flush the queued packets so that they
can be received by the GMAC device. Without this it won't work
with TAP
On Mon, 22 Jan 2024 at 17:27, Daniel P. Berrangé wrote:
>
> On Thu, Jan 18, 2024 at 05:02:23PM +0100, Manolo de Medici wrote:
> > qemu uses the PATH_MAX and IOV_MAX constants extensively
> > in the code. Define these constants to sensible values ourselves
> > if the system doesn't define them
On Mon, 22 Jan 2024 at 17:46, Philippe Mathieu-Daudé wrote:
>
> Hi,
>
> On 22/1/24 17:36, Peter Maydell wrote:
> > The -serial option documentation is a bit brief about '-serial none'
> > and '-serial null'. In particular it's not very clear about the
> > difference between them, and it doesn't
On Fri, 19 Jan 2024 at 20:47, Max Filippov wrote:
>
> Whether TLB ways 5 and 6 are variable is not a property of the TLB
> instance or a TLB entry instance, it's a property of the xtensa core
> configuration.
> Remove 'varway56' field from the xtensa_tlb structure and remove
> 'variable' field
Signed-off-by: Sam Li
---
block/block-backend.c | 16
hw/nvme/ctrl.c| 20 ++--
hw/nvme/ns.c | 24
hw/nvme/nvme.h| 7 ---
include/sysemu/block-backend-io.h | 2
Am 22.01.24 um 20:17 schrieb Thomas Huth:
They are not used anywhere, so there's no need to keep them around.
Signed-off-by: Thomas Huth
---
util/uri.c | 13 -
1 file changed, 13 deletions(-)
Reviewed-by: Stefan Weil
On Sat, Jan 20, 2024 at 12:23:02AM +0100, Philippe Mathieu-Daudé wrote:
> From: Richard Henderson
>
> Avoid code duplication by handling 7 of the 14 cases
> by inverting the test for the other 7 cases.
>
> Use TCG_COND_TSTNE for cc in {1,3}.
> Use (cc - 1) <= 1 for cc in {1,2}.
>
>
From: Hao Wu
Change-Id: Id8a3461fb5042adc4c3fd6f4fbd1ca0d33e22565
Signed-off-by: Hao Wu
Signed-off-by: Nabih Estefan
Reviewed-by: Tyrone Ting
---
hw/arm/npcm7xx.c | 36 ++--
include/hw/arm/npcm7xx.h | 2 ++
2 files changed, 36 insertions(+), 2
From: Nabih Estefan Diaz
- Add PCS Register check to npcm_gmac-test
Change-Id: I34821beb5e0b1e89e2be576ab58eabe41545af12
Signed-off-by: Nabih Estefan
Reviewed-by: Tyrone Ting
---
tests/qtest/npcm_gmac-test.c | 132 +++
1 file changed, 132 insertions(+)
diff
From: Hao Wu
This patch wires the PCI mailbox module to Nuvoton SoC.
Change-Id: I14c42c628258804030f0583889882842bde0d972
Signed-off-by: Hao Wu
Signed-off-by: Nabih Estefan
Reviewed-by: Tyrone Ting
---
docs/system/arm/nuvoton.rst | 2 ++
hw/arm/npcm7xx.c| 17 -
On 22.01.24 18:41, Hanna Czenczek wrote:
On 05.01.24 15:30, Fiona Ebner wrote:
Am 05.01.24 um 14:43 schrieb Fiona Ebner:
Am 03.01.24 um 14:35 schrieb Paolo Bonzini:
On 1/3/24 12:40, Fiona Ebner wrote:
I'm happy to report that I cannot reproduce the CPU-usage-spike issue
with the patch, but I
This patch series add a new extension - zoned format - to the
qcow2 driver thereby allowing full zoned storage emulation on
the qcow2 img file. Users can attach such a qcow2 file to the
guest as a zoned device.
Write pointer are preserved in the zoned metadata. It will be
recovered after power
The zoned format feature can be tested by:
$ tests/qemu-iotests/check -qcow2 zoned-qcow2
Signed-off-by: Sam Li
Reviewed-by: Stefan Hajnoczi
---
tests/qemu-iotests/tests/zoned-qcow2 | 147 +++
tests/qemu-iotests/tests/zoned-qcow2.out | 172 +++
2 files
By adding zone operations and zoned metadata, the zoned emulation
capability enables full emulation support of zoned device using
a qcow2 file. The zoned device metadata includes zone type,
zoned device state and write pointer of each zone, which is stored
to an array of unsigned integers.
Each
Add the specs for the zoned format feature of the qcow2 driver.
The qcow2 file then can emulate real zoned devices, either passed
through by virtio-blk device or NVMe ZNS drive to the guest
given zoned information.
Signed-off-by: Sam Li
Reviewed-by: Stefan Hajnoczi
---
To configure the zoned format feature on the qcow2 driver, it
requires settings as: the device size, zone model, zone size,
zone capacity, number of conventional zones, limits on zone
resources (max append bytes, max open zones, and max_active_zones).
To create a qcow2 image with zoned format
On Mon, Jan 22, 2024 at 05:08:16PM -0300, Cristian Rodríguez wrote:
> On Mon, Jan 22, 2024 at 11:48 AM Daniel P. Berrangé
> wrote:
>
> > On Fri, Jan 19, 2024 at 05:39:40PM -0300, Cristian Rodríguez wrote:
> > > gcrypt by default uses an userspace RNG, which cannot know
> > > when it is time to
On 1/23/24 01:34, Paolo Bonzini wrote:
Unless I'm missing something egregious, the jmp cache is only every
populated with a valid entry by the same thread that reads the cache.
Therefore, the contents of any valid entry are always consistent and
there is no need for any acquire/release magic.
From: Hao Wu
This patch implements the basic registers of GMAC device and sets
registers for networking functionalities.
Squashed IRQ Implementation patch into this one for compliation.
Tested:
The following message shows up with the change:
Broadcom BCM54612E stmmac-0:00: attached PHY driver
Tested and this issue still affects the latest version of QEMU (8.2.0)
compiled for Windows.
Instructions in original post are still sufficient to reproduce the problem on
Windows 7 x64.
Both i386 and x86_64 were tested and both result in a hung QEMU process, except
on my system the GUI for
Am 22.01.24 um 20:17 schrieb Thomas Huth:
All callers pass NULL as target, so we can simplify the code by
dropping this parameter.
Signed-off-by: Thomas Huth
---
include/qemu/uri.h | 2 +-
util/uri.c | 32 ++--
2 files changed, 15 insertions(+), 19
The testcase contains :
- `test_idr_reset_value()` :
Checks the reset values of MODER, OTYPER, PUPDR, ODR and IDR.
- `test_gpio_output_mode()` :
Checks that writing a bit in register ODR results in the corresponding
pin rising or lowering, if this pin is configured in output mode.
-
This patch adds a new device STM32L4x5 GPIO device and is part
of a series implementing the STM32L4x5 with a few peripherals.
Changes from v1 :
- replacing test GPIO register `DISCONNECTED_PINS` with an object
property accessed using `qtest_qmp()` in the qtest (through helpers
Am 22.01.24 um 20:17 schrieb Thomas Huth:
uri_string_unescape() basically does the same as the glib function
g_uri_unescape_string(), with just an additional length parameter.
So we can simplify this function a lot by limiting the length with
g_strndup() first and then by calling
Thank you for the info.
Current issues tracking this bug:
https://gitlab.com/qemu-project/qemu/-/issues/675
https://gitlab.com/qemu-project/qemu/-/issues/1468
https://gitlab.com/qemu-project/qemu/-/issues/1802
--
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devel-ml,
On 1/22/24 15:46, Peter Maydell wrote:
On Mon, 22 Jan 2024 at 19:30, Stefan Berger wrote:
On 1/22/24 12:16, Peter Maydell wrote:
On Thu, 18 Jan 2024 at 16:04, Manolo de Medici wrote:
The Hurd currently doesn't have any TPM driver, compilation fails
for missing symbols unless these
On 22/1/24 18:37, Peter Maydell wrote:
The const_le64() macro introduced in commit 845d80a8c7b187 turns out
to have a bug which means that on big-endian systems the compiler
complains if the argument isn't already a 64-bit type. This hasn't
caused a problem yet, because there are no in-tree
On 05.01.24 15:30, Fiona Ebner wrote:
Am 05.01.24 um 14:43 schrieb Fiona Ebner:
Am 03.01.24 um 14:35 schrieb Paolo Bonzini:
On 1/3/24 12:40, Fiona Ebner wrote:
I'm happy to report that I cannot reproduce the CPU-usage-spike issue
with the patch, but I did run into an assertion failure when
On Fri, 19 Jan 2024 at 20:47, Max Filippov wrote:
>
> Make separation of alternative xtensa memory management options state
> explicit.
>
> Signed-off-by: Max Filippov
> ---
> target/xtensa/cpu.h| 18 +
> target/xtensa/mmu_helper.c | 40
On 1/22/24 12:16, Peter Maydell wrote:
On Thu, 18 Jan 2024 at 16:04, Manolo de Medici wrote:
The Hurd currently doesn't have any TPM driver, compilation fails
for missing symbols unless these are left undefined.
Signed-off-by: Manolo de Medici
---
backends/tpm/tpm_ioctl.h | 2 +-
1
Peter Xu writes:
> On Mon, Sep 11, 2023 at 02:13:18PM -0300, Fabiano Rosas wrote:
>> Stop using outside knowledge about the io channels when registering
>> yank functions. Query for features instead.
>>
>> The yank method for all channels used with migration code currently is
>> to call the
On Mon, Jan 22, 2024 at 11:48 AM Daniel P. Berrangé
wrote:
> On Fri, Jan 19, 2024 at 05:39:40PM -0300, Cristian Rodríguez wrote:
> > gcrypt by default uses an userspace RNG, which cannot know
> > when it is time to discard/invalidate its buffer
> > (suspend, resume, vm forks, other corner cases)
On Mon, 22 Jan 2024 at 19:30, Stefan Berger wrote:
>
>
>
> On 1/22/24 12:16, Peter Maydell wrote:
> > On Thu, 18 Jan 2024 at 16:04, Manolo de Medici
> > wrote:
> >>
> >> The Hurd currently doesn't have any TPM driver, compilation fails
> >> for missing symbols unless these are left undefined.
>
Am 22.01.24 um 20:17 schrieb Thomas Huth:
It is not used in QEMU - and if somebody needs this functionality,
they can simply use g_uri_escape_string() from the glib instead.
Signed-off-by: Thomas Huth
---
include/qemu/uri.h | 1 -
util/uri.c | 64
On 22/01/2024 18.37, Peter Maydell wrote:
The const_le64() macro introduced in commit 845d80a8c7b187 turns out
to have a bug which means that on big-endian systems the compiler
complains if the argument isn't already a 64-bit type. This hasn't
caused a problem yet, because there are no in-tree
Hi,
On 22/1/24 17:36, Peter Maydell wrote:
The -serial option documentation is a bit brief about '-serial none'
and '-serial null'. In particular it's not very clear about the
difference between them, and it doesn't mention that it's up to
the machine model whether '-serial none' means "don't
Klaus Jensen 于2024年1月10日周三 07:52写道：
>
> Hi Sam,
>
> This is awesome. For the hw/nvme parts,
>
> Acked-by: Klaus Jensen
>
> I'll give it a proper R-b when you drop the RFC status.
Hi Klaus,
Sorry for the late response. I will submit a new RFC patch series very
soon.
Now the zone states should
On Mon, Jan 22, 2024 at 10:42 AM Peter Maydell wrote:
>
> On Fri, 19 Jan 2024 at 20:47, Max Filippov wrote:
> >
> > Whether TLB ways 5 and 6 are variable is not a property of the TLB
> > instance or a TLB entry instance, it's a property of the xtensa core
> > configuration.
> > Remove 'varway56'
uri_string_unescape() basically does the same as the glib function
g_uri_unescape_string(), with just an additional length parameter.
So we can simplify this function a lot by limiting the length with
g_strndup() first and then by calling g_uri_unescape_string() instead
of walking through the
It is not used in QEMU - and if somebody needs this functionality,
they can simply use g_uri_escape_string() from the glib instead.
Signed-off-by: Thomas Huth
---
include/qemu/uri.h | 1 -
util/uri.c | 64 --
2 files changed, 65 deletions(-)
These rather complex functions have never been used since they've been
introduced in 2012, so looks like they are not really useful for QEMU.
And since the static normalize_uri_path() function is also only used by
uri_resolve(), we can remove that function now, too.
Signed-off-by: Thomas Huth
They are not used anywhere, so there's no need to keep them around.
Signed-off-by: Thomas Huth
---
util/uri.c | 13 -
1 file changed, 13 deletions(-)
diff --git a/util/uri.c b/util/uri.c
index 5f5ca79792..2deab91da3 100644
--- a/util/uri.c
+++ b/util/uri.c
@@ -163,19 +163,6 @@
All callers pass NULL as target, so we can simplify the code by
dropping this parameter.
Signed-off-by: Thomas Huth
---
include/qemu/uri.h | 2 +-
util/uri.c | 32 ++--
2 files changed, 15 insertions(+), 19 deletions(-)
diff --git a/include/qemu/uri.h
The URI function uri_string_unescape() has some overlap with functions
from the glib, so we can simplify our code here quite a bit.
While at it, I also noticed that there are many unused functions in
here which we likely can drop nowadays (it's better to use the functions
from glib anyway).
Am 22.01.24 um 20:17 schrieb Thomas Huth:
These rather complex functions have never been used since they've been
introduced in 2012, so looks like they are not really useful for QEMU.
And since the static normalize_uri_path() function is also only used by
uri_resolve(), we can remove that
Add a note on CPU features that are off by default in `virt` machines.
Some CPU features will remain off even if a CPU-capable CPU (e.g.,
`-cpu max`) is selected because they require support in both the CPU
itself and in the wider system. Therefore, the user, besides selecting a
CPU that supports
From: Nabih Estefan Diaz
- Created qtest to check initialization of registers in GMAC Module.
- Implemented test into Build File.
Change-Id: I8b2fe152d3987a7eec4cf6a1d25ba92e75a5391d
Signed-off-by: Nabih Estefan
Reviewed-by: Tyrone Ting
---
tests/qtest/meson.build | 1 +
From: Hao Wu
This patches adds a qtest for NPCM7XX PCI Mailbox module.
It sends read and write requests to the module, and verifies that
the module contains the correct data after the requests.
Change-Id: I2e1dbaecf8be9ec7eab55cb54f7fdeb0715b8275
Signed-off-by: Hao Wu
Signed-off-by: Nabih
From: Nabih Estefan Diaz
[Changes since v13]
Added a couple clarifying comments and documentation about chardev
device expected protocol for ease of review.
[Changes since v12]
Fix errors found when testing in big-endian host.
[Changes since v11]
Branch couldn't be merged with master because
Zone descriptor extension data (ZDED) is not persistent across QEMU
restarts. The zone descriptor extension valid bit (ZDEV) is part of
zone attributes, which sets to one when the ZDED is associated with
the zone.
With the qcow2 img as the backing file, the NVMe ZNS device stores
the zone
On Fri, 2024-01-19 at 16:35 +, Peter Maydell wrote:
> Switch the s390x virtual-css bus from using BusClass::reset to the
> Resettable interface.
>
> This has no behavioural change, because the BusClass code to support
> subclasses that use the legacy BusClass::reset will call that method
> in
On Fri, 19 Jan 2024 at 13:24, Manos Pitsidianakis
wrote:
>
> Tracing DPRINTFs to stderr might not be desired. A developer that relies
> on trace events should be able to opt-in to each trace event and rely on
> QEMU's log redirection, instead of stderr by default.
>
> This commit converts
On Mon, Jan 22, 2024 at 10:29 AM Peter Maydell wrote:
>
> On Fri, 19 Jan 2024 at 20:47, Max Filippov wrote:
> >
> > Make separation of alternative xtensa memory management options state
> > explicit.
> >
> > Signed-off-by: Max Filippov
> > ---
> > target/xtensa/cpu.h| 18
ZNS emulation follows NVMe ZNS spec but the state of namespace
zones does not persist accross restarts of QEMU. This patch makes the
metadata of ZNS emulation persistent by using new block layer APIs and
the qcow2 img as backing file. It is the second part after the patches
- adding full zoned
The NVMe ZNS command set has the zone descriptor extension feature for
associating the data to a zone. Devices that supports ZAC/ZBC have zero
zone descriptor extension size.
Signed-off-by: Sam Li
---
docs/interop/qcow2.txt | 9 +
1 file changed, 9 insertions(+)
diff --git
The zone information is contained in the BlockLimits fileds. Add blk_get_*()
functions
to access the block layer and update zone info accessing in the NVMe device
emulation.
Signed-off-by: Sam Li
---
block/block-backend.c | 72 +++
hw/nvme/ctrl.c
Zone descriptor extension data is host definied data that is
associated with each zone. Add zone descriptor extensions
to zonedmeta struct.
Signed-off-by: Sam Li
---
block/qcow2.c| 70 +---
block/qcow2.h| 2 +
The NVMe ZNS devices follow NVMe ZNS spec but the state of namespace
zones does not persist accross restarts of QEMU. This patch makes the
metadata of ZNS emulation persistent by using new block layer APIs. The
ZNS device calls zone report and zone mgmt APIs from the block layer
which will handle
Signed-off-by: Sam Li
---
block/qcow2.c| 2 +-
hw/nvme/ctrl.c | 190 ---
include/sysemu/dma.h | 3 +
system/dma-helpers.c | 17
4 files changed, 162 insertions(+), 50 deletions(-)
diff --git a/block/qcow2.c b/block/qcow2.c
index
On Mon, Jan 22, 2024 at 08:17:48PM +0100, Thomas Huth wrote:
> The URI function uri_string_unescape() has some overlap with functions
> from the glib, so we can simplify our code here quite a bit.
> While at it, I also noticed that there are many unused functions in
> here which we likely can drop
On Mon, Jan 22, 2024 at 5:19 PM Daniel P. Berrangé
wrote:
>
> If the DRBG is required for FIPS compliance, and QEMU hardcoded
> the system RNG, then QEMU can't be used in a FIPS environment.
>
No, the library overrides this choice.. the DRBG has higher priority.
On Mon, 22 Jan 2024 at 18:45, Max Filippov wrote:
>
> On Mon, Jan 22, 2024 at 10:29 AM Peter Maydell
> wrote:
> >
> > On Fri, 19 Jan 2024 at 20:47, Max Filippov wrote:
> > > +union {
> > > +XtensaMMU mmu;
> > > +XtensaMPU mpu;
> > > +};
> >
> > Is it really worth having
Features supported :
- the 8 STM32L4x5 GPIOs are initialized with their reset values
(except IDR, see below)
- input mode : setting a pin in input mode "externally" (using input
irqs) results in an out irq (transmitted to SYSCFG)
- output mode : setting a bit in ODR sets the corresponding
Signed-off-by: Arnaud Minier
Signed-off-by: Inès Varhol
---
hw/arm/Kconfig | 3 +-
hw/arm/stm32l4x5_soc.c | 79 --
include/hw/arm/stm32l4x5_soc.h | 2 +
3 files changed, 69 insertions(+), 15 deletions(-)
diff --git a/hw/arm/Kconfig
On Mon, Jan 22, 2024 at 04:00:44PM +, Alex Bennée wrote:
> Ilya Leoshkevich writes:
>
> > Both the report() function as well as the initial gdbstub test sequence
> > are copy-pasted into ~10 files with slight modifications. This
> > indicates that they are indeed generic, so factor them out.
On Mon, Jan 22, 2024 at 05:08:09PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Mon, Sep 11, 2023 at 02:13:18PM -0300, Fabiano Rosas wrote:
> >> Stop using outside knowledge about the io channels when registering
> >> yank functions. Query for features instead.
> >>
> >> The yank
Put 'name' declaration inside the loop, with g_autofree, to avoid
manually doing g_free() in each iteration.
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/virt.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index
We have a lot of cases where a char or an uint32_t pointer is used once
to alloc a string/array, read/written during the function, and then
g_free() at the end. There's no pointer re-use - a single alloc, a
single g_free().
Use 'g_autofree' to avoid the g_free() calls.
Signed-off-by: Daniel
Move 'clust_name' inside the loop, and g_autofree, to avoid having to
g_free() manually in each loop iteration.
'intc_phandles' is also g_autofreed to avoid another manual g_free().
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/virt.c | 9 +++--
1 file changed, 3 insertions(+), 6
Move 'soc_name' to the loop, and give it g_autofree, to avoid the manual
g_free().
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/virt.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index f8278df83f..710fbbda2c 100644
---
On Fri, Jan 19, 2024 at 08:39:17PM -0300, Fabiano Rosas wrote:
> We currently have a bug when running migration code in bottom
> halves. The issue has already been reported in Gitlab[1] and it
> started happening very frequently on my machine for some reason.
>
> The issue is that we're dropping
On Mon, Jan 22, 2024 at 12:39:06PM -0300, Fabiano Rosas wrote:
> pet...@redhat.com writes:
>
> > From: Peter Xu
> >
> > The current article is not extremely easy to follow, and may contain too
> > much information for someone looking for solutions on VMSD compatibility
> > issues. Meanwhile,
On Sun, Jan 14, 2024 at 11:01 PM Shivam Kumar wrote:
>
>
>
> > On 04-Jan-2024, at 6:14 AM, Hao Xiang wrote:
> >
> > From: Juan Quintela
> >
> > This implements the zero page dection and handling.
> >
> > Signed-off-by: Juan Quintela
> > ---
> > migration/multifd.c | 41
On Fri Jan 19, 2024 at 10:23 AM AEST, David Gibson wrote:
> On Fri, Jan 19, 2024 at 12:09:36AM +1000, Nicholas Piggin wrote:
> > SAO is a page table attribute that strengthens the memory ordering of
> > accesses. QEMU with MTTCG does not implement this, so clear it in
> > ibm,pa-features. There is
On Sun, Jan 14, 2024 at 10:02 PM Shivam Kumar wrote:
>
>
>
> > On 04-Jan-2024, at 6:14 AM, Hao Xiang wrote:
> >
> > From: Juan Quintela
> >
> > We have to enable it by default until we introduce the new code.
> >
> > Signed-off-by: Juan Quintela
> > ---
> > migration/options.c | 15
On Fri Jan 19, 2024 at 6:58 PM AEST, Cédric Le Goater wrote:
> Hello Nick,
>
> On 1/18/24 16:06, Nicholas Piggin wrote:
> > This is mostly TCG core emulation improvements and fixes. I
> > got the chiptod model in there because it's intertwined with
> > TFMR SPR.
> >
> > Other non-TCG patches are
On 1/23/24 01:26, Peter Maydell wrote:
On Sun, 21 Jan 2024 at 00:22, Richard Henderson
wrote:
The following changes since commit 3f2a357b95845ea0bf7463eff6661e43b97d1afc:
Merge tag 'hw-cpus-20240119' of https://github.com/philmd/qemu into staging
(2024-01-19 11:39:38 +)
are
Ilya Leoshkevich writes:
> On Mon, Jan 22, 2024 at 03:54:32PM +, Alex Bennée wrote:
>> Ilya Leoshkevich writes:
>>
>> > Make sure that qemu gdbstub, like gdbserver, allows reading from and
>> > writing to PROT_NONE pages.
>> >
>> > Signed-off-by: Ilya Leoshkevich
>> > ---
>> >
On Thu, Nov 16, 2023 at 7:14 AM Fabiano Rosas wrote:
>
> Hao Xiang writes:
>
> > From: Juan Quintela
> >
> > Signed-off-by: Juan Quintela
> > Reviewed-by: Leonardo Bras
> > ---
> > migration/multifd.c | 7 ---
> > migration/options.c | 13 +++--
> > migration/ram.c | 45
Hi,
First patch fixes a leak found when using Valgrind. The root cause is a
missing g_free() in a string.
In fact, I found while doing reviews that we keep repeating the same
pattern:
char *name;
name = g_strdup_printf(...);
(...)
g_free(name);
With this in mind, I ended up making
Move all char pointers to the loop. Use g_autofree in all of them to
avoid the g_free() calls.
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/virt.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index
The 'isa' char pointer isn't being freed after use.
Issue detected by Valgrind:
==38752== 128 bytes in 1 blocks are definitely lost in loss record 3,190 of
3,884
==38752==at 0x484280F: malloc (vg_replace_malloc.c:442)
==38752==by 0x5189619: g_malloc (gmem.c:130)
==38752==by
Use g_autofree in 'dist_matrix' to avoid the manual g_free().
Signed-off-by: Daniel Henrique Barboza
---
hw/riscv/numa.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/numa.c b/hw/riscv/numa.c
index d319aefb45..cf686f4ff1 100644
--- a/hw/riscv/numa.c
+++
On Sun, Jan 14, 2024 at 10:46 PM Shivam Kumar wrote:
>
>
>
> > On 04-Jan-2024, at 6:14 AM, Hao Xiang wrote:
> >
> > 1. Refactor multifd_send_thread function.
> > 2. Implement buffer_is_zero_use_cpu to handle CPU based zero page
> > checking.
> > 3. Introduce the batch task structure in
On Fri Jan 19, 2024 at 8:09 AM AEST, Richard Henderson wrote:
> On 1/19/24 02:25, Nicholas Piggin wrote:
> > +/* attn enable check
> > */
> > +static inline int check_attn_none(CPUPPCState *env)
>
> Don't mark inline ...
>
> > @@ -2150,6
On Mon, Jan 22, 2024 at 01:55:45PM -0300, Fabiano Rosas wrote:
> Peter Xu writes:
>
> > On Mon, Jan 22, 2024 at 05:49:01PM +0800, Peter Xu wrote:
> >> On Fri, Jan 19, 2024 at 08:39:18PM -0300, Fabiano Rosas wrote:
> >> > We're currently allowing the process_incoming_migration_bh bottom-half
> >>
On Mon, Jan 22, 2024 at 04:01:12PM +1000, Alistair Francis wrote:
> On Thu, Dec 21, 2023 at 4:38 PM Ethan Chen wrote:
> >
> > On Mon, Dec 18, 2023 at 02:18:58PM +1000, Alistair Francis wrote:
> > > On Wed, Nov 22, 2023 at 3:36 PM Ethan Chen via
> > > wrote:
> > > >
> > > > This series
On 1/22/24 07:14, Joseph Burt wrote:
When tcg_out_qemu_st_{index,direct} were merged, the direct case for
MO_64 was omitted, causing qemu_st_i64 to be encoded as 0x due
to underflow when adding h.base and h.index.
Fixes: 1df6d611bdc2("tcg/arm: Introduce HostAddress")
Signed-off-by:
When running the command `qemu-img snapshot -l SNAPSHOT` the output of
VM_CLOCK (measures the offset between host and VM clock) cannot to
accommodate values in the order of thousands (4-digit).
This line [1] hints on the problem. Additionally, the column width for
the VM_CLOCK field was reduced
On 22/01/2024 05.11, Junho wrote:
Hello,
I'm a QEMU user with PowerPc target architecture.
I have some personal modifications related to tb jmp cache and chaining
logic to improve the performance of a specific guest code. To verify the
safety, I have to guarantee that the page table on RAM
Gentle ping...
Please help to review and consider applying the patch series. (The KVM
part has been merged).
On 1/12/2024 2:00 PM, Binbin Wu wrote:
Linear-address masking (LAM) [1], modifies the checking that is applied to
*64-bit* linear addresses, allowing software to use of the untranslated
This patch adds a new device STM32L4x5 GPIO device and is part
of a series implementing the STM32L4x5 with a few peripherals.
Changes from RFC v1 :
- `stm32l4x5-gpio-test.c` : correct typos, make the test generic,
add a test for bitwise writing in register ODR
- `stm32l4x5_soc.c` : connect gpios
Features supported :
- the 8 STM32L4x5 GPIOs are initialized with their reset values
(except IDR, see below)
- input mode : setting a pin in input mode "externally" (using input
irqs) results in an out irq (transmitted to SYSCFG)
- output mode : setting a bit in ODR sets the corresponding
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