On 04.03.24 14:09, Peter Krempa wrote:
On Mon, Mar 04, 2024 at 11:48:54 +0100, Kevin Wolf wrote:
Am 28.02.2024 um 19:07 hat Vladimir Sementsov-Ogievskiy geschrieben:
On 03.11.23 18:56, Markus Armbruster wrote:
Kevin Wolf writes:
[...]
Is the job abstraction a failure?
We have
On 28/02/2024 17.43, Zhao Liu wrote:
Hi Philippe,
+/*
+ * Real ICH9 contains a single SMI output line and doesn't broadcast CPUs.
+ * Virtualized ICH9 allows broadcasting upon negatiation with guest, see
+ * commit 5ce45c7a2b.
+ */
+enum {
+ICH9_VIRT_SMI_BROADCAST,
+
On 3/7/24 08:26, Gustavo Romero wrote:
Move tswap_siginfo from target code to handle_pending_signal. This will
allow some cleanups and having the siginfo ready to be used in gdbstub.
Signed-off-by: Gustavo Romero
Suggested-by: Richard Henderson
---
linux-user/aarch64/signal.c | 2 +-
On 3/7/24 07:43, Thomas Huth wrote:
The output of "-cpu help" is currently rather confusing to the users:
It is not clear which part of the output defines the CPU names since
the CPU names contain white spaces (which we later have to convert
into dashes internally) For example:
Sparc TI
Signed-off-by: Alex Bennée
---
include/exec/memory.h | 47 +++
1 file changed, 43 insertions(+), 4 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 17b741bc4f5..312ed564dbe 100644
--- a/include/exec/memory.h
+++
On 3/7/24 09:55, Daniel Henrique Barboza wrote:
(--- adding Richard ---)
On 3/6/24 06:33, Huang Tao wrote:
In this patch, we modify the decoder to be a freely composable data
structure instead of a hardcoded one. It can be dynamically builded up
according to the extensions.
This approach has
On 3/7/24 08:26, Gustavo Romero wrote:
Rename gdb_handlesig_reason back to gdb_handlesig. There is no need to
add a wrapper for gdb_handlesig and rename it when a new parameter is
added.
Signed-off-by: Gustavo Romero
---
gdbstub/user.c | 8
include/gdbstub/user.h | 15
On 3/7/24 08:26, Gustavo Romero wrote:
+void gdb_handle_query_xfer_siginfo(GArray *params, void *user_ctx)
+{
+unsigned long offset, len;
+uint8_t *siginfo_offset;
+
+offset = get_param(params, 0)->val_ul;
+len = get_param(params, 1)->val_ul;
+
+if (offset + len >
On 3/7/24 07:43, Thomas Huth wrote:
+/* Fix up legacy names with '+' in it */
+if (g_str_equal(typename, SPARC_CPU_TYPE_NAME("Sun-UltraSparc-IV+"))) {
+g_free(typename);
+typename = g_strdup(SPARC_CPU_TYPE_NAME("Sun-UltraSparc-IVp"));
+} else if (g_str_equal(typename,
On 23/02/2024 15:57, Laurent Vivier wrote:
BI_CPUTYPE/BI_MMUTYPE/BI_FPUTYPE were statically assigned to the
68040 information.
This patch changes the code to set in bootinfo the information
provided by the command line '-cpu' parameter.
Bug: https://gitlab.com/qemu-project/qemu/-/issues/2091
On Thu, Mar 07, 2024 at 12:16:05PM +, Jonathan Cameron wrote:
> > > > @@ -868,16 +974,24 @@ static int
> > > > cxl_type3_hpa_to_as_and_dpa(CXLType3Dev *ct3d,
> > > > AddressSpace **as,
> > > > uint64_t
Move tswap_siginfo from target code to handle_pending_signal. This will
allow some cleanups and having the siginfo ready to be used in gdbstub.
Signed-off-by: Gustavo Romero
Suggested-by: Richard Henderson
---
linux-user/aarch64/signal.c | 2 +-
linux-user/alpha/signal.c | 2 +-
On 3/7/24 04:36, Wu, Fei wrote:
On 3/6/2024 9:26 PM, Wu, Fei wrote:
On 3/5/2024 1:58 PM, Wu, Fei wrote:
On 3/5/2024 3:43 AM, Daniel Henrique Barboza wrote:
On 3/4/24 07:25, Fei Wu wrote:
The harts requirements of RISC-V server platform [1] require RVA23 ISA
profile support, plus Sv48,
On 3/7/24 08:11, Alex Bennée wrote:
Signed-off-by: Alex Bennée
---
include/exec/memory.h | 47 +++
1 file changed, 43 insertions(+), 4 deletions(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 17b741bc4f5..312ed564dbe 100644
---
On 3/7/24 07:43, Thomas Huth wrote:
Remove the unnecessary "Sparc" at the beginning of the line and
put the chip information into parentheses so that it is clearer
which part of the line have to be passed to "-cpu" to specify a
different CPU.
On 3/7/24 17:11, Richard Henderson wrote:
On 3/7/24 09:55, Daniel Henrique Barboza wrote:
(--- adding Richard ---)
On 3/6/24 06:33, Huang Tao wrote:
In this patch, we modify the decoder to be a freely composable data
structure instead of a hardcoded one. It can be dynamically builded up
W dniu 4.03.2024 o 11:25, Fei Wu pisze:
The RISC-V Server Platform specification[1] defines a standardized
set of hardware and software capabilities, that portable system
software, such as OS and hypervisors can rely on being present in a
RISC-V server platform. This patchset provides a RISC-V
Richard Henderson writes:
> On 3/7/24 08:11, Alex Bennée wrote:
>> Signed-off-by: Alex Bennée
>> ---
>> include/exec/memory.h | 47 +++
>> 1 file changed, 43 insertions(+), 4 deletions(-)
>> diff --git a/include/exec/memory.h b/include/exec/memory.h
>>
On Thu, Mar 07, 2024 at 05:53:24PM +, Kim, Dongwon wrote:
> Hi Daniel,
>
> > -Original Message-
> > From: Daniel P. Berrangé
> > Sent: Thursday, March 7, 2024 1:46 AM
> > To: Kim, Dongwon
> > Cc: Marc-André Lureau ; qemu-
> > de...@nongnu.org
> > Subject: Re: [PATCH 1/3] ui/gtk:
Add multiarch test for testing if Xfer:siginfo:read query is properly
handled by gdbstub.
Signed-off-by: Gustavo Romero
---
tests/tcg/multiarch/Makefile.target | 10 ++-
.../gdbstub/test-qxfer-siginfo-read.py| 26 +++
tests/tcg/multiarch/segfault.c
Rename gdb_handlesig_reason back to gdb_handlesig. There is no need to
add a wrapper for gdb_handlesig and rename it when a new parameter is
added.
Signed-off-by: Gustavo Romero
---
gdbstub/user.c | 8
include/gdbstub/user.h | 15 ++-
linux-user/main.c | 2 +-
Save target's siginfo into gdbserver_state so it can be used later, for
example, in any stub that requires the target's si_signo and si_code.
This change affects only linux-user mode.
Signed-off-by: Gustavo Romero
Suggested-by: Richard Henderson
---
gdbstub/internals.h| 3 +++
Add stub to handle Xfer:siginfo:read packet query that requests the
machine's siginfo data.
This is used when GDB user executes 'print $_siginfo' and when the
machine stops due to a signal, for instance, on SIGSEGV. The information
in siginfo allows GDB to determiner further details on the
Gustavo Romero writes:
> Move tswap_siginfo from target code to handle_pending_signal. This will
> allow some cleanups and having the siginfo ready to be used in gdbstub.
>
> Signed-off-by: Gustavo Romero
> Suggested-by: Richard Henderson
> ---
> linux-user/aarch64/signal.c | 2 +-
>
Hi Daniel,
> -Original Message-
> From: Daniel P. Berrangé
> Sent: Thursday, March 7, 2024 10:01 AM
> To: Kim, Dongwon
> Cc: Marc-André Lureau ; qemu-
> de...@nongnu.org
> Subject: Re: [PATCH 1/3] ui/gtk: skip drawing guest scanout when associated
> VC is invisible
>
> On Thu, Mar 07,
- for (size_t i = 0; i < ARRAY_SIZE(decoders); ++i) {
- if (decoders[i].guard_func(ctx->cfg_ptr) &&
- decoders[i].decode_func(ctx, opcode32)) {
+ for (size_t i = 0; i < decoder_table_size; ++i) {
+ if (ctx->decoder[i](ctx, opcode32)) {
On 3/7/24 09:21, Alex Bennée wrote:
+/*
+ * Writes out siginfo values byteswapped, accordingly to the target. It
also
+ * cleans the si_type from si_code making it correct for the target.
+ */
+tswap_siginfo(>info, >info);
+
I'm not sure I like this, you have the same
On 3/7/24 08:26, Gustavo Romero wrote:
Add multiarch test for testing if Xfer:siginfo:read query is properly
handled by gdbstub.
Signed-off-by: Gustavo Romero
---
tests/tcg/multiarch/Makefile.target | 10 ++-
.../gdbstub/test-qxfer-siginfo-read.py| 26
The output of info qtree monitor command is very long. Add an option
to print a brief overview omitting all the details.
Signed-off-by: BALATON Zoltan
Reviewed-by: Dr. David Alan Gilbert
---
v2:
- Change the variable name to deails too
- Add braces to if (checkpatch did not warn for this so
On 3/7/24 08:26, Gustavo Romero wrote:
Save target's siginfo into gdbserver_state so it can be used later, for
example, in any stub that requires the target's si_signo and si_code.
This change affects only linux-user mode.
Signed-off-by: Gustavo Romero
Suggested-by: Richard Henderson
---
Since d197063fcf9 (memory: move unassigned_mem_ops to memory.c) this
field is unused.
Signed-off-by: Alex Bennée
---
include/exec/memory.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 8626a355b31..17b741bc4f5 100644
---
The RAMBlock concept is fairly central to RAM-like MemoryRegions so
lets update the structure documentation and include in the docs.
Signed-off-by: Alex Bennée
---
docs/devel/memory.rst | 1 +
include/exec/ramblock.h | 76 +++--
2 files changed, 52
As I've been looking through the Memory API for our Xen work I thought
I should take the time to clean it up. I needed to teach kdoc about
our QLIST_ macros and I found at least one unused field in the
structure.
Looking through the definitions I do wander if the meaning of
romd_mode and
The kernel-doc script does some pre-processing on structure
definitions before parsing for names. Teach it about QLIST and replace
with simplified structures representing the base type.
Signed-off-by: Alex Bennée
---
scripts/kernel-doc | 9 -
1 file changed, 8 insertions(+), 1
This allows sphinx to hyperlink the references to their kdoc
definitions for easy navigation.
Signed-off-by: Alex Bennée
---
docs/devel/memory.rst | 48 +--
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/docs/devel/memory.rst
On 04/03/2024 16.12, Anthony Krowiak wrote:
On 2/29/24 12:30 PM, Thomas Huth wrote:
On 29/02/2024 15.39, Zhao Liu wrote:
From: Zhao Liu
As the comment in qapi/error, passing @errp to error_prepend() requires
ERRP_GUARD():
* = Why, when and how to use ERRP_GUARD() =
*
* Without
(--- adding Richard ---)
On 3/6/24 06:33, Huang Tao wrote:
In this patch, we modify the decoder to be a freely composable data
structure instead of a hardcoded one. It can be dynamically builded up
according to the extensions.
This approach has several benefits:
1. Provides support for
Am 1. März 2024 18:59:32 UTC schrieb "Philippe Mathieu-Daudé"
:
>Trivial cleanups, mostly around the 'isapc' machine.
>
>Philippe Mathieu-Daudé (4):
> hw/i386/pc: Remove pc_compat_1_4..1.7[] left over declarations
> hw/i386/pc: Use generated NotifyVmexitOption_str()
> hw/i386/pc: Remove
On 3/7/24 13:54, Stefan Berger wrote:
On 2/7/24 11:08, Chalapathi V wrote:
+#define COUNTER_CONFIG_REG_SHIFT_COUNT_N1 PPC_BITMASK(0 , 7)
No space before the ',' ==> PPC_BITMASK(0, 7)
On 3/7/24 09:17, Heinrich Schuchardt wrote:
On 07.03.24 08:36, Wu, Fei2 wrote:
On 3/6/2024 9:26 PM, Wu, Fei wrote:
On 3/5/2024 1:58 PM, Wu, Fei wrote:
On 3/5/2024 3:43 AM, Daniel Henrique Barboza wrote:
On 3/4/24 07:25, Fei Wu wrote:
The harts requirements of RISC-V server platform [1]
On 3/6/24 21:37, Xianglai Li wrote:
When we use qemu tcg simulation, the page size of bios is 4KB.
When using the level 2 super large page (page size is 1G) to create the page
table,
it is found that the content of the corresponding address space is abnormal,
resulting in the bios can not start
On 7/3/24 19:11, Alex Bennée wrote:
Since d197063fcf9 (memory: move unassigned_mem_ops to memory.c) this
field is unused.
Signed-off-by: Alex Bennée
---
include/exec/memory.h | 1 -
1 file changed, 1 deletion(-)
10+ years ;)
Reviewed-by: Philippe Mathieu-Daudé
On 3/7/24 08:11, Alex Bennée wrote:
Since d197063fcf9 (memory: move unassigned_mem_ops to memory.c) this
field is unused.
Signed-off-by: Alex Bennée
---
include/exec/memory.h | 1 -
1 file changed, 1 deletion(-)
Reviewed-by: Richard Henderson
r~
Richard Henderson writes:
> On 3/7/24 08:26, Gustavo Romero wrote:
>> Save target's siginfo into gdbserver_state so it can be used later, for
>> example, in any stub that requires the target's si_signo and si_code.
>> This change affects only linux-user mode.
>> Signed-off-by: Gustavo Romero
>>
The PCI 2.3 spec added definitions of the INTx disable and status bits,
in the command and status registers respectively. The command register
bit, commonly known as DisINTx in lspci, controls whether the device
can assert the INTx signal.
Operating systems will often write to this bit to test
On 7/3/24 18:43, Thomas Huth wrote:
Remove the unnecessary "Sparc" at the beginning of the line and
put the chip information into parentheses so that it is clearer
which part of the line have to be passed to "-cpu" to specify a
different CPU.
Resolves:
On 2/7/24 11:08, Chalapathi V wrote:
SPI controller device model supports a connection to a single SPI responder.
This provide access to SPI seeproms, TPM, flash device and an ADC controller.
All SPI function control is mapped into the SPI register space to enable full
control by firmware.
Gustavo Romero writes:
> Rename gdb_handlesig_reason back to gdb_handlesig. There is no need to
> add a wrapper for gdb_handlesig and rename it when a new parameter is
> added.
>
> Signed-off-by: Gustavo Romero
Reviewed-by: Alex Bennée
--
Alex Bennée
Virtualisation Tech Lead @ Linaro
Add reset support.
Signed-off-by: Angelo Dureghello
---
hw/m68k/mcf5208.c | 51 ---
1 file changed, 48 insertions(+), 3 deletions(-)
diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c
index 0cfb806c20..b1ab3896d0 100644
--- a/hw/m68k/mcf5208.c
+++
On 3/7/24 07:50, Gustavo Romero wrote:
Hi Richard,
On 3/4/24 7:51 PM, Richard Henderson wrote:
On 3/4/24 10:59, Gustavo Romero wrote:
Perhaps just abort for SIGABRT instead?
Although this can make a simpler test, the test can't control
the si_addr value easily, which I think is interesting
On 3/5/2024 6:52 PM, Gerd Hoffmann wrote:
Query kvm for supported guest physical address bits, in cpuid
function 8008, eax[23:16]. Usually this is identical to host
physical address bits. With NPT or EPT being used this might be
restricted to 48 (max 4-level paging address space size) even
07.03.2024 21:57, Bernhard Beschow :
Am 1. März 2024 18:59:32 UTC schrieb "Philippe Mathieu-Daudé"
:
Trivial cleanups, mostly around the 'isapc' machine.
Philippe Mathieu-Daudé (4):
hw/i386/pc: Remove pc_compat_1_4..1.7[] left over declarations
hw/i386/pc: Use generated
On Fri, Mar 08, 2024 at 07:27:59AM +0100, Yu Zhang wrote:
> Hello Zhijian and Peter,
>
> Thank you so much for testing and confirming it.
> I created a patch in the email format, unfortunately got an issue for
> setting up the
> "Application-specific Password" in Gmail. It seems that in my gmail
Fiona Ebner writes:
> Backup supports all modes listed in MirrorSyncMode, while mirror does
> not. Introduce BackupSyncMode by copying the current MirrorSyncMode
> and drop the variants mirror does not support from MirrorSyncMode as
> well as the corresponding manual check in mirror_start().
On 07/03/2024 22.22, Richard Henderson wrote:
On 3/7/24 07:43, Thomas Huth wrote:
+ /* Fix up legacy names with '+' in it */
+ if (g_str_equal(typename, SPARC_CPU_TYPE_NAME("Sun-UltraSparc-IV+"))) {
+ g_free(typename);
+ typename =
On Wed, Mar 06, 2024 at 02:34:22PM +0100, Cédric Le Goater wrote:
> @@ -404,6 +403,10 @@ static int init_blk_migration(QEMUFile *f)
> sectors = bdrv_nb_sectors(bs);
> if (sectors <= 0) {
Not directly relevant to this patch, but just to mention that this looks
suspicious (even if
On 2024/1/4 8:44, Hao Xiang wrote:
> v3
> * Rebase on top of 7425b6277f12e82952cede1f531bfc689bf77fb1.
> * Fix error/warning from checkpatch.pl
> * Fix use-after-free bug when multifd-dsa-accel option is not set.
> * Handle error from dsa_init and correctly propogate the error.
> * Remove
On 2024-03-07 20:10, jonathan.cameron wrote:
> Hack is fine the relevant device with lspci -tv and then use
> setpci -s 0d:00.0 0x208.l=0
> to clear all the mask bits for uncorrectable errors.
Thanks! The suggestions from you and Terry did work!
BTW, is my understanding below about CXL RAS
On Wed, Feb 7, 2024 at 10:00 PM Christoph Müllner
wrote:
>
> Upstream Linux recently added many additional keys to the hwprobe API.
> This patch adds support for all of them with the exception of Ztso,
> which is currently not supported in QEMU.
>
> Signed-off-by: Christoph Müllner
> ---
>
Update bios-bits docs to add more details on why a pre-OS environment for
testing bioses is useful. Add author's FOSDEM talk link. Also improve the
formating of the document while at it.
CC: qemu-triv...@nongnu.org
Signed-off-by: Ani Sinha
---
docs/devel/acpi-bits.rst | 55
Igor Mammedov writes:
> later patches will use it to pick SMBIOS version at runtime
> depending on configuration.
>
> Signed-off-by: Igor Mammedov
> Acked-by: Markus Armbruster
> Reviewed-by: Ani Sinha
> Tested-by: Fiona Ebner
> ---
> qapi/machine.json | 5 -
> 1 file changed, 4
On Thu, Mar 07, 2024 at 03:37:06PM +, Jonathan Cameron wrote:
> v2: (Thanks to Peter Xu for reviewing!)
> - New patch 1 to rename addr1 to mr_addr in the interests of meaningful
> naming.
> - Take advantage of a cached address space only allow for a single MR to
> simplify
> the new code.
On 3/7/24 14:55, Cédric Le Goater wrote:
> On 3/7/24 10:13, Eric Auger wrote:
>>
>>
>> On 3/6/24 14:34, Cédric Le Goater wrote:
>>> Use vmstate_save_state_with_err() to improve error reporting in the
>>> callers and store a reported error under the migration stream. Add
>>> documentation while
On Thu, Mar 07, 2024 at 06:11:01PM +, Alex Bennée wrote:
> The kernel-doc script does some pre-processing on structure
> definitions before parsing for names. Teach it about QLIST and replace
> with simplified structures representing the base type.
>
> Signed-off-by: Alex Bennée
> ---
>
On Thu, Mar 07, 2024 at 12:06:59PM +0300, Maksim Davydov wrote:
>
> On 3/6/24 04:57, Peter Xu wrote:
> > On Tue, Mar 05, 2024 at 03:43:41PM +0100, Markus Armbruster wrote:
> > > Peter Maydell writes:
> > >
> > > > On Mon, 4 Mar 2024 at 13:52, Maksim Davydov
> > > > wrote:
> > > > > The
04.03.2024 13:44, Thomas Huth wrote:
When setting GLIB_VERSION_MAX_ALLOWED to GLIB_VERSION_2_58 or higher
(which we'll certainly do in the not too distant future), glib adds
type safety checks to the g_steal_pointer() macro. This triggers
errors in the cxl code since the pointer types do not
On Mon, Feb 26, 2024 at 6:23 PM Andrew Melnichenko wrote:
>
> Hi all,
> Jason, can you please review the patch set, thank you.
Queued.
Thanks
On 08/03/2024 14:55, Peter Xu wrote:
> On Fri, Mar 08, 2024 at 07:27:59AM +0100, Yu Zhang wrote:
>> Hello Zhijian and Peter,
>>
>> Thank you so much for testing and confirming it.
>> I created a patch in the email format, unfortunately got an issue for
>> setting up the
>> "Application-specific
On 3/7/24 13:06, Cédric Le Goater wrote:
> On 3/7/24 09:09, Eric Auger wrote:
>> Hi Cédric,
>>
>> On 3/6/24 14:34, Cédric Le Goater wrote:
>>> We will use the Error object to improve error reporting in the
>>> .log_global*() handlers of VFIO. Add documentation while at it.
>>>
>>> Reviewed-by:
On 3/7/24 14:36, Cédric Le Goater wrote:
> On 3/7/24 10:28, Eric Auger wrote:
>>
>>
>> On 3/6/24 14:34, Cédric Le Goater wrote:
>>> vfio_save_complete_precopy() currently returns before doing the trace
>>> event. Change that.
>>>
>>> Signed-off-by: Cédric Le Goater
>>> ---
>>>
Fiona Ebner writes:
> From: John Snow
>
> for the mirror job. The bitmap's granularity is used as the job's
> granularity.
>
> The new @bitmap parameter is marked unstable in the QAPI and can
> currently only be used for @sync=full mode.
>
> Clusters initially dirty in the bitmap as well as new
> This last two lines doesn't make sense to me. Isn't the grab
> toggling entirely in control of the QEMU process, regardless
> of what state the guest is at ?
Actually, you're right, they do not make sense. This issue of having the guest
taking a while to start and the toggle keys not working,
If you try to run the configure script on a system without a working
C compiler, you get a very misleading error message:
ERROR: Unrecognized host OS (uname -s reports 'Linux')
We should rather tell the user that we were not able to use the C
compiler instead, otherwise they will have a hard
08.03.2024 07:22, Ani Sinha :
Update bios-bits docs to add more details on why a pre-OS environment for
testing bioses is useful. Add author's FOSDEM talk link. Also improve the
formating of the document while at it.
CC: qemu-triv...@nongnu.org
Signed-off-by: Ani Sinha
Reviewed-by: Michael
Hi Marc-André,
> -Original Message-
> From: Marc-André Lureau
> Sent: Tuesday, March 5, 2024 4:18 AM
> To: Kim, Dongwon ; P. Berrange, Daniel
>
> Cc: qemu-devel@nongnu.org
> Subject: Re: [PATCH 0/3] ui/gtk: introducing vc->visible
>
> Hi Kim
>
> I am uncomfortable with the series in
Hi Daniel and Alistair,
Hope it is not too late. I think there are two bugs in this patch.
1) The first is for instruction vfmv.s.f. vfmv.s.f doesn't use helper
function. If we remove the over check, it will set the first element of
destination vector register, which is against the
On Thu, Mar 07, 2024 at 02:39:31PM +0300, Vladimir Sementsov-Ogievskiy wrote:
> > I would be glad to have most of this series merged in QEMU 9.0. So,
> > unless there is something major, I will keep that for followups.
Unfortunately I found this series won't apply to master.. starting from
Hi
On Fri, Mar 8, 2024 at 4:59 AM Kim, Dongwon wrote:
>
> Hi Marc-André,
>
> > -Original Message-
> > From: Marc-André Lureau
> > Sent: Tuesday, March 5, 2024 4:18 AM
> > To: Kim, Dongwon ; P. Berrange, Daniel
> >
> > Cc: qemu-devel@nongnu.org
> > Subject: Re: [PATCH 0/3] ui/gtk:
NACK
We have established that the change is a workaround for a bug in
the assembler.
I withdraw the merge request.
Thank you for this careful review.
On Fri, Aug 11, 2023 at 4:55 AM Andrew Jones
wrote:
> On Fri, Aug 11, 2023 at 10:25:52AM +0200, Andrew Jones wrote:
> > On Thu, Aug 10, 2023 at
>-Original Message-
>From: Eric Auger
>Subject: [PATCH v8 7/9] hw/i386/q35: Set virtio-iommu aw-bits default
>value to 39
>
>Currently the default input range can extend to 64 bits. On x86,
>when the virtio-iommu protects vfio devices, the physical iommu
>may support only 39 bits. Let's
Hello Zhijian and Peter,
Thank you so much for testing and confirming it.
I created a patch in the email format, unfortunately got an issue for
setting up the
"Application-specific Password" in Gmail. It seems that in my gmail
account there
is no option at all for selecting "mail" before creating
On Fri, Mar 08, 2024 at 07:03:56AM +, Zhijian Li (Fujitsu) wrote:
>
>
> On 08/03/2024 14:55, Peter Xu wrote:
> > On Fri, Mar 08, 2024 at 07:27:59AM +0100, Yu Zhang wrote:
> >> Hello Zhijian and Peter,
> >>
> >> Thank you so much for testing and confirming it.
> >> I created a patch in the
On 3/7/24 10:04, Eric Auger wrote:
Hi Cédric,
On 3/6/24 14:34, Cédric Le Goater wrote:
Add an Error** argument to vfio_migration_set_state() and adjust
callers, including vfio_save_setup(). The error will be propagated up
to qemu_savevm_state_setup() where the save_setup() handler is
executed.
On 3/7/24 10:28, Eric Auger wrote:
On 3/6/24 14:34, Cédric Le Goater wrote:
vfio_save_complete_precopy() currently returns before doing the trace
event. Change that.
Signed-off-by: Cédric Le Goater
---
hw/vfio/migration.c | 3 ---
1 file changed, 3 deletions(-)
diff --git
Introduce a new enum type property allowing to set an
IOMMU granule. Values are 4k, 8k, 16k, 64k and host.
This latter indicates the vIOMMU granule will match
the host page size.
A subsequent patch will add such a property to the
virtio-iommu device.
Signed-off-by: Eric Auger
Signed-off-by:
aw-bits is a new option that allows to set the bit width of
the input address range. This value will be used as a default for
the device config input_range.end. By default it is set to 64 bits
which is the current value.
Signed-off-by: Eric Auger
Reviewed-by: Zhenzhong Duan
Reviewed-by: Cédric
This allows to choose which granule will be used by
default by the virtio-iommu. Current page size mask
default is qemu_target_page_mask so this translates
into a 4k granule on ARM and x86_64 where virtio-iommu
is supported.
Signed-off-by: Eric Auger
Reviewed-by: Philippe Mathieu-Daudé
This is a respin of
[1] [PATCH v5 0/4] VIRTIO-IOMMU: Introduce an aw-bits option
(https://lore.kernel.org/all/20240215084315.863897-1-eric.au...@redhat.com/)
which now also integrates
[PATCH v6 0/3] VIRTIO-IOMMU: Set default granule to host page size
Currently the default input range can extend to 64 bits. On x86,
when the virtio-iommu protects vfio devices, the physical iommu
may support only 39 bits. Let's set the default to 39, as done
for the intel-iommu.
We use hw_compat_8_2 to handle the compatibility for machines
before 9.0 which used
We are missing an entry for the virtio-iommu-pci device. Add the
information on which machine it is currently supported and document
the new granule option.
Signed-off-by: Eric Auger
---
v7 -> v8
- precise x86_64 and ARM
---
qemu-options.hx | 8
1 file changed, 8 insertions(+)
diff
On ARM we set 48b as a default (matching SMMUv3 SMMU_IDR5.VAX == 0).
hw_compat_8_2 is used to handle the compatibility for machine types
before 9.0 (default was 64 bits).
Signed-off-by: Eric Auger
Reviewed-by: Zhenzhong Duan
---
v6 -> v7
turn arm_virt_compat and arm_virt_compat_len static
We used to set the default granule to 4KB but with VFIO assignment
it makes more sense to use the actual host page size.
Indeed when hotplugging a VFIO device protected by a virtio-iommu
on a 64kB/64kB host/guest config, we current get a qemu crash:
"vfio: DMA mapping failed, unable to continue"
From: John Snow
for the mirror job. The bitmap's granularity is used as the job's
granularity.
The new @bitmap parameter is marked unstable in the QAPI and can
currently only be used for @sync=full mode.
Clusters initially dirty in the bitmap as well as new writes are
copied to the target.
Use %u format to trace domain_range limits.
Signed-off-by: Eric Auger
Reviewed-by: Zhenzhong Duan
Reviewed-by: Cédric Le Goater
---
hw/virtio/trace-events | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
index
Changes from RFC/v1 (discussion here [0]):
* Add patch to split BackupSyncMode and MirrorSyncMode.
* Drop bitmap-mode parameter and use passed-in bitmap as the working
bitmap instead. Users can get the desired behaviors by
using the block-dirty-bitmap-clear and block-dirty-bitmap-merge
calls
Document the new aw-bits option.
Signed-off-by: Eric Auger
---
v7 -> v8:
- remove "it defaults"
- removed Cedric's R-b
v4 -> v5
- tweek the aw-bits option description according to Cédric's
suggestion
---
qemu-options.hx | 3 +++
1 file changed, 3 insertions(+)
diff --git a/qemu-options.hx
On 07.03.24 12:46, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
system/qdev-monitor.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/system/qdev-monitor.c b/system/qdev-monitor.c
index
On Wed, 6 Mar 2024 13:39:50 -0800
fan wrote:
> > > +}
> > > +if (len2) {
> > > +cxl_insert_extent_to_extent_list(extent_list,
> > > dpa + len,
> > > + len2, NULL, 0);
> > >
Cédric Le Goater writes:
> This will prepare ground for future changes adding an Error** argument
> to the save_setup() handler. We need to make sure that on failure,
> ram_save_setup() sets a new error.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Fabiano Rosas
...
> > > +list = records;
> > > +extents = g_new0(CXLDCExtentRaw, num_extents);
> > > +while (list) {
> > > +CXLDCExtent *ent;
> > > +bool skip_extent = false;
> > > +
> > > +offset = list->value->offset;
> > > +len = list->value->len;
> > > +
> > > +
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