[Qemu-devel] [PATCH, MIPS] Code translation improvement

2007-06-14 Thread Aurelien Jarno
Hi, The patch below makes a few improvement to the code translation, and fixes a small bug: - The check for the bit ERL in CP0 Status register implies that the CPU is in kernel mode, so there is no need to further check for user mode. - Checking for the bit UM in CP0 Status register is not eno

Re: [Qemu-devel] CPUTLBEntry Question

2007-06-14 Thread amateur
On Thu, Jun 14, 2007 at 05:00:32PM +0300, Blue Swirl wrote: > On 6/14/07, amateur <[EMAIL PROTECTED]> wrote: > >The softmmu_header.h code does assume each TLB entry has a fixed size > >of (2^CPU_TLB_ENTRY_BITS) bytes. Not only the assembly code, but also > >the C code assume this. So if you want to

[Qemu-devel] ANN: DetaolB v0.3 is released

2007-06-14 Thread Christian MICHON
DetaolB v0.3 is being released 14th,June 2007 on sf.net => http://sourceforge.net/project/showfiles.php?group_id=140321&package_id=155481&release_id=516140 - this is mostly a release with tons of added features - this is mostly a proof of concept - this is not a bugfix release - your feedback wi

Re: [Qemu-devel] CPUTLBEntry Question

2007-06-14 Thread Ryan Riley
On 6/14/07, Paul Brook <[EMAIL PROTECTED]> wrote: > then QEMU crashes on startup. (It also crashes if I put that blah > entry on the beginning instead of the end.) I'm sure there's code > somewhere that must be making assumptions about the size of TLB entry, > but I'm at a loss for finding it.

[Qemu-devel] logging the sdl test error

2007-06-14 Thread Ben Taylor
This is short configure patch which saves the output of the libsdl test comile output for a file which can be reviewed after configure runs. This allows for easier debugging of why the libSDL test failed. Ben--- qemu/configure.ORIG 2007-06-14 13:58:26.144281000 -0400 +++ qemu/configure 2007-06-

Re: [Qemu-devel] Debugging guest OS / tracing instruction pointer

2007-06-14 Thread Clemens Kolbitsch
Paul Brook wrote: On Thursday 14 June 2007, Clemens Kolbitsch wrote: hi! i'm looking for a way to monitor the eip register. is there a simple way to do this? i know that that produces tons of data... even better would be to know where i could intercept the main-loop (exec_cpu ??) to check fo

Re: [Qemu-devel] Debugging guest OS / tracing instruction pointer

2007-06-14 Thread Paul Brook
On Thursday 14 June 2007, Clemens Kolbitsch wrote: > hi! > i'm looking for a way to monitor the eip register. is there a simple way > to do this? i know that that produces tons of data... > > even better would be to know where i could intercept the main-loop > (exec_cpu ??) to check for a certain e

[Qemu-devel] Debugging guest OS / tracing instruction pointer

2007-06-14 Thread Clemens Kolbitsch
hi! i'm looking for a way to monitor the eip register. is there a simple way to do this? i know that that produces tons of data... even better would be to know where i could intercept the main-loop (exec_cpu ??) to check for a certain eip value... could someone assist me doing that? thanks!

Re: [Qemu-devel] CPUTLBEntry Question

2007-06-14 Thread Blue Swirl
On 6/14/07, amateur <[EMAIL PROTECTED]> wrote: The softmmu_header.h code does assume each TLB entry has a fixed size of (2^CPU_TLB_ENTRY_BITS) bytes. Not only the assembly code, but also the C code assume this. So if you want to add new members into CPUTLBEntry, add the new member at the end of t

Re: [Qemu-devel] CPUTLBEntry Question

2007-06-14 Thread amateur
On Wed, Jun 13, 2007 at 04:25:07PM -0400, Ryan Riley wrote: > typedef struct CPUTLBEntry { >/* bit 31 to TARGET_PAGE_BITS : virtual address > bit TARGET_PAGE_BITS-1..IO_MEM_SHIFT : if non zero, memory io > zone number > bit 3

Re: [Qemu-devel] CPUTLBEntry Question

2007-06-14 Thread Paul Brook
> then QEMU crashes on startup. (It also crashes if I put that blah > entry on the beginning instead of the end.) I'm sure there's code > somewhere that must be making assumptions about the size of TLB entry, > but I'm at a loss for finding it. (I have noticed that the assembly > code in softmmu

[Qemu-devel] CPUTLBEntry Question

2007-06-14 Thread Ryan Riley
I'm making some small changes to the TLB stuff in QEMU 0.9.0 (specifically, I'm only working with i386-softmmu) and have run into an odd question I'm hoping someone can answer for me. The CPUTLBEntry structure definition in cpu-defs.h looks like this... typedef struct CPUTLBEntry { /* bit 31

[Qemu-devel] [PATCH] Add a 7 segments + led display #2

2007-06-14 Thread Hervé Poussineau
Hi, This patch adds a 7-segments + led display device emulation to Qemu. A picture of the original thing can be found at http://www.sensi.org/~alec/mips/images/acer_pica_io_3.jpg Use the device in the MIPS PICA 61 machine. Modified to take care of 8, 15, 16, 24 and 32 bit color depths. Hervé j