Hello.
I have (GCC) 4.2.1,
when i'm tried to build qemu from cvs, i've got such error:
Code:
make -C i386-softmmu all
make[1]: Entering directory `/mnt/work/install/compil/qemu/qemu/i386-softmmu'
gcc -Wall -O2 -g -fno-strict-aliasing -fno-reorder-blocks -fno-gcse
-fno-tree-ch -fno-optimize
On Sun, 2007-11-04 at 01:51 +, Paul Brook wrote:
> > If you take a close look, you'll find more variations between Linux ABIs
> > for different CPUs than between all BSD implementations: common syscalls
> > of all BSD flavors do the same thing (and have the same ABI whatever the
> > CPU...). Y
On Sun, 2007-11-04 at 09:12 +0200, Blue Swirl wrote:
> On 11/4/07, Fabrice Bellard <[EMAIL PROTECTED]> wrote:
> > Blue Swirl wrote:
> > > Hi,
> > >
> > > RISC CPUs don't support self-modifying code unless the affected area
> > > is flushed explicitly. This patch disables the extra effort for SMC.
CVSROOT:/cvsroot/qemu
Module name:qemu
Changes by: Blue Swirl 07/11/04 07:31:40
Modified files:
. : exec.c
Log message:
Fix debug statements
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/exec.c?cvsroot=qemu&r1=1.110&r2=1.111
On 11/4/07, Fabrice Bellard <[EMAIL PROTECTED]> wrote:
> Blue Swirl wrote:
> > Hi,
> >
> > RISC CPUs don't support self-modifying code unless the affected area
> > is flushed explicitly. This patch disables the extra effort for SMC.
> > The changes in this version would affect all CPUs except x86,
On Sun, 2007-11-04 at 02:24 +, Jocelyn Mayer wrote:
> CVSROOT: /sources/qemu
> Module name: qemu
> Changes by: Jocelyn Mayer 07/11/04 02:24:58
>
> Modified files:
> . : exec-all.h host-utils.c host-utils.h
> target-alpha : op.c
> target-i386: he
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer 07/11/04 02:55:34
Modified files:
target-ppc : cpu.h helper.c helper_regs.h op.c op_helper.c
op_helper.h translate.c translate_init.c
Log message:
PowerPC 601 need spec
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer 07/11/04 02:24:58
Modified files:
. : exec-all.h host-utils.c host-utils.h
target-alpha : op.c
target-i386: helper.c
Log message:
For consistency, move muls64 /
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer 07/11/04 01:57:29
Modified files:
target-ppc : translate.c
Log message:
Improve PowerPC CPU state dump.
Dump NIP on SPR access faults.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/q
> If you take a close look, you'll find more variations between Linux ABIs
> for different CPUs than between all BSD implementations: common syscalls
> of all BSD flavors do the same thing (and have the same ABI whatever the
> CPU...). You'll also find very few variations between the syscalls
> com
On Sat, 2007-11-03 at 19:16 -0600, Thayne Harbaugh wrote:
> On Sat, 2007-11-03 at 20:13 +0100, Fabrice Bellard wrote:
> > Thayne Harbaugh wrote:
> > > On Sat, 2007-11-03 at 13:52 +0100, J. Mayer wrote:
> > >> On Sat, 2007-11-03 at 01:21 +, Thiemo Seufer wrote:
> > >> [...]
> > >> But it could
On Sat, 2007-11-03 at 20:13 +0100, Fabrice Bellard wrote:
> Thayne Harbaugh wrote:
> > On Sat, 2007-11-03 at 13:52 +0100, J. Mayer wrote:
> >> On Sat, 2007-11-03 at 01:21 +, Thiemo Seufer wrote:
> >> [...]
> >> But it could be great to group the syscalls by
> >> categories, or so. For example
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer 07/11/04 01:16:04
Modified files:
hw : macio.c mac_nvram.c ppc_chrp.c ppc_mac.h
ppc_oldworld.c
Log message:
Fix PowerMac NVRAM device.
CVSWeb URLs:
http://cvs.
> RISC CPUs don't support self-modifying code unless the affected area
> is flushed explicitly.
For experience with ARM cpus, I think this is only true for userspace.
Many CPUs only require explicit flushes when the icache is enabled. It's not
uncommon for bootloaders to leave the icache disabl
Blue Swirl wrote:
> Hi,
>
> RISC CPUs don't support self-modifying code unless the affected area
> is flushed explicitly. This patch disables the extra effort for SMC.
> The changes in this version would affect all CPUs except x86, but I'd
> like to see if there are problems with some target, so t
On Sat, Nov 03, 2007 at 02:06:04PM -0400, Daniel Jacobowitz wrote:
> On Sat, Nov 03, 2007 at 06:35:48PM +0100, Aurelien Jarno wrote:
> > Hi all,
> >
> > The current softfloat implementation changes qNaN into sNaN when
> > converting between formats, for no reason. The attached patch fixes
> > tha
Blue Swirl wrote:
> Hi,
>
> RISC CPUs don't support self-modifying code unless the affected area
> is flushed explicitly.
Not entirely true. There are cacheless MIPS CPUs (the m4k), and also
cache-snooping MIPS CPUs (the R1x000).
> This patch disables the extra effort for SMC.
> The changes in t
Hi,
RISC CPUs don't support self-modifying code unless the affected area
is flushed explicitly. This patch disables the extra effort for SMC.
The changes in this version would affect all CPUs except x86, but I'd
like to see if there are problems with some target, so that the
committed change can b
Daniel Jacobowitz a écrit :
> On Sat, Nov 03, 2007 at 06:35:48PM +0100, Aurelien Jarno wrote:
>> Hi all,
>>
>> The current softfloat implementation changes qNaN into sNaN when
>> converting between formats, for no reason. The attached patch fixes
>> that. It also fixes an off-by-one in the extende
Thayne Harbaugh wrote:
> On Sat, 2007-11-03 at 13:52 +0100, J. Mayer wrote:
>> On Sat, 2007-11-03 at 01:21 +, Thiemo Seufer wrote:
>> [...]
>> But it could be great to group the syscalls by
>> categories, or so. For example, putting all POSIX compliant syscalls in
>> a single file and using a
Thiemo Seufer a écrit :
> Aurelien Jarno wrote:
>> Hi all,
>>
>> The current softfloat implementation changes qNaN into sNaN when
>> converting between formats, for no reason. The attached patch fixes
>> that.
>
> Did you take into account that MIPS and PA-RISC have the signalling
> bit inverted
I think that using host addresses in __put_user and __get_user is not
logical. They should use target addresses as get_user and put_user. As
Paul said, It is not worth mixing get/put/copy and lock/unlock functions.
The ultimate goal of such cleanup is not only to generate -EFAULT
correctly but als
Aurelien Jarno wrote:
> Hi all,
>
> The current softfloat implementation changes qNaN into sNaN when
> converting between formats, for no reason. The attached patch fixes
> that.
Did you take into account that MIPS and PA-RISC have the signalling
bit inverted to the rest of the world?
> It also
On Sat, Nov 03, 2007 at 06:35:48PM +0100, Aurelien Jarno wrote:
> Hi all,
>
> The current softfloat implementation changes qNaN into sNaN when
> converting between formats, for no reason. The attached patch fixes
> that. It also fixes an off-by-one in the extended double precision
> format (aka f
On Saturday 03 November 2007, TJ wrote:
> I'm building on x86_64 GNU/Linux. There are *lots* of (1053) compiler
> warnings of the class:
>
> warning: cast to pointer from integer of different size
There are at due to the recent EFAULT/access_ok changes. There should be (and
used to be) a clear se
Hi all,
The current softfloat implementation changes qNaN into sNaN when
converting between formats, for no reason. The attached patch fixes
that. It also fixes an off-by-one in the extended double precision
format (aka floatx80), the mantissa is 64-bit long and not 63-bit
long.
With this patch
I'm building on x86_64 GNU/Linux. There are *lots* of (1053) compiler
warnings of the class:
warning: cast to pointer from integer of different size
caused by the various conversions to/from host-to-target pointer and int
types.
On x86 the warnings mostly don't occur. An easy way to get an idea
I'm glad you posted about your efforts since I've also been working on
solving related x86_64 build warnings caused by 32-bit int to 64-bit
pointer conversions.
warning: cast to pointer from integer of different size
There are a lot of these in syscall.c
I have in my drafts folder an RFC I was
Thayne Harbaugh wrote:
>
> On Wed, 2007-10-31 at 16:44 -0600, Thayne Harbaugh wrote:
> > This patch updates get_user() and put_user() to take a third argument of
> > data type. get_user() and put_user() use target address which are
> > target_ulong and don't reflect the data type pointed to in ta
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer 07/11/03 15:12:16
Modified files:
linux-user : qemu.h strace.c
Log message:
Fix some compiler warnings.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/linux-user/qemu.h?cvsroot=qemu&
Hello.
According to AMD docs both FXSAVE and FXRSTOR instuctions have to generate GPF
if the memory operand is not aligned on a 16-byte boundary. Qemu in contrary
does not generate such exception in this case.
Unfortunatelly, I'm not able to write proper patch since I have no experience
in ha
On Sat, 2007-11-03 at 13:52 +0100, J. Mayer wrote:
> On Sat, 2007-11-03 at 01:21 +, Thiemo Seufer wrote:
> > Thayne Harbaugh wrote:
> > > There are several things that I'd like to see addressed in linux-user.
> > > Some of these are to fix bugs, some are to make qemu linux-user more
> > > like
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer 07/11/03 14:23:08
Modified files:
target-ppc : translate_init.c
Log message:
Fix PowerPC high BATs access: BAT number was incorrect.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer 07/11/03 13:37:12
Modified files:
target-ppc : cpu.h exec.h helper.c op_helper.c
translate_init.c
Log message:
PowerPC MMU and exception fixes:
* PowerPC 601 (a
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Jocelyn Mayer 07/11/03 13:22:08
Modified files:
linux-user : main.c
Log message:
Fix incorrect PowerPC instruction fetch exception dump.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/linux-user/main.
On Sat, 2007-11-03 at 01:21 +, Thiemo Seufer wrote:
> Thayne Harbaugh wrote:
> > There are several things that I'd like to see addressed in linux-user.
> > Some of these are to fix bugs, some are to make qemu linux-user more
> > like the Linux kernel, some are to make the internal qemu interfa
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Andrzej Zaborowski 07/11/03 12:50:46
Modified files:
. : Changelog Makefile.target qemu-doc.texi
hw : omap.c omap.h
Added files:
hw : omap_i2c.c
Log message:
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Andrzej Zaborowski 07/11/03 12:44:02
Modified files:
hw : omap.c omap.h
Log message:
Implement OMAP on-chip RTC (Linux guest date/time now matches with
host).
CVSWeb URLs:
http://cvs.savannah.gn
On Sat, 2007-11-03 at 01:18 +, Thiemo Seufer wrote:
> J. Mayer wrote:
> [snip]
> > > > It restricts the letter to the ones historically allowed by Qemu, not to
> > > > anything specific to any architecture or hw platform. What I like in my
> > > > implementation, compared to the strchr..., is
На Mon, 22 Oct 2007 08:03:42 -0700
"Arnon Gilboa" <[EMAIL PROTECTED]> написал(а):
> Please connect your Webcam (or any other USB isochronous device) and
> redirect it, using the UHCI (already in qemu head) and OHCI isochronous
> patches.
>
> I need your feedback.
>
> TIA,
> Arnon
>
>
>
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