[Qemu-devel] [PATCH] cloop.c: use gfree,instead of free

2011-10-17 Thread Dong Xu Wang
Use gfree, to pair with g_malloc. Also fix coding style. Signed-off-by: Dong Xu Wang wdon...@linux.vnet.ibm.com --- block/cloop.c | 114 +++-- 1 files changed, 62 insertions(+), 52 deletions(-) diff --git a/block/cloop.c b/block/cloop.c index

Re: [Qemu-devel] [RFC128 3/2] Adjust system and pci address spaces to full 64-bit

2011-10-17 Thread David Gibson
On Sun, Oct 16, 2011 at 05:29:07PM +0200, Avi Kivity wrote: Now that the memory API supports full 64-bit buses, adjust the relevant callers to take advantage of it. Note that this doesn't, strictly speaking doesn't give you full 64-bit coverage, since the range covered is 2^64-1 bytes rather

Re: [Qemu-devel] [PATCH] cloop.c: use gfree,instead of free

2011-10-17 Thread Ray Wang
On 10/17/2011 02:11 PM, Dong Xu Wang wrote: Use gfree, to pair with g_malloc. Also fix coding style. Should it be g_free, instead of gfree. Signed-off-by: Dong Xu Wangwdon...@linux.vnet.ibm.com --- block/cloop.c | 114 +++-- 1 files

[Qemu-devel] buildbot failure in qemu on s390-next_i386_debian_6_0

2011-10-17 Thread qemu
The Buildbot has detected a new failure on builder s390-next_i386_debian_6_0 while building qemu. Full details are available at: http://buildbot.b1-systems.de/qemu/builders/s390-next_i386_debian_6_0/builds/64 Buildbot URL: http://buildbot.b1-systems.de/qemu/ Buildslave for this Build: yuzuki

Re: [Qemu-devel] [PATCH] target_sparc: Fix use of free() instead of g_free()

2011-10-17 Thread Ray Wang
On 10/17/2011 02:10 AM, Stefan Weil wrote: This error was reported by cppcheck. Signed-off-by: Stefan Weils...@weilnetz.de --- target-sparc/helper.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/target-sparc/helper.c b/target-sparc/helper.c index

Re: [Qemu-devel] [PATCH v3 1/4] vga: make PCI devices optional

2011-10-17 Thread Jan Kiszka
On 2011-10-16 23:21, Blue Swirl wrote: Improve VGA selection logic, push check for device availabilty to vl.c. Make PCI VGA devices optional. Signed-off-by: Blue Swirl blauwir...@gmail.com --- hw/cirrus_vga.c |5 - hw/pc.c |6 +- hw/pc.h | 33

[Qemu-devel] buildbot failure in qemu on monitor_i386_debian_6_0

2011-10-17 Thread qemu
The Buildbot has detected a new failure on builder monitor_i386_debian_6_0 while building qemu. Full details are available at: http://buildbot.b1-systems.de/qemu/builders/monitor_i386_debian_6_0/builds/63 Buildbot URL: http://buildbot.b1-systems.de/qemu/ Buildslave for this Build: yuzuki

[Qemu-devel] [PATCH v2 1/2] spice: turn client_migrate_info to async

2011-10-17 Thread Yonit Halperin
RHBZ 737921 Spice client is required to connect to the migration target before/as migration starts. Since after migration starts, the target qemu is blocked and cannot accept new spice client we trigger the connection to the target upon client_migrate_info command. client_migrate_info completion

[Qemu-devel] [PATCH v2 2/2] spice: support the new migration interface (spice 0.8.3)

2011-10-17 Thread Yonit Halperin
- call spice_server_migrate_(start|end|connect). - register spice_migrate_connect completion callback Signed-off-by: Yonit Halperin yhalp...@redhat.com --- ui/spice-core.c | 56 ++- 1 files changed, 55 insertions(+), 1 deletions(-) diff

[Qemu-devel] [PATCH v2 0/2] spice migration interface v2 (RHBZ 737921)

2011-10-17 Thread Yonit Halperin
Same as the previous series with a small fix to allow compliation without Spice disabled. Yonit Spice client is required to connect to the migration target before/as migration starts. Previously, it connected upon migration completion, however, the ticket

Re: [Qemu-devel] [PATCH 1/1 V5] kernel/kvm: introduce KVM_SET_LINT1 and fix improper nmi emulation

2011-10-17 Thread Lai Jiangshan
On 10/16/2011 05:39 PM, Avi Kivity wrote: On 10/14/2011 11:03 AM, Lai Jiangshan wrote: Currently, NMI interrupt is blindly sent to all the vCPUs when NMI button event happens. This doesn't properly emulate real hardware on which NMI button event triggers LINT1. Because of this, NMI is sent to

[Qemu-devel] [PATCH RFC v1 0/2] Initial support for Microsoft Hyper-V.

2011-10-17 Thread Vadim Rozenfeld
With the following series of patches we are starting to implement some basic Microsoft Hyper-V Enlightenment functionality. This series is mostly about adding support for relaxed timing, spinlock, and virtual apic. For more Hyper-V related information please see: Hypervisor Functional

[Qemu-devel] [PATCH RFC v1 2/2] hyper-v: initialize Hyper-V CPUID leafs.

2011-10-17 Thread Vadim Rozenfeld
--- target-i386/kvm.c | 64 +++- 1 files changed, 62 insertions(+), 2 deletions(-) diff --git a/target-i386/kvm.c b/target-i386/kvm.c index 3840255..30b3e85 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -29,6 +29,7 @@ #include

[Qemu-devel] [PATCH RFC v1 1/2] hyper-v: introduce Hyper-V support infrastructure.

2011-10-17 Thread Vadim Rozenfeld
with the following series of patches we are starting to implement some basic Microsoft Hyper-V Enlightenment functionality, like relaxed timing, spinlock, and virtual apic support. For more Hyper-V related information please see: Hypervisor Functional Specification v2.0: For Windows Server 2008

Re: [Qemu-devel] [PATCHv3] ps2: migrate ledstate

2011-10-17 Thread Gerd Hoffmann
static const VMStateDescription vmstate_ps2_common = { .name = PS2 Common State, -.version_id = 3, +.version_id = 4, .minimum_version_id = 2, .minimum_version_id_old = 2, .fields = (VMStateField []) { @@ -577,6 +585,7 @@ static const VMStateDescription

Re: [Qemu-devel] [PATCH RFC v1 1/2] hyper-v: introduce Hyper-V support infrastructure.

2011-10-17 Thread Kevin Wolf
Am 17.10.2011 11:17, schrieb Vadim Rozenfeld: with the following series of patches we are starting to implement some basic Microsoft Hyper-V Enlightenment functionality, like relaxed timing, spinlock, and virtual apic support. For more Hyper-V related information please see: Hypervisor

[Qemu-devel] [RFC][PATCH 15/45] qemu-kvm: Drop unused kvm_del_irq_route

2011-10-17 Thread Jan Kiszka
kvm_add_irq_route only exists to create platform specific static routes. So there is no need for a corresponding delete. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- qemu-kvm.c | 16 qemu-kvm.h |8 2 files changed, 0 insertions(+), 24 deletions(-) diff

[Qemu-devel] [RFC][PATCH 10/45] msix: Factor out msix_message_from_vector

2011-10-17 Thread Jan Kiszka
This helper will also be used by the upcoming config notifier. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/msix.c | 19 +-- 1 files changed, 13 insertions(+), 6 deletions(-) diff --git a/hw/msix.c b/hw/msix.c index 04e08e5..50fa504 100644 --- a/hw/msix.c +++

[Qemu-devel] [RFC][PATCH 07/45] msi: Generalize msix_supported to msi_supported

2011-10-17 Thread Jan Kiszka
Rename msix_supported to msi_supported and control MSI and MSI-X activation this way. That was likely to original intention for this flag, but MSI support came after MSI-X. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/msi.c |8 hw/msi.h |2 ++ hw/msix.c |8

[Qemu-devel] [RFC][PATCH 01/45] msi: Guard msi/msix_write_config with msi_present

2011-10-17 Thread Jan Kiszka
Terminate msi/msix_write_config early if support is not enabled. This allows to remove checks at the caller site if MSI is optional. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/msi.c |3 ++- hw/msix.c |2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git

[Qemu-devel] [RFC][PATCH 41/45] msix: Drop unused msix_bar_size

2011-10-17 Thread Jan Kiszka
No use for it, even more after the upcoming API changes. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/msix.c |8 hw/msix.h |2 -- hw/pci.h |2 -- 3 files changed, 0 insertions(+), 12 deletions(-) diff --git a/hw/msix.c b/hw/msix.c index 5f0fa6a..bccd8b1 100644

[Qemu-devel] [RFC][PATCH 37/45] qemu-kvm: Clean up irqrouting API

2011-10-17 Thread Jan Kiszka
Drop unused functions, privatize those which are only used internally now. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- kvm-stub.c | 10 -- kvm.h |1 - qemu-kvm.c | 37 ++--- qemu-kvm.h | 39 --- 4

[Qemu-devel] [RFC][PATCH 44/45] pci-assign: Use generic MSI-X support

2011-10-17 Thread Jan Kiszka
Switch MSI-X support of the device assignment core to the generic layer QEMU offers. As for legacy MSI, we use config notifiers to update IRQ assignment and routes on guest changes. Quite a bit code becomes obsolete in the device assigment core, e.g. the maintenance of the MSI-X vector masking

[Qemu-devel] [RFC][PATCH 32/45] pci-assign: Factor out deassign_irq

2011-10-17 Thread Jan Kiszka
Will have more users soon. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/device-assignment.c | 30 ++ 1 files changed, 18 insertions(+), 12 deletions(-) diff --git a/hw/device-assignment.c b/hw/device-assignment.c index e0b9cfe..e5ac54c 100644 ---

[Qemu-devel] [RFC][PATCH 28/45] qemu-kvm: msix: Drop tracking of used vectors

2011-10-17 Thread Jan Kiszka
This optimization was only required to keep KVM route usage low. Now that we solve that problem via lazy updates, we can drop the field. We still need interfaces to clear pending vectors, though (and we have to make use of them more broadly - but that's unrelated to this patch). Signed-off-by:

[Qemu-devel] [RFC][PATCH 43/45] msix: Allow to customize capability on init

2011-10-17 Thread Jan Kiszka
This enables fully configurable MSI-X initialization by taking config space offset, independent table and PBA BARs and the offset inside them on msix_init. Table and PBA are now realized as two memory subregions, either of the passed BAR regions or the single page container msix_init_simple

[Qemu-devel] [RFC][PATCH 38/45] msi: Implement config notifiers for legacy MSI

2011-10-17 Thread Jan Kiszka
Realize support for MSI config notifiers analogously to MSI-X. The logic is slightly more complex for legacy MSI as per-vector masking is option here. Device assignment will be the first user. Note that this change does not introduce per-vector masking support. This can to be added at some later

Re: [Qemu-devel] [PATCH RFC v1 1/2] hyper-v: introduce Hyper-V support infrastructure.

2011-10-17 Thread Jan Kiszka
On 2011-10-17 11:17, Vadim Rozenfeld wrote: with the following series of patches we are starting to implement some basic Microsoft Hyper-V Enlightenment functionality, like relaxed timing, spinlock, and virtual apic support. For more Hyper-V related information please see: Hypervisor

Re: [Qemu-devel] [PATCH 1/1 V5] kernel/kvm: introduce KVM_SET_LINT1 and fix improper nmi emulation

2011-10-17 Thread Lai Jiangshan
On 10/16/2011 05:39 PM, Avi Kivity wrote: On 10/14/2011 11:03 AM, Lai Jiangshan wrote: Currently, NMI interrupt is blindly sent to all the vCPUs when NMI button event happens. This doesn't properly emulate real hardware on which NMI button event triggers LINT1. Because of this, NMI is sent to

Re: [Qemu-devel] [PATCH RFC v1 2/2] hyper-v: initialize Hyper-V CPUID leafs.

2011-10-17 Thread Paolo Bonzini
On 10/17/2011 11:17 AM, Vadim Rozenfeld wrote: @@ -379,11 +380,16 @@ int kvm_arch_init_vcpu(CPUState *env) cpuid_i = 0; /* Paravirtualization CPUIDs */ -memcpy(signature, KVMKVMKVM\0\0\0, 12); c =cpuid_data.entries[cpuid_i++]; memset(c, 0, sizeof(*c));

[Qemu-devel] [RFC][PATCH 05/45] msi: Invoke msi/msix_write_config from PCI core

2011-10-17 Thread Jan Kiszka
Also this functions is better invoked by the core than by each and every device. This allows to drop the config_write callbacks from ich and intel-hda. CC: Alexander Graf ag...@suse.de CC: Gerd Hoffmann kra...@redhat.com CC: Isaku Yamahata yamah...@valinux.co.jp Signed-off-by: Jan Kiszka

Re: [Qemu-devel] [PATCH 1/1 V5] kernel/kvm: introduce KVM_SET_LINT1 and fix improper nmi emulation

2011-10-17 Thread Avi Kivity
On 10/17/2011 11:40 AM, Lai Jiangshan wrote: LINT1 may have been programmed as a level -triggered interrupt instead of edge triggered (NMI or interrupt). We can use the ioctl argument for the level (and pressing the NMI button needs to pulse the level to 1 and back to 0). Hi,

Re: [Qemu-devel] [PATCH 1/1 V5] kernel/kvm: introduce KVM_SET_LINT1 and fix improper nmi emulation

2011-10-17 Thread Avi Kivity
On 10/17/2011 11:17 AM, Lai Jiangshan wrote: On 10/16/2011 05:39 PM, Avi Kivity wrote: On 10/14/2011 11:03 AM, Lai Jiangshan wrote: Currently, NMI interrupt is blindly sent to all the vCPUs when NMI button event happens. This doesn't properly emulate real hardware on which NMI button

Re: [Qemu-devel] [PATCH] fix memory leak in aio_write_f

2011-10-17 Thread Kevin Wolf
Am 28.09.2011 08:57, schrieb a...@redhat.com: From: Alex Jia a...@redhat.com Haven't released memory of 'ctx' before return. Signed-off-by: Alex Jia a...@redhat.com Thanks, applied to the block branch. Kevin

Re: [Qemu-devel] [PATCH v2 0/2] spice migration interface v2 (RHBZ 737921)

2011-10-17 Thread Gerd Hoffmann
On 10/17/11 10:03, Yonit Halperin wrote: Same as the previous series with a small fix to allow compliation without Spice disabled. Replaced patches. Thanks, Gerd

[Qemu-devel] [PATCH] change free() to g_free() to pair with g_malloc() series.

2011-10-17 Thread Ray Wang
Signed-off-by: Ray Wang rayw...@linux.vnet.ibm.com --- block/dmg.c | 14 +++--- target-arm/helper.c |2 +- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/block/dmg.c b/block/dmg.c index 64c3cce..661f31b 100644 --- a/block/dmg.c +++ b/block/dmg.c @@ -284,14

[Qemu-devel] [RFC][PATCH 30/45] pci-assign: Rename assign_irq to assign_intx

2011-10-17 Thread Jan Kiszka
The previous name may incorrectly suggest that this function assigns all types of IRQs though it's only dealing with legacy interrupts. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/device-assignment.c | 14 +++--- 1 files changed, 7 insertions(+), 7 deletions(-) diff --git

Re: [Qemu-devel] [PATCHv3] ps2: migrate ledstate

2011-10-17 Thread Christophe Fergeau
On Mon, Oct 17, 2011 at 11:25:42AM +0200, Gerd Hoffmann wrote: static const VMStateDescription vmstate_ps2_common = { .name = PS2 Common State, -.version_id = 3, +.version_id = 4, .minimum_version_id = 2, .minimum_version_id_old = 2, .fields =

Re: [Qemu-devel] [PATCH v8 1/4] block: add the block queue support

2011-10-17 Thread Kevin Wolf
Am 26.09.2011 10:01, schrieb Zhi Yong Wu: On Fri, Sep 23, 2011 at 11:32 PM, Kevin Wolf kw...@redhat.com wrote: Am 08.09.2011 12:11, schrieb Zhi Yong Wu: Signed-off-by: Zhi Yong Wu wu...@linux.vnet.ibm.com --- Makefile.objs |2 +- block/blk-queue.c | 201

[Qemu-devel] [RFC][PATCH 06/45] msix: Prevent bogus mask updates on MMIO accesses

2011-10-17 Thread Jan Kiszka
Only accesses to the MSI-X table must trigger a call to msix_handle_mask_update or a notifier invocation. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/msix.c | 16 ++-- 1 files changed, 10 insertions(+), 6 deletions(-) diff --git a/hw/msix.c b/hw/msix.c index

Re: [Qemu-devel] [PATCH v8 2/4] block: add the command line support

2011-10-17 Thread Kevin Wolf
Am 26.09.2011 08:15, schrieb Zhi Yong Wu: On Fri, Sep 23, 2011 at 11:54 PM, Kevin Wolf kw...@redhat.com wrote: +} + +static void bdrv_block_timer(void *opaque) +{ +BlockDriverState *bs = opaque; +BlockQueue *queue= bs-block_queue; + +qemu_block_queue_flush(queue); Hm,

[Qemu-devel] [RFC][PATCH 29/45] pci-assign: Drop kvm_assigned_irq::host_irq initialization

2011-10-17 Thread Jan Kiszka
real_device.irq is never set explicitly, thus remains 0. So we can simply drop this line as assigned_irq_data is zero-initialized anyway. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/device-assignment.c |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git

[Qemu-devel] [RFC][PATCH 42/45] msix: Introduce msix_init_simple

2011-10-17 Thread Jan Kiszka
Devices models are usually not interested in specifying MSI-X configuration details beyond the number of vectors to provide and the BAR number to use. Layout of an exclusively used BAR and its registration can also be handled centrally. This is the purpose of msix_init_simple. It provides handy

Re: [Qemu-devel] [PATCH 1/1 V5] kernel/kvm: introduce KVM_SET_LINT1 and fix improper nmi emulation

2011-10-17 Thread Jan Kiszka
On 2011-10-17 11:54, Avi Kivity wrote: On 10/17/2011 11:17 AM, Lai Jiangshan wrote: On 10/16/2011 05:39 PM, Avi Kivity wrote: On 10/14/2011 11:03 AM, Lai Jiangshan wrote: Currently, NMI interrupt is blindly sent to all the vCPUs when NMI button event happens. This doesn't properly emulate

[Qemu-devel] [RFC][PATCH 26/45] qemu-kvm: Use g_realloc for irq_routes extension

2011-10-17 Thread Jan Kiszka
Allows to drop checking for out-of-memory. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- qemu-kvm.c |7 +-- 1 files changed, 1 insertions(+), 6 deletions(-) diff --git a/qemu-kvm.c b/qemu-kvm.c index 6bdd7b5..eb8f176 100644 --- a/qemu-kvm.c +++ b/qemu-kvm.c @@ -258,7 +258,6 @@

Re: [Qemu-devel] [PATCH v8 3/4] block: add block timer and throttling algorithm

2011-10-17 Thread Kevin Wolf
Am 26.09.2011 09:24, schrieb Zhi Yong Wu: On Sat, Sep 24, 2011 at 12:19 AM, Kevin Wolf kw...@redhat.com wrote: Am 08.09.2011 12:11, schrieb Zhi Yong Wu: Note: 1.) When bps/iops limits are specified to a small value such as 511 bytes/s, this VM will hang up. We are considering how to

[Qemu-devel] [RFC][PATCH 14/45] qemu-kvm: Drop useless kvm_clear_gsi_routes

2011-10-17 Thread Jan Kiszka
There are no routes to clear at this point, we are just creating the VM. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- qemu-kvm-x86.c |1 - qemu-kvm.c | 10 -- qemu-kvm.h |9 - 3 files changed, 0 insertions(+), 20 deletions(-) diff --git a/qemu-kvm-x86.c

[Qemu-devel] [PATCH] qxl: create slots on post_load in any state (fix RHBZ 740547)

2011-10-17 Thread Alon Levy
If we migrate when the device is not in a native state the guest still believes the slots are created, and will cause operations that reference the slots, causing a panic: virtual address out of range on the first of them. Easy to see by migrating in vga mode (with a driver loaded, for instance

[Qemu-devel] [RFC][PATCH 31/45] qemu-kvm: Refactor kvm_deassign_irq to kvm_device_irq_deassign

2011-10-17 Thread Jan Kiszka
Don't pass kvm_assigned_irq struct, rather use the actually required fields in the interface. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/device-assignment.c | 42 -- qemu-kvm.c | 15 ++- qemu-kvm.h |

[Qemu-devel] [RFC][PATCH 13/45] hpet: Use msi_deliver

2011-10-17 Thread Jan Kiszka
Avoid the slow-path MSI delivery via stl_phys by switching to msi_deliver. This also allows to prepare these rarely changing messages in advance. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/hpet.c |7 ++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git

[Qemu-devel] [RFC][PATCH 27/45] qemu-kvm: Lazily update MSI caches

2011-10-17 Thread Jan Kiszka
Instead of registering every possible MSI message that is prepared in some device's config space, this commit only registers those messages that are actually sent. Every message that runs through the delivery hook is first checked against its cached data. If there is a mismatch, then the

[Qemu-devel] [RFC][PATCH 09/45] msi: Factor out msi_message_from_vector

2011-10-17 Thread Jan Kiszka
This helper will also be used by the upcoming config notifier. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/msi.c | 43 +-- 1 files changed, 25 insertions(+), 18 deletions(-) diff --git a/hw/msi.c b/hw/msi.c index 2b7b6e3..3c7ebc3 100644 ---

[Qemu-devel] [PATCH v2 0/3] coroutinization of flush and discard (split out of NBD series)

2011-10-17 Thread Paolo Bonzini
This series, applying on top of block branch, enables drivers to use coroutines for flush and discard. I kept aio_discard after discussing with Kevin since it should be useful not only for raw-posix-aio, but also for the userspace iSCSI backend (and in general for backends relying on an external

[Qemu-devel] [PATCH 2/3] block: drop redundant bdrv_flush implementation

2011-10-17 Thread Paolo Bonzini
From: Stefan Hajnoczi stefa...@linux.vnet.ibm.com Block drivers now only need to provide either of .bdrv_co_flush, .bdrv_aio_flush() or for legacy drivers .bdrv_flush(). Remove the redundant .bdrv_flush() implementations. [Paolo Bonzini: change raw driver to bdrv_co_flush] Signed-off-by:

[Qemu-devel] [PATCH 1/3] block: unify flush implementations

2011-10-17 Thread Paolo Bonzini
Add coroutine support for flush and apply the same emulation that we already do for read/write. bdrv_aio_flush is simplified to always go through a coroutine. Signed-off-by: Paolo Bonzini pbonz...@redhat.com --- block.c | 164 ++

[Qemu-devel] [PATCH 3/3] block: add bdrv_co_discard and bdrv_aio_discard support

2011-10-17 Thread Paolo Bonzini
This similarly adds support for coroutine and asynchronous discard. Signed-off-by: Paolo Bonzini pbonz...@redhat.com --- block.c | 102 +++-- block.h |4 ++ block/raw.c | 10 +++-- block_int.h |9 - trace-events |

Re: [Qemu-devel] [PATCH] Memory API bugfix - abolish addrrrange_end()

2011-10-17 Thread Avi Kivity
On 10/17/2011 07:31 AM, David Gibson wrote: In terms of how the code looks, it's seriously more ugly (see the patches I sent out). Conceptually it's cleaner, since we're not dodging the issue that we need to deal with a full 64-bit domain. We don't have to dodge that issue. I know how

[Qemu-devel] [RFC][PATCH 12/45] msi: Introduce MSIRoutingCache

2011-10-17 Thread Jan Kiszka
This cache will help us implementing KVM in-kernel irqchip support without spreading hooks all over the place. KVM requires us to register it first and then deliver it by raising a pseudo IRQ line returned on registration. While this could be changed for QEMU-originated MSI messages by adding

Re: [Qemu-devel] [PATCH] ioapic: Convert to memory API

2011-10-17 Thread Avi Kivity
On 10/16/2011 07:21 PM, Jan Kiszka wrote: From: Jan Kiszka jan.kis...@siemens.com Dispatching byte and word accesses like dwords looks strange, but let's just convert mechanically. -static CPUReadMemoryFunc * const ioapic_mem_read[3] = { -ioapic_mem_readl, -ioapic_mem_readl, -

[Qemu-devel] [RFC][PATCH 39/45] pci-assign: Use generic MSI support

2011-10-17 Thread Jan Kiszka
Implement MSI support of a assigned devices via the generic MSI layer of QEMU. Use config notifiers to update the vector route or switch back to INTx when MSI gets disabled again. Using the generic layer not only saves a bit code, it also fixes reset while legacy MSI is in use and adds 64 bit

[Qemu-devel] [RFC][PATCH 23/45] qemu-kvm: Rework MSI-X mask notifier to generic MSI config notifiers

2011-10-17 Thread Jan Kiszka
MSI config notifiers are supposed to be triggered on every relevant configuration change of MSI vectors or if MSI is enabled/disabled. Two notifiers are established, one for vector changes and one for general enabling. The former notifier additionally passes the currently active MSI message. This

[Qemu-devel] [RFC][PATCH 19/45] qemu-kvm: Factor out kvm_msi_irqfd_set

2011-10-17 Thread Jan Kiszka
This makes the KVM core layer aware of the irqfd associated with some MSI cache. kvm_msi_irqfd_set is defined for this purpose, which avoids that virtio needs to peek into the cache for extracting the GSI. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/virtio-pci.c |6 +++--- kvm.h

Re: [Qemu-devel] [RFC128 3/2] Adjust system and pci address spaces to full 64-bit

2011-10-17 Thread Avi Kivity
On 10/17/2011 07:33 AM, David Gibson wrote: On Sun, Oct 16, 2011 at 05:29:07PM +0200, Avi Kivity wrote: Now that the memory API supports full 64-bit buses, adjust the relevant callers to take advantage of it. Note that this doesn't, strictly speaking doesn't give you full 64-bit coverage,

Re: [Qemu-devel] [PATCH v2 0/3] coroutinization of flush and discard (split out of NBD series)

2011-10-17 Thread Kevin Wolf
Am 17.10.2011 12:32, schrieb Paolo Bonzini: This series, applying on top of block branch, enables drivers to use coroutines for flush and discard. I kept aio_discard after discussing with Kevin since it should be useful not only for raw-posix-aio, but also for the userspace iSCSI backend (and

[Qemu-devel] [RFC][PATCH 22/45] qemu-kvm: msix: Fire mask notifier on global mask changes

2011-10-17 Thread Jan Kiszka
Also invoke the mask notifier if the global MSI-X mask is modified. For this purpose, we push the notifier call from the per-vector mask update to the central msix_handle_mask_update. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/msix.c | 16 +--- 1 files changed, 9

Re: [Qemu-devel] [PATCH RFC v1 2/2] hyper-v: initialize Hyper-V CPUID leafs.

2011-10-17 Thread Avi Kivity
On 10/17/2011 11:40 AM, Paolo Bonzini wrote: On 10/17/2011 11:17 AM, Vadim Rozenfeld wrote: @@ -379,11 +380,16 @@ int kvm_arch_init_vcpu(CPUState *env) cpuid_i = 0; /* Paravirtualization CPUIDs */ -memcpy(signature, KVMKVMKVM\0\0\0, 12); c

[Qemu-devel] [RFC][PATCH 18/45] qemu-kvm: Hook into MSI delivery at APIC level

2011-10-17 Thread Jan Kiszka
Move the two hooks for MSI delivery to in-kernel irqchips from the MSI layer to a single place: the APIC. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/apic.c | 24 +++- hw/msi.c |5 - hw/msix.c |5 - 3 files changed, 15 insertions(+), 19

Re: [Qemu-devel] [PATCH] qxl: create slots on post_load in any state (fix RHBZ 740547)

2011-10-17 Thread Yonit Halperin
ACK On 10/17/2011 12:24 PM, Alon Levy wrote: If we migrate when the device is not in a native state the guest still believes the slots are created, and will cause operations that reference the slots, causing a panic: virtual address out of range on the first of them. Easy to see by migrating in

Re: [Qemu-devel] [PATCH RFC v1 2/2] hyper-v: initialize Hyper-V CPUID leafs.

2011-10-17 Thread Paolo Bonzini
On 10/17/2011 12:41 PM, Avi Kivity wrote: Even not counting that hyper-v support should IMHO not be in KVM-specific code, I still think this shouldn't remove KVM leaves completely but rather move them to 0x4100. The KVM paravirtualization code then can similarly probe with 0x100

Re: [Qemu-devel] [PATCH v2 0/3] coroutinization of flush and discard (split out of NBD series)

2011-10-17 Thread Paolo Bonzini
On 10/17/2011 12:43 PM, Kevin Wolf wrote: Cool, I wasn't aware of that. That's a very nice side effect! Maybe we should write this down in a comment and remove the now unnecessary error handling from callers. Looks like I finally have an excuse to play with Coccinelle! Paolo

[Qemu-devel] [RFC][PATCH 33/45] qemu-kvm: Factor out kvm_device_intx_assign

2011-10-17 Thread Jan Kiszka
Avoid passing kvm_assigned_irq on INTx assignment and separate this function from (to-be-refactored) MSI/MSI-X assignment. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/device-assignment.c | 21 ++--- qemu-kvm.c | 17 + qemu-kvm.h

Re: [Qemu-devel] GPLv3 troubles (was: [PATCH 6/7] target-xtensa: add fsf core)

2011-10-17 Thread Andreas Färber
Am 15.10.2011 11:02, schrieb Blue Swirl: On Mon, Oct 10, 2011 at 2:26 AM, Max Filippov jcmvb...@gmail.com wrote: diff --git a/target-xtensa/core-fsf/gdb-config.c b/target-xtensa/core-fsf/gdb-config.c new file mode 100644 index 000..6705d9c --- /dev/null +++

Re: [Qemu-devel] GPLv3 troubles

2011-10-17 Thread Paolo Bonzini
On 10/17/2011 12:45 PM, Andreas Färber wrote: Could we please draft some policy on this? This is not a GDB issue, it's very general. Whether we like it or not, there is GPLv3-licensed code and there will probably be a GPLv4 one day. IMO having old GPLv2-only code is one thing. But there's a lot

[Qemu-devel] [PATCH] arm gic saving/loading fix

2011-10-17 Thread Dmitry Koshelev
irq_target field saving/loading is in the wrong loop Signed-off-by: Dmitry Koshelev karagio...@gmail.com --- hw/arm_gic.c | 12 ++-- 1 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/arm_gic.c b/hw/arm_gic.c index 8286a28..ba05131 100644 --- a/hw/arm_gic.c +++

[Qemu-devel] [RFC][PATCH 20/45] qemu-kvm: msix: Only invoke msix_handle_mask_update on changes

2011-10-17 Thread Jan Kiszka
Reorganize msix_mmio_writel so that msix_handle_mask_update is only called on mask changes. Pass previous config space value to msix_write_config so that is can check if a mask change took place. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/msix.c | 36

[Qemu-devel] [PATCH] arm cpu state loading fix

2011-10-17 Thread Dmitry Koshelev
Floating registers loading fix. Signed-off-by: Dmitry Koshelev karaghio...@gmail.com --- target-arm/machine.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-arm/machine.c b/target-arm/machine.c index 3925d3a..73d82c9 100644 --- a/target-arm/machine.c +++

Re: [Qemu-devel] [PATCH] arm gic saving/loading fix

2011-10-17 Thread Andreas Färber
Am 17.10.2011 12:48, schrieb Dmitry Koshelev: irq_target field saving/loading is in the wrong loop Signed-off-by: Dmitry Koshelev karagio...@gmail.com Reviewed-by: Andreas Färber afaer...@suse.de Andreas --- hw/arm_gic.c | 12 ++-- 1 files changed, 6 insertions(+), 6

Re: [Qemu-devel] [PATCH v2 0/3] coroutinization of flush and discard (split out of NBD series)

2011-10-17 Thread Kevin Wolf
Am 17.10.2011 12:32, schrieb Paolo Bonzini: This series, applying on top of block branch, enables drivers to use coroutines for flush and discard. I kept aio_discard after discussing with Kevin since it should be useful not only for raw-posix-aio, but also for the userspace iSCSI backend (and

[Qemu-devel] [RFC][PATCH 36/45] qemu-kvm: Factor out kvm_device_msix_* services

2011-10-17 Thread Jan Kiszka
Create kvm_device_msix_{supported,init_vectors,set_vector,assign}, replacing the old kvm_assign_set_msix_{nr,entry} services. The new API no longer requires direct fiddling with the KVM API data structures and just takes the required parameters. kvm_device_msix_set_vector also combines MSI route

[Qemu-devel] [RFC][PATCH 25/45] qemu-kvm: Update MSI cache on kvm_msi_irqfd_set

2011-10-17 Thread Jan Kiszka
Updating the MSI message registration on kvm_msi_irqfd_set will allow us to switch to a lazy mode and remove the need to track message changes in the device config space. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/virtio-pci.c | 10 ++ kvm.h |3 ++-

Re: [Qemu-devel] [RFC][PATCH 11/45] msi: Factor out delivery hook

2011-10-17 Thread Avi Kivity
On 10/17/2011 11:27 AM, Jan Kiszka wrote: So far we deliver MSI messages by writing them into the target MMIO area. This reflects what happens on hardware, but imposes some limitations on the emulation when introducing KVM in-kernel irqchip models. For those we will need to track the message

[Qemu-devel] [PATCH 1/2] hda: do not mix output and input streams, RHBZ #740493

2011-10-17 Thread Marc-André Lureau
Windows 7 may use the same stream number for input and output. That will result in lot of garbage on playback. The hardcoded value of 4 needs to be in sync with GCAP streams description and IN/OUT registers. Signed-off-by: Marc-André Lureau marcandre.lur...@redhat.com --- hw/intel-hda.c |9

[Qemu-devel] [PATCH 2/2] hda: do not mix output and input stream states, RHBZ #740493

2011-10-17 Thread Marc-André Lureau
Windows 7 may use the same stream number for input and output. Current code will confuse streams. Changes since v1: - keep running_compat[] for migration version 1 - add running_real[] for migration version 2 Signed-off-by: Marc-André Lureau marcandre.lur...@redhat.com --- hw/hda-audio.c | 26

[Qemu-devel] [RFC][PATCH 08/45] Introduce MSIMessage structure

2011-10-17 Thread Jan Kiszka
Will be used for generating and distributing MSI messages, both in emulation mode and under KVM. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/msi.h |5 + qemu-common.h |1 + 2 files changed, 6 insertions(+), 0 deletions(-) diff --git a/hw/msi.h b/hw/msi.h index

[Qemu-devel] [RFC][PATCH 03/45] msi: Use msi/msix_present more consistently

2011-10-17 Thread Jan Kiszka
Replace some open-coded msi/msix_present checks and drop redundant msix_supported tests (present implies supported). Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/msi.c |2 +- hw/msix.c | 20 2 files changed, 9 insertions(+), 13 deletions(-) diff --git

[Qemu-devel] [RFC][PATCH 45/45] pci-assign: Fix coding style issues

2011-10-17 Thread Jan Kiszka
Also remove the dead get_assigned_device at this chance. No functional changes. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/device-assignment.c | 199 hw/device-assignment.h | 14 ++-- 2 files changed, 107 insertions(+), 106

Re: [Qemu-devel] [RFC][PATCH 12/45] msi: Introduce MSIRoutingCache

2011-10-17 Thread Avi Kivity
On 10/17/2011 11:27 AM, Jan Kiszka wrote: This cache will help us implementing KVM in-kernel irqchip support without spreading hooks all over the place. KVM requires us to register it first and then deliver it by raising a pseudo IRQ line returned on registration. While this could be changed

Re: [Qemu-devel] GPLv3 troubles

2011-10-17 Thread Andreas Färber
Am 17.10.2011 12:47, schrieb Paolo Bonzini: On 10/17/2011 12:45 PM, Andreas Färber wrote: Could we please draft some policy on this? This is not a GDB issue, it's very general. Whether we like it or not, there is GPLv3-licensed code and there will probably be a GPLv4 one day. IMO having old

Re: [Qemu-devel] [RFC][PATCH 06/45] msix: Prevent bogus mask updates on MMIO accesses

2011-10-17 Thread Michael S. Tsirkin
On Mon, Oct 17, 2011 at 11:27:40AM +0200, Jan Kiszka wrote: Only accesses to the MSI-X table must trigger a call to msix_handle_mask_update or a notifier invocation. Signed-off-by: Jan Kiszka jan.kis...@siemens.com Why would msix_mmio_write be called on an access outside the table? ---

Re: [Qemu-devel] GPLv3 troubles

2011-10-17 Thread Paolo Bonzini
On 10/17/2011 01:07 PM, Andreas Färber wrote: That is close to impossible, you usually ask permission for all the authors in the history to avoid bigger problems. I did refer to authors in history, in case that was unclear. Authors in history (unlike authors in git blame, but you cannot

[Qemu-devel] [RFC][PATCH 24/45] qemu-kvm: msix: Don't handle mask updated while disabled

2011-10-17 Thread Jan Kiszka
As long as MSI-X is disabled, it's incorrect to invoke msix_handle_mask_update on per-vector mask changes. That may misguide the config notifier callback or spuriously trigger an MSI event. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/msix.c |2 +- 1 files changed, 1

[Qemu-devel] [PATCH v2 1/2] ioapic: Convert to memory API

2011-10-17 Thread Jan Kiszka
This maintains the old imprecise access size handling. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- Changes in v2: - use new-style handlers hw/ioapic.c | 28 +++- 1 files changed, 11 insertions(+), 17 deletions(-) diff --git a/hw/ioapic.c b/hw/ioapic.c index

[Qemu-devel] [PATCH 2/2] ioapic: Reject non-dword accesses to IOWIN register

2011-10-17 Thread Jan Kiszka
Aligns the model with the spec. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/ioapic.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/hw/ioapic.c b/hw/ioapic.c index 56b1612..eb75766 100644 --- a/hw/ioapic.c +++ b/hw/ioapic.c @@ -208,6 +208,9 @@

Re: [Qemu-devel] [RFC][PATCH 17/45] qemu-kvm: Track MSIRoutingCache in KVM routing table

2011-10-17 Thread Avi Kivity
On 10/17/2011 11:27 AM, Jan Kiszka wrote: Keep a link from the internal KVM routing table to potential MSI routing cache entries. The link is used so far whenever the entry is dropped to invalidate the cache content. It will allow us to build MSI routing entries on demand and flush existing

Re: [Qemu-devel] [RFC][PATCH 11/45] msi: Factor out delivery hook

2011-10-17 Thread Jan Kiszka
On 2011-10-17 12:56, Avi Kivity wrote: On 10/17/2011 11:27 AM, Jan Kiszka wrote: So far we deliver MSI messages by writing them into the target MMIO area. This reflects what happens on hardware, but imposes some limitations on the emulation when introducing KVM in-kernel irqchip models. For

Re: [Qemu-devel] [PATCH] arm gic saving/loading fix

2011-10-17 Thread Peter Maydell
On 17 October 2011 11:54, Andreas Färber afaer...@suse.de wrote: Am 17.10.2011 12:48, schrieb Dmitry Koshelev: irq_target field saving/loading is in the wrong loop Signed-off-by: Dmitry Koshelev karagio...@gmail.com Reviewed-by: Andreas Färber afaer...@suse.de Doesn't it need a vmstate

[Qemu-devel] [RFC][PATCH 16/45] qemu-kvm: Use MSIMessage and MSIRoutingCache

2011-10-17 Thread Jan Kiszka
Start benefiting from the new abstractions and drop the KVM-specific vector tracking to generic MSIMessage and MSIRoutingCache data structures and helpers, also reducing the diff to upstream. Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/msi.c| 49

[Qemu-devel] [RFC][PATCH 35/45] pci-assign: Polish assigned_dev_update_msix_mmio

2011-10-17 Thread Jan Kiszka
- rename to assigned_dev_set_msix_vectors - drop unused msg_ctrl - use pci_get_* accessors - rename variable va to msix_page - clarify comment on msg_data == 0 optimization - fix coding style Signed-off-by: Jan Kiszka jan.kis...@siemens.com --- hw/device-assignment.c | 53

Re: [Qemu-devel] [PATCH] arm cpu state loading fix

2011-10-17 Thread Peter Maydell
On 17 October 2011 11:53, Dmitry Koshelev karaghio...@gmail.com wrote: Floating registers loading fix. Signed-off-by: Dmitry Koshelev karaghio...@gmail.com ---  target-arm/machine.c |    2 +-  1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-arm/machine.c

Re: [Qemu-devel] [RFC][PATCH 12/45] msi: Introduce MSIRoutingCache

2011-10-17 Thread Jan Kiszka
On 2011-10-17 13:06, Avi Kivity wrote: On 10/17/2011 11:27 AM, Jan Kiszka wrote: This cache will help us implementing KVM in-kernel irqchip support without spreading hooks all over the place. KVM requires us to register it first and then deliver it by raising a pseudo IRQ line returned on

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