Il 04/03/2012 01:44, Laurent Vivier ha scritto:
> Hi,
>
> since commit ae255e523, qemu with NBD hangs at startup (when it tries to
> access the disk):
>
> commit ae255e523c256cf0708f1c16cb946ff96340a800
> Author: Paolo Bonzini
> Date: Thu Sep 8 14:28:59 2011 +0200
>
> nbd: switch to async
On 02.03.2012 13:22, Kirill Batuzov wrote:
Currently large memory chunk allocation with tcg_malloc is broken. An attempt
to allocate such chunk when pool_current field of TCGContext is not NULL will
result in circular links in list of memory pools:
p = new pool;
s->pool_current->next = p;
p->ne
On Sun, Mar 04, 2012 at 08:30:00PM -0700, Alex Williamson wrote:
> On Sun, 2012-03-04 at 20:53 +0200, Michael S. Tsirkin wrote:
> > On Fri, Feb 24, 2012 at 04:21:17PM -0700, Alex Williamson wrote:
> > > When a Status method is provided on a slot, the OSPM evaluates
> > > _STA in response to the dev
The macro offsetof is defined in stddef.h. It is conforming to
the standards C89, C99 and POSIX.1-2001 (see man page), so it
is a sufficiently old standard.
Therefore chances are very high that QEMU never needs a local
definition of this macro.
osdep.h already includes stddef.h, so this patch sim
> On Thu, Mar 01, 2012 at 06:50:43PM +1300, Alexey Korolev wrote:
>> Hi,
>>
>> This patch series enables 64bit BAR support in seabios.
>> It has a bit different approach for resources accounting, We did this
>> because we wanted:
>> a) Provide 64bit bar support for PCI BARs and bridges with 64bit
On 03/01/12 22:48, Alexey Korolev wrote:
>> Hi,
>> What is your setup?
>> I want to reproduce this case
> qemu: latest master with a few patches (mst's bridge patches, pci64
> fixes from me, posted to qemu-devel a few days ago), bundle pushed to
> http://www.kraxel.org/cgit/qemu/log/?h=pci64 for yo
On 02/03/12 20:21, Gerd Hoffmann wrote:
> On 03/01/12 23:01, Alexey Korolev wrote:
>> On 01/03/12 22:22, Gerd Hoffmann wrote:
>>> On 03/01/12 07:57, Alexey Korolev wrote:
In pci_bios_map_regions() we try to reserve memory for
all entries of root bus regions.
If pci_bios_init_root_re
On Sun, Mar 04, 2012 at 08:30:00PM -0700, Alex Williamson wrote:
> On Sun, 2012-03-04 at 20:53 +0200, Michael S. Tsirkin wrote:
> > On Fri, Feb 24, 2012 at 04:21:17PM -0700, Alex Williamson wrote:
> > > When a Status method is provided on a slot, the OSPM evaluates
> > > _STA in response to the dev
Device model for cadence gem ethernet controller.
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
Acked-by: Edgar E. Iglesias
---
changed from v8:
implemented vmsd
changed from v7:
removed dedundant #includes
renamed *COMPL -> *CMPL for consistency
changed bzero -> memset
remove
Xilinx zynq-7000 machine model. Also includes device model for the zynq-specific
system level control register (SLCR) module.
Signed-off-by: Peter A. G. Crosthwaite
Acked-by: Edgar E. Iglesias
---
changed from v8:
implemented vmsd for slcr
changed from v7:
removed (non-functional) SMP support
re
Implemented cadence Triple Timer Counter (TCC)
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
Acked-by: Edgar E. Iglesias
---
changed from v8:
implemented vmsd
changed from v7:
removed fflush() from DBPRINTF
changed from v6:
renamed cadence_ttc_state -> CadenceTTCState
renamed
Implemented cadence UART serial controller
Signed-off-by: Peter A. G. Crosthwaite
Signed-off-by: John Linn
Acked-by: Edgar E. Iglesias
---
changed from v8:
reworked uart interrupt behaviour
typo fix UARK->UART
vsmd version correction
changed from v7:
removed fflush() from DBPRINTF
changed from
This is a suite of Device models and a machine model for the Xilinx Zynq-7000
Extensible Processing Platform:
http://www.xilinx.com/products/silicon-devices/epp/zynq-7000/index.htm
This is an ARM based platform featuring embedded SoC peripherals. This patch
series includes a minimal set of devi
According the spec, the card works in network/host communication mode only when
both EEM1 and EEM0 are unset in 93C46 Command Register (normal op
mode). So this patch check these bits before trying to receive packets.
As some guest driver (such as linux, see cp_init_hw() in 8139cp.c)
allocate rx r
According to the spec, only when opmode is "Config. Register Write
Enable" could driver write to CONFIG0,1,3,4 and bits 13,12,8 of BMCR.
Currently, we allow modifying to those registers also when 8139 is in
"Auto-load" mode and "93C46 (93C56) Programming" mode. This patch
fixes this.
Signed-off-b
Some drivers (such as win7) use byte read for TxStatus registers, so we need to
support this to let guest driver behave correctly.
For writing, only double-word access is allowed by spec.
Signed-off-by: Jason Wang
---
hw/rtl8139.c | 33 +
1 files changed, 29 in
Reduce duplicated codes.
Signed-off-by: Jason Wang
---
hw/eepro100.c | 25 -
hw/ne2000.c| 24
hw/opencores_eth.c | 25 -
hw/rtl8139.c | 24
net.c | 23 +
Signed-off-by: Jason Wang
---
hw/rtl8139.c |3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/hw/rtl8139.c b/hw/rtl8139.c
index d9e742c..ca613ae 100644
--- a/hw/rtl8139.c
+++ b/hw/rtl8139.c
@@ -65,9 +65,6 @@
#define PCI_FREQUENCY 3300L
-/* debug RTL8139 card C+ mo
The tx buffer would be re-allocated for tx descriptor with big size
and without LS bit set, this would make guest driver could easily let
qemu to allocate unlimited.
In linux host, a glib failure were easy to be triggered:
GLib-ERROR **: gmem.c:176: failed to allocate 18446744071562067968 bytes
On Sun, 2012-03-04 at 20:53 +0200, Michael S. Tsirkin wrote:
> On Fri, Feb 24, 2012 at 04:21:17PM -0700, Alex Williamson wrote:
> > When a Status method is provided on a slot, the OSPM evaluates
> > _STA in response to the device check notify on the slot. This
> > allows some degree of a handshake
On Fri, Mar 02, 2012 at 07:02:21AM -0500, Stefan Berger wrote:
> On 02/21/2012 06:08 PM, Michael S. Tsirkin wrote:
> >On Tue, Feb 21, 2012 at 05:30:32PM -0500, Stefan Berger wrote:
> >>On 02/21/2012 02:58 PM, Michael S. Tsirkin wrote:
> >>>On Tue, Feb 21, 2012 at 10:05:26AM -0500, Stefan Berger wro
On Sun, Mar 04, 2012 at 09:54:02PM +, Blue Swirl wrote:
> >> 19.3.1.10 tells that the header type is 0, as you noted too. Still,
> >> the register layout matches bridge spec instead, for example there are
> >> bus number registers in place of BAR 2.
> >
> > Sorry I don't see this in 19.3.1
> >
On 04/03/12 19:51, Blue Swirl wrote:
I now know the root cause of the problem. OpenBIOS programs the BARs
somewhat correctly just by accident. The initial io_base and mem_base
for BARs are not correct, but because the host bridge BARs (and also 6
of which 4 are not even BARs!) are programmed fir
On Sun, Mar 4, 2012 at 21:28, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 08:32:26PM +, Blue Swirl wrote:
>> On Sun, Mar 4, 2012 at 20:02, Michael S. Tsirkin wrote:
>> > On Sun, Mar 04, 2012 at 07:51:02PM +, Blue Swirl wrote:
>> >> On Sun, Mar 4, 2012 at 17:35, Michael S. Tsirkin
On 04.03.2012, at 22:19, Benjamin Herrenschmidt
wrote:
> On Sun, 2012-03-04 at 21:59 +0100, Alexander Graf wrote:
> g_assert(TARGET_PAGE_SIZE <= getpagesize())
>
> Just declare the above case as unsupported and abort if we
>> encounter it.
What I'm trying to tell you is
On Sun, Mar 04, 2012 at 08:32:26PM +, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 20:02, Michael S. Tsirkin wrote:
> > On Sun, Mar 04, 2012 at 07:51:02PM +, Blue Swirl wrote:
> >> On Sun, Mar 4, 2012 at 17:35, Michael S. Tsirkin wrote:
> >> > On Sun, Mar 04, 2012 at 05:07:34PM +, Blue
Am 04.03.2012 21:59, schrieb Alexander Graf:
>
>
> On 04.03.2012, at 21:31, Andreas Färber wrote:
>
>> Am 04.03.2012 21:25, schrieb Alexander Graf:
>>>
>>>
>>> On 04.03.2012, at 21:21, Andreas Färber wrote:
>>>
Am 04.03.2012 19:46, schrieb Alexander Graf:
>
>
> On 04.03.2012,
On Sun, 2012-03-04 at 21:59 +0100, Alexander Graf wrote:
> >>> g_assert(TARGET_PAGE_SIZE <= getpagesize())
> >>>
> >>> Just declare the above case as unsupported and abort if we
> encounter it.
> >>
> >> What I'm trying to tell you is that it's the default case on book3s
> ppc! ;)
> >
> > Exactl
On Sun, 2012-03-04 at 17:46 +0100, Andreas Färber wrote:
> Except for ppcemb-softmmu (1k), which is irrelevant for KVM AFAIU.
>
> Maybe just add an assert and be done with it?
Well, my patch should work anyway, as long as getpagesize() returns a
higher power of two.
The case that wouldn't work (
On Sun, Mar 4, 2012 at 02:46, Avi Kivity wrote:
> On 03/04/2012 12:38 PM, Gleb Natapov wrote:
>> On Sun, Mar 04, 2012 at 12:36:20PM +0200, Avi Kivity wrote:
>> > On 03/04/2012 10:12 AM, Gleb Natapov wrote:
>> > > On Sat, Mar 03, 2012 at 10:56:02PM -0800, Jordan Justen wrote:
>> > > > On Tue, Oct 2
Hello Anthony,
This series prepares for QOM'ification of CPUs and machines by rearranging
constructor calls and Makefile dependency rules. I've separated it out due
to complaints about patch series length for conversion of all targets.
Patch 1 is a RESEND that avoids an abort after patch 2.
Patc
On 04.03.2012, at 21:31, Andreas Färber wrote:
> Am 04.03.2012 21:25, schrieb Alexander Graf:
>>
>>
>> On 04.03.2012, at 21:21, Andreas Färber wrote:
>>
>>> Am 04.03.2012 19:46, schrieb Alexander Graf:
On 04.03.2012, at 17:46, Andreas Färber wrote:
> Am 04.03.201
On Sun, Mar 4, 2012 at 20:02, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 07:51:02PM +, Blue Swirl wrote:
>> On Sun, Mar 4, 2012 at 17:35, Michael S. Tsirkin wrote:
>> > On Sun, Mar 04, 2012 at 05:07:34PM +, Blue Swirl wrote:
>> >> On Sun, Mar 4, 2012 at 15:22, Michael S. Tsirkin
Link the Object base class and the module infrastructure for class
registration. Introduce $(universal-obj-y) for objects that are more
common than $(common-obj-y), so that those only get built once.
Call QOM module init for type registration.
Signed-off-by: Andreas Färber
Cc: Anthony Liguori
-
The constructors for QOM TYPE_INTERFACE were executed rather late in
vl.c's main(). Call them very early so that QOM can safely be used for
machines and CPUs.
Signed-off-by: Andreas Färber
Cc: Anthony Liguori
---
vl.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/v
Currently, the "kvmclock" type is only registered when kvm_enabled().
This breaks when moving type registration to before command line
parsing (so that QOM types can be used for CPU and machine).
Since the QOM classes are lazy-initialized anyway and kvmclock_create()
has another kvm_enabled() che
Am 04.03.2012 21:25, schrieb Alexander Graf:
>
>
> On 04.03.2012, at 21:21, Andreas Färber wrote:
>
>> Am 04.03.2012 19:46, schrieb Alexander Graf:
>>>
>>>
>>> On 04.03.2012, at 17:46, Andreas Färber wrote:
>>>
Am 04.03.2012 12:53, schrieb Benjamin Herrenschmidt:
> On Sun, 2012-03-04
On 04.03.2012, at 21:21, Andreas Färber wrote:
> Am 04.03.2012 19:46, schrieb Alexander Graf:
>>
>>
>> On 04.03.2012, at 17:46, Andreas Färber wrote:
>>
>>> Am 04.03.2012 12:53, schrieb Benjamin Herrenschmidt:
On Sun, 2012-03-04 at 12:49 +0200, Avi Kivity wrote:
> On 02/28/2012 11:
Am 04.03.2012 19:46, schrieb Alexander Graf:
>
>
> On 04.03.2012, at 17:46, Andreas Färber wrote:
>
>> Am 04.03.2012 12:53, schrieb Benjamin Herrenschmidt:
>>> On Sun, 2012-03-04 at 12:49 +0200, Avi Kivity wrote:
On 02/28/2012 11:48 PM, Benjamin Herrenschmidt wrote:
> On Tue, 2012-02-2
Hello,
Clean XP install cores with SCSI LSI 53C89A disk when copying files.
Reproduceable. Driver used is sym_hi. Details are below.
Tried also old versions 1.0, 0.15.1, cores too.
Any ideas?
Thnx.
Ciao,
Gerhard
--
http://www.wiesinger.com/
Image created with:
qemu-img create -f qcow2 XP
On Sun, Mar 04, 2012 at 07:51:02PM +, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 17:35, Michael S. Tsirkin wrote:
> > On Sun, Mar 04, 2012 at 05:07:34PM +, Blue Swirl wrote:
> >> On Sun, Mar 4, 2012 at 15:22, Michael S. Tsirkin wrote:
> >> > On Sun, Mar 04, 2012 at 02:35:28PM +, Blue
On 04.03.2012 20:08, Avi Kivity wrote:
> On 03/04/2012 02:41 PM, Michael Tokarev wrote:
>> Since all block (bdrv) layer is now implemented using
>> coroutines, I thought I'd give it a try. But immediately
>> hit a question to which I don't know a good answer.
>>
>> Suppose we've some networking bl
On Sun, Mar 4, 2012 at 17:35, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 05:07:34PM +, Blue Swirl wrote:
>> On Sun, Mar 4, 2012 at 15:22, Michael S. Tsirkin wrote:
>> > On Sun, Mar 04, 2012 at 02:35:28PM +, Blue Swirl wrote:
>> >> On Sun, Mar 4, 2012 at 14:23, Michael S. Tsirkin
On Sun, Mar 04, 2012 at 06:11:20PM +, Mark Cave-Ayland wrote:
> On 04/03/12 17:49, Blue Swirl wrote:
>
> >>According to the spec it is a device, so should be ok?
> >>If I just make BAR4 writeable we get past the
> >>bios screen at least.
> >>Maybe openbios gets confused if a device has no BARs
On Thu, Mar 01, 2012 at 06:50:43PM +1300, Alexey Korolev wrote:
> Hi,
>
> This patch series enables 64bit BAR support in seabios.
> It has a bit different approach for resources accounting, We did this
> because we wanted:
> a) Provide 64bit bar support for PCI BARs and bridges with 64bit memory
On Sun, Mar 04, 2012 at 06:11:20PM +, Mark Cave-Ayland wrote:
> On 04/03/12 17:49, Blue Swirl wrote:
>
> >>According to the spec it is a device, so should be ok?
> >>If I just make BAR4 writeable we get past the
> >>bios screen at least.
> >>Maybe openbios gets confused if a device has no BARs
On Sun, Mar 04, 2012 at 05:49:04PM +, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 16:42, Michael S. Tsirkin wrote:
> > On Sun, Mar 04, 2012 at 02:26:13PM +, Blue Swirl wrote:
> >> > It seems to have to do with the host bridge.
> >> > It's unusual to have host bridge present itself
> >> > as
On Fri, Feb 24, 2012 at 04:21:17PM -0700, Alex Williamson wrote:
> When a Status method is provided on a slot, the OSPM evaluates
> _STA in response to the device check notify on the slot. This
> allows some degree of a handshake between the platform and the
> OSPM that the hotplug has been acknow
On 04.03.2012, at 17:46, Andreas Färber wrote:
> Am 04.03.2012 12:53, schrieb Benjamin Herrenschmidt:
>> On Sun, 2012-03-04 at 12:49 +0200, Avi Kivity wrote:
>>> On 02/28/2012 11:48 PM, Benjamin Herrenschmidt wrote:
On Tue, 2012-02-28 at 14:32 +0200, Avi Kivity wrote:
> What if T
On 04/03/12 17:49, Blue Swirl wrote:
According to the spec it is a device, so should be ok?
If I just make BAR4 writeable we get past the
bios screen at least.
Maybe openbios gets confused if a device has no BARs?
Do things work for you with the patch below?
All it does is make BAR4 writeable, a
Hi all,
I've just done a git pull to update my local repository, and it now
appears that the VGA device is broken in QEMU - rather than displaying
the OpenBIOS banner in my VNC client, the framebuffer remains constantly
black.
A git bisect shows that the problem is caused by the following co
On Sun, Mar 4, 2012 at 16:42, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 02:26:13PM +, Blue Swirl wrote:
>> > It seems to have to do with the host bridge.
>> > It's unusual to have host bridge present itself
>> > as a pci to pci bridge but there it is.
>>
>> It looks like the I/O base
On Sun, Mar 04, 2012 at 05:07:34PM +, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 15:22, Michael S. Tsirkin wrote:
> > On Sun, Mar 04, 2012 at 02:35:28PM +, Blue Swirl wrote:
> >> On Sun, Mar 4, 2012 at 14:23, Michael S. Tsirkin wrote:
> >> > On Sun, Mar 04, 2012 at 01:38:38PM +, Blue
On Sun, Mar 4, 2012 at 15:22, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 02:35:28PM +, Blue Swirl wrote:
>> On Sun, Mar 4, 2012 at 14:23, Michael S. Tsirkin wrote:
>> > On Sun, Mar 04, 2012 at 01:38:38PM +, Blue Swirl wrote:
>> >> On Sun, Mar 4, 2012 at 13:28, Michael S. Tsirkin
On Fri, Feb 24, 2012 at 04:21:17PM -0700, Alex Williamson wrote:
> When a Status method is provided on a slot, the OSPM evaluates
> _STA in response to the device check notify on the slot. This
> allows some degree of a handshake between the platform and the
> OSPM that the hotplug has been acknow
On Sun, Mar 04, 2012 at 05:03:14PM +0100, Andreas Färber wrote:
> Am 04.03.2012 10:10, schrieb Michael S. Tsirkin:
> > I ended up with qmp-commands.h in target directories,
> > which makes build fail as it is found before the
> > main header.
> > make clean fixes it, but it might get triggered
> >
Am 04.03.2012 12:53, schrieb Benjamin Herrenschmidt:
> On Sun, 2012-03-04 at 12:49 +0200, Avi Kivity wrote:
>> On 02/28/2012 11:48 PM, Benjamin Herrenschmidt wrote:
>>> On Tue, 2012-02-28 at 14:32 +0200, Avi Kivity wrote:
>>>
What if TARGET_PAGE_SIZE > getpagesize()? Or is that impossible?
>>
On Sun, Mar 04, 2012 at 02:26:13PM +, Blue Swirl wrote:
> > It seems to have to do with the host bridge.
> > It's unusual to have host bridge present itself
> > as a pci to pci bridge but there it is.
>
> It looks like the I/O base calculations in OpenBIOS are confused
Where's the source for
On 03/04/2012 02:41 PM, Michael Tokarev wrote:
> Since all block (bdrv) layer is now implemented using
> coroutines, I thought I'd give it a try. But immediately
> hit a question to which I don't know a good answer.
>
> Suppose we've some networking block device (like NBD) and
> want to be able to
Am 04.03.2012 10:10, schrieb Michael S. Tsirkin:
> I ended up with qmp-commands.h in target directories,
> which makes build fail as it is found before the
> main header.
> make clean fixes it, but it might get triggered
> again when we make some header target-independent next.
> It's easy to just
On Sun, Mar 04, 2012 at 02:35:28PM +, Blue Swirl wrote:
> Yes, it's the host bridge, also known as PBM. It's documented in
> UltraSPARC IIi User's Manual and there it says that the device is
> found in the configuration space.
So it seems I can make things work if
I disable is_bridge and make
On Sun, Mar 04, 2012 at 02:35:28PM +, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 14:23, Michael S. Tsirkin wrote:
> > On Sun, Mar 04, 2012 at 01:38:38PM +, Blue Swirl wrote:
> >> On Sun, Mar 4, 2012 at 13:28, Michael S. Tsirkin wrote:
> >> > On Sun, Mar 04, 2012 at 12:37:57PM +, Blue
On Sun, Mar 4, 2012 at 14:23, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 01:38:38PM +, Blue Swirl wrote:
>> On Sun, Mar 4, 2012 at 13:28, Michael S. Tsirkin wrote:
>> > On Sun, Mar 04, 2012 at 12:37:57PM +, Blue Swirl wrote:
>> >> On Sun, Mar 4, 2012 at 12:21, Michael S. Tsirkin
On Sun, Mar 4, 2012 at 14:08, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 01:33:42PM +, Blue Swirl wrote:
>> On Sun, Mar 4, 2012 at 13:22, Michael S. Tsirkin wrote:
>> > On Sun, Mar 04, 2012 at 02:41:33PM +0200, Avi Kivity wrote:
>> >> On 03/04/2012 02:38 PM, Blue Swirl wrote:
>> >> >
On Sun, Mar 04, 2012 at 01:38:38PM +, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 13:28, Michael S. Tsirkin wrote:
> > On Sun, Mar 04, 2012 at 12:37:57PM +, Blue Swirl wrote:
> >> On Sun, Mar 4, 2012 at 12:21, Michael S. Tsirkin wrote:
> >> > On Sun, Mar 04, 2012 at 10:27:24AM +, Blue
On Sun, Mar 04, 2012 at 01:44:26PM +, Peter Maydell wrote:
> On 4 March 2012 13:31, Michael S. Tsirkin wrote:
> > On Sun, Mar 04, 2012 at 01:25:59PM +, Peter Maydell wrote:
> >> In general we don't have workarounds for "something
> >> moved directory and this broke builds not from clean"
>
On Sun, Mar 04, 2012 at 01:33:42PM +, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 13:22, Michael S. Tsirkin wrote:
> > On Sun, Mar 04, 2012 at 02:41:33PM +0200, Avi Kivity wrote:
> >> On 03/04/2012 02:38 PM, Blue Swirl wrote:
> >> > >>
> >> > >> This unassigned memory exception is triggered bec
On 4 March 2012 13:31, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 01:25:59PM +, Peter Maydell wrote:
>> In general we don't have workarounds for "something
>> moved directory and this broke builds not from clean"
>
> Why don't we? It's cheaper than always doing
> make clean after pull
On Sun, Mar 4, 2012 at 13:28, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 12:37:57PM +, Blue Swirl wrote:
>> On Sun, Mar 4, 2012 at 12:21, Michael S. Tsirkin wrote:
>> > On Sun, Mar 04, 2012 at 10:27:24AM +, Blue Swirl wrote:
>> >> On Sun, Mar 4, 2012 at 09:46, Michael S. Tsirkin
On Sun, Mar 04, 2012 at 12:37:57PM +, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 12:21, Michael S. Tsirkin wrote:
> > On Sun, Mar 04, 2012 at 10:27:24AM +, Blue Swirl wrote:
> >> On Sun, Mar 4, 2012 at 09:46, Michael S. Tsirkin wrote:
> >> > commit 5caef97a16010f818ea8b950e2ee24ba876643ad
On Sun, Mar 4, 2012 at 13:22, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 02:41:33PM +0200, Avi Kivity wrote:
>> On 03/04/2012 02:38 PM, Blue Swirl wrote:
>> > >>
>> > >> This unassigned memory exception is triggered because CMD646 IDE I/O
>> > >> registers are not accessible:
>> > >>
>> >
On Sun, Mar 04, 2012 at 01:25:59PM +, Peter Maydell wrote:
> On 4 March 2012 09:10, Michael S. Tsirkin wrote:
> > I ended up with qmp-commands.h in target directories,
> > which makes build fail as it is found before the
> > main header.
> > make clean fixes it, but it might get triggered
> >
On Sun, Mar 04, 2012 at 12:37:57PM +, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 12:21, Michael S. Tsirkin wrote:
> > On Sun, Mar 04, 2012 at 10:27:24AM +, Blue Swirl wrote:
> >> On Sun, Mar 4, 2012 at 09:46, Michael S. Tsirkin wrote:
> >> > commit 5caef97a16010f818ea8b950e2ee24ba876643ad
On 4 March 2012 09:10, Michael S. Tsirkin wrote:
> I ended up with qmp-commands.h in target directories,
> which makes build fail as it is found before the
> main header.
> make clean fixes it, but it might get triggered
> again when we make some header target-independent next.
> It's easy to just
On Sun, Mar 04, 2012 at 02:41:33PM +0200, Avi Kivity wrote:
> On 03/04/2012 02:38 PM, Blue Swirl wrote:
> > >>
> > >> This unassigned memory exception is triggered because CMD646 IDE I/O
> > >> registers are not accessible:
> > >>
> > >> (qemu) info pci
> > >> Bus 0, device 5, function 0:
> >
On Sun, Mar 04, 2012 at 12:46:23PM +, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 12:41, Avi Kivity wrote:
> > On 03/04/2012 02:38 PM, Blue Swirl wrote:
> >> >>
> >> >> This unassigned memory exception is triggered because CMD646 IDE I/O
> >> >> registers are not accessible:
> >> >>
> >> >> (qe
On Fri, Mar 2, 2012 at 12:58 AM, Peter Maydell wrote:
> On 28 February 2012 07:40, Peter A. G. Crosthwaite
> wrote:
>> Implemented cadence Triple Timer Counter (TCC)
>>
>> Signed-off-by: Peter A. G. Crosthwaite
>> Signed-off-by: John Linn
>> Acked-by: Edgar E. Iglesias
>> ---
>> changed from v
On Sun, Mar 4, 2012 at 12:41, Avi Kivity wrote:
> On 03/04/2012 02:38 PM, Blue Swirl wrote:
>> >>
>> >> This unassigned memory exception is triggered because CMD646 IDE I/O
>> >> registers are not accessible:
>> >>
>> >> (qemu) info pci
>> >> Bus 0, device 5, function 0:
>> >> IDE control
On Sun, Mar 4, 2012 at 12:33, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 10:27:24AM +, Blue Swirl wrote:
>> On Sun, Mar 4, 2012 at 09:46, Michael S. Tsirkin wrote:
>> > commit 5caef97a16010f818ea8b950e2ee24ba876643ad introduced
>> > a regression: we do not make IO base/limit upper 16
Since all block (bdrv) layer is now implemented using
coroutines, I thought I'd give it a try. But immediately
hit a question to which I don't know a good answer.
Suppose we've some networking block device (like NBD) and
want to be able to support reconnection - this is actually
very useful featu
On 03/04/2012 02:38 PM, Blue Swirl wrote:
> >>
> >> This unassigned memory exception is triggered because CMD646 IDE I/O
> >> registers are not accessible:
> >>
> >> (qemu) info pci
> >> Bus 0, device 5, function 0:
> >> IDE controller: PCI device 1095:0646
> >> IRQ 1.
> >> BAR
On Sun, Mar 4, 2012 at 12:28, Avi Kivity wrote:
> On 03/04/2012 12:27 PM, Blue Swirl wrote:
>> On Sun, Mar 4, 2012 at 09:46, Michael S. Tsirkin wrote:
>> > commit 5caef97a16010f818ea8b950e2ee24ba876643ad introduced
>> > a regression: we do not make IO base/limit upper 16
>> > bit registers writea
On Sun, Mar 4, 2012 at 12:21, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 10:27:24AM +, Blue Swirl wrote:
>> On Sun, Mar 4, 2012 at 09:46, Michael S. Tsirkin wrote:
>> > commit 5caef97a16010f818ea8b950e2ee24ba876643ad introduced
>> > a regression: we do not make IO base/limit upper 16
On 03/04/2012 02:33 PM, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 10:27:24AM +, Blue Swirl wrote:
> > On Sun, Mar 4, 2012 at 09:46, Michael S. Tsirkin wrote:
> > > commit 5caef97a16010f818ea8b950e2ee24ba876643ad introduced
> > > a regression: we do not make IO base/limit upper 16
> >
On Sun, Mar 04, 2012 at 02:33:02PM +0200, Michael S. Tsirkin wrote:
> On Sun, Mar 04, 2012 at 10:27:24AM +, Blue Swirl wrote:
> > On Sun, Mar 4, 2012 at 09:46, Michael S. Tsirkin wrote:
> > > commit 5caef97a16010f818ea8b950e2ee24ba876643ad introduced
> > > a regression: we do not make IO base/
Hi all:
I read pci code in qemu about i440fx, pci.c and so on. I think if guest
os whose mainboard is based on x86, it will use IO instructions to
access PCI configuration space.If not use passthrough, qemu should
emulate these operations.I find a function called kvm_handle_io who will
emulate iop
On Sun, Mar 04, 2012 at 10:27:24AM +, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 09:46, Michael S. Tsirkin wrote:
> > commit 5caef97a16010f818ea8b950e2ee24ba876643ad introduced
> > a regression: we do not make IO base/limit upper 16
> > bit registers writeable, so we should report a 16 bit
> >
On 03/04/2012 12:27 PM, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 09:46, Michael S. Tsirkin wrote:
> > commit 5caef97a16010f818ea8b950e2ee24ba876643ad introduced
> > a regression: we do not make IO base/limit upper 16
> > bit registers writeable, so we should report a 16 bit
> > IO range type, no
On Sun, Mar 04, 2012 at 10:27:24AM +, Blue Swirl wrote:
> On Sun, Mar 4, 2012 at 09:46, Michael S. Tsirkin wrote:
> > commit 5caef97a16010f818ea8b950e2ee24ba876643ad introduced
> > a regression: we do not make IO base/limit upper 16
> > bit registers writeable, so we should report a 16 bit
> >
On Fri, Mar 2, 2012 at 12:09 AM, Peter Maydell wrote:
> On 28 February 2012 07:40, Peter A. G. Crosthwaite
> wrote:
>> Implemented cadence UART serial controller
>>
>> Signed-off-by: Peter A. G. Crosthwaite
>> Signed-off-by: John Linn
>> Acked-by: Edgar E. Iglesias
>> ---
>> changed from v7:
>
On 03/04/2012 01:53 PM, Benjamin Herrenschmidt wrote:
> On Sun, 2012-03-04 at 12:49 +0200, Avi Kivity wrote:
> > On 02/28/2012 11:48 PM, Benjamin Herrenschmidt wrote:
> > > On Tue, 2012-02-28 at 14:32 +0200, Avi Kivity wrote:
> > >
> > > > What if TARGET_PAGE_SIZE > getpagesize()? Or is that impos
On Sun, 2012-03-04 at 12:49 +0200, Avi Kivity wrote:
> On 02/28/2012 11:48 PM, Benjamin Herrenschmidt wrote:
> > On Tue, 2012-02-28 at 14:32 +0200, Avi Kivity wrote:
> >
> > > What if TARGET_PAGE_SIZE > getpagesize()? Or is that impossible?
> >
> > We have yet to encounter such a case. It's not cu
Thanks, applied all.
On Fri, Mar 2, 2012 at 22:30, Stefan Weil wrote:
> These patches are a step towards full 64 bit support for w64.
> The patches 4 and 5 are optional.
>
> Please apply this series.
>
> Thanks,
> Stefan Weil
>
> [PATCH 1/6] w64: Fix size of ram_addr_t
> [PATCH 2/6] tcg: Rearrang
Thanks, pulled.
On Tue, Feb 28, 2012 at 21:47, Stefan Weil wrote:
> Hi,
>
> please pull these patches from January.
>
> Thanks,
>
> Stefan Weil
>
>
> The following changes since commit b55c952aea6de024bf1a06357b49367fba045443:
>
> Merge remote-tracking branch 'aneesh/for-upstream' into staging (
Signed-off-by: Hans de Goede
---
hw/usb-ehci.c |6 +-
1 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/hw/usb-ehci.c b/hw/usb-ehci.c
index df742f7..f4d53ff 100644
--- a/hw/usb-ehci.c
+++ b/hw/usb-ehci.c
@@ -419,7 +419,6 @@ struct EHCIState {
USBPacket ipacket;
QE
From: "Peter A. G. Crosthwaite"
Use the -dtb argument for passing is a custom dtb rather than the old
hardcoded "mb.dtb"
Signed-off-by: Peter A. G. Crosthwaite
---
hw/microblaze_boot.c | 34 ++
1 files changed, 14 insertions(+), 20 deletions(-)
diff --git a/h
From: "Peter A. G. Crosthwaite"
Signed-off-by: Peter A. G. Crosthwaite
---
qemu-options.hx |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/qemu-options.hx b/qemu-options.hx
index e38799c..daefce3 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -2038,7 +2038,7 @@
From: "Peter A. G. Crosthwaite"
defined macros for the addresses of the peripherals in machine model
Signed-off-by: Peter A. G. Crosthwaite
---
hw/petalogix_s3adsp1800_mmu.c | 20 +---
1 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/hw/petalogix_s3adsp1800_mmu
From: "Peter A. G. Crosthwaite"
This belongs in the machine specific reset function
Signed-off-by: Peter A. G. Crosthwaite
---
hw/petalogix_s3adsp1800_mmu.c | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/hw/petalogix_s3adsp1800_mmu.c b/hw/petalogix_s3adsp18
From: "Peter A. G. Crosthwaite"
factored out the copy-pasted common boot code from the two microblaze platforms
into a dedicated microblaze bootloader (microblaze_boot.o).
Signed-off-by: Peter A. G. Crosthwaite
---
Makefile.target |1 +
hw/microblaze_boot.c | 183 ++
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