[Qemu-devel] [PATCH 10/11] target-arm: Reindent ancient page-table-walk code
A few of the oldest parts of the page-table-walk code have broken indent
(either hardcoded tabs or two-spaces). Reindent these sections.
For ease of review, this patch does not touch the brace style and
so is a whitespace-only change.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/helper.c | 192 ++--
1 file changed, 96 insertions(+), 96 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 0a06bbe..3a23af8 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -4636,55 +4636,55 @@ static inline int check_ap(CPUARMState *env, ARMMMUIdx
mmu_idx,
int ap, int domain_prot,
int access_type)
{
- int prot_ro;
- bool is_user = regime_is_user(env, mmu_idx);
-
- if (domain_prot == 3) {
-return PAGE_READ | PAGE_WRITE;
- }
-
- if (access_type == 1)
- prot_ro = 0;
- else
- prot_ro = PAGE_READ;
-
- switch (ap) {
- case 0:
- if (arm_feature(env, ARM_FEATURE_V7)) {
- return 0;
- }
- if (access_type == 1)
- return 0;
- switch (regime_sctlr(env, mmu_idx) (SCTLR_S | SCTLR_R)) {
- case SCTLR_S:
- return is_user ? 0 : PAGE_READ;
- case SCTLR_R:
- return PAGE_READ;
- default:
- return 0;
- }
- case 1:
- return is_user ? 0 : PAGE_READ | PAGE_WRITE;
- case 2:
- if (is_user)
- return prot_ro;
- else
- return PAGE_READ | PAGE_WRITE;
- case 3:
- return PAGE_READ | PAGE_WRITE;
- case 4: /* Reserved. */
- return 0;
- case 5:
- return is_user ? 0 : prot_ro;
- case 6:
- return prot_ro;
- case 7:
- if (!arm_feature (env, ARM_FEATURE_V6K))
- return 0;
- return prot_ro;
- default:
- abort();
- }
+int prot_ro;
+bool is_user = regime_is_user(env, mmu_idx);
+
+if (domain_prot == 3) {
+return PAGE_READ | PAGE_WRITE;
+}
+
+if (access_type == 1)
+prot_ro = 0;
+else
+prot_ro = PAGE_READ;
+
+switch (ap) {
+case 0:
+if (arm_feature(env, ARM_FEATURE_V7)) {
+return 0;
+}
+if (access_type == 1)
+return 0;
+switch (regime_sctlr(env, mmu_idx) (SCTLR_S | SCTLR_R)) {
+case SCTLR_S:
+return is_user ? 0 : PAGE_READ;
+case SCTLR_R:
+return PAGE_READ;
+default:
+return 0;
+}
+case 1:
+return is_user ? 0 : PAGE_READ | PAGE_WRITE;
+case 2:
+if (is_user)
+return prot_ro;
+else
+return PAGE_READ | PAGE_WRITE;
+case 3:
+return PAGE_READ | PAGE_WRITE;
+case 4: /* Reserved. */
+return 0;
+case 5:
+return is_user ? 0 : prot_ro;
+case 6:
+return prot_ro;
+case 7:
+if (!arm_feature (env, ARM_FEATURE_V6K))
+return 0;
+return prot_ro;
+default:
+abort();
+}
}
static bool get_level1_table_address(CPUARMState *env, ARMMMUIdx mmu_idx,
@@ -4762,13 +4762,13 @@ static int get_phys_addr_v5(CPUARMState *env, uint32_t
address, int access_type,
*page_size = 1024 * 1024;
} else {
/* Lookup l2 entry. */
- if (type == 1) {
- /* Coarse pagetable. */
- table = (desc 0xfc00) | ((address 10) 0x3fc);
- } else {
- /* Fine pagetable. */
- table = (desc 0xf000) | ((address 8) 0xffc);
- }
+if (type == 1) {
+/* Coarse pagetable. */
+table = (desc 0xfc00) | ((address 10) 0x3fc);
+} else {
+/* Fine pagetable. */
+table = (desc 0xf000) | ((address 8) 0xffc);
+}
desc = ldl_phys(cs-as, table);
switch (desc 3) {
case 0: /* Page translation fault. */
@@ -4785,17 +4785,17 @@ static int get_phys_addr_v5(CPUARMState *env, uint32_t
address, int access_type,
*page_size = 0x1000;
break;
case 3: /* 1k page. */
- if (type == 1) {
- if (arm_feature(env, ARM_FEATURE_XSCALE)) {
- phys_addr = (desc 0xf000) | (address 0xfff);
- } else {
- /* Page translation fault. */
- code = 7;
- goto do_fault;
- }
- } else {
- phys_addr = (desc 0xfc00) | (address 0x3ff);
- }
+if (type == 1) {
+if (arm_feature(env, ARM_FEATURE_XSCALE)) {
+phys_addr = (desc 0xf000) | (address 0xfff);
+} else {
+/* Page translation fault. */
+code = 7;
+goto do_fault;
+}
+} else {
+phys_addr = (desc 0xfc00) | (address 0x3ff);
+}
ap = (desc 4) 3;
[Qemu-devel] [PATCH 01/11] cpu_ldst.h: Allow NB_MMU_MODES to be 7
Support guest CPUs which need 7 MMU index values. Add a comment about what would be required to raise the limit further (trivial for 8, TCG backend rework for 9 or more). Signed-off-by: Peter Maydell peter.mayd...@linaro.org --- include/exec/cpu_ldst.h | 28 +--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 0e825ea..fa5ea63 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -244,9 +244,31 @@ uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); #undef MEMSUFFIX #endif /* (NB_MMU_MODES = 6) */ -#if (NB_MMU_MODES 6) -#error NB_MMU_MODES 6 is not supported for now -#endif /* (NB_MMU_MODES 6) */ +#if (NB_MMU_MODES = 7) defined(MMU_MODE6_SUFFIX) + +#define CPU_MMU_INDEX 6 +#define MEMSUFFIX MMU_MODE5_SUFFIX +#define DATA_SIZE 1 +#include exec/cpu_ldst_template.h + +#define DATA_SIZE 2 +#include exec/cpu_ldst_template.h + +#define DATA_SIZE 4 +#include exec/cpu_ldst_template.h + +#define DATA_SIZE 8 +#include exec/cpu_ldst_template.h +#undef CPU_MMU_INDEX +#undef MEMSUFFIX +#endif /* (NB_MMU_MODES = 7) */ + +#if (NB_MMU_MODES 7) +/* Note that supporting NB_MMU_MODES == 9 would require + * changes to at least the ARM TCG backend. + */ +#error NB_MMU_MODES 7 is not supported for now +#endif /* (NB_MMU_MODES 7) */ /* these access are slower, they must be as rare as possible */ #define CPU_MMU_INDEX (cpu_mmu_index(env)) -- 1.9.1
[Qemu-devel] [PULL 04/12] iotests: Add tests for more corruption cases
From: Max Reitz mre...@redhat.com Signed-off-by: Max Reitz mre...@redhat.com Reviewed-by: Eric Blake ebl...@redhat.com Signed-off-by: Kevin Wolf kw...@redhat.com --- tests/qemu-iotests/060 | 15 +++ tests/qemu-iotests/060.out | 13 + 2 files changed, 28 insertions(+) diff --git a/tests/qemu-iotests/060 b/tests/qemu-iotests/060 index 73863bf..c81319c 100755 --- a/tests/qemu-iotests/060 +++ b/tests/qemu-iotests/060 @@ -186,6 +186,12 @@ $QEMU_IO -c write 0 64k $TEST_IMG | _filter_qemu_io poke_file $TEST_IMG $l1_offset \x80\x00\x00\x00\x00\x04\x2a\x00 $QEMU_IO -c read 0 64k $TEST_IMG | _filter_qemu_io +# Test how well zero cluster expansion can cope with this +_make_test_img 64M +$QEMU_IO -c write 0 64k $TEST_IMG | _filter_qemu_io +poke_file $TEST_IMG $l1_offset \x80\x00\x00\x00\x00\x04\x2a\x00 +$QEMU_IMG amend -o compat=0.10 $TEST_IMG + echo echo === Testing unaligned L2 entry === echo @@ -195,6 +201,15 @@ poke_file $TEST_IMG $l2_offset \x80\x00\x00\x00\x00\x05\x2a\x00 $QEMU_IO -c read 0 64k $TEST_IMG | _filter_qemu_io echo +echo === Testing unaligned pre-allocated zero cluster === +echo +_make_test_img 64M +$QEMU_IO -c write 0 64k $TEST_IMG | _filter_qemu_io +poke_file $TEST_IMG $l2_offset \x80\x00\x00\x00\x00\x05\x2a\x01 +# zero cluster expansion +$QEMU_IMG amend -o compat=0.10 $TEST_IMG + +echo echo === Testing unaligned reftable entry === echo _make_test_img 64M diff --git a/tests/qemu-iotests/060.out b/tests/qemu-iotests/060.out index 7d493bb..dc9f6b7 100644 --- a/tests/qemu-iotests/060.out +++ b/tests/qemu-iotests/060.out @@ -123,6 +123,11 @@ wrote 65536/65536 bytes at offset 0 64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) qcow2: Marking image as corrupt: L2 table offset 0x42a00 unaligned (L1 index: 0); further corruption events will be suppressed read failed: Input/output error +Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 +wrote 65536/65536 bytes at offset 0 +64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +qcow2: Marking image as corrupt: L2 table offset 0x42a00 unaligned (L1 index: 0); further corruption events will be suppressed +qemu-img: Error while amending options: Input/output error === Testing unaligned L2 entry === @@ -132,6 +137,14 @@ wrote 65536/65536 bytes at offset 0 qcow2: Marking image as corrupt: Data cluster offset 0x52a00 unaligned (L2 offset: 0x4, L2 index: 0); further corruption events will be suppressed read failed: Input/output error +=== Testing unaligned pre-allocated zero cluster === + +Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 +wrote 65536/65536 bytes at offset 0 +64 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +qcow2: Marking image as corrupt: Data cluster offset 0x52a00 unaligned (L2 offset: 0x4, L2 index: 0); further corruption events will be suppressed +qemu-img: Error while amending options: Input/output error + === Testing unaligned reftable entry === Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864 -- 1.8.3.1
[Qemu-devel] [PATCH v4 1/5] libqos: Change use of pointers to uint64_t in virtio
Convert use of pointers in functions of virtio to uint64_t in order to make it
platform-independent.
Add casting from pointers (in PCI functions) to uint64_t and vice versa through
uintptr_t.
Signed-off-by: Marc Marí marc.mari.barc...@gmail.com
---
tests/libqos/virtio-pci.c | 20 +++-
tests/libqos/virtio.c |8
tests/libqos/virtio.h | 16
tests/virtio-blk-test.c | 21 ++---
4 files changed, 37 insertions(+), 28 deletions(-)
diff --git a/tests/libqos/virtio-pci.c b/tests/libqos/virtio-pci.c
index 788ebaf..92bcac1 100644
--- a/tests/libqos/virtio-pci.c
+++ b/tests/libqos/virtio-pci.c
@@ -60,25 +60,25 @@ static void qvirtio_pci_assign_device(QVirtioDevice *d,
void *data)
*vpcidev = (QVirtioPCIDevice *)d;
}
-static uint8_t qvirtio_pci_config_readb(QVirtioDevice *d, void *addr)
+static uint8_t qvirtio_pci_config_readb(QVirtioDevice *d, uint64_t addr)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-return qpci_io_readb(dev-pdev, addr);
+return qpci_io_readb(dev-pdev, (void *)(uintptr_t)addr);
}
-static uint16_t qvirtio_pci_config_readw(QVirtioDevice *d, void *addr)
+static uint16_t qvirtio_pci_config_readw(QVirtioDevice *d, uint64_t addr)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-return qpci_io_readw(dev-pdev, addr);
+return qpci_io_readw(dev-pdev, (void *)(uintptr_t)addr);
}
-static uint32_t qvirtio_pci_config_readl(QVirtioDevice *d, void *addr)
+static uint32_t qvirtio_pci_config_readl(QVirtioDevice *d, uint64_t addr)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-return qpci_io_readl(dev-pdev, addr);
+return qpci_io_readl(dev-pdev, (void *)(uintptr_t)addr);
}
-static uint64_t qvirtio_pci_config_readq(QVirtioDevice *d, void *addr)
+static uint64_t qvirtio_pci_config_readq(QVirtioDevice *d, uint64_t addr)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
int i;
@@ -86,11 +86,13 @@ static uint64_t qvirtio_pci_config_readq(QVirtioDevice *d,
void *addr)
if (qtest_big_endian()) {
for (i = 0; i 8; ++i) {
-u64 |= (uint64_t)qpci_io_readb(dev-pdev, addr + i) (7 - i) * 8;
+u64 |= (uint64_t)qpci_io_readb(dev-pdev,
+(void *)(uintptr_t)addr + i) (7 - i) * 8;
}
} else {
for (i = 0; i 8; ++i) {
-u64 |= (uint64_t)qpci_io_readb(dev-pdev, addr + i) i * 8;
+u64 |= (uint64_t)qpci_io_readb(dev-pdev,
+(void *)(uintptr_t)addr + i) i * 8;
}
}
diff --git a/tests/libqos/virtio.c b/tests/libqos/virtio.c
index a061289..3205b88 100644
--- a/tests/libqos/virtio.c
+++ b/tests/libqos/virtio.c
@@ -12,25 +12,25 @@
#include libqos/virtio.h
uint8_t qvirtio_config_readb(const QVirtioBus *bus, QVirtioDevice *d,
-void *addr)
+uint64_t addr)
{
return bus-config_readb(d, addr);
}
uint16_t qvirtio_config_readw(const QVirtioBus *bus, QVirtioDevice *d,
-void *addr)
+uint64_t addr)
{
return bus-config_readw(d, addr);
}
uint32_t qvirtio_config_readl(const QVirtioBus *bus, QVirtioDevice *d,
-void *addr)
+uint64_t addr)
{
return bus-config_readl(d, addr);
}
uint64_t qvirtio_config_readq(const QVirtioBus *bus, QVirtioDevice *d,
-void *addr)
+uint64_t addr)
{
return bus-config_readq(d, addr);
}
diff --git a/tests/libqos/virtio.h b/tests/libqos/virtio.h
index 29fbacb..2449fee 100644
--- a/tests/libqos/virtio.h
+++ b/tests/libqos/virtio.h
@@ -93,10 +93,10 @@ typedef struct QVRingIndirectDesc {
} QVRingIndirectDesc;
typedef struct QVirtioBus {
-uint8_t (*config_readb)(QVirtioDevice *d, void *addr);
-uint16_t (*config_readw)(QVirtioDevice *d, void *addr);
-uint32_t (*config_readl)(QVirtioDevice *d, void *addr);
-uint64_t (*config_readq)(QVirtioDevice *d, void *addr);
+uint8_t (*config_readb)(QVirtioDevice *d, uint64_t addr);
+uint16_t (*config_readw)(QVirtioDevice *d, uint64_t addr);
+uint32_t (*config_readl)(QVirtioDevice *d, uint64_t addr);
+uint64_t (*config_readq)(QVirtioDevice *d, uint64_t addr);
/* Get features of the device */
uint32_t (*get_features)(QVirtioDevice *d);
@@ -144,13 +144,13 @@ static inline uint32_t qvring_size(uint32_t num, uint32_t
align)
}
uint8_t qvirtio_config_readb(const QVirtioBus *bus, QVirtioDevice *d,
-void *addr);
+
[Qemu-devel] [PATCH 06/11] target-arm: Don't define any MMU_MODE*_SUFFIXes
target-arm doesn't use any of the MMU-mode specific cpu ldst
accessor functions. Suppress their generation by not defining
any of the MMU_MODE*_SUFFIX macros. (user and kernel are
too simplistic as descriptions of indexes 0 and 1 anyway.)
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/cpu.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index cf7b9ab..d18df8f 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1638,8 +1638,6 @@ typedef enum ARMMMUIdx {
ARMMMUIdx_S1NSE1 = 8,
} ARMMMUIdx;
-#define MMU_MODE0_SUFFIX _user
-#define MMU_MODE1_SUFFIX _kernel
#define MMU_USER_IDX 0
/* Return the exception level we're running at if this is our mmu_idx */
--
1.9.1
[Qemu-devel] [PULL 09/12] block: mirror - change string allocation to 2-bytes
From: Jeff Cody jc...@redhat.com The backing_filename string in mirror_run() is only used to check for a NULL string, so we don't need to allocate 1024 bytes (or, later, PATH_MAX bytes), when we only need to copy the first 2 characters. We technically only need 1 byte, as we are just checking for NULL, but since backing_filename[] is populated by bdrv_get_backing_filename(), a string size of 1 will always only return '\0'; Reviewed-by: Stefan Hajnoczi stefa...@redhat.com Reviewed-by: John Snow js...@redhat.com Signed-off-by: Jeff Cody jc...@redhat.com Signed-off-by: Kevin Wolf kw...@redhat.com --- block/mirror.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/block/mirror.c b/block/mirror.c index 9019d1b..4056164 100644 --- a/block/mirror.c +++ b/block/mirror.c @@ -378,7 +378,8 @@ static void coroutine_fn mirror_run(void *opaque) int64_t sector_num, end, sectors_per_chunk, length; uint64_t last_pause_ns; BlockDriverInfo bdi; -char backing_filename[1024]; +char backing_filename[2]; /* we only need 2 characters because we are only + checking for a NULL string */ int ret = 0; int n; -- 1.8.3.1
[Qemu-devel] [PATCH 05/11] target-arm: Use correct mmu_idx for unprivileged loads and stores
The MMU index to use for unprivileged loads and stores is more
complicated than we currently implement:
* for A64, it should be if at EL1, access as if EL0; otherwise
access at current EL
* for A32/T32, it should be if EL2, UNPREDICTABLE; otherwise
access as if at EL0.
In both cases, if we want to make the access for Secure EL0
this is not the same mmu_idx as for Non-Secure EL0.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/translate-a64.c | 19 ++-
target-arm/translate.c | 26 --
2 files changed, 42 insertions(+), 3 deletions(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 96f14ff..acf4b16 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -123,6 +123,23 @@ void a64_translate_init(void)
#endif
}
+static inline ARMMMUIdx get_a64_user_mem_index(DisasContext *s)
+{
+/* Return the mmu_idx to use for A64 unprivileged load/store insns:
+ * if EL1, access as if EL0; otherwise access at current EL
+ */
+switch (s-mmu_idx) {
+case ARMMMUIdx_S12NSE1:
+return ARMMMUIdx_S12NSE0;
+case ARMMMUIdx_S1SE1:
+return ARMMMUIdx_S1SE0;
+case ARMMMUIdx_S2NS:
+g_assert_not_reached();
+default:
+return s-mmu_idx;
+}
+}
+
void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
fprintf_function cpu_fprintf, int flags)
{
@@ -2107,7 +2124,7 @@ static void disas_ldst_reg_imm9(DisasContext *s, uint32_t
insn)
}
} else {
TCGv_i64 tcg_rt = cpu_reg(s, rt);
-int memidx = is_unpriv ? MMU_USER_IDX : get_mem_index(s);
+int memidx = is_unpriv ? get_a64_user_mem_index(s) : get_mem_index(s);
if (is_store) {
do_gpr_st_memidx(s, tcg_rt, tcg_addr, size, memidx);
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 7163649..715f65d 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -113,6 +113,28 @@ void arm_translate_init(void)
a64_translate_init();
}
+static inline ARMMMUIdx get_a32_user_mem_index(DisasContext *s)
+{
+/* Return the mmu_idx to use for A32/T32 unprivileged load/store
+ * insns:
+ * if PL2, UNPREDICTABLE (we choose to implement as if PL0)
+ * otherwise, access as if at PL0.
+ */
+switch (s-mmu_idx) {
+case ARMMMUIdx_S1E2:/* this one is UNPREDICTABLE */
+case ARMMMUIdx_S12NSE0:
+case ARMMMUIdx_S12NSE1:
+return ARMMMUIdx_S12NSE0;
+case ARMMMUIdx_S1E3:
+case ARMMMUIdx_S1SE0:
+case ARMMMUIdx_S1SE1:
+return ARMMMUIdx_S1SE0;
+case ARMMMUIdx_S2NS:
+default:
+g_assert_not_reached();
+}
+}
+
static inline TCGv_i32 load_cpu_offset(int offset)
{
TCGv_i32 tmp = tcg_temp_new_i32();
@@ -8793,7 +8815,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int
insn)
tmp2 = load_reg(s, rn);
if ((insn 0x0120) == 0x0020) {
/* ldrt/strt */
-i = MMU_USER_IDX;
+i = get_a32_user_mem_index(s);
} else {
i = get_mem_index(s);
}
@@ -10173,7 +10195,7 @@ static int disas_thumb2_insn(CPUARMState *env,
DisasContext *s, uint16_t insn_hw
break;
case 0xe: /* User privilege. */
tcg_gen_addi_i32(addr, addr, imm);
-memidx = MMU_USER_IDX;
+memidx = get_a32_user_mem_index(s);
break;
case 0x9: /* Post-decrement. */
imm = -imm;
--
1.9.1
[Qemu-devel] [PATCH 02/11] target-arm: Make arm_current_el() return sensible values for M profile
Although M profile doesn't have the same concept of exception level
as A profile, it does have a notion of privileged versus not, which
we currently track in the privmode TB flag. Support returning this
information if arm_current_el() is called on an M profile core, so
that we can identify the correct MMU index to use (and put the MMU
index in the TB flags) without having to special-case M profile.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/cpu.h | 4
1 file changed, 4 insertions(+)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index cd7a9e8..3eb00f4 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1211,6 +1211,10 @@ static inline bool cptype_valid(int cptype)
*/
static inline int arm_current_el(CPUARMState *env)
{
+if (arm_feature(env, ARM_FEATURE_M)) {
+return !((env-v7m.exception == 0) (env-v7m.control 1));
+}
+
if (is_a64(env)) {
return extract32(env-pstate, 2, 2);
}
--
1.9.1
[Qemu-devel] [PATCH v4 4/5] libqos: Add malloc generic
This malloc is a basic interface implementation that works for any platform.
It should be replaced in the future for a real malloc implementation for each
of the platforms.
Signed-off-by: Marc Marí marc.mari.barc...@gmail.com
---
tests/libqos/malloc-generic.c | 50 +
tests/libqos/malloc-generic.h | 21 +
2 files changed, 71 insertions(+)
create mode 100644 tests/libqos/malloc-generic.c
create mode 100644 tests/libqos/malloc-generic.h
diff --git a/tests/libqos/malloc-generic.c b/tests/libqos/malloc-generic.c
new file mode 100644
index 000..a0878c5
--- /dev/null
+++ b/tests/libqos/malloc-generic.c
@@ -0,0 +1,50 @@
+/*
+ * Basic libqos generic malloc support
+ *
+ * Copyright (c) 2014 Marc Marí
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include glib.h
+#include libqos/malloc-generic.h
+#include libqos/malloc.h
+
+/*
+ * Mostly for valgrind happiness, but it does offer
+ * a chokepoint for debugging guest memory leaks, too.
+ */
+void generic_alloc_uninit(QGuestAllocator *allocator)
+{
+alloc_uninit(allocator);
+}
+
+QGuestAllocator *generic_alloc_init_flags(uint64_t base_addr, uint64_t size,
+uint32_t page_size, QAllocOpts flags)
+{
+QGuestAllocator *s = g_malloc0(sizeof(*s));
+MemBlock *node;
+
+s-opts = flags;
+s-page_size = page_size;
+
+/* Start at 1MB */
+s-start = base_addr + (1 20);
+
+s-end = s-start + size;
+
+QTAILQ_INIT(s-used);
+QTAILQ_INIT(s-free);
+
+node = mlist_new(s-start, s-end - s-start);
+QTAILQ_INSERT_HEAD(s-free, node, MLIST_ENTNAME);
+
+return s;
+}
+
+inline QGuestAllocator *generic_alloc_init(uint64_t base_addr, uint64_t size,
+uint32_t page_size)
+{
+return generic_alloc_init_flags(base_addr, size, page_size,
ALLOC_NO_FLAGS);
+}
diff --git a/tests/libqos/malloc-generic.h b/tests/libqos/malloc-generic.h
new file mode 100644
index 000..90104ec
--- /dev/null
+++ b/tests/libqos/malloc-generic.h
@@ -0,0 +1,21 @@
+/*
+ * Basic libqos generic malloc support
+ *
+ * Copyright (c) 2014 Marc Marí
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#ifndef LIBQOS_MALLOC_GENERIC_H
+#define LIBQOS_MALLOC_GENERIC_H
+
+#include libqos/malloc.h
+
+QGuestAllocator *generic_alloc_init(uint64_t base_addr, uint64_t size,
+uint32_t
page_size);
+QGuestAllocator *generic_alloc_init_flags(uint64_t base_addr, uint64_t size,
+uint32_t page_size, QAllocOpts flags);
+void generic_alloc_uninit(QGuestAllocator *allocator);
+
+#endif
--
1.7.10.4
[Qemu-devel] [PATCH v4 5/5] libqos: Add virtio MMIO support
Add virtio MMIO support.
Add virtio-blk-test MMIO test case.
Signed-off-by: Marc Marí marc.mari.barc...@gmail.com
---
tests/Makefile |4 +-
tests/libqos/virtio-mmio.c | 198
tests/libqos/virtio-mmio.h | 46 ++
tests/virtio-blk-test.c| 83 +--
4 files changed, 323 insertions(+), 8 deletions(-)
create mode 100644 tests/libqos/virtio-mmio.c
create mode 100644 tests/libqos/virtio-mmio.h
diff --git a/tests/Makefile b/tests/Makefile
index c2e2e52..77f995d 100644
--- a/tests/Makefile
+++ b/tests/Makefile
@@ -185,6 +185,8 @@ gcov-files-sparc-y += hw/timer/m48t59.c
gcov-files-sparc64-y += hw/timer/m48t59.c
check-qtest-arm-y = tests/tmp105-test$(EXESUF)
gcov-files-arm-y += hw/misc/tmp105.c
+check-qtest-arm-y += tests/virtio-blk-test$(EXESUF)
+gcov-files-arm-y += arm-softmmu/hw/block/virtio-blk.c
check-qtest-ppc-y += tests/boot-order-test$(EXESUF)
check-qtest-ppc64-y += tests/boot-order-test$(EXESUF)
check-qtest-ppc64-y += tests/spapr-phb-test$(EXESUF)
@@ -303,8 +305,8 @@ libqos-obj-y += tests/libqos/i2c.o
libqos-pc-obj-y = $(libqos-obj-y) tests/libqos/pci-pc.o
libqos-pc-obj-y += tests/libqos/malloc-pc.o
libqos-omap-obj-y = $(libqos-obj-y) tests/libqos/i2c-omap.o
-libqos-virtio-obj-y = $(libqos-obj-y) $(libqos-pc-obj-y) tests/libqos/virtio.o
tests/libqos/virtio-pci.o
libqos-usb-obj-y = $(libqos-pc-obj-y) tests/libqos/usb.o
+libqos-virtio-obj-y = $(libqos-pc-obj-y) tests/libqos/virtio.o
tests/libqos/virtio-pci.o tests/libqos/virtio-mmio.o
tests/libqos/malloc-generic.o
tests/rtc-test$(EXESUF): tests/rtc-test.o
tests/m48t59-test$(EXESUF): tests/m48t59-test.o
diff --git a/tests/libqos/virtio-mmio.c b/tests/libqos/virtio-mmio.c
new file mode 100644
index 000..b3e62e7
--- /dev/null
+++ b/tests/libqos/virtio-mmio.c
@@ -0,0 +1,198 @@
+/*
+ * libqos virtio MMIO driver
+ *
+ * Copyright (c) 2014 Marc Marí
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ */
+
+#include glib.h
+#include stdio.h
+#include libqtest.h
+#include libqos/virtio.h
+#include libqos/virtio-mmio.h
+#include libqos/malloc.h
+#include libqos/malloc-generic.h
+
+static uint8_t qvirtio_mmio_config_readb(QVirtioDevice *d, uint64_t addr)
+{
+QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;
+return readb(dev-addr + addr);
+}
+
+static uint16_t qvirtio_mmio_config_readw(QVirtioDevice *d, uint64_t addr)
+{
+QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;
+return readw(dev-addr + addr);
+}
+
+static uint32_t qvirtio_mmio_config_readl(QVirtioDevice *d, uint64_t addr)
+{
+QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;
+return readl(dev-addr + addr);
+}
+
+static uint64_t qvirtio_mmio_config_readq(QVirtioDevice *d, uint64_t addr)
+{
+QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;
+return readq(dev-addr + addr);
+}
+
+static uint32_t qvirtio_mmio_get_features(QVirtioDevice *d)
+{
+QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;
+writel(dev-addr + QVIRTIO_MMIO_HOST_FEATURES_SEL, 0);
+return readl(dev-addr + QVIRTIO_MMIO_HOST_FEATURES);
+}
+
+static void qvirtio_mmio_set_features(QVirtioDevice *d, uint32_t features)
+{
+QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;
+dev-features = features;
+writel(dev-addr + QVIRTIO_MMIO_GUEST_FEATURES_SEL, 0);
+writel(dev-addr + QVIRTIO_MMIO_GUEST_FEATURES, features);
+}
+
+static uint32_t qvirtio_mmio_get_guest_features(QVirtioDevice *d)
+{
+QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;
+return dev-features;
+}
+
+static uint8_t qvirtio_mmio_get_status(QVirtioDevice *d)
+{
+QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;
+return (uint8_t)readl(dev-addr + QVIRTIO_MMIO_DEVICE_STATUS);
+}
+
+static void qvirtio_mmio_set_status(QVirtioDevice *d, uint8_t status)
+{
+QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;
+writel(dev-addr + QVIRTIO_MMIO_DEVICE_STATUS, (uint32_t)status);
+}
+
+static bool qvirtio_mmio_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq)
+{
+QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;
+uint32_t isr;
+
+isr = readl(dev-addr + QVIRTIO_MMIO_INTERRUPT_STATUS) 1;
+if (isr != 0) {
+writel(dev-addr + QVIRTIO_MMIO_INTERRUPT_ACK, 1);
+return true;
+}
+
+return false;
+}
+
+static bool qvirtio_mmio_get_config_isr_status(QVirtioDevice *d)
+{
+QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;
+uint32_t isr;
+
+isr = readl(dev-addr + QVIRTIO_MMIO_INTERRUPT_STATUS) 2;
+if (isr != 0) {
+writel(dev-addr + QVIRTIO_MMIO_INTERRUPT_ACK, 2);
+return true;
+}
+
+return false;
+}
+
+static void qvirtio_mmio_queue_select(QVirtioDevice *d, uint16_t index)
+{
+QVirtioMMIODevice *dev = (QVirtioMMIODevice *)d;
+writel(dev-addr + QVIRTIO_MMIO_QUEUE_SEL, (uint32_t)index);
+
+g_assert_cmphex(readl(dev-addr + QVIRTIO_MMIO_QUEUE_PFN), ==, 0);
+}
+
[Qemu-devel] Submit your Google Summer of Code project ideas and volunteer to mentor
Dear libvirt, KVM, and QEMU contributors, The Google Summer of Code season begins soon and it's time to collect our thoughts for mentoring students this summer working full-time on libvirt, KVM, and QEMU. What is GSoC? Google Summer of Code 2015 (GSoC) funds students to work on open source projects for 12 weeks over the summer. Open source organizations apply to participate and those accepted receive funding for one or more students. We now need to collect a list of project ideas on our wiki. We also need mentors to volunteer. http://qemu-project.org/Google_Summer_of_Code_2015 Project ideas Please post project ideas on the wiki page below. Project ideas should be suitable as a 12-week project that a student fluent in C/Python/etc can complete. No prior knowledge of QEMU/KVM/libvirt internals can be assumed. http://qemu-project.org/Google_Summer_of_Code_2015 Mentors Please add your name to project ideas you are willing to mentor. In order to mentor you must be an established contributor (regularly contribute patches). You must be willing to spend about 5 hours per week from May 25 to August 21. I have CCed the 8 most active committers since QEMU 2.1.0 as well as the previous libvirt and KVM mentors but everyone is invited. Official timeline: https://www.google-melange.com/gsoc/events/google/gsoc20145 Stefan
[Qemu-devel] [PULL 01/12] virtio-blk: Pass req to virtio_blk_handle_scsi_req
From: Fam Zheng f...@redhat.com
In preparation for calling blk_aio_ioctl. Also make the function static
as no other files need it.
Signed-off-by: Fam Zheng f...@redhat.com
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Kevin Wolf kw...@redhat.com
---
hw/block/virtio-blk.c | 9 +
include/hw/virtio/virtio-blk.h | 3 ---
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c
index b19b102..60cb1d8 100644
--- a/hw/block/virtio-blk.c
+++ b/hw/block/virtio-blk.c
@@ -127,12 +127,13 @@ static VirtIOBlockReq *virtio_blk_get_request(VirtIOBlock
*s)
return req;
}
-int virtio_blk_handle_scsi_req(VirtIOBlock *blk,
- VirtQueueElement *elem)
+static int virtio_blk_handle_scsi_req(VirtIOBlockReq *req)
{
int status = VIRTIO_BLK_S_OK;
struct virtio_scsi_inhdr *scsi = NULL;
-VirtIODevice *vdev = VIRTIO_DEVICE(blk);
+VirtIODevice *vdev = VIRTIO_DEVICE(req-dev);
+VirtQueueElement *elem = req-elem;
+VirtIOBlock *blk = req-dev;
#ifdef __linux__
int i;
@@ -252,7 +253,7 @@ static void virtio_blk_handle_scsi(VirtIOBlockReq *req)
{
int status;
-status = virtio_blk_handle_scsi_req(req-dev, req-elem);
+status = virtio_blk_handle_scsi_req(req);
virtio_blk_req_complete(req, status);
virtio_blk_free_request(req);
}
diff --git a/include/hw/virtio/virtio-blk.h b/include/hw/virtio/virtio-blk.h
index 3979dc4..4652b70 100644
--- a/include/hw/virtio/virtio-blk.h
+++ b/include/hw/virtio/virtio-blk.h
@@ -153,9 +153,6 @@ VirtIOBlockReq *virtio_blk_alloc_request(VirtIOBlock *s);
void virtio_blk_free_request(VirtIOBlockReq *req);
-int virtio_blk_handle_scsi_req(VirtIOBlock *blk,
- VirtQueueElement *elem);
-
void virtio_blk_handle_request(VirtIOBlockReq *req, MultiReqBuffer *mrb);
void virtio_submit_multiwrite(BlockBackend *blk, MultiReqBuffer *mrb);
--
1.8.3.1
[Qemu-devel] [PULL 00/12] Block patches
The following changes since commit c6441452b50c44fdbb362b239ce623f77cf3cd51: Merge remote-tracking branch 'remotes/kraxel/tags/pull-audio-20150122-1' into staging (2015-01-22 18:57:36 +) are available in the git repository at: git://repo.or.cz/qemu/kevin.git tags/for-upstream for you to fetch changes up to bc63781ca350cad4c9eb142ce8f55bfaded4276e: Merge remote-tracking branch 'mreitz/block' into queue-block (2015-01-23 18:51:47 +0100) Block patches for 2.3 Fam Zheng (2): virtio-blk: Pass req to virtio_blk_handle_scsi_req virtio-blk: Use blk_aio_ioctl Jeff Cody (7): block: vmdk - make ret variable usage clear block: vmdk - move string allocations from stack to the heap block: qapi - move string allocation from stack to the heap block: remove unused variable in bdrv_commit block: mirror - change string allocation to 2-bytes block: update string sizes for filename,backing_file,exact_filename block: vhdx - force FileOffsetMB field to '0' for certain block states Kevin Wolf (1): Merge remote-tracking branch 'mreitz/block' into queue-block Max Reitz (3): qcow2: Add two more unalignment checks iotests: Add tests for more corruption cases iotests: Lower 064's memory usage block.c| 3 - block/mirror.c | 3 +- block/qapi.c | 7 ++- block/qcow.c | 2 +- block/qcow2-cluster.c | 21 +++ block/qcow2.c | 3 +- block/vhdx.c | 13 +++- block/vmdk.c | 51 +--- block/vvfat.c | 4 +- hw/block/virtio-blk.c | 134 ++--- include/block/block_int.h | 8 +-- include/hw/virtio/virtio-blk.h | 3 - qemu-img.c | 4 +- tests/qemu-iotests/060 | 15 + tests/qemu-iotests/060.out | 13 tests/qemu-iotests/064 | 19 +- tests/qemu-iotests/064.out | 34 +-- 17 files changed, 239 insertions(+), 98 deletions(-)
[Qemu-devel] [PULL 06/12] block: vmdk - move string allocations from stack to the heap
From: Jeff Cody jc...@redhat.com
Functions 'vmdk_parse_extents' and 'vmdk_create' allocate several
PATH_MAX sized arrays on the stack. Make these dynamically allocated.
Signed-off-by: Jeff Cody jc...@redhat.com
Signed-off-by: Kevin Wolf kw...@redhat.com
---
block/vmdk.c | 39 +++
1 file changed, 23 insertions(+), 16 deletions(-)
diff --git a/block/vmdk.c b/block/vmdk.c
index dc6459c..7d079ad 100644
--- a/block/vmdk.c
+++ b/block/vmdk.c
@@ -792,12 +792,11 @@ static int vmdk_parse_extents(const char *desc,
BlockDriverState *bs,
const char *p = desc;
int64_t sectors = 0;
int64_t flat_offset;
-char extent_path[PATH_MAX];
+char *extent_path;
BlockDriverState *extent_file;
BDRVVmdkState *s = bs-opaque;
VmdkExtent *extent;
-
while (*p) {
/* parse extent line in one of below formats:
*
@@ -843,11 +842,13 @@ static int vmdk_parse_extents(const char *desc,
BlockDriverState *bs,
return -EINVAL;
}
+extent_path = g_malloc0(PATH_MAX);
path_combine(extent_path, sizeof(extent_path),
desc_file_path, fname);
extent_file = NULL;
ret = bdrv_open(extent_file, extent_path, NULL, NULL,
bs-open_flags | BDRV_O_PROTOCOL, NULL, errp);
+g_free(extent_path);
if (ret) {
return ret;
}
@@ -1797,10 +1798,15 @@ static int vmdk_create(const char *filename, QemuOpts
*opts, Error **errp)
int ret = 0;
bool flat, split, compress;
GString *ext_desc_lines;
-char path[PATH_MAX], prefix[PATH_MAX], postfix[PATH_MAX];
+char *path = g_malloc0(PATH_MAX);
+char *prefix = g_malloc0(PATH_MAX);
+char *postfix = g_malloc0(PATH_MAX);
+char *desc_line = g_malloc0(BUF_SIZE);
+char *ext_filename = g_malloc0(PATH_MAX);
+char *desc_filename = g_malloc0(PATH_MAX);
const int64_t split_size = 0x8000; /* VMDK has constant split size */
const char *desc_extent_line;
-char parent_desc_line[BUF_SIZE] = ;
+char *parent_desc_line = g_malloc0(BUF_SIZE);
uint32_t parent_cid = 0x;
uint32_t number_heads = 16;
bool zeroed_grain = false;
@@ -1916,33 +1922,27 @@ static int vmdk_create(const char *filename, QemuOpts
*opts, Error **errp)
}
parent_cid = vmdk_read_cid(bs, 0);
bdrv_unref(bs);
-snprintf(parent_desc_line, sizeof(parent_desc_line),
+snprintf(parent_desc_line, BUF_SIZE,
parentFileNameHint=\%s\, backing_file);
}
/* Create extents */
filesize = total_size;
while (filesize 0) {
-char desc_line[BUF_SIZE];
-char ext_filename[PATH_MAX];
-char desc_filename[PATH_MAX];
int64_t size = filesize;
if (split size split_size) {
size = split_size;
}
if (split) {
-snprintf(desc_filename, sizeof(desc_filename), %s-%c%03d%s,
+snprintf(desc_filename, PATH_MAX, %s-%c%03d%s,
prefix, flat ? 'f' : 's', ++idx, postfix);
} else if (flat) {
-snprintf(desc_filename, sizeof(desc_filename), %s-flat%s,
-prefix, postfix);
+snprintf(desc_filename, PATH_MAX, %s-flat%s, prefix, postfix);
} else {
-snprintf(desc_filename, sizeof(desc_filename), %s%s,
-prefix, postfix);
+snprintf(desc_filename, PATH_MAX, %s%s, prefix, postfix);
}
-snprintf(ext_filename, sizeof(ext_filename), %s%s,
-path, desc_filename);
+snprintf(ext_filename, PATH_MAX, %s%s, path, desc_filename);
if (vmdk_create_extent(ext_filename, size,
flat, compress, zeroed_grain, opts, errp)) {
@@ -1952,7 +1952,7 @@ static int vmdk_create(const char *filename, QemuOpts
*opts, Error **errp)
filesize -= size;
/* Format description line */
-snprintf(desc_line, sizeof(desc_line),
+snprintf(desc_line, BUF_SIZE,
desc_extent_line, size / BDRV_SECTOR_SIZE, desc_filename);
g_string_append(ext_desc_lines, desc_line);
}
@@ -2007,6 +2007,13 @@ exit:
g_free(backing_file);
g_free(fmt);
g_free(desc);
+g_free(path);
+g_free(prefix);
+g_free(postfix);
+g_free(desc_line);
+g_free(ext_filename);
+g_free(desc_filename);
+g_free(parent_desc_line);
g_string_free(ext_desc_lines, true);
return ret;
}
--
1.8.3.1
[Qemu-devel] [PATCH 00/11] target-arm: handle mmu_idx/translation regimes properly
This patchseries fixes up our somewhat broken handling of mmu_idx values: * implement the full set of 7 mmu_idxes we need for supporting EL2 and EL3 * pass the mmu_idx in the TB flags rather than EL or a priv flag, so we can generate code with the correct kind of access * identify the correct mmu_idx to use for AT/ATS system insns * pass mmu_idx into get_phys_addr() and use it within that family of functions as an indication of which translation regime to do a v-to-p lookup for, instead of relying on an is_user flag plus the current CPU state * some minor indent stuff on the end It does not contain: * complete support for EL2 or 64-bit EL3; in some places I have added the code where it was obvious and easy; in others I have just left TODO marker comments * the 'tlb_flush_for_mmuidx' functionality I proposed in a previous mail; I preferred to get the semantics right in this patchset first before improving the efficiency later Peter Maydell (11): cpu_ldst.h: Allow NB_MMU_MODES to be 7 target-arm: Make arm_current_el() return sensible values for M profile target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT target-arm: Define correct mmu_idx values and pass them in TB flags target-arm: Use correct mmu_idx for unprivileged loads and stores target-arm: Don't define any MMU_MODE*_SUFFIXes target-arm: Split AArch64 cases out of ats_write() target-arm: Pass mmu_idx to get_phys_addr() target-arm: Use mmu_idx in get_phys_addr() target-arm: Reindent ancient page-table-walk code target-arm: Fix brace style in reindented code include/exec/cpu_ldst.h| 28 ++- target-arm/cpu.h | 119 -- target-arm/helper.c| 534 +++-- target-arm/translate-a64.c | 24 +- target-arm/translate.c | 31 ++- target-arm/translate.h | 3 +- 6 files changed, 544 insertions(+), 195 deletions(-) -- 1.9.1
[Qemu-devel] [PULL 11/12] block: vhdx - force FileOffsetMB field to '0' for certain block states
From: Jeff Cody jc...@redhat.com
The v1.0.0 spec calls out PAYLOAD_BLOCK_ZERO FileOffsetMB field as being
'reserved'. In practice, this means that Hyper-V will fail to read a
disk image with PAYLOAD_BLOCK_ZERO block states with a FileOffsetMB
value other than 0.
The other states that indicate a block that is not there
(PAYLOAD_BLOCK_UNDEFINED, PAYLOAD_BLOCK_NOT_PRESENT,
PAYLOAD_BLOCK_UNMAPPED) have multiple options for what FileOffsetMB may
be set to, and '0' is explicitly called out as an option.
For all the above states, we will also just set the FileOffsetMB value
to 0.
Signed-off-by: Jeff Cody jc...@redhat.com
Reviewed-by: Max Reitz mre...@redhat.com
Message-id:
a9fe92f53f07e6ab1693811e4312c0d1e958500b.1421787566.git.jc...@redhat.com
Signed-off-by: Max Reitz mre...@redhat.com
---
block/vhdx.c | 13 -
1 file changed, 12 insertions(+), 1 deletion(-)
diff --git a/block/vhdx.c b/block/vhdx.c
index 06f2b1a..bb3ed45 100644
--- a/block/vhdx.c
+++ b/block/vhdx.c
@@ -1174,7 +1174,18 @@ static void vhdx_update_bat_table_entry(BlockDriverState
*bs, BDRVVHDXState *s,
{
/* The BAT entry is a uint64, with 44 bits for the file offset in units of
* 1MB, and 3 bits for the block state. */
-s-bat[sinfo-bat_idx] = sinfo-file_offset;
+if ((state == PAYLOAD_BLOCK_ZERO)||
+(state == PAYLOAD_BLOCK_UNDEFINED) ||
+(state == PAYLOAD_BLOCK_NOT_PRESENT) ||
+(state == PAYLOAD_BLOCK_UNMAPPED)) {
+s-bat[sinfo-bat_idx] = 0; /* For PAYLOAD_BLOCK_ZERO, the
+ FileOffsetMB field is denoted as
+ 'reserved' in the v1.0 spec. If it is
+ non-zero, MS Hyper-V will fail to read
+ the disk image */
+} else {
+s-bat[sinfo-bat_idx] = sinfo-file_offset;
+}
s-bat[sinfo-bat_idx] |= state VHDX_BAT_STATE_BIT_MASK;
--
1.8.3.1
Re: [Qemu-devel] [PATCH v9 0/7] Netduino 2 Machine Model
On 7 January 2015 at 21:21, Alistair Francis alistai...@gmail.com wrote: This patch series adds the Netduino 2 Machine to QEMU Information on the board is avalible at: http://www.netduino.com/netduino2/specs.htm The git tree can be found at: https://github.com/alistair23/qemu/tree/netduino2.9 This patch series makes some changes to the armv7m_init function that allows the code to be reused with the Netduino 2 and the Stellaris machines. Some example code that runs on QEMU is avaliable at: at: https://github.com/alistair23/CSSE3010-QEMU-Examples There are more devices in the works, I figured I would just start with these three Just a note that I'm again assuming Peter C will be reviewing the remaining patches in this series. Peter: let me know if you won't have time for that and I should put them on my todo list... thanks -- PMM
[Qemu-devel] [PATCH v4 0/5] libqos: Virtio MMIO driver
Add virtio-mmio support to libqos and test case for virtio-blk. Changes for version 3: - Fix leaks and minor bugs - Extract basic test case to a function Changes for version 4: - Add format=raw to images, to avoid warnings - Solve bug with timeout in interrupt checking in virtio MMIO due to a race condition Marc Marí (5): libqos: Change use of pointers to uint64_t in virtio tests: Prepare virtio-blk-test for multi-arch implementation libqos: Remove PCI assumptions in constants of virtio driver libqos: Add malloc generic libqos: Add virtio MMIO support tests/Makefile|4 +- tests/libqos/malloc-generic.c | 50 tests/libqos/malloc-generic.h | 21 tests/libqos/virtio-mmio.c| 198 +++ tests/libqos/virtio-mmio.h| 46 tests/libqos/virtio-pci.c | 50 tests/libqos/virtio-pci.h | 24 ++-- tests/libqos/virtio.c |8 +- tests/libqos/virtio.h | 16 +-- tests/virtio-blk-test.c | 259 - 10 files changed, 548 insertions(+), 128 deletions(-) create mode 100644 tests/libqos/malloc-generic.c create mode 100644 tests/libqos/malloc-generic.h create mode 100644 tests/libqos/virtio-mmio.c create mode 100644 tests/libqos/virtio-mmio.h -- 1.7.10.4
Re: [Qemu-devel] Nested KVM L2 guest hangs
Ariel, You can easily use a supported 3.16 kernel on Ubuntu 14.04: sudo apt-get install --install-recommends linux-generic-lts-utopic If you have further problems with 3.16 or 3.13 on the distro kernel please feel free to file a bug: https://bugs.launchpad.net/ubuntu/+filebug Hope that helps. Thanks! --chris j arges
Re: [Qemu-devel] [PATCH v2 01/47] acpi: introduce AML composer aml_append()
On Fri, 23 Jan 2015 15:55:11 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Fri, Jan 23, 2015 at 02:40:30PM +0100, Igor Mammedov wrote:
On Fri, 23 Jan 2015 15:24:24 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Fri, Jan 23, 2015 at 11:35:29AM +0100, Igor Mammedov wrote:
On Fri, 23 Jan 2015 10:11:19 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Thu, Jan 22, 2015 at 02:49:45PM +, Igor Mammedov wrote:
Adds for dynamic AML creation, which will be used
for piecing ASL/AML primitives together and hiding
from user/caller details about how nested context
should be closed/packed leaving less space for
mistakes and necessity to know how AML should be
encoded, allowing user to concentrate on ASL
representation instead.
For example it will allow to create AML like this:
AcpiAml scope = acpi_scope(PCI0)
AcpiAml dev = acpi_device(PM)
aml_append(dev, acpi_name_decl(_ADR, acpi_int(addr)))
aml_append(scope, dev);
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/acpi/acpi-build-utils.c | 39
++
include/hw/acpi/acpi-build-utils.h | 16
2 files changed, 55 insertions(+)
diff --git a/hw/acpi/acpi-build-utils.c b/hw/acpi/acpi-build-utils.c
index 602e68c..547ecaa 100644
--- a/hw/acpi/acpi-build-utils.c
+++ b/hw/acpi/acpi-build-utils.c
@@ -267,3 +267,42 @@ void build_append_int(GArray *table, uint32_t
value)
build_append_value(table, value, 4);
}
}
+
+static void build_prepend_int(GArray *array, uint32_t value)
+{
+GArray *data = build_alloc_array();
+
+build_append_int(data, value);
+g_array_prepend_vals(array, data-data, data-len);
+build_free_array(data);
+}
I don't think prepend is generally justified:
it makes code hard to follow and debug.
Adding length is different: of course you need
to first have the package before you can add length.
We currently have build_prepend_package_length - just move it
to utils, and use everywhere.
[...]
+case BUFFER:
+build_prepend_int(child.buf, child.buf-len);
+build_package(child.buf, child.op);
Buffer uses the same concept as package, but adds its own additional
length.
Therefore I've added build_prepend_int(),
I can create build_buffer() and mimic build_package()
Sounds good, pls do.
The point is to avoid generic prepend calls as an external API.
but it won't change picture.
It's a better API - what is meant by picture?
build_prepend_int() is a static/non public function,
build_buffer() will also be static/non public function for use only by
API internals.
I pretty much hate long build_append_foo() names so I'm hiding all
lowlevel constructs and try to expose only high-level ASL ones.
Which makes me to think that we need to use asl_ prefix for API calls
instead of acpi_ or aml_.
This sounds wrong unless we either accept ASL input or
produce ASL output.
Igor, I think you are aiming a bit too high. Don't try to
write your own language, just use C. It does have
overhead like need to declare functions and variables,
and allocate/free memory, but they are well understood.
I refuse to give up on cleaner and simpler API yet :)
Your patches are almost there, they are pretty clean, the only issue I
think is this passing of AcpiAml by value, sometimes freeing buffer in
the process, sometimes not.
Currently buffer is allocated by API and is always freed whenever
it's passed to another API function.
That's why it makes user not to care about memory mgmt.
The only limitation of it is if you store AcpiAml return value into some
variable you are responsible to use it only once for passing to another API
function. Reusing this variable's value (pass it to API function second time)
would cause cause use-after-free and freeing-freed bugs.
Like this:
AcpiAml table = acpi_definition_block(SSDT,...);
AcpiAml scope = acpi_scope(PCI0);
aml_append(table, scope); // - here scope becomes invalid
// a bug
aml_append(table, scope); // use-after-free + freeing-freed bugs
There are several approaches to look for resolving above issues:
1. Adopt and use memory mgmt model used by GTK+
in nutshell:
http://www.cs.hunter.cuny.edu/~sweiss/course_materials/csci493.70/lecture_notes/GTK_memory_mngmt.pdf
In particular adopt behavior of GInitiallyUnowned usage model
that will allow to keep convenient chained call style and if necessary
reuse objects returned by API by explicitly referencing/dereferencing
them if needed.
2. It's possible to drop freeing inside API completely and
record(store in list) every new object inside a table context.
When
[Qemu-devel] [PULL 07/12] block: qapi - move string allocation from stack to the heap
From: Jeff Cody jc...@redhat.com
Rather than declaring 'backing_filename2' on the stack in
bdrv_query_image_info(), dynamically allocate it on the heap.
Reviewed-by: John Snow js...@redhat.com
Signed-off-by: Jeff Cody jc...@redhat.com
Signed-off-by: Kevin Wolf kw...@redhat.com
---
block/qapi.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/block/qapi.c b/block/qapi.c
index a6fd6f7..dec9f60 100644
--- a/block/qapi.c
+++ b/block/qapi.c
@@ -175,7 +175,6 @@ void bdrv_query_image_info(BlockDriverState *bs,
{
int64_t size;
const char *backing_filename;
-char backing_filename2[1024];
BlockDriverInfo bdi;
int ret;
Error *err = NULL;
@@ -211,13 +210,14 @@ void bdrv_query_image_info(BlockDriverState *bs,
backing_filename = bs-backing_file;
if (backing_filename[0] != '\0') {
+char *backing_filename2 = g_malloc0(1024);
info-backing_filename = g_strdup(backing_filename);
info-has_backing_filename = true;
-bdrv_get_full_backing_filename(bs, backing_filename2,
- sizeof(backing_filename2), err);
+bdrv_get_full_backing_filename(bs, backing_filename2, 1024, err);
if (err) {
error_propagate(errp, err);
qapi_free_ImageInfo(info);
+g_free(backing_filename2);
return;
}
@@ -231,6 +231,7 @@ void bdrv_query_image_info(BlockDriverState *bs,
info-backing_filename_format = g_strdup(bs-backing_format);
info-has_backing_filename_format = true;
}
+g_free(backing_filename2);
}
ret = bdrv_query_snapshot_info_list(bs, info-snapshots, err);
--
1.8.3.1
[Qemu-devel] [PATCH 11/11] target-arm: Fix brace style in reindented code
This patch fixes the brace style in the code reindented in the
previous commit.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/helper.c | 36 +++-
1 file changed, 23 insertions(+), 13 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 3a23af8..cc80829 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -4643,18 +4643,20 @@ static inline int check_ap(CPUARMState *env, ARMMMUIdx
mmu_idx,
return PAGE_READ | PAGE_WRITE;
}
-if (access_type == 1)
+if (access_type == 1) {
prot_ro = 0;
-else
+} else {
prot_ro = PAGE_READ;
+}
switch (ap) {
case 0:
if (arm_feature(env, ARM_FEATURE_V7)) {
return 0;
}
-if (access_type == 1)
+if (access_type == 1) {
return 0;
+}
switch (regime_sctlr(env, mmu_idx) (SCTLR_S | SCTLR_R)) {
case SCTLR_S:
return is_user ? 0 : PAGE_READ;
@@ -4666,10 +4668,11 @@ static inline int check_ap(CPUARMState *env, ARMMMUIdx
mmu_idx,
case 1:
return is_user ? 0 : PAGE_READ | PAGE_WRITE;
case 2:
-if (is_user)
+if (is_user) {
return prot_ro;
-else
+} else {
return PAGE_READ | PAGE_WRITE;
+}
case 3:
return PAGE_READ | PAGE_WRITE;
case 4: /* Reserved. */
@@ -4679,8 +4682,9 @@ static inline int check_ap(CPUARMState *env, ARMMMUIdx
mmu_idx,
case 6:
return prot_ro;
case 7:
-if (!arm_feature (env, ARM_FEATURE_V6K))
+if (!arm_feature(env, ARM_FEATURE_V6K)) {
return 0;
+}
return prot_ro;
default:
abort();
@@ -5191,17 +5195,20 @@ static int get_phys_addr_mpu(CPUARMState *env, uint32_t
address,
*phys_ptr = address;
for (n = 7; n = 0; n--) {
base = env-cp15.c6_region[n];
-if ((base 1) == 0)
+if ((base 1) == 0) {
continue;
+}
mask = 1 ((base 1) 0x1f);
/* Keep this shift separate from the above to avoid an
(undefined) 32. */
mask = (mask 1) - 1;
-if (((base ^ address) ~mask) == 0)
+if (((base ^ address) ~mask) == 0) {
break;
+}
}
-if (n 0)
+if (n 0) {
return 2;
+}
if (access_type == 2) {
mask = env-cp15.pmsav5_insn_ap;
@@ -5213,21 +5220,24 @@ static int get_phys_addr_mpu(CPUARMState *env, uint32_t
address,
case 0:
return 1;
case 1:
-if (is_user)
- return 1;
+if (is_user) {
+return 1;
+}
*prot = PAGE_READ | PAGE_WRITE;
break;
case 2:
*prot = PAGE_READ;
-if (!is_user)
+if (!is_user) {
*prot |= PAGE_WRITE;
+}
break;
case 3:
*prot = PAGE_READ | PAGE_WRITE;
break;
case 5:
-if (is_user)
+if (is_user) {
return 1;
+}
*prot = PAGE_READ;
break;
case 6:
--
1.9.1
[Qemu-devel] [PULL 10/12] block: update string sizes for filename, backing_file, exact_filename
From: Jeff Cody jc...@redhat.com
The string field entries 'filename', 'backing_file', and
'exact_filename' in the BlockDriverState struct are defined as 1024
bytes.
However, many places that use these values accept a maximum of PATH_MAX
bytes, so we have a mixture of 1024 byte and PATH_MAX byte allocations.
This patch makes the BlockDriverStruct field string sizes match usage.
This patch also does a few fixes related to the size that needs to
happen now:
* the block qapi driver is updated to use PATH_MAX bytes
* the qcow and qcow2 drivers have an additional safety check
* the block vvfat driver is updated to use PATH_MAX bytes
for the size of backing_file, for systems where PATH_MAX is 1024
bytes.
* qemu-img uses PATH_MAX rather than 1024. These instances were not
changed to be dynamically allocated, however, as the extra
temporary 3K in stack usage for qemu-img does not seem worrisome.
Reviewed-by: Stefan Hajnoczi stefa...@redhat.com
Reviewed-by: John Snow js...@redhat.com
Signed-off-by: Jeff Cody jc...@redhat.com
Signed-off-by: Kevin Wolf kw...@redhat.com
---
block/qapi.c | 4 ++--
block/qcow.c | 2 +-
block/qcow2.c | 3 ++-
block/vvfat.c | 4 ++--
include/block/block_int.h | 8
qemu-img.c| 4 ++--
6 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/block/qapi.c b/block/qapi.c
index dec9f60..75c388e 100644
--- a/block/qapi.c
+++ b/block/qapi.c
@@ -210,10 +210,10 @@ void bdrv_query_image_info(BlockDriverState *bs,
backing_filename = bs-backing_file;
if (backing_filename[0] != '\0') {
-char *backing_filename2 = g_malloc0(1024);
+char *backing_filename2 = g_malloc0(PATH_MAX);
info-backing_filename = g_strdup(backing_filename);
info-has_backing_filename = true;
-bdrv_get_full_backing_filename(bs, backing_filename2, 1024, err);
+bdrv_get_full_backing_filename(bs, backing_filename2, PATH_MAX, err);
if (err) {
error_propagate(errp, err);
qapi_free_ImageInfo(info);
diff --git a/block/qcow.c b/block/qcow.c
index ece2269..ccbe9e0 100644
--- a/block/qcow.c
+++ b/block/qcow.c
@@ -215,7 +215,7 @@ static int qcow_open(BlockDriverState *bs, QDict *options,
int flags,
/* read the backing file name */
if (header.backing_file_offset != 0) {
len = header.backing_file_size;
-if (len 1023) {
+if (len 1023 || len sizeof(bs-backing_file)) {
error_setg(errp, Backing file name too long);
ret = -EINVAL;
goto fail;
diff --git a/block/qcow2.c b/block/qcow2.c
index e4e690a..dbaf016 100644
--- a/block/qcow2.c
+++ b/block/qcow2.c
@@ -868,7 +868,8 @@ static int qcow2_open(BlockDriverState *bs, QDict *options,
int flags,
/* read the backing file name */
if (header.backing_file_offset != 0) {
len = header.backing_file_size;
-if (len MIN(1023, s-cluster_size - header.backing_file_offset)) {
+if (len MIN(1023, s-cluster_size - header.backing_file_offset) ||
+len sizeof(bs-backing_file)) {
error_setg(errp, Backing file name too long);
ret = -EINVAL;
goto fail;
diff --git a/block/vvfat.c b/block/vvfat.c
index e34a789..a1a44f0 100644
--- a/block/vvfat.c
+++ b/block/vvfat.c
@@ -2909,8 +2909,8 @@ static int enable_write_target(BDRVVVFATState *s, Error
**errp)
array_init((s-commits), sizeof(commit_t));
-s-qcow_filename = g_malloc(1024);
-ret = get_tmp_filename(s-qcow_filename, 1024);
+s-qcow_filename = g_malloc(PATH_MAX);
+ret = get_tmp_filename(s-qcow_filename, PATH_MAX);
if (ret 0) {
error_setg_errno(errp, -ret, can't create temporary file);
goto err;
diff --git a/include/block/block_int.h b/include/block/block_int.h
index 06a21dd..e264be9 100644
--- a/include/block/block_int.h
+++ b/include/block/block_int.h
@@ -339,13 +339,13 @@ struct BlockDriverState {
* regarding this BDS's context */
QLIST_HEAD(, BdrvAioNotifier) aio_notifiers;
-char filename[1024];
-char backing_file[1024]; /* if non zero, the image is a diff of
-this file image */
+char filename[PATH_MAX];
+char backing_file[PATH_MAX]; /* if non zero, the image is a diff of
+this file image */
char backing_format[16]; /* if non-zero and backing_file exists */
QDict *full_open_options;
-char exact_filename[1024];
+char exact_filename[PATH_MAX];
BlockDriverState *backing_hd;
BlockDriverState *file;
diff --git a/qemu-img.c b/qemu-img.c
index 7876258..4e9a7f5 100644
--- a/qemu-img.c
+++ b/qemu-img.c
@@ -2556,7 +2556,7 @@ static int img_rebase(int argc, char **argv)
/* For safe rebasing we need to compare old and new backing file */
if (!unsafe) {
-char backing_name[1024];
+char
[Qemu-devel] [PATCH 08/11] target-arm: Pass mmu_idx to get_phys_addr()
Make all the callers of get_phys_addr() pass it the correct
mmu_idx rather than just a simple is_user flag. This includes
properly decoding the AT/ATS system instructions; we include the
logic for handling all the opc1/opc2 cases because we'll need
them later for supporting EL2/EL3, even if we don't have the
regdef stanzas yet.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/helper.c | 110 +---
1 file changed, 96 insertions(+), 14 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 04bc0a1..0ae04eb 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -13,7 +13,7 @@
#ifndef CONFIG_USER_ONLY
static inline int get_phys_addr(CPUARMState *env, target_ulong address,
-int access_type, int is_user,
+int access_type, ARMMMUIdx mmu_idx,
hwaddr *phys_ptr, int *prot,
target_ulong *page_size);
@@ -1436,7 +1436,7 @@ static CPAccessResult ats_access(CPUARMState *env, const
ARMCPRegInfo *ri)
}
static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
- int access_type, int is_user)
+ int access_type, ARMMMUIdx mmu_idx)
{
hwaddr phys_addr;
target_ulong page_size;
@@ -1444,7 +1444,7 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t
value,
int ret;
uint64_t par64;
-ret = get_phys_addr(env, value, access_type, is_user,
+ret = get_phys_addr(env, value, access_type, mmu_idx,
phys_addr, prot, page_size);
if (extended_addresses_enabled(env)) {
/* ret is a DFSR/IFSR value for the long descriptor
@@ -1486,11 +1486,58 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t
value,
static void ats_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
{
-int is_user = ri-opc2 2;
int access_type = ri-opc2 1;
uint64_t par64;
+ARMMMUIdx mmu_idx;
+int el = arm_current_el(env);
+bool secure = arm_is_secure_below_el3(env);
-par64 = do_ats_write(env, value, access_type, is_user);
+switch (ri-opc2 6) {
+case 0:
+/* stage 1 current state PL1 */
+switch (el) {
+case 3:
+mmu_idx = ARMMMUIdx_S1E3;
+break;
+case 2:
+mmu_idx = ARMMMUIdx_S1NSE1;
+break;
+case 1:
+mmu_idx = secure ? ARMMMUIdx_S1SE1 : ARMMMUIdx_S1NSE1;
+break;
+default:
+g_assert_not_reached();
+}
+break;
+case 2:
+/* stage 1 current state PL0 */
+switch (el) {
+case 3:
+mmu_idx = ARMMMUIdx_S1SE0;
+break;
+case 2:
+mmu_idx = ARMMMUIdx_S1NSE0;
+break;
+case 1:
+mmu_idx = secure ? ARMMMUIdx_S1SE0 : ARMMMUIdx_S1NSE0;
+break;
+default:
+g_assert_not_reached();
+}
+break;
+case 4:
+/* stage 1+2 NonSecure PL1 */
+mmu_idx = ARMMMUIdx_S12NSE1;
+break;
+case 6:
+/* stage 1+2 NonSecure PL0 */
+mmu_idx = ARMMMUIdx_S12NSE0;
+break;
+default:
+g_assert_not_reached();
+}
+
+par64 = do_ats_write(env, value, access_type, mmu_idx);
A32_BANKED_CURRENT_REG_SET(env, par, par64);
}
@@ -1498,10 +1545,40 @@ static void ats_write(CPUARMState *env, const
ARMCPRegInfo *ri, uint64_t value)
static void ats_write64(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
-int is_user = ri-opc2 2;
int access_type = ri-opc2 1;
+ARMMMUIdx mmu_idx;
+int secure = arm_is_secure_below_el3(env);
+
+switch (ri-opc2 6) {
+case 0:
+switch (ri-opc1) {
+case 0:
+mmu_idx = secure ? ARMMMUIdx_S1SE1 : ARMMMUIdx_S1NSE1;
+break;
+case 4:
+mmu_idx = ARMMMUIdx_S1E2;
+break;
+case 6:
+mmu_idx = ARMMMUIdx_S1E3;
+break;
+default:
+g_assert_not_reached();
+}
+break;
+case 2:
+mmu_idx = secure ? ARMMMUIdx_S1SE0 : ARMMMUIdx_S1NSE0;
+break;
+case 4:
+mmu_idx = ARMMMUIdx_S12NSE1;
+break;
+case 6:
+mmu_idx = ARMMMUIdx_S12NSE0;
+break;
+default:
+g_assert_not_reached();
+}
-env-cp15.par_el[1] = do_ats_write(env, value, access_type, is_user);
+env-cp15.par_el[1] = do_ats_write(env, value, access_type, mmu_idx);
}
#endif
@@ -5084,13 +5161,13 @@ static int get_phys_addr_mpu(CPUARMState *env, uint32_t
address,
* @env: CPUARMState
* @address: virtual address to get physical address for
* @access_type: 0 for read, 1 for write, 2 for execute
- * @is_user: 0 for privileged access, 1 for user
+ * @mmu_idx: MMU index indicating required
Re: [Qemu-devel] [PATCH v2] fix QEMU build on Xen/ARM
On 01/23/15 07:19, Stefano Stabellini wrote:
xen_get_vmport_regs_pfn should take a xen_pfn_t argument, not an
unsigned long argument (in fact xen_pfn_t is defined as uint64_t on
ARM).
Also use xc_hvm_param_get instead of the deprecated xc_get_hvm_param.
Signed-off-by: Stefano Stabellini stefano.stabell...@eu.citrix.com
---
I have tested this on x86_64 with a xen that has
HVM_PARAM_VMPORT_REGS_PFN defined.
And the change looks good to me, so
Reviewed-by: Don Slutz dsl...@verizon.com
-Don Slutz
Changes in v2:
- properly handle return codes and set *vmport_regs_pfn before returning.
diff --git a/include/hw/xen/xen_common.h b/include/hw/xen/xen_common.h
index 519696f..38f29fb 100644
--- a/include/hw/xen/xen_common.h
+++ b/include/hw/xen/xen_common.h
@@ -168,14 +168,19 @@ void xen_shutdown_fatal_error(const char *fmt, ...)
GCC_FMT_ATTR(1, 2);
#ifdef HVM_PARAM_VMPORT_REGS_PFN
static inline int xen_get_vmport_regs_pfn(XenXC xc, domid_t dom,
- unsigned long *vmport_regs_pfn)
+ xen_pfn_t *vmport_regs_pfn)
{
-return xc_get_hvm_param(xc, dom, HVM_PARAM_VMPORT_REGS_PFN,
-vmport_regs_pfn);
+int rc;
+uint64_t value;
+rc = xc_hvm_param_get(xc, dom, HVM_PARAM_VMPORT_REGS_PFN, value);
+if (rc = 0) {
+*vmport_regs_pfn = (xen_pfn_t) value;
+}
+return rc;
}
#else
static inline int xen_get_vmport_regs_pfn(XenXC xc, domid_t dom,
- unsigned long *vmport_regs_pfn)
+ xen_pfn_t *vmport_regs_pfn)
{
return -ENOSYS;
}
[Qemu-devel] [PATCH v4 3/5] libqos: Remove PCI assumptions in constants of virtio driver
Convert PCI-specific constants names of libqos virtio driver.
Signed-off-by: Marc Marí marc.mari.barc...@gmail.com
---
tests/libqos/virtio-pci.c | 30 +++---
tests/libqos/virtio-pci.h | 24
tests/virtio-blk-test.c | 11 ++-
3 files changed, 33 insertions(+), 32 deletions(-)
diff --git a/tests/libqos/virtio-pci.c b/tests/libqos/virtio-pci.c
index 92bcac1..046a316 100644
--- a/tests/libqos/virtio-pci.c
+++ b/tests/libqos/virtio-pci.c
@@ -102,31 +102,31 @@ static uint64_t qvirtio_pci_config_readq(QVirtioDevice
*d, uint64_t addr)
static uint32_t qvirtio_pci_get_features(QVirtioDevice *d)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-return qpci_io_readl(dev-pdev, dev-addr + QVIRTIO_DEVICE_FEATURES);
+return qpci_io_readl(dev-pdev, dev-addr + QVIRTIO_PCI_DEVICE_FEATURES);
}
static void qvirtio_pci_set_features(QVirtioDevice *d, uint32_t features)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-qpci_io_writel(dev-pdev, dev-addr + QVIRTIO_GUEST_FEATURES, features);
+qpci_io_writel(dev-pdev, dev-addr + QVIRTIO_PCI_GUEST_FEATURES,
features);
}
static uint32_t qvirtio_pci_get_guest_features(QVirtioDevice *d)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-return qpci_io_readl(dev-pdev, dev-addr + QVIRTIO_GUEST_FEATURES);
+return qpci_io_readl(dev-pdev, dev-addr + QVIRTIO_PCI_GUEST_FEATURES);
}
static uint8_t qvirtio_pci_get_status(QVirtioDevice *d)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-return qpci_io_readb(dev-pdev, dev-addr + QVIRTIO_DEVICE_STATUS);
+return qpci_io_readb(dev-pdev, dev-addr + QVIRTIO_PCI_DEVICE_STATUS);
}
static void qvirtio_pci_set_status(QVirtioDevice *d, uint8_t status)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-qpci_io_writeb(dev-pdev, dev-addr + QVIRTIO_DEVICE_STATUS, status);
+qpci_io_writeb(dev-pdev, dev-addr + QVIRTIO_PCI_DEVICE_STATUS, status);
}
static bool qvirtio_pci_get_queue_isr_status(QVirtioDevice *d, QVirtQueue *vq)
@@ -146,7 +146,7 @@ static bool qvirtio_pci_get_queue_isr_status(QVirtioDevice
*d, QVirtQueue *vq)
return data == vqpci-msix_data;
}
} else {
-return qpci_io_readb(dev-pdev, dev-addr + QVIRTIO_ISR_STATUS) 1;
+return qpci_io_readb(dev-pdev, dev-addr + QVIRTIO_PCI_ISR_STATUS)
1;
}
}
@@ -166,26 +166,26 @@ static bool
qvirtio_pci_get_config_isr_status(QVirtioDevice *d)
return data == dev-config_msix_data;
}
} else {
-return qpci_io_readb(dev-pdev, dev-addr + QVIRTIO_ISR_STATUS) 2;
+return qpci_io_readb(dev-pdev, dev-addr + QVIRTIO_PCI_ISR_STATUS)
2;
}
}
static void qvirtio_pci_queue_select(QVirtioDevice *d, uint16_t index)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-qpci_io_writeb(dev-pdev, dev-addr + QVIRTIO_QUEUE_SELECT, index);
+qpci_io_writeb(dev-pdev, dev-addr + QVIRTIO_PCI_QUEUE_SELECT, index);
}
static uint16_t qvirtio_pci_get_queue_size(QVirtioDevice *d)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-return qpci_io_readw(dev-pdev, dev-addr + QVIRTIO_QUEUE_SIZE);
+return qpci_io_readw(dev-pdev, dev-addr + QVIRTIO_PCI_QUEUE_SIZE);
}
static void qvirtio_pci_set_queue_address(QVirtioDevice *d, uint32_t pfn)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-qpci_io_writel(dev-pdev, dev-addr + QVIRTIO_QUEUE_ADDRESS, pfn);
+qpci_io_writel(dev-pdev, dev-addr + QVIRTIO_PCI_QUEUE_ADDRESS, pfn);
}
static QVirtQueue *qvirtio_pci_virtqueue_setup(QVirtioDevice *d,
@@ -227,7 +227,7 @@ static QVirtQueue
*qvirtio_pci_virtqueue_setup(QVirtioDevice *d,
static void qvirtio_pci_virtqueue_kick(QVirtioDevice *d, QVirtQueue *vq)
{
QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-qpci_io_writew(dev-pdev, dev-addr + QVIRTIO_QUEUE_NOTIFY, vq-index);
+qpci_io_writew(dev-pdev, dev-addr + QVIRTIO_PCI_QUEUE_NOTIFY, vq-index);
}
const QVirtioBus qvirtio_pci = {
@@ -307,8 +307,8 @@ void qvirtqueue_pci_msix_setup(QVirtioPCIDevice *d,
QVirtQueuePCI *vqpci,
control
~PCI_MSIX_ENTRY_CTRL_MASKBIT);
qvirtio_pci_queue_select(d-vdev, vqpci-vq.index);
-qpci_io_writew(d-pdev, d-addr + QVIRTIO_MSIX_QUEUE_VECTOR, entry);
-vector = qpci_io_readw(d-pdev, d-addr + QVIRTIO_MSIX_QUEUE_VECTOR);
+qpci_io_writew(d-pdev, d-addr + QVIRTIO_PCI_MSIX_QUEUE_VECTOR, entry);
+vector = qpci_io_readw(d-pdev, d-addr + QVIRTIO_PCI_MSIX_QUEUE_VECTOR);
g_assert_cmphex(vector, !=, QVIRTIO_MSI_NO_VECTOR);
}
@@ -339,7 +339,7 @@ void
qvirtio_pci_set_msix_configuration_vector(QVirtioPCIDevice *d,
qpci_io_writel(d-pdev, addr + PCI_MSIX_ENTRY_VECTOR_CTRL,
control
~PCI_MSIX_ENTRY_CTRL_MASKBIT);
-qpci_io_writew(d-pdev, d-addr + QVIRTIO_MSIX_CONF_VECTOR, entry);
-vector = qpci_io_readw(d-pdev, d-addr + QVIRTIO_MSIX_CONF_VECTOR);
+
Re: [Qemu-devel] [PULL 01/01] seccomp: add mlockall to whitelist
On 23 January 2015 at 13:39, Amit Shah amit.s...@redhat.com wrote: On (Fri) 23 Jan 2015 [14:21:46], Eduardo Otubo wrote: From: Paolo Bonzini pbonz...@redhat.com This is used by -realtime mlock=on. Signed-off-by: Eduardo Otubo eduardo.ot...@profitbricks.com Hm, that's not where a signed-off-by of the maintainer goes... Signed-off-by: Paolo Bonzini pbonz...@redhat.com Reviewed-by: Amit Shah amit.s...@redhat.com Reviewed-by: Eduardo Habkost ehabk...@redhat.com Tested-by: Eduardo Habkost ehabk...@redhat.com Acked-by: Eduardo Otubo eduardo.ot...@profitbricks.com True, but I shan't ask Eduardo to reroll just for that... -- PMM
[Qemu-devel] [PULL 03/12] qcow2: Add two more unalignment checks
From: Max Reitz mre...@redhat.com
This adds checks for unaligned L2 table offsets and unaligned data
cluster offsets (actually the preallocated offsets for zero clusters) to
the zero cluster expansion function.
Signed-off-by: Max Reitz mre...@redhat.com
Reviewed-by: Eric Blake ebl...@redhat.com
Signed-off-by: Kevin Wolf kw...@redhat.com
---
block/qcow2-cluster.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/block/qcow2-cluster.c b/block/qcow2-cluster.c
index 1fea514..183177d 100644
--- a/block/qcow2-cluster.c
+++ b/block/qcow2-cluster.c
@@ -1651,6 +1651,14 @@ static int expand_zero_clusters_in_l1(BlockDriverState
*bs, uint64_t *l1_table,
continue;
}
+if (offset_into_cluster(s, l2_offset)) {
+qcow2_signal_corruption(bs, true, -1, -1, L2 table offset %#
+PRIx64 unaligned (L1 index: %#x),
+l2_offset, i);
+ret = -EIO;
+goto fail;
+}
+
if (is_active_l1) {
/* get active L2 tables from cache */
ret = qcow2_cache_get(bs, s-l2_table_cache, l2_offset,
@@ -1709,6 +1717,19 @@ static int expand_zero_clusters_in_l1(BlockDriverState
*bs, uint64_t *l1_table,
}
}
+if (offset_into_cluster(s, offset)) {
+qcow2_signal_corruption(bs, true, -1, -1, Data cluster offset
+%# PRIx64 unaligned (L2 offset: %#
+PRIx64 , L2 index: %#x), offset,
+l2_offset, j);
+if (!preallocated) {
+qcow2_free_clusters(bs, offset, s-cluster_size,
+QCOW2_DISCARD_ALWAYS);
+}
+ret = -EIO;
+goto fail;
+}
+
ret = qcow2_pre_write_overlap_check(bs, 0, offset,
s-cluster_size);
if (ret 0) {
if (!preallocated) {
--
1.8.3.1
[Qemu-devel] [PULL 05/12] block: vmdk - make ret variable usage clear
From: Jeff Cody jc...@redhat.com
Keep the variable 'ret' something that is returned by the function it is
defined in. For the return value of 'sscanf', use a more meaningful
variable name.
Reviewed-by: Stefan Hajnoczi stefa...@redhat.com
Reviewed-by: John Snow js...@redhat.com
Signed-off-by: Jeff Cody jc...@redhat.com
Signed-off-by: Kevin Wolf kw...@redhat.com
---
block/vmdk.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/block/vmdk.c b/block/vmdk.c
index 52cb888..dc6459c 100644
--- a/block/vmdk.c
+++ b/block/vmdk.c
@@ -785,6 +785,7 @@ static int vmdk_parse_extents(const char *desc,
BlockDriverState *bs,
const char *desc_file_path, Error **errp)
{
int ret;
+int matches;
char access[11];
char type[11];
char fname[512];
@@ -796,6 +797,7 @@ static int vmdk_parse_extents(const char *desc,
BlockDriverState *bs,
BDRVVmdkState *s = bs-opaque;
VmdkExtent *extent;
+
while (*p) {
/* parse extent line in one of below formats:
*
@@ -805,23 +807,23 @@ static int vmdk_parse_extents(const char *desc,
BlockDriverState *bs,
* RW [size in sectors] VMFSSPARSE file-name.vmdk
*/
flat_offset = -1;
-ret = sscanf(p, %10s % SCNd64 %10s \%511[^\n\r\]\ % SCNd64,
-access, sectors, type, fname, flat_offset);
-if (ret 4 || strcmp(access, RW)) {
+matches = sscanf(p, %10s % SCNd64 %10s \%511[^\n\r\]\ % SCNd64,
+ access, sectors, type, fname, flat_offset);
+if (matches 4 || strcmp(access, RW)) {
goto next_line;
} else if (!strcmp(type, FLAT)) {
-if (ret != 5 || flat_offset 0) {
+if (matches != 5 || flat_offset 0) {
error_setg(errp, Invalid extent lines: \n%s, p);
return -EINVAL;
}
} else if (!strcmp(type, VMFS)) {
-if (ret == 4) {
+if (matches == 4) {
flat_offset = 0;
} else {
error_setg(errp, Invalid extent lines:\n%s, p);
return -EINVAL;
}
-} else if (ret != 4) {
+} else if (matches != 4) {
error_setg(errp, Invalid extent lines:\n%s, p);
return -EINVAL;
}
--
1.8.3.1
[Qemu-devel] [PATCH 03/11] target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT
The LDT/STT (load/store unprivileged) instruction decode was using
the wrong MMU index value. This meant that instead of these insns
being always access as if user-mode regardless of current privilege
they were always access as if kernel-mode regardless of current
privilege. This went unnoticed because AArch64 Linux doesn't use
these instructions.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
I'm not counting this as a security issue because I'm assuming
nobody treats TCG guests as a security boundary (certainly I
would not recommend doing so...)
---
target-arm/translate-a64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 80d2359..dac2f63 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -2107,7 +2107,7 @@ static void disas_ldst_reg_imm9(DisasContext *s, uint32_t
insn)
}
} else {
TCGv_i64 tcg_rt = cpu_reg(s, rt);
-int memidx = is_unpriv ? 1 : get_mem_index(s);
+int memidx = is_unpriv ? MMU_USER_IDX : get_mem_index(s);
if (is_store) {
do_gpr_st_memidx(s, tcg_rt, tcg_addr, size, memidx);
--
1.9.1
Re: [Qemu-devel] [PULL 00/01] seccomp branch queue
On 23 January 2015 at 13:21, Eduardo Otubo eduardo.ot...@profitbricks.com wrote: The following changes since commit 8f970eff6e318524f189f105c236e47633759890: Merge remote-tracking branch 'remotes/kraxel/tags/pull-input-20150122-1' into staging (2015-01-22 17:41:59 +) are available in the git repository at: https://github.com/otubo/qemu.git tags/pull-seccomp-20150123 for you to fetch changes up to 4b45b055491a319292beefb8080a81d96cf55cf6: seccomp: add mlockall to whitelist (2015-01-23 14:07:08 +0100) seccomp branch queue Applied, thanks. -- PMM
[Qemu-devel] [PULL 02/12] virtio-blk: Use blk_aio_ioctl
From: Fam Zheng f...@redhat.com
Use the asynchronous interface of ioctl. This will not make the VM
unresponsive if the ioctl takes a long time.
Signed-off-by: Fam Zheng f...@redhat.com
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Kevin Wolf kw...@redhat.com
---
hw/block/virtio-blk.c | 125 +++---
1 file changed, 79 insertions(+), 46 deletions(-)
diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c
index 60cb1d8..4032fca 100644
--- a/hw/block/virtio-blk.c
+++ b/hw/block/virtio-blk.c
@@ -115,6 +115,56 @@ static void virtio_blk_flush_complete(void *opaque, int
ret)
virtio_blk_free_request(req);
}
+#ifdef __linux__
+
+typedef struct {
+VirtIOBlockReq *req;
+struct sg_io_hdr hdr;
+} VirtIOBlockIoctlReq;
+
+static void virtio_blk_ioctl_complete(void *opaque, int status)
+{
+VirtIOBlockIoctlReq *ioctl_req = opaque;
+VirtIOBlockReq *req = ioctl_req-req;
+VirtIODevice *vdev = VIRTIO_DEVICE(req-dev);
+struct virtio_scsi_inhdr *scsi;
+struct sg_io_hdr *hdr;
+
+scsi = (void *)req-elem.in_sg[req-elem.in_num - 2].iov_base;
+
+if (status) {
+status = VIRTIO_BLK_S_UNSUPP;
+virtio_stl_p(vdev, scsi-errors, 255);
+goto out;
+}
+
+hdr = ioctl_req-hdr;
+/*
+ * From SCSI-Generic-HOWTO: Some lower level drivers (e.g. ide-scsi)
+ * clear the masked_status field [hence status gets cleared too, see
+ * block/scsi_ioctl.c] even when a CHECK_CONDITION or COMMAND_TERMINATED
+ * status has occurred. However they do set DRIVER_SENSE in driver_status
+ * field. Also a (sb_len_wr 0) indicates there is a sense buffer.
+ */
+if (hdr-status == 0 hdr-sb_len_wr 0) {
+hdr-status = CHECK_CONDITION;
+}
+
+virtio_stl_p(vdev, scsi-errors,
+ hdr-status | (hdr-msg_status 8) |
+ (hdr-host_status 16) | (hdr-driver_status 24));
+virtio_stl_p(vdev, scsi-residual, hdr-resid);
+virtio_stl_p(vdev, scsi-sense_len, hdr-sb_len_wr);
+virtio_stl_p(vdev, scsi-data_len, hdr-dxfer_len);
+
+out:
+virtio_blk_req_complete(req, status);
+virtio_blk_free_request(req);
+g_free(ioctl_req);
+}
+
+#endif
+
static VirtIOBlockReq *virtio_blk_get_request(VirtIOBlock *s)
{
VirtIOBlockReq *req = virtio_blk_alloc_request(s);
@@ -137,7 +187,7 @@ static int virtio_blk_handle_scsi_req(VirtIOBlockReq *req)
#ifdef __linux__
int i;
-struct sg_io_hdr hdr;
+VirtIOBlockIoctlReq *ioctl_req;
#endif
/*
@@ -172,71 +222,52 @@ static int virtio_blk_handle_scsi_req(VirtIOBlockReq *req)
}
#ifdef __linux__
-memset(hdr, 0, sizeof(struct sg_io_hdr));
-hdr.interface_id = 'S';
-hdr.cmd_len = elem-out_sg[1].iov_len;
-hdr.cmdp = elem-out_sg[1].iov_base;
-hdr.dxfer_len = 0;
+ioctl_req = g_new0(VirtIOBlockIoctlReq, 1);
+ioctl_req-req = req;
+ioctl_req-hdr.interface_id = 'S';
+ioctl_req-hdr.cmd_len = elem-out_sg[1].iov_len;
+ioctl_req-hdr.cmdp = elem-out_sg[1].iov_base;
+ioctl_req-hdr.dxfer_len = 0;
if (elem-out_num 2) {
/*
* If there are more than the minimally required 2 output segments
* there is write payload starting from the third iovec.
*/
-hdr.dxfer_direction = SG_DXFER_TO_DEV;
-hdr.iovec_count = elem-out_num - 2;
+ioctl_req-hdr.dxfer_direction = SG_DXFER_TO_DEV;
+ioctl_req-hdr.iovec_count = elem-out_num - 2;
-for (i = 0; i hdr.iovec_count; i++)
-hdr.dxfer_len += elem-out_sg[i + 2].iov_len;
+for (i = 0; i ioctl_req-hdr.iovec_count; i++) {
+ioctl_req-hdr.dxfer_len += elem-out_sg[i + 2].iov_len;
+}
-hdr.dxferp = elem-out_sg + 2;
+ioctl_req-hdr.dxferp = elem-out_sg + 2;
} else if (elem-in_num 3) {
/*
* If we have more than 3 input segments the guest wants to actually
* read data.
*/
-hdr.dxfer_direction = SG_DXFER_FROM_DEV;
-hdr.iovec_count = elem-in_num - 3;
-for (i = 0; i hdr.iovec_count; i++)
-hdr.dxfer_len += elem-in_sg[i].iov_len;
+ioctl_req-hdr.dxfer_direction = SG_DXFER_FROM_DEV;
+ioctl_req-hdr.iovec_count = elem-in_num - 3;
+for (i = 0; i ioctl_req-hdr.iovec_count; i++) {
+ioctl_req-hdr.dxfer_len += elem-in_sg[i].iov_len;
+}
-hdr.dxferp = elem-in_sg;
+ioctl_req-hdr.dxferp = elem-in_sg;
} else {
/*
* Some SCSI commands don't actually transfer any data.
*/
-hdr.dxfer_direction = SG_DXFER_NONE;
+ioctl_req-hdr.dxfer_direction = SG_DXFER_NONE;
}
-hdr.sbp = elem-in_sg[elem-in_num - 3].iov_base;
-hdr.mx_sb_len = elem-in_sg[elem-in_num - 3].iov_len;
-
-status = blk_ioctl(blk-blk, SG_IO, hdr);
-if (status) {
-status = VIRTIO_BLK_S_UNSUPP;
-goto fail;
-}
+ioctl_req-hdr.sbp =
[Qemu-devel] [PULL 12/12] iotests: Lower 064's memory usage
From: Max Reitz mre...@redhat.com Test 064 reads a lot of data at once which currently results in qemu-io having to allocate up to about 1 GB of memory (958 MB, to be exact). This patch lowers that amount to 128 MB by making the test read smaller chunks. Signed-off-by: Max Reitz mre...@redhat.com Reviewed-by: Jeff Cody jc...@redhat.com Message-id: 1422025185-25229-1-git-send-email-mre...@redhat.com --- tests/qemu-iotests/064 | 19 +-- tests/qemu-iotests/064.out | 34 ++ 2 files changed, 47 insertions(+), 6 deletions(-) diff --git a/tests/qemu-iotests/064 b/tests/qemu-iotests/064 index 1c74c31..7564563 100755 --- a/tests/qemu-iotests/064 +++ b/tests/qemu-iotests/064 @@ -54,7 +54,15 @@ $QEMU_IO -r -c read -pP 0x96 33M 33M $TEST_IMG | _filter_qemu_io echo echo === Verify pattern 0x00, 66M - 1024M === -$QEMU_IO -r -c read -pP 0x00 66M 958M $TEST_IMG | _filter_qemu_io +$QEMU_IO -r -c read -pP 0x00 66M 62M \ +-c read -pP 0x00 128M 128M \ +-c read -pP 0x00 256M 128M \ +-c read -pP 0x00 384M 128M \ +-c read -pP 0x00 512M 128M \ +-c read -pP 0x00 640M 128M \ +-c read -pP 0x00 768M 128M \ +-c read -pP 0x00 896M 128M \ +$TEST_IMG | _filter_qemu_io echo echo === Verify pattern write, 0xc3 99M-157M === @@ -63,7 +71,14 @@ $QEMU_IO -c write -pP 0xc3 99M 58M $TEST_IMG | _filter_qemu_io $QEMU_IO -c read -pP 0xa5 0 33M $TEST_IMG | _filter_qemu_io $QEMU_IO -c read -pP 0x96 33M 33M $TEST_IMG | _filter_qemu_io $QEMU_IO -c read -pP 0x00 66M 33M $TEST_IMG | _filter_qemu_io -$QEMU_IO -c read -pP 0x00 157MM 867MM $TEST_IMG | _filter_qemu_io +$QEMU_IO -c read -pP 0x00 157M 99M \ + -c read -pP 0x00 256M 128M \ + -c read -pP 0x00 384M 128M \ + -c read -pP 0x00 512M 128M \ + -c read -pP 0x00 640M 128M \ + -c read -pP 0x00 768M 128M \ + -c read -pP 0x00 896M 128M \ + $TEST_IMG | _filter_qemu_io # now verify what we should have actually written $QEMU_IO -c read -pP 0xc3 99M 58M $TEST_IMG | _filter_qemu_io diff --git a/tests/qemu-iotests/064.out b/tests/qemu-iotests/064.out index 5346a4e..1a5b9e2 100644 --- a/tests/qemu-iotests/064.out +++ b/tests/qemu-iotests/064.out @@ -9,8 +9,22 @@ read 34603008/34603008 bytes at offset 34603008 33 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) === Verify pattern 0x00, 66M - 1024M === -read 1004535808/1004535808 bytes at offset 69206016 -958 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 65011712/65011712 bytes at offset 69206016 +62 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 134217728 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 268435456 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 402653184 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 536870912 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 671088640 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 805306368 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 939524096 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) === Verify pattern write, 0xc3 99M-157M === wrote 60817408/60817408 bytes at offset 103809024 @@ -21,8 +35,20 @@ read 34603008/34603008 bytes at offset 34603008 33 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) read 34603008/34603008 bytes at offset 69206016 33 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) -read 909115392/909115392 bytes at offset 164626432 -867 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 103809024/103809024 bytes at offset 164626432 +99 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 268435456 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 402653184 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 536870912 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 671088640 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 805306368 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) +read 134217728/134217728 bytes at offset 939524096 +128 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) read 60817408/60817408 bytes at offset 103809024 58 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec) *** done -- 1.8.3.1
[Qemu-devel] [PULL 08/12] block: remove unused variable in bdrv_commit
From: Jeff Cody jc...@redhat.com
As Stefan pointed out, the variable 'filename' in bdrv_commit is unused,
despite being maintained in previous patches.
With this patch, get rid of the variable for good.
Signed-off-by: Jeff Cody jc...@redhat.com
Signed-off-by: Kevin Wolf kw...@redhat.com
---
block.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/block.c b/block.c
index cbe4a32..d45e4dd 100644
--- a/block.c
+++ b/block.c
@@ -2207,7 +2207,6 @@ int bdrv_commit(BlockDriverState *bs)
int n, ro, open_flags;
int ret = 0;
uint8_t *buf = NULL;
-char filename[PATH_MAX];
if (!drv)
return -ENOMEDIUM;
@@ -,8 +2221,6 @@ int bdrv_commit(BlockDriverState *bs)
}
ro = bs-backing_hd-read_only;
-/* Use pstrcpy (not strncpy): filename must be NUL-terminated. */
-pstrcpy(filename, sizeof(filename), bs-backing_hd-filename);
open_flags = bs-backing_hd-open_flags;
if (ro) {
--
1.8.3.1
[Qemu-devel] [PATCH 09/11] target-arm: Use mmu_idx in get_phys_addr()
Now we have the mmu_idx in get_phys_addr(), use it correctly to
determine the behaviour of virtual to physical address translations,
rather than using just an is_user flag and the current CPU state.
Some TODO comments have been added to indicate where changes will
need to be made to add EL2 and 64-bit EL3 support.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/helper.c | 200 +++-
1 file changed, 151 insertions(+), 49 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 0ae04eb..0a06bbe 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -4556,13 +4556,88 @@ void arm_cpu_do_interrupt(CPUState *cs)
cs-interrupt_request |= CPU_INTERRUPT_EXITTB;
}
+
+/* Return the exception level which controls this address translation regime */
+static inline uint32_t regime_el(CPUARMState *env, ARMMMUIdx mmu_idx)
+{
+switch (mmu_idx) {
+case ARMMMUIdx_S2NS:
+case ARMMMUIdx_S1E2:
+return 2;
+case ARMMMUIdx_S1E3:
+return 3;
+case ARMMMUIdx_S1SE0:
+return arm_el_is_aa64(env, 3) ? 1 : 3;
+case ARMMMUIdx_S1SE1:
+case ARMMMUIdx_S1NSE0:
+case ARMMMUIdx_S1NSE1:
+return 1;
+default:
+g_assert_not_reached();
+}
+}
+
+/* Return the SCTLR value which controls this address translation regime */
+static inline uint32_t regime_sctlr(CPUARMState *env, ARMMMUIdx mmu_idx)
+{
+return env-cp15.sctlr_el[regime_el(env, mmu_idx)];
+}
+
+/* Return true if the specified stage of address translation is disabled */
+static inline bool regime_translation_disabled(CPUARMState *env,
+ ARMMMUIdx mmu_idx)
+{
+if (mmu_idx == ARMMMUIdx_S2NS) {
+return (env-cp15.hcr_el2 HCR_VM) == 0;
+}
+return (regime_sctlr(env, mmu_idx) SCTLR_M) == 0;
+}
+
+/* Return the TCR controlling this translation regime */
+static inline TCR *regime_tcr(CPUARMState *env, ARMMMUIdx mmu_idx)
+{
+if (mmu_idx == ARMMMUIdx_S2NS) {
+/* TODO: return VTCR_EL2 */
+g_assert_not_reached();
+}
+return env-cp15.tcr_el[regime_el(env, mmu_idx)];
+}
+
+/* Return true if the translation regime is using LPAE format page tables */
+static inline bool regime_using_lpae_format(CPUARMState *env,
+ARMMMUIdx mmu_idx)
+{
+int el = regime_el(env, mmu_idx);
+if (el == 2 || arm_el_is_aa64(env, el)) {
+return true;
+}
+if (arm_feature(env, ARM_FEATURE_LPAE)
+ (regime_tcr(env, mmu_idx)-raw_tcr TTBCR_EAE)) {
+return true;
+}
+return false;
+}
+
+static inline bool regime_is_user(CPUARMState *env, ARMMMUIdx mmu_idx)
+{
+switch (mmu_idx) {
+case ARMMMUIdx_S1SE0:
+case ARMMMUIdx_S1NSE0:
+return true;
+default:
+return false;
+}
+}
+
/* Check section/page access permissions.
Returns the page protection flags, or zero if the access is not
permitted. */
-static inline int check_ap(CPUARMState *env, int ap, int domain_prot,
- int access_type, int is_user)
+static inline int check_ap(CPUARMState *env, ARMMMUIdx mmu_idx,
+ int ap, int domain_prot,
+ int access_type)
{
int prot_ro;
+ bool is_user = regime_is_user(env, mmu_idx);
if (domain_prot == 3) {
return PAGE_READ | PAGE_WRITE;
@@ -4580,7 +4655,7 @@ static inline int check_ap(CPUARMState *env, int ap, int
domain_prot,
}
if (access_type == 1)
return 0;
- switch (A32_BANKED_CURRENT_REG_GET(env, sctlr) (SCTLR_S | SCTLR_R)) {
+ switch (regime_sctlr(env, mmu_idx) (SCTLR_S | SCTLR_R)) {
case SCTLR_S:
return is_user ? 0 : PAGE_READ;
case SCTLR_R:
@@ -4612,35 +4687,32 @@ static inline int check_ap(CPUARMState *env, int ap,
int domain_prot,
}
}
-static bool get_level1_table_address(CPUARMState *env, uint32_t *table,
- uint32_t address)
+static bool get_level1_table_address(CPUARMState *env, ARMMMUIdx mmu_idx,
+ uint32_t *table, uint32_t address)
{
-/* Get the TCR bank based on our security state */
-TCR *tcr = env-cp15.tcr_el[arm_is_secure(env) ? 3 : 1];
+/* Note that we can only get here for an AArch32 PL0/PL1 lookup */
+int el = regime_el(env, mmu_idx);
+TCR *tcr = regime_tcr(env, mmu_idx);
-/* We only get here if EL1 is running in AArch32. If EL3 is running in
- * AArch32 there is a secure and non-secure instance of the translation
- * table registers.
- */
if (address tcr-mask) {
if (tcr-raw_tcr TTBCR_PD1) {
/* Translation table walk disabled for TTBR1 */
return false;
}
-*table = A32_BANKED_CURRENT_REG_GET(env, ttbr1) 0xc000;
+*table = env-cp15.ttbr1_el[el] 0xc000;
} else {
if
[Qemu-devel] [PATCH v4 2/5] tests: Prepare virtio-blk-test for multi-arch implementation
Modularize functions in virtio-blk-test and add PCI suffix for PCI specific
components.
Signed-off-by: Marc Marí marc.mari.barc...@gmail.com
---
tests/virtio-blk-test.c | 154 +++
1 file changed, 89 insertions(+), 65 deletions(-)
diff --git a/tests/virtio-blk-test.c b/tests/virtio-blk-test.c
index 2424c84..143d54f 100644
--- a/tests/virtio-blk-test.c
+++ b/tests/virtio-blk-test.c
@@ -55,11 +55,10 @@ typedef struct QVirtioBlkReq {
uint8_t status;
} QVirtioBlkReq;
-static QPCIBus *test_start(void)
+static char *drive_create(void)
{
-char *cmdline;
-char tmp_path[] = /tmp/qtest.XX;
int fd, ret;
+char *tmp_path = g_strdup(/tmp/qtest.XX);
/* Create a temporary raw image */
fd = mkstemp(tmp_path);
@@ -68,13 +67,24 @@ static QPCIBus *test_start(void)
g_assert_cmpint(ret, ==, 0);
close(fd);
+return tmp_path;
+}
+
+static QPCIBus *pci_test_start(void)
+{
+char *cmdline;
+char *tmp_path;
+
+tmp_path = drive_create();
+
cmdline = g_strdup_printf(-drive if=none,id=drive0,file=%s,format=raw
- -drive
if=none,id=drive1,file=/dev/null,format=raw
- -device virtio-blk-pci,id=drv0,drive=drive0,
- addr=%x.%x,
- tmp_path, PCI_SLOT, PCI_FN);
+-drive if=none,id=drive1,file=/dev/null,format=raw
+-device virtio-blk-pci,id=drv0,drive=drive0,
+addr=%x.%x,
+tmp_path, PCI_SLOT, PCI_FN);
qtest_start(cmdline);
unlink(tmp_path);
+g_free(tmp_path);
g_free(cmdline);
return qpci_init_pc();
@@ -85,7 +95,7 @@ static void test_end(void)
qtest_end();
}
-static QVirtioPCIDevice *virtio_blk_init(QPCIBus *bus, int slot)
+static QVirtioPCIDevice *virtio_blk_pci_init(QPCIBus *bus, int slot)
{
QVirtioPCIDevice *dev;
@@ -135,14 +145,10 @@ static uint64_t virtio_blk_request(QGuestAllocator
*alloc, QVirtioBlkReq *req,
return addr;
}
-static void pci_basic(void)
+static void test_basic(const QVirtioBus *bus, QVirtioDevice *dev,
+QGuestAllocator *alloc, QVirtQueue *vq, uint64_t device_specific)
{
-QVirtioPCIDevice *dev;
-QPCIBus *bus;
-QVirtQueuePCI *vqpci;
-QGuestAllocator *alloc;
QVirtioBlkReq req;
-void *addr;
uint64_t req_addr;
uint64_t capacity;
uint32_t features;
@@ -150,28 +156,16 @@ static void pci_basic(void)
uint8_t status;
char *data;
-bus = test_start();
-
-dev = virtio_blk_init(bus, PCI_SLOT);
-
-/* MSI-X is not enabled */
-addr = dev-addr + QVIRTIO_DEVICE_SPECIFIC_NO_MSIX;
-
-capacity = qvirtio_config_readq(qvirtio_pci, dev-vdev,
-(uint64_t)(uintptr_t)addr);
+capacity = qvirtio_config_readq(bus, dev, device_specific);
g_assert_cmpint(capacity, ==, TEST_IMAGE_SIZE / 512);
-features = qvirtio_get_features(qvirtio_pci, dev-vdev);
+features = qvirtio_get_features(bus, dev);
features = features ~(QVIRTIO_F_BAD_FEATURE |
QVIRTIO_F_RING_INDIRECT_DESC | QVIRTIO_F_RING_EVENT_IDX |
QVIRTIO_BLK_F_SCSI);
-qvirtio_set_features(qvirtio_pci, dev-vdev, features);
+qvirtio_set_features(bus, dev, features);
-alloc = pc_alloc_init();
-vqpci = (QVirtQueuePCI *)qvirtqueue_setup(qvirtio_pci, dev-vdev,
-alloc, 0);
-
-qvirtio_set_driver_ok(qvirtio_pci, dev-vdev);
+qvirtio_set_driver_ok(bus, dev);
/* Write and read with 2 descriptor layout */
/* Write request */
@@ -185,12 +179,11 @@ static void pci_basic(void)
g_free(req.data);
-free_head = qvirtqueue_add(vqpci-vq, req_addr, 528, false, true);
-qvirtqueue_add(vqpci-vq, req_addr + 528, 1, true, false);
-qvirtqueue_kick(qvirtio_pci, dev-vdev, vqpci-vq, free_head);
+free_head = qvirtqueue_add(vq, req_addr, 528, false, true);
+qvirtqueue_add(vq, req_addr + 528, 1, true, false);
+qvirtqueue_kick(bus, dev, vq, free_head);
-qvirtio_wait_queue_isr(qvirtio_pci, dev-vdev, vqpci-vq,
- QVIRTIO_BLK_TIMEOUT_US);
+qvirtio_wait_queue_isr(bus, dev, vq, QVIRTIO_BLK_TIMEOUT_US);
status = readb(req_addr + 528);
g_assert_cmpint(status, ==, 0);
@@ -206,13 +199,12 @@ static void pci_basic(void)
g_free(req.data);
-free_head = qvirtqueue_add(vqpci-vq, req_addr, 16, false, true);
-qvirtqueue_add(vqpci-vq, req_addr + 16, 513, true, false);
+free_head = qvirtqueue_add(vq, req_addr, 16, false, true);
+qvirtqueue_add(vq, req_addr + 16, 513, true, false);
-qvirtqueue_kick(qvirtio_pci, dev-vdev, vqpci-vq, free_head);
+qvirtqueue_kick(bus, dev, vq, free_head);
-qvirtio_wait_queue_isr(qvirtio_pci, dev-vdev, vqpci-vq,
-
[Qemu-devel] [PATCH 04/11] target-arm: Define correct mmu_idx values and pass them in TB flags
We currently claim that for ARM the mmu_idx should simply be the current
exception level. However this isn't actually correct -- secure EL0 and EL1
should have separate indexes from non-secure EL0 and EL1 since their
VA-PA mappings may differ. We also will want an index for stage 2
translations when we properly support EL2.
Define and document all seven mmu index values that we require, and
pass the mmu index in the TB flags rather than exception level or
priv/user bit.
This change doesn't update the get_phys_addr() code, so our page
table walking still assumes a simplistic user or priv? model for
the moment.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
This leaves some odd gaps in the TB flags usage. I will circle
back and clean this up later (including moving the other common
flags like the singlestep ones to the top of the flags word),
but I didn't want to bloat this patchseries further.
---
target-arm/cpu.h | 113 -
target-arm/helper.c| 3 +-
target-arm/translate-a64.c | 5 +-
target-arm/translate.c | 5 +-
target-arm/translate.h | 3 +-
5 files changed, 101 insertions(+), 28 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 3eb00f4..cf7b9ab 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -98,7 +98,7 @@ typedef uint32_t ARMReadCPFunc(void *opaque, int cp_info,
struct arm_boot_info;
-#define NB_MMU_MODES 4
+#define NB_MMU_MODES 7
/* We currently assume float and double are IEEE single and double
precision respectively.
@@ -1572,13 +1572,92 @@ static inline CPUARMState *cpu_init(const char
*cpu_model)
#define cpu_signal_handler cpu_arm_signal_handler
#define cpu_list arm_cpu_list
-/* MMU modes definitions */
+/* ARM has the following translation regimes (as the ARM ARM calls them):
+ *
+ * If EL3 is 64-bit:
+ * + NonSecure EL1 0 stage 1
+ * + NonSecure EL1 0 stage 2
+ * + NonSecure EL2
+ * + Secure EL1 EL0
+ * + Secure EL3
+ * If EL3 is 32-bit:
+ * + NonSecure PL1 0 stage 1
+ * + NonSecure PL1 0 stage 2
+ * + NonSecure PL2
+ * + Secure PL0 PL1
+ * (reminder: for 32 bit EL3, Secure PL1 is *EL3*, not EL1.)
+ *
+ * For QEMU, an mmu_idx is not quite the same as a translation regime because:
+ * 1. we need to split the EL1 0 regimes into two mmu_idxes, because they
+ * may differ in access permissions even if the VA-PA map is the same
+ * 2. we want to cache in our TLB the full VA-IPA-PA lookup for a stage 1+2
+ * translation, which means that we have one mmu_idx that deals with two
+ * concatenated translation regimes [this sort of combined s1+2 TLB is
+ * architecturally permitted]
+ * 3. we don't need to allocate an mmu_idx to translations that we won't be
+ * handling via the TLB. The only way to do a stage 1 translation without
+ * the immediate stage 2 translation is via the ATS or AT system insns,
+ * which can be slow-pathed and always do a page table walk.
+ * 4. we can also safely fold together the 32 bit EL3 and 64 bit EL3
+ * translation regimes, because they map reasonably well to each other
+ * and they can't both be active at the same time.
+ * This gives us the following list of mmu_idx values:
+ *
+ * NS EL0 (aka NS PL0) stage 1+2
+ * NS EL1 (aka NS PL1) stage 1+2
+ * NS EL2 (aka NS PL2)
+ * S EL3 (aka S PL1)
+ * S EL0 (aka S PL0)
+ * S EL1 (not used if EL3 is 32 bit)
+ * NS EL0+1 stage 2
+ *
+ * (The last of these is an mmu_idx because we want to be able to use the TLB
+ * for the accesses done as part of a stage 1 page table walk, rather than
+ * having to walk the stage 2 page table over and over.)
+ *
+ * Our enumeration includes at the end some entries which are not true
+ * mmu_idx values in that they don't have corresponding TLBs and are only
+ * valid for doing slow path page table walks.
+ *
+ * The constant names here are patterned after the general style of the names
+ * of the AT/ATS operations.
+ * The values used are carefully arranged to make mmu_idx = EL lookup easy.
+ */
+typedef enum ARMMMUIdx {
+ARMMMUIdx_S12NSE0 = 0,
+ARMMMUIdx_S12NSE1 = 1,
+ARMMMUIdx_S1E2 = 2,
+ARMMMUIdx_S1E3 = 3,
+ARMMMUIdx_S1SE0 = 4,
+ARMMMUIdx_S1SE1 = 5,
+ARMMMUIdx_S2NS = 6,
+/* Indexes below here don't have TLBs and are used only for AT system
+ * instructions or for the first stage of an S12 page table walk.
+ */
+ARMMMUIdx_S1NSE0 = 7,
+ARMMMUIdx_S1NSE1 = 8,
+} ARMMMUIdx;
+
#define MMU_MODE0_SUFFIX _user
#define MMU_MODE1_SUFFIX _kernel
#define MMU_USER_IDX 0
+
+/* Return the exception level we're running at if this is our mmu_idx */
+static inline int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx)
+{
+assert(mmu_idx ARMMMUIdx_S2NS);
+return mmu_idx 3;
+}
+
+/* Determine the current mmu_idx to use for normal loads/stores */
static inline int cpu_mmu_index (CPUARMState *env)
{
-return arm_current_el(env);
+int el = arm_current_el(env);
+
+if (el
[Qemu-devel] [PATCH 07/11] target-arm: Split AArch64 cases out of ats_write()
Instead of simply reusing ats_write() as the handler for both AArch32
and AArch64 address translation operations, use a different function
for each with the common code in a third function. This is necessary
because the semantics for selecting the right translation regime are
different; we are only getting away with sharing currently because
we don't support EL2 and only support EL3 in AArch32.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/helper.c | 33 ++---
1 file changed, 26 insertions(+), 7 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 06478d8..04bc0a1 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1435,13 +1435,13 @@ static CPAccessResult ats_access(CPUARMState *env,
const ARMCPRegInfo *ri)
return CP_ACCESS_OK;
}
-static void ats_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
+static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
+ int access_type, int is_user)
{
hwaddr phys_addr;
target_ulong page_size;
int prot;
-int ret, is_user = ri-opc2 2;
-int access_type = ri-opc2 1;
+int ret;
uint64_t par64;
ret = get_phys_addr(env, value, access_type, is_user,
@@ -1481,9 +1481,28 @@ static void ats_write(CPUARMState *env, const
ARMCPRegInfo *ri, uint64_t value)
((ret 0xf) 1) | 1;
}
}
+return par64;
+}
+
+static void ats_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
+{
+int is_user = ri-opc2 2;
+int access_type = ri-opc2 1;
+uint64_t par64;
+
+par64 = do_ats_write(env, value, access_type, is_user);
A32_BANKED_CURRENT_REG_SET(env, par, par64);
}
+
+static void ats_write64(CPUARMState *env, const ARMCPRegInfo *ri,
+uint64_t value)
+{
+int is_user = ri-opc2 2;
+int access_type = ri-opc2 1;
+
+env-cp15.par_el[1] = do_ats_write(env, value, access_type, is_user);
+}
#endif
static const ARMCPRegInfo vapa_cp_reginfo[] = {
@@ -2257,16 +2276,16 @@ static const ARMCPRegInfo v8_cp_reginfo[] = {
/* 64 bit address translation operations */
{ .name = AT_S1E1R, .state = ARM_CP_STATE_AA64,
.opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 0,
- .access = PL1_W, .type = ARM_CP_NO_MIGRATE, .writefn = ats_write },
+ .access = PL1_W, .type = ARM_CP_NO_MIGRATE, .writefn = ats_write64 },
{ .name = AT_S1E1W, .state = ARM_CP_STATE_AA64,
.opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 1,
- .access = PL1_W, .type = ARM_CP_NO_MIGRATE, .writefn = ats_write },
+ .access = PL1_W, .type = ARM_CP_NO_MIGRATE, .writefn = ats_write64 },
{ .name = AT_S1E0R, .state = ARM_CP_STATE_AA64,
.opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 2,
- .access = PL1_W, .type = ARM_CP_NO_MIGRATE, .writefn = ats_write },
+ .access = PL1_W, .type = ARM_CP_NO_MIGRATE, .writefn = ats_write64 },
{ .name = AT_S1E0W, .state = ARM_CP_STATE_AA64,
.opc0 = 1, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 3,
- .access = PL1_W, .type = ARM_CP_NO_MIGRATE, .writefn = ats_write },
+ .access = PL1_W, .type = ARM_CP_NO_MIGRATE, .writefn = ats_write64 },
#endif
/* TLB invalidate last level of translation table walk */
{ .name = TLBIMVALIS, .cp = 15, .opc1 = 0, .crn = 8, .crm = 3, .opc2 = 5,
--
1.9.1
[Qemu-devel] [PATCH V2 0/4] kvm_stat update
This is the second version of kvm_stat patches. Please review. NOTE: I have tested these patches on ARM64 and x86_64 machines. For PPC, the only area been affected is ioctl RESET number (patch 4). Unfortunately I don't have PPC hardware to test them. Thanks, -Wei V2: - fix a typo in VMX exit reason (pointed out by Paolo) - add ioctl RESET function to initialize counters - re-arrange the order of patches V1: - support for ARM aarch64 - update to the latest exit reasons (vmx, svm and userspace) - print errno when syscall fails Wei Huang (4): kvm_stat: Update exit reasons to the latest defintion kvm_stat: Print errno when syscall to perf_event_open() fails kvm_stat: Add aarch64 support kvm_stat: Add RESET support for perf event ioctl scripts/kvm/kvm_stat | 24 +++- 1 file changed, 23 insertions(+), 1 deletion(-) -- 1.8.3.1
[Qemu-devel] [PATCH V2 1/4] kvm_stat: Update exit reasons to the latest defintion
This patch updates the exit reasons for x86_vmx, x86_svm, and userspace
to the latest definition.
Signed-off-by: Wei Huang w...@redhat.com
---
scripts/kvm/kvm_stat | 4
1 file changed, 4 insertions(+)
diff --git a/scripts/kvm/kvm_stat b/scripts/kvm/kvm_stat
index 7b1437c..7ec84c0 100755
--- a/scripts/kvm/kvm_stat
+++ b/scripts/kvm/kvm_stat
@@ -65,6 +65,8 @@ vmx_exit_reasons = {
49: 'EPT_MISCONFIG',
54: 'WBINVD',
55: 'XSETBV',
+56: 'APIC_WRITE',
+58: 'INVPCID',
}
svm_exit_reasons = {
@@ -138,6 +140,7 @@ svm_exit_reasons = {
0x08a: 'MONITOR',
0x08b: 'MWAIT',
0x08c: 'MWAIT_COND',
+0x08d: 'XSETBV',
0x400: 'NPF',
}
@@ -167,6 +170,7 @@ userspace_exit_reasons = {
21: 'WATCHDOG',
22: 'S390_TSCH',
23: 'EPR',
+24: 'SYSTEM_EVENT',
}
x86_exit_reasons = {
--
1.8.3.1
[Qemu-devel] [PATCH V2 4/4] kvm_stat: Add RESET support for perf event ioctl
While running kvm_stat using tracepoint on ARM64 hardware (e.g. kvm_stat
-1 -t), the initial values of some kvm_userspace_exit counters were found
to be very suspecious. For instance the tracing tool showed that S390_TSCH
was called many times on ARM64 machine, which apparently was wrong.
This patch adds RESET ioctl support for perf monitoring. Before calling
ioctl to enable a perf event, this patch resets the counter first. With
this patch, the init counter values become correct on ARM64 hardware.
Example:
before patch
kvm_userspace_exit(S390_SIEIC) 1426 0
kvm_userspace_exit(S390_TSCH) 339 0
after patch
kvm_userspace_exit(S390_SIEIC) 0 0
kvm_userspace_exit(S390_TSCH) 0 0
Signed-off-by: Wei Huang w...@redhat.com
---
scripts/kvm/kvm_stat | 5 +
1 file changed, 5 insertions(+)
diff --git a/scripts/kvm/kvm_stat b/scripts/kvm/kvm_stat
index 8f6f007..f927e97 100755
--- a/scripts/kvm/kvm_stat
+++ b/scripts/kvm/kvm_stat
@@ -186,6 +186,7 @@ ioctl_numbers = {
'SET_FILTER' : 0x40082406,
'ENABLE' : 0x2400,
'DISABLE': 0x2401,
+'RESET' : 0x2403,
}
def x86_init(flag):
@@ -346,6 +347,9 @@ class Event(object):
def disable(self):
import fcntl
fcntl.ioctl(self.fd, ioctl_numbers['DISABLE'], 0)
+def reset(self):
+import fcntl
+fcntl.ioctl(self.fd, ioctl_numbers['RESET'], 0)
class TracepointProvider(object):
def __init__(self):
@@ -405,6 +409,7 @@ class TracepointProvider(object):
for group in self.group_leaders:
for event in group.events:
if event.name in fields:
+#event.reset()
event.enable()
else:
event.disable()
--
1.8.3.1
Re: [Qemu-devel] [PATCH 01/11] cpu_ldst.h: Allow NB_MMU_MODES to be 7
On 23/01/2015 19:20, Peter Maydell wrote: Support guest CPUs which need 7 MMU index values. Add a comment about what would be required to raise the limit further (trivial for 8, TCG backend rework for 9 or more). Signed-off-by: Peter Maydell peter.mayd...@linaro.org I'll send a patch for 16 next Monday. Paolo
Re: [Qemu-devel] [PATCH 01/11] cpu_ldst.h: Allow NB_MMU_MODES to be 7
On Fri, Jan 23, 2015 at 12:20 PM, Peter Maydell peter.mayd...@linaro.org wrote: Support guest CPUs which need 7 MMU index values. Add a comment about what would be required to raise the limit further (trivial for 8, TCG backend rework for 9 or more). Signed-off-by: Peter Maydell peter.mayd...@linaro.org --- include/exec/cpu_ldst.h | 28 +--- 1 file changed, 25 insertions(+), 3 deletions(-) diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 0e825ea..fa5ea63 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -244,9 +244,31 @@ uint64_t helper_ldq_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx); #undef MEMSUFFIX #endif /* (NB_MMU_MODES = 6) */ -#if (NB_MMU_MODES 6) -#error NB_MMU_MODES 6 is not supported for now -#endif /* (NB_MMU_MODES 6) */ +#if (NB_MMU_MODES = 7) defined(MMU_MODE6_SUFFIX) + +#define CPU_MMU_INDEX 6 +#define MEMSUFFIX MMU_MODE5_SUFFIX Should this be MMU_MODE6_SUFFIX? +#define DATA_SIZE 1 +#include exec/cpu_ldst_template.h + +#define DATA_SIZE 2 +#include exec/cpu_ldst_template.h + +#define DATA_SIZE 4 +#include exec/cpu_ldst_template.h + +#define DATA_SIZE 8 +#include exec/cpu_ldst_template.h +#undef CPU_MMU_INDEX +#undef MEMSUFFIX +#endif /* (NB_MMU_MODES = 7) */ + +#if (NB_MMU_MODES 7) +/* Note that supporting NB_MMU_MODES == 9 would require + * changes to at least the ARM TCG backend. + */ +#error NB_MMU_MODES 7 is not supported for now +#endif /* (NB_MMU_MODES 7) */ /* these access are slower, they must be as rare as possible */ #define CPU_MMU_INDEX (cpu_mmu_index(env)) -- 1.9.1 Otherwise, Reviewed-by: Greg Bellows greg.bell...@linaro.org
[Qemu-devel] qemu-coroutine.c: error: thread-local storage not supported for this target
I used the newest version from QEMU's git with this id: a46b3aaf6bb038d4f6f192a84df204f10929e75c. When I tried to compile QEMU on Mac OS 10.6.8, I saw this error: qemu-coroutine.c:29: error: thread-local storage not supported for this target.
[Qemu-devel] [PATCH] iotests: Specify format for qemu-nbd
This patch is necessary to suppress the probed raw warning when running raw over nbd tests. Signed-off-by: Max Reitz mre...@redhat.com --- tests/qemu-iotests/common.rc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/qemu-iotests/common.rc b/tests/qemu-iotests/common.rc index aa093d9..22d3514 100644 --- a/tests/qemu-iotests/common.rc +++ b/tests/qemu-iotests/common.rc @@ -153,7 +153,7 @@ _make_test_img() # Start an NBD server on the image file, which is what we'll be talking to if [ $IMGPROTO = nbd ]; then -eval $QEMU_NBD -v -t -b 127.0.0.1 -p 10810 $TEST_IMG_FILE +eval $QEMU_NBD -v -t -b 127.0.0.1 -p 10810 -f $IMGFMT $TEST_IMG_FILE QEMU_NBD_PID=$! sleep 1 # FIXME: qemu-nbd needs to be listening before we continue fi -- 2.1.0
Re: [Qemu-devel] qemu-coroutine.c: error: thread-local storage not supported for this target
On 23/01/2015 20:27, Programmingkid wrote: I used the newest version from QEMU's git with this id: a46b3aaf6bb038d4f6f192a84df204f10929e75c. When I tried to compile QEMU on Mac OS 10.6.8, I saw this error: qemu-coroutine.c:29: error: thread-local storage not supported for this target. GCC or clang? Paolo
Re: [Qemu-devel] qemu-coroutine.c: error: thread-local storage not supported for this target
On Jan 23, 2015, at 3:33 PM, Paolo Bonzini wrote: On 23/01/2015 20:27, Programmingkid wrote: I used the newest version from QEMU's git with this id: a46b3aaf6bb038d4f6f192a84df204f10929e75c. When I tried to compile QEMU on Mac OS 10.6.8, I saw this error: qemu-coroutine.c:29: error: thread-local storage not supported for this target. GCC or clang? Paolo GCC 4.2.1.
[Qemu-devel] [PATCH V2 3/4] kvm_stat: Add aarch64 support
This patch enables aarch64 support for kvm_stat. The platform detection
is based on OS uname.
Signed-off-by: Wei Huang w...@redhat.com
---
scripts/kvm/kvm_stat | 8
1 file changed, 8 insertions(+)
diff --git a/scripts/kvm/kvm_stat b/scripts/kvm/kvm_stat
index cb23877..8f6f007 100755
--- a/scripts/kvm/kvm_stat
+++ b/scripts/kvm/kvm_stat
@@ -209,10 +209,18 @@ def ppc_init():
}
})
+def aarch64_init():
+globals().update({
+'sc_perf_evt_open' : 241
+})
+
def detect_platform():
if os.uname()[4].startswith('ppc'):
ppc_init()
return
+elif os.uname()[4].startswith('aarch64'):
+aarch64_init()
+return
for line in file('/proc/cpuinfo').readlines():
if line.startswith('flags'):
--
1.8.3.1
Re: [Qemu-devel] [PATCH 03/11] target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT
On Fri, Jan 23, 2015 at 12:20 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
The LDT/STT (load/store unprivileged) instruction decode was using
the wrong MMU index value. This meant that instead of these insns
being always access as if user-mode regardless of current privilege
they were always access as if kernel-mode regardless of current
privilege. This went unnoticed because AArch64 Linux doesn't use
these instructions.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
I'm not counting this as a security issue because I'm assuming
nobody treats TCG guests as a security boundary (certainly I
would not recommend doing so...)
---
target-arm/translate-a64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 80d2359..dac2f63 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -2107,7 +2107,7 @@ static void disas_ldst_reg_imm9(DisasContext *s,
uint32_t insn)
}
} else {
TCGv_i64 tcg_rt = cpu_reg(s, rt);
-int memidx = is_unpriv ? 1 : get_mem_index(s);
+int memidx = is_unpriv ? MMU_USER_IDX : get_mem_index(s);
if (is_store) {
do_gpr_st_memidx(s, tcg_rt, tcg_addr, size, memidx);
--
1.9.1
Reviewed-by: Greg Bellows greg.bell...@linaro.org
[Qemu-devel] [PATCH V3 0/4] kvm_stat update
This is the third version of kvm_stat patches. Please review. NOTE: I have tested these patches on ARM64 and x86_64 machines. For PPC, the only area been affected is ioctl RESET number (patch 4). Unfortunately I don't have PPC hardware to test them. Thanks, -Wei V3: - fix a comment in patch #4 V2: - fix a typo in VMX exit reason (pointed out by Paolo) - add ioctl RESET function to initialize counters - re-arrange the order of patches V1: - support for ARM aarch64 - update to the latest exit reasons (vmx, svm and userspace) - print errno when syscall fails Wei Huang (4): kvm_stat: Update exit reasons to the latest defintion kvm_stat: Print errno when syscall to perf_event_open() fails kvm_stat: Add aarch64 support kvm_stat: Add RESET support for perf event ioctl scripts/kvm/kvm_stat | 24 +++- 1 file changed, 23 insertions(+), 1 deletion(-) -- 1.8.3.1
[Qemu-devel] [Bug 1414222] Re: qemu-system-i386: -vnc localhost:0, to=99, id=default: Invalid parameter 'to'
-vnc 127.0.0.1:0,to=99 is used by Xen -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1414222 Title: qemu-system-i386: -vnc localhost:0,to=99,id=default: Invalid parameter 'to' Status in QEMU: New Bug description: git bisect points to: 4db14629c38611061fc19ec6927405923de84f08 is the first bad commit commit 4db14629c38611061fc19ec6927405923de84f08 Author: Gerd Hoffmann kra...@redhat.com Date: Tue Sep 16 12:33:03 2014 +0200 vnc: switch to QemuOpts, allow multiple servers This patch switches vnc over to QemuOpts, and it (more or less as side effect) allows multiple vnc server instances. Signed-off-by: Gerd Hoffmann kra...@redhat.com :04 04 70020c79b463eaff4b91c8c7f985240d1d1914f0 354a3a125e7b82a1699ce4e0cfc5055662bd3466 M include :100644 100644 0b4f131936052ed6062ba4b2b9434da0c2cce959 963305c26917a930f37d916df66b319d6558d281 M qmp.c :04 04 e7933d52124ae48100893eed8e14cbe46f80b936 30fa5966f5c8362d6db6730a7091bbde7780d4d8 M ui :100644 100644 9fb32c13df1c14daf8304184c6503d16bff7afce 983259bc9f7064b446da358a316a31a31731a223 M vl.c To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1414222/+subscriptions
[Qemu-devel] [Bug 1414222] [NEW] qemu-system-i386: -vnc localhost:0, to=99, id=default: Invalid parameter 'to'
Public bug reported: git bisect points to: 4db14629c38611061fc19ec6927405923de84f08 is the first bad commit commit 4db14629c38611061fc19ec6927405923de84f08 Author: Gerd Hoffmann kra...@redhat.com Date: Tue Sep 16 12:33:03 2014 +0200 vnc: switch to QemuOpts, allow multiple servers This patch switches vnc over to QemuOpts, and it (more or less as side effect) allows multiple vnc server instances. Signed-off-by: Gerd Hoffmann kra...@redhat.com :04 04 70020c79b463eaff4b91c8c7f985240d1d1914f0 354a3a125e7b82a1699ce4e0cfc5055662bd3466 M include :100644 100644 0b4f131936052ed6062ba4b2b9434da0c2cce959 963305c26917a930f37d916df66b319d6558d281 M qmp.c :04 04 e7933d52124ae48100893eed8e14cbe46f80b936 30fa5966f5c8362d6db6730a7091bbde7780d4d8 M ui :100644 100644 9fb32c13df1c14daf8304184c6503d16bff7afce 983259bc9f7064b446da358a316a31a31731a223 M vl.c ** Affects: qemu Importance: Undecided Status: New ** Description changed: - git-bisect pints to: + git-bisect points to: 4db14629c38611061fc19ec6927405923de84f08 is the first bad commit commit 4db14629c38611061fc19ec6927405923de84f08 Author: Gerd Hoffmann kra...@redhat.com Date: Tue Sep 16 12:33:03 2014 +0200 - vnc: switch to QemuOpts, allow multiple servers - - This patch switches vnc over to QemuOpts, and it (more or less - as side effect) allows multiple vnc server instances. - - Signed-off-by: Gerd Hoffmann kra...@redhat.com + vnc: switch to QemuOpts, allow multiple servers + + This patch switches vnc over to QemuOpts, and it (more or less + as side effect) allows multiple vnc server instances. + + Signed-off-by: Gerd Hoffmann kra...@redhat.com :04 04 70020c79b463eaff4b91c8c7f985240d1d1914f0 354a3a125e7b82a1699ce4e0cfc5055662bd3466 M include :100644 100644 0b4f131936052ed6062ba4b2b9434da0c2cce959 963305c26917a930f37d916df66b319d6558d281 M qmp.c :04 04 e7933d52124ae48100893eed8e14cbe46f80b936 30fa5966f5c8362d6db6730a7091bbde7780d4d8 M ui :100644 100644 9fb32c13df1c14daf8304184c6503d16bff7afce 983259bc9f7064b446da358a316a31a31731a223 M vl.c ** Description changed: - git-bisect points to: + git bisect points to: 4db14629c38611061fc19ec6927405923de84f08 is the first bad commit commit 4db14629c38611061fc19ec6927405923de84f08 Author: Gerd Hoffmann kra...@redhat.com Date: Tue Sep 16 12:33:03 2014 +0200 vnc: switch to QemuOpts, allow multiple servers This patch switches vnc over to QemuOpts, and it (more or less as side effect) allows multiple vnc server instances. Signed-off-by: Gerd Hoffmann kra...@redhat.com :04 04 70020c79b463eaff4b91c8c7f985240d1d1914f0 354a3a125e7b82a1699ce4e0cfc5055662bd3466 M include :100644 100644 0b4f131936052ed6062ba4b2b9434da0c2cce959 963305c26917a930f37d916df66b319d6558d281 M qmp.c :04 04 e7933d52124ae48100893eed8e14cbe46f80b936 30fa5966f5c8362d6db6730a7091bbde7780d4d8 M ui :100644 100644 9fb32c13df1c14daf8304184c6503d16bff7afce 983259bc9f7064b446da358a316a31a31731a223 M vl.c -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1414222 Title: qemu-system-i386: -vnc localhost:0,to=99,id=default: Invalid parameter 'to' Status in QEMU: New Bug description: git bisect points to: 4db14629c38611061fc19ec6927405923de84f08 is the first bad commit commit 4db14629c38611061fc19ec6927405923de84f08 Author: Gerd Hoffmann kra...@redhat.com Date: Tue Sep 16 12:33:03 2014 +0200 vnc: switch to QemuOpts, allow multiple servers This patch switches vnc over to QemuOpts, and it (more or less as side effect) allows multiple vnc server instances. Signed-off-by: Gerd Hoffmann kra...@redhat.com :04 04 70020c79b463eaff4b91c8c7f985240d1d1914f0 354a3a125e7b82a1699ce4e0cfc5055662bd3466 M include :100644 100644 0b4f131936052ed6062ba4b2b9434da0c2cce959 963305c26917a930f37d916df66b319d6558d281 M qmp.c :04 04 e7933d52124ae48100893eed8e14cbe46f80b936 30fa5966f5c8362d6db6730a7091bbde7780d4d8 M ui :100644 100644 9fb32c13df1c14daf8304184c6503d16bff7afce 983259bc9f7064b446da358a316a31a31731a223 M vl.c To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/1414222/+subscriptions
Re: [Qemu-devel] qemu-coroutine.c: error: thread-local storage not supported for this target
On 23/01/2015 21:39, Programmingkid wrote: On 23/01/2015 20:27, Programmingkid wrote: I used the newest version from QEMU's git with this id: a46b3aaf6bb038d4f6f192a84df204f10929e75c. When I tried to compile QEMU on Mac OS 10.6.8, I saw this error: qemu-coroutine.c:29: error: thread-local storage not supported for this target. GCC 4.2.1. Use clang then. Paolo
Re: [Qemu-devel] [PATCH V2 0/4] kvm_stat update
Sorry, please ignore this version. -Wei On 01/23/2015 02:44 PM, Wei Huang wrote: This is the second version of kvm_stat patches. Please review. NOTE: I have tested these patches on ARM64 and x86_64 machines. For PPC, the only area been affected is ioctl RESET number (patch 4). Unfortunately I don't have PPC hardware to test them. Thanks, -Wei V2: - fix a typo in VMX exit reason (pointed out by Paolo) - add ioctl RESET function to initialize counters - re-arrange the order of patches V1: - support for ARM aarch64 - update to the latest exit reasons (vmx, svm and userspace) - print errno when syscall fails Wei Huang (4): kvm_stat: Update exit reasons to the latest defintion kvm_stat: Print errno when syscall to perf_event_open() fails kvm_stat: Add aarch64 support kvm_stat: Add RESET support for perf event ioctl scripts/kvm/kvm_stat | 24 +++- 1 file changed, 23 insertions(+), 1 deletion(-)
[Qemu-devel] [PATCH V3 1/4] kvm_stat: Update exit reasons to the latest defintion
This patch updates the exit reasons for x86_vmx, x86_svm, and userspace
to the latest definition.
Signed-off-by: Wei Huang w...@redhat.com
---
scripts/kvm/kvm_stat | 4
1 file changed, 4 insertions(+)
diff --git a/scripts/kvm/kvm_stat b/scripts/kvm/kvm_stat
index 7b1437c..7ec84c0 100755
--- a/scripts/kvm/kvm_stat
+++ b/scripts/kvm/kvm_stat
@@ -65,6 +65,8 @@ vmx_exit_reasons = {
49: 'EPT_MISCONFIG',
54: 'WBINVD',
55: 'XSETBV',
+56: 'APIC_WRITE',
+58: 'INVPCID',
}
svm_exit_reasons = {
@@ -138,6 +140,7 @@ svm_exit_reasons = {
0x08a: 'MONITOR',
0x08b: 'MWAIT',
0x08c: 'MWAIT_COND',
+0x08d: 'XSETBV',
0x400: 'NPF',
}
@@ -167,6 +170,7 @@ userspace_exit_reasons = {
21: 'WATCHDOG',
22: 'S390_TSCH',
23: 'EPR',
+24: 'SYSTEM_EVENT',
}
x86_exit_reasons = {
--
1.8.3.1
Re: [Qemu-devel] qemu-coroutine.c: error: thread-local storage not supported for this target
On 23/01/2015 22:33, Programmingkid wrote: Use clang then. Could you provide directions on how you want me to do this? In the configure options, this was all I found: --objcc=OBJCCuse Objective-C compiler OBJCC [clang] ./configure --cc=clang --cxx=clang++ But QEMU uses cc and c++ by default, not gcc and g++, and on Mac OS X cc and c++ should be clang. So ./configure should just work. Paolo
Re: [Qemu-devel] qemu-coroutine.c: error: thread-local storage not supported for this target
On Jan 23, 2015, at 4:48 PM, Paolo Bonzini wrote: On 23/01/2015 22:37, Paolo Bonzini wrote: On 23/01/2015 22:33, Programmingkid wrote: Use clang then. Could you provide directions on how you want me to do this? In the configure options, this was all I found: --objcc=OBJCCuse Objective-C compiler OBJCC [clang] ./configure --cc=clang --cxx=clang++ But QEMU uses cc and c++ by default, not gcc and g++, and on Mac OS X cc and c++ should be clang. So ./configure should just work. Sorry, I was wrong. I missed that you are using 10.6.x. Thread-local storage was introduced on Mac OS X in 10.7. For 10.6.x you'll have to compile GCC 4.3 or newer yourself (or take it from fink/homebrew/whatever the Mac folks use these days). The code that causes this problem needs to be #ifdef'ed. I'm just not sure what the problem code is.
Re: [Qemu-devel] [PATCH 2/2] hw/ppc/spapr Add qemu_register_boot_set for SPAPR
On 23.01.15 23:51, dval...@suse.de wrote:
From: Dinar Valeev dval...@suse.com
In order to have -boot once=d functioning, it is required to have
qemu_register_boot_set
qemu-system-ppc64 -enable-kvm -boot once=d
Ready!
0 dev /chosen ok
0 .properties
...
qemu,boot-device d
...
0 reset-all
Ready!
0 dev /chosen ok
0 .properties
...
qemu,boot-device cdn
...
Signed-off-by: Dinar Valeev dval...@suse.com
---
hw/ppc/spapr.c | 12
1 file changed, 12 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 3d2cfa3..38b03fc 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -314,6 +314,16 @@ static void add_str(GString *s, const gchar *s1)
g_string_append_len(s, s1, strlen(s1) + 1);
}
+static void spapr_boot_set(void *opaque, const char *boot_device,
+ Error **errp)
+{
+int offset;
+offset = fdt_path_offset(opaque, /chosen);
+fdt_setprop_string(opaque, offset, qemu,boot-device, boot_device);
+
+}
+
+
static void *spapr_create_fdt_skel(hwaddr initrd_base,
hwaddr initrd_size,
hwaddr kernel_size,
@@ -414,6 +424,8 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base,
if (boot_device) {
_FDT((fdt_property_string(fdt, qemu,boot-device, boot_device)));
}
+qemu_register_boot_set(spapr_boot_set, fdt);
If you simply move the code above (the _FDT() one) from create_fdt_skel
to spapr_finalize_fdt() you should have the same net effect and much
cleaner code :).
Alex
+
if (boot_menu) {
_FDT((fdt_property_cell(fdt, qemu,boot-menu, boot_menu)));
}
[Qemu-devel] makefile help: giving QEMU an icon
I'm trying to make QEMU have an icon instead of the standard gray box icon it is given on Mac OS X. I figured out where to put the code in the makefile, but this location isn't useful. git is trained not to use it. The location is ./ppc-softmmu/makefile. My question is where do I put my icon setting code? It currently works in ./ppc-softmmu/makefile after this line: all: $(PROGS) stap all: $(PROGS) stap # Set the icon for QEMU on Macintosh ifdef CONFIG_DARWIN # Take an image and make the image its own icon: sips -i ../pc-bios/qemu-nsis.ico # Extract the icon to its own resource file: DeRez -only icns ../pc-bios/qemu-nsis.ico tmpicns.rsrc # append this resource to the file you want to icon-ize. Rez -append tmpicns.rsrc -o $(QEMU_PROG) # Use the resource to set the icon. SetFile -a C $(QEMU_PROG) # clean up. rm tmpicns.rsrc endif What I'm trying to do is have all targets receive the icon. For now I am trying the code out on the PowerPC target. Any hints would be appreciated.
Re: [Qemu-devel] [PATCH 2/3] kvm_stat: Update exit reasons to the latest defintion
Hi Paolo, I just sent out the second revision. You can cherry-pick the patch 04 if you have already queued my previous 3 patches. Thanks for your review. -Wei On 01/22/2015 09:23 AM, Wei Huang wrote: On 01/22/2015 06:56 AM, Paolo Bonzini wrote: On 21/01/2015 22:15, Wei Huang wrote: +56: 'ACPI_WRITE', APIC_WRITE. :) Will fix when committing. Gerr... thanks! -Wei Paolo +58: 'INVPCID', }
[Qemu-devel] [PATCH V2 2/4] kvm_stat: Print errno when syscall to perf_event_open() fails
kvm_stat uses syscall() to call perf_event_open(). If this function
call fails, the returned value is -1, which doesn't tell the details
of the failure (i.e. ENOSYS or EINVAL). This patch retrieves errno
and prints it when syscall() fails. The error message will look like
Exception: perf_event_open failed, errno = 38.
Signed-off-by: Wei Huang w...@redhat.com
---
scripts/kvm/kvm_stat | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/scripts/kvm/kvm_stat b/scripts/kvm/kvm_stat
index 7ec84c0..cb23877 100755
--- a/scripts/kvm/kvm_stat
+++ b/scripts/kvm/kvm_stat
@@ -13,6 +13,7 @@
import curses
import sys, os, time, optparse, ctypes
+from ctypes import *
class DebugfsProvider(object):
def __init__(self):
@@ -239,6 +240,9 @@ import struct, array
libc = ctypes.CDLL('libc.so.6')
syscall = libc.syscall
+get_errno = libc.__errno_location
+get_errno.restype = POINTER(c_int)
+
class perf_event_attr(ctypes.Structure):
_fields_ = [('type', ctypes.c_uint32),
('size', ctypes.c_uint32),
@@ -322,7 +326,8 @@ class Event(object):
group_leader = group.events[0].fd
fd = _perf_event_open(attr, -1, group.cpu, group_leader, 0)
if fd == -1:
-raise Exception('perf_event_open failed')
+err = get_errno()[0]
+raise Exception('perf_event_open failed, errno = ' + err.__str__())
if filter:
import fcntl
fcntl.ioctl(fd, ioctl_numbers['SET_FILTER'], filter)
--
1.8.3.1
Re: [Qemu-devel] [PATCH] linux-user/syscall.c: Fix typo issue for using target_vec[i].iov_len instead of target_vec[i].iov_base
On 1/23/15 21:55, Peter Maydell wrote: On 23 January 2015 at 14:01, Chen Gang S gang.c...@sunrus.com.cn wrote: What I shall do for tile qemu should obey the related license of qemu (all the related code should belong to qemu upstream). If necessary to follow some copyright working flow, please let me know, I shall follow. We don't have a copyright assignment process. I recommend reading http://wiki.qemu.org/Contribute/SubmitAPatch if you haven't already. OK, thank. I assume (or declare): - The code what I write for qemu are all provided by myself (personal), not by any companies or any organizations (no one pay for it). - The documents which I have get are all free (e.g. tile architecture related pdf files), I can reference them freely for development. - If the related code what I have provided are integrated into qemu upstream, qemu upstream have the full right for it (follow with qemu upstream own copyright). I send the mail from my company email address, the reason is gmail is broken in China, my gmail can not be used, so I have to use my another email address in these days (but my gmail is still for Signed-of-by). Welcome any suggestions and completions by any members or organizations. Thanks. -- Chen Gang Open, share, and attitude like air, water, and life which God blessed
Re: [Qemu-devel] [PATCH 02/11] target-arm: Make arm_current_el() return sensible values for M profile
On Fri, Jan 23, 2015 at 12:20 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
Although M profile doesn't have the same concept of exception level
as A profile, it does have a notion of privileged versus not, which
we currently track in the privmode TB flag. Support returning this
information if arm_current_el() is called on an M profile core, so
that we can identify the correct MMU index to use (and put the MMU
index in the TB flags) without having to special-case M profile.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
target-arm/cpu.h | 4
1 file changed, 4 insertions(+)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index cd7a9e8..3eb00f4 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1211,6 +1211,10 @@ static inline bool cptype_valid(int cptype)
*/
static inline int arm_current_el(CPUARMState *env)
{
+if (arm_feature(env, ARM_FEATURE_M)) {
+return !((env-v7m.exception == 0) (env-v7m.control 1));
+}
+
if (is_a64(env)) {
return extract32(env-pstate, 2, 2);
}
--
1.9.1
Reviewed-by: Greg Bellows greg.bell...@linaro.org
Re: [Qemu-devel] [PATCH 1/2] hw/ppc/spapr.c Set default boot order
On 23.01.15 23:51, dval...@suse.de wrote: From: Dinar Valeev dval...@suse.com In order to use -boot once=X option we need to have default list where restore to on reset. Signed-off-by: Dinar Valeev dval...@suse.com Alexey, Nijunj, where is the default boot order stored usually? Is cdn an accurate equivalent? Alex --- hw/ppc/spapr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index b560459..3d2cfa3 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1733,7 +1733,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data) mc-block_default_type = IF_SCSI; mc-max_cpus = MAX_CPUS; mc-no_parallel = 1; -mc-default_boot_order = NULL; +mc-default_boot_order = cdn; mc-kvm_type = spapr_kvm_type; mc-has_dynamic_sysbus = true;
[Qemu-devel] [PATCH V3 2/4] kvm_stat: Print errno when syscall to perf_event_open() fails
kvm_stat uses syscall() to call perf_event_open(). If this function
call fails, the returned value is -1, which doesn't tell the details
of the failure (i.e. ENOSYS or EINVAL). This patch retrieves errno
and prints it when syscall() fails. The error message will look like
Exception: perf_event_open failed, errno = 38.
Signed-off-by: Wei Huang w...@redhat.com
---
scripts/kvm/kvm_stat | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/scripts/kvm/kvm_stat b/scripts/kvm/kvm_stat
index 7ec84c0..cb23877 100755
--- a/scripts/kvm/kvm_stat
+++ b/scripts/kvm/kvm_stat
@@ -13,6 +13,7 @@
import curses
import sys, os, time, optparse, ctypes
+from ctypes import *
class DebugfsProvider(object):
def __init__(self):
@@ -239,6 +240,9 @@ import struct, array
libc = ctypes.CDLL('libc.so.6')
syscall = libc.syscall
+get_errno = libc.__errno_location
+get_errno.restype = POINTER(c_int)
+
class perf_event_attr(ctypes.Structure):
_fields_ = [('type', ctypes.c_uint32),
('size', ctypes.c_uint32),
@@ -322,7 +326,8 @@ class Event(object):
group_leader = group.events[0].fd
fd = _perf_event_open(attr, -1, group.cpu, group_leader, 0)
if fd == -1:
-raise Exception('perf_event_open failed')
+err = get_errno()[0]
+raise Exception('perf_event_open failed, errno = ' + err.__str__())
if filter:
import fcntl
fcntl.ioctl(fd, ioctl_numbers['SET_FILTER'], filter)
--
1.8.3.1
Re: [Qemu-devel] qemu-coroutine.c: error: thread-local storage not supported for this target
On Jan 23, 2015, at 3:55 PM, Paolo Bonzini wrote: On 23/01/2015 21:39, Programmingkid wrote: On 23/01/2015 20:27, Programmingkid wrote: I used the newest version from QEMU's git with this id: a46b3aaf6bb038d4f6f192a84df204f10929e75c. When I tried to compile QEMU on Mac OS 10.6.8, I saw this error: qemu-coroutine.c:29: error: thread-local storage not supported for this target. GCC 4.2.1. Use clang then. Paolo Could you provide directions on how you want me to do this? In the configure options, this was all I found: --objcc=OBJCCuse Objective-C compiler OBJCC [clang]
Re: [Qemu-devel] [PATCH 04/11] target-arm: Define correct mmu_idx values and pass them in TB flags
On Fri, Jan 23, 2015 at 12:20 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
We currently claim that for ARM the mmu_idx should simply be the current
exception level. However this isn't actually correct -- secure EL0 and EL1
should have separate indexes from non-secure EL0 and EL1 since their
VA-PA mappings may differ. We also will want an index for stage 2
translations when we properly support EL2.
Define and document all seven mmu index values that we require, and
pass the mmu index in the TB flags rather than exception level or
priv/user bit.
This change doesn't update the get_phys_addr() code, so our page
table walking still assumes a simplistic user or priv? model for
the moment.
Signed-off-by: Peter Maydell peter.mayd...@linaro.org
---
This leaves some odd gaps in the TB flags usage. I will circle
back and clean this up later (including moving the other common
flags like the singlestep ones to the top of the flags word),
but I didn't want to bloat this patchseries further.
---
target-arm/cpu.h | 113
-
target-arm/helper.c| 3 +-
target-arm/translate-a64.c | 5 +-
target-arm/translate.c | 5 +-
target-arm/translate.h | 3 +-
5 files changed, 101 insertions(+), 28 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 3eb00f4..cf7b9ab 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -98,7 +98,7 @@ typedef uint32_t ARMReadCPFunc(void *opaque, int cp_info,
struct arm_boot_info;
-#define NB_MMU_MODES 4
+#define NB_MMU_MODES 7
/* We currently assume float and double are IEEE single and double
precision respectively.
@@ -1572,13 +1572,92 @@ static inline CPUARMState *cpu_init(const char
*cpu_model)
#define cpu_signal_handler cpu_arm_signal_handler
#define cpu_list arm_cpu_list
-/* MMU modes definitions */
+/* ARM has the following translation regimes (as the ARM ARM calls them):
+ *
+ * If EL3 is 64-bit:
+ * + NonSecure EL1 0 stage 1
+ * + NonSecure EL1 0 stage 2
+ * + NonSecure EL2
+ * + Secure EL1 EL0
+ * + Secure EL3
+ * If EL3 is 32-bit:
+ * + NonSecure PL1 0 stage 1
+ * + NonSecure PL1 0 stage 2
+ * + NonSecure PL2
+ * + Secure PL0 PL1
+ * (reminder: for 32 bit EL3, Secure PL1 is *EL3*, not EL1.)
+ *
+ * For QEMU, an mmu_idx is not quite the same as a translation regime
because:
+ * 1. we need to split the EL1 0 regimes into two mmu_idxes, because
they
+ * may differ in access permissions even if the VA-PA map is the same
+ * 2. we want to cache in our TLB the full VA-IPA-PA lookup for a stage
1+2
+ * translation, which means that we have one mmu_idx that deals with two
+ * concatenated translation regimes [this sort of combined s1+2 TLB is
+ * architecturally permitted]
+ * 3. we don't need to allocate an mmu_idx to translations that we won't be
+ * handling via the TLB. The only way to do a stage 1 translation without
+ * the immediate stage 2 translation is via the ATS or AT system insns,
+ * which can be slow-pathed and always do a page table walk.
+ * 4. we can also safely fold together the 32 bit EL3 and 64 bit EL3
+ * translation regimes, because they map reasonably well to each other
+ * and they can't both be active at the same time.
+ * This gives us the following list of mmu_idx values:
+ *
+ * NS EL0 (aka NS PL0) stage 1+2
+ * NS EL1 (aka NS PL1) stage 1+2
+ * NS EL2 (aka NS PL2)
+ * S EL3 (aka S PL1)
+ * S EL0 (aka S PL0)
+ * S EL1 (not used if EL3 is 32 bit)
+ * NS EL0+1 stage 2
+ *
+ * (The last of these is an mmu_idx because we want to be able to use the TLB
+ * for the accesses done as part of a stage 1 page table walk, rather than
+ * having to walk the stage 2 page table over and over.)
+ *
+ * Our enumeration includes at the end some entries which are not true
+ * mmu_idx values in that they don't have corresponding TLBs and are only
+ * valid for doing slow path page table walks.
+ *
+ * The constant names here are patterned after the general style of the names
+ * of the AT/ATS operations.
+ * The values used are carefully arranged to make mmu_idx = EL lookup easy.
+ */
+typedef enum ARMMMUIdx {
+ARMMMUIdx_S12NSE0 = 0,
+ARMMMUIdx_S12NSE1 = 1,
+ARMMMUIdx_S1E2 = 2,
+ARMMMUIdx_S1E3 = 3,
+ARMMMUIdx_S1SE0 = 4,
+ARMMMUIdx_S1SE1 = 5,
+ARMMMUIdx_S2NS = 6,
+/* Indexes below here don't have TLBs and are used only for AT system
+ * instructions or for the first stage of an S12 page table walk.
+ */
+ARMMMUIdx_S1NSE0 = 7,
+ARMMMUIdx_S1NSE1 = 8,
+} ARMMMUIdx;
+
#define MMU_MODE0_SUFFIX _user
#define MMU_MODE1_SUFFIX _kernel
#define MMU_USER_IDX 0
+
+/* Return the exception level we're running at if this is our mmu_idx */
+static inline int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx)
+{
+assert(mmu_idx ARMMMUIdx_S2NS);
+return mmu_idx 3;
+}
+
+/*
[Qemu-devel] [PATCH V3 4/4] kvm_stat: Add RESET support for perf event ioctl
While running kvm_stat using tracepoint on ARM64 hardware (e.g. kvm_stat
-1 -t), the initial values of some kvm_userspace_exit counters were found
to be very suspecious. For instance the tracing tool showed that S390_TSCH
was called many times on ARM64 machine, which apparently was wrong.
This patch adds RESET ioctl support for perf monitoring. Before calling
ioctl to enable a perf event, this patch resets the counter first. With
this patch, the init counter values become correct on ARM64 hardware.
Example:
before patch
kvm_userspace_exit(S390_SIEIC) 1426 0
kvm_userspace_exit(S390_TSCH) 339 0
after patch
kvm_userspace_exit(S390_SIEIC) 0 0
kvm_userspace_exit(S390_TSCH) 0 0
Signed-off-by: Wei Huang w...@redhat.com
---
scripts/kvm/kvm_stat | 5 +
1 file changed, 5 insertions(+)
diff --git a/scripts/kvm/kvm_stat b/scripts/kvm/kvm_stat
index 8f6f007..f927e97 100755
--- a/scripts/kvm/kvm_stat
+++ b/scripts/kvm/kvm_stat
@@ -186,6 +186,7 @@ ioctl_numbers = {
'SET_FILTER' : 0x40082406,
'ENABLE' : 0x2400,
'DISABLE': 0x2401,
+'RESET' : 0x2403,
}
def x86_init(flag):
@@ -346,6 +347,9 @@ class Event(object):
def disable(self):
import fcntl
fcntl.ioctl(self.fd, ioctl_numbers['DISABLE'], 0)
+def reset(self):
+import fcntl
+fcntl.ioctl(self.fd, ioctl_numbers['RESET'], 0)
class TracepointProvider(object):
def __init__(self):
@@ -405,7 +409,7 @@ class TracepointProvider(object):
for group in self.group_leaders:
for event in group.events:
if event.name in fields:
+event.reset()
event.enable()
else:
event.disable()
--
1.8.3.1
[Qemu-devel] [PATCH V3 3/4] kvm_stat: Add aarch64 support
This patch enables aarch64 support for kvm_stat. The platform detection
is based on OS uname.
Signed-off-by: Wei Huang w...@redhat.com
---
scripts/kvm/kvm_stat | 8
1 file changed, 8 insertions(+)
diff --git a/scripts/kvm/kvm_stat b/scripts/kvm/kvm_stat
index cb23877..8f6f007 100755
--- a/scripts/kvm/kvm_stat
+++ b/scripts/kvm/kvm_stat
@@ -209,10 +209,18 @@ def ppc_init():
}
})
+def aarch64_init():
+globals().update({
+'sc_perf_evt_open' : 241
+})
+
def detect_platform():
if os.uname()[4].startswith('ppc'):
ppc_init()
return
+elif os.uname()[4].startswith('aarch64'):
+aarch64_init()
+return
for line in file('/proc/cpuinfo').readlines():
if line.startswith('flags'):
--
1.8.3.1
Re: [Qemu-devel] qemu-coroutine.c: error: thread-local storage not supported for this target
On 23/01/2015 22:37, Paolo Bonzini wrote: On 23/01/2015 22:33, Programmingkid wrote: Use clang then. Could you provide directions on how you want me to do this? In the configure options, this was all I found: --objcc=OBJCCuse Objective-C compiler OBJCC [clang] ./configure --cc=clang --cxx=clang++ But QEMU uses cc and c++ by default, not gcc and g++, and on Mac OS X cc and c++ should be clang. So ./configure should just work. Sorry, I was wrong. I missed that you are using 10.6.x. Thread-local storage was introduced on Mac OS X in 10.7. For 10.6.x you'll have to compile GCC 4.3 or newer yourself (or take it from fink/homebrew/whatever the Mac folks use these days). Paolo
[Qemu-devel] [PATCH 1/2] hw/ppc/spapr.c Set default boot order
From: Dinar Valeev dval...@suse.com In order to use -boot once=X option we need to have default list where restore to on reset. Signed-off-by: Dinar Valeev dval...@suse.com --- hw/ppc/spapr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index b560459..3d2cfa3 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1733,7 +1733,7 @@ static void spapr_machine_class_init(ObjectClass *oc, void *data) mc-block_default_type = IF_SCSI; mc-max_cpus = MAX_CPUS; mc-no_parallel = 1; -mc-default_boot_order = NULL; +mc-default_boot_order = cdn; mc-kvm_type = spapr_kvm_type; mc-has_dynamic_sysbus = true; -- 2.1.2
[Qemu-devel] [PATCH 2/2] hw/ppc/spapr Add qemu_register_boot_set for SPAPR
From: Dinar Valeev dval...@suse.com
In order to have -boot once=d functioning, it is required to have
qemu_register_boot_set
qemu-system-ppc64 -enable-kvm -boot once=d
Ready!
0 dev /chosen ok
0 .properties
...
qemu,boot-device d
...
0 reset-all
Ready!
0 dev /chosen ok
0 .properties
...
qemu,boot-device cdn
...
Signed-off-by: Dinar Valeev dval...@suse.com
---
hw/ppc/spapr.c | 12
1 file changed, 12 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 3d2cfa3..38b03fc 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -314,6 +314,16 @@ static void add_str(GString *s, const gchar *s1)
g_string_append_len(s, s1, strlen(s1) + 1);
}
+static void spapr_boot_set(void *opaque, const char *boot_device,
+ Error **errp)
+{
+int offset;
+offset = fdt_path_offset(opaque, /chosen);
+fdt_setprop_string(opaque, offset, qemu,boot-device, boot_device);
+
+}
+
+
static void *spapr_create_fdt_skel(hwaddr initrd_base,
hwaddr initrd_size,
hwaddr kernel_size,
@@ -414,6 +424,8 @@ static void *spapr_create_fdt_skel(hwaddr initrd_base,
if (boot_device) {
_FDT((fdt_property_string(fdt, qemu,boot-device, boot_device)));
}
+qemu_register_boot_set(spapr_boot_set, fdt);
+
if (boot_menu) {
_FDT((fdt_property_cell(fdt, qemu,boot-menu, boot_menu)));
}
--
2.1.2
[Qemu-devel] [RfC PATCH] virtio-pci: place msix regions in modern virtio bar
Only for legacy-free virtio devices, to avoid unpleasent
surprises with old drivers.
mtree snippet:
fea0-fea7 (prio 1, RW): virtio-pci
fea0-fea00fff (prio 0, RW): virtio-pci-common
fea01000-fea01fff (prio 0, RW): virtio-pci-isr
fea02000-fea02fff (prio 0, RW): virtio-pci-device
fea03000-fea42fff (prio 0, RW): virtio-pci-notify
fea7e000-fea7e02f (prio 0, RW): msix-table
fea7f000-fea7f007 (prio 0, RW): msix-pba
Applies on top of mst's virtio-1.0 branch, plus my three virtio-pci
patches posted to the list yesterday.
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
hw/virtio/virtio-pci.c | 39 +++
1 file changed, 27 insertions(+), 12 deletions(-)
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index ba1405f..934ca7a 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1235,7 +1235,7 @@ static void virtio_pci_device_plugged(DeviceState *d)
bool modern = !(proxy-flags VIRTIO_PCI_FLAG_DISABLE_MODERN);
int modern_mem_bar;
uint8_t *config;
-uint32_t size;
+uint32_t modern_mem_size, legacy_io_size;
config = proxy-pci_dev.config;
if (proxy-class_code) {
@@ -1339,9 +1339,10 @@ static void virtio_pci_device_plugged(DeviceState *d)
virtio_pci_add_mem_cap(proxy, notify.cap);
virtio_add_feature(proxy-host_features, VIRTIO_F_VERSION_1);
+modern_mem_size = 2 * QEMU_VIRTIO_PCI_QUEUE_MEM_MULT *
+VIRTIO_PCI_QUEUE_MAX;
memory_region_init(proxy-modern_bar, OBJECT(proxy), virtio-pci,
- 2 * QEMU_VIRTIO_PCI_QUEUE_MEM_MULT *
- VIRTIO_PCI_QUEUE_MAX);
+ modern_mem_size);
memory_region_init_io(proxy-common, OBJECT(proxy),
common_ops,
proxy,
@@ -1369,25 +1370,39 @@ static void virtio_pci_device_plugged(DeviceState *d)
proxy-modern_bar);
}
-if (proxy-nvectors
-msix_init_exclusive_bar(proxy-pci_dev, proxy-nvectors, 1)) {
-error_report(unable to init msix vectors to % PRIu32,
- proxy-nvectors);
-proxy-nvectors = 0;
+if (proxy-nvectors) {
+if (modern modern_mem_bar == 0) {
+if (msix_init(proxy-pci_dev, proxy-nvectors,
+ proxy-modern_bar, modern_mem_bar,
+ modern_mem_size - 0x2000,
+ proxy-modern_bar, modern_mem_bar,
+ modern_mem_size - 0x1000,
+ 0x90)) {
+error_report(unable to init msix vectors to % PRIu32,
+ proxy-nvectors);
+proxy-nvectors = 0;
+}
+} else {
+if (msix_init_exclusive_bar(proxy-pci_dev, proxy-nvectors, 1)) {
+error_report(unable to init msix vectors to % PRIu32,
+ proxy-nvectors);
+proxy-nvectors = 0;
+}
+}
}
proxy-pci_dev.config_write = virtio_write_config;
if (legacy) {
-size = VIRTIO_PCI_REGION_SIZE(proxy-pci_dev)
+legacy_io_size = VIRTIO_PCI_REGION_SIZE(proxy-pci_dev)
+ virtio_bus_get_vdev_config_len(bus);
-if (size (size - 1)) {
-size = 1 qemu_fls(size);
+if (legacy_io_size (legacy_io_size - 1)) {
+legacy_io_size = 1 qemu_fls(legacy_io_size);
}
memory_region_init_io(proxy-bar, OBJECT(proxy),
virtio_pci_config_ops,
- proxy, virtio-pci, size);
+ proxy, virtio-pci, legacy_io_size);
pci_register_bar(proxy-pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO,
proxy-bar);
--
1.8.3.1
Re: [Qemu-devel] [PATCH] Bug fix: delete the reader entry after queueing an event, not before.
On 23/01/2015 14:27, Gerd Hoffmann wrote: Hi, Reviewed-by: Marc-André Lureau marcandre.lur...@redhat.com Gerd, are you maintaining libcacard nowadays? If so, can you add an entry to MAINTAINERS? (And if not, perhaps Marc-André could maintain it...) Well, I know next to nothing about libcacard, and I'd very much prefer if someone who knows this better that me maintains it, especially as this is security-sensitive stuff. The best I could do would be Odd Fixes mode for libcacard, i.e. collect patches from the list, glace over for obviously broken bits, do a pull request now and then ... Jeremy is obviously doing more than odd fixes though! Paolo
Re: [Qemu-devel] [PATCH v2 06/47] acpi: add acpi_name() acpi_name_decl() term
On Fri, 23 Jan 2015 10:59:48 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Thu, Jan 22, 2015 at 02:49:50PM +, Igor Mammedov wrote:
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/acpi/acpi-build-utils.c | 24
include/hw/acpi/acpi-build-utils.h | 3 +++
2 files changed, 27 insertions(+)
diff --git a/hw/acpi/acpi-build-utils.c b/hw/acpi/acpi-build-utils.c
index 40a1769..1bda2ec 100644
--- a/hw/acpi/acpi-build-utils.c
+++ b/hw/acpi/acpi-build-utils.c
@@ -314,6 +314,30 @@ static AcpiAml aml_allocate_internal(uint8_t op,
AcpiBlockFlags flags)
return var;
}
+/*
+ * help to construct NameString, which return AcpiAml object
+ * for using with other aml_append or other acpi_* terms
Here and elsewhere: I can't parse this header text.
I'm guessing you just mean construct NameString,
and that's it?
yes
Also, most other places use build_append_namestring -
so when should acpi_name be used instead?
This should be made clear here in the comment.
acpi_name() is a replacement/wrapper around build_append_namestring()
which returns AcpiAml object. build_append_namestring() is a nonpublic
lowlevel helper that deals with GArray,
while acpi_name() follows semantic of AML API.
+ */
+AcpiAml GCC_FMT_ATTR(1, 2) acpi_name(const char *name_format, ...)
+{
This isn't really a name. It just appends a string. So rename this
acpi_string and then the below one adding a name can be named acpi_name?
acpi_string is introduced in 27/47, which is a prefixed string
as described in spec.
Also, in many places one must use only one nameseg.
Where is it exactly?
Perhaps we could build in acpi_name() a check if we know in
what context enforce it. Better to have single/uniform API
for names than a several which is confusing.
I think a separate api that actually validates
that it's one segment is better than silently failing.
Do we ever use it for more than 1 segment?
Yes we use names with more than one segment.
If not, maybe the right thing to do is
to use build_append_nameseg and call this one acpi_nameseg.
acpi_name() is used only for passing name as arguments to methods,
in spec there isn't a limitation to only one segment when it comes
to names, in ASL part of it. namesegment however only AML construct
which helps to build name, I prefer not expose lowlevel AML
unless we have to.
+va_list ap;
+AcpiAml var = aml_allocate_internal(0, NON_BLOCK);
0 hard coded? What does it mean?
1st arg for NON_BLOCK context doesn't mean anything/ignored.
alternatively I can make aml_allocate_nonblock() wrapper
around generic allocator.
Same elsewhere.
+va_start(ap, name_format);
+build_append_namestringv(var.buf, name_format, ap);
+va_end(ap);
+return var;
+
+/* ACPI 5.0: 20.2.5.1 Namespace Modifier Objects Encoding: DefName */
Let's quote the earliest spec which documents each object:
one year from now 5.0 will not be the latest.
Applies here and elsewhere.
In most places this will be 1.0b.
Where the construct is newer, this will automatically
document which guests support it.
I'll try to do it.
+AcpiAml acpi_name_decl(const char *name, AcpiAml val)
+{
+AcpiAml var = aml_allocate_internal(0, NON_BLOCK);
+build_append_byte(var.buf, 0x08);
Pls add comment documenting what 0x08 is here.
sure
+build_append_namestring(var.buf, %s, name);
+aml_append(var, val);
+return var;
+}
+
/* ACPI 5.0: 20.2.5.3 Type 1 Opcodes Encoding: DefIfElse */
AcpiAml acpi_if(AcpiAml predicate)
{
diff --git a/include/hw/acpi/acpi-build-utils.h
b/include/hw/acpi/acpi-build-utils.h
index 177f9ed..868cfa5 100644
--- a/include/hw/acpi/acpi-build-utils.h
+++ b/include/hw/acpi/acpi-build-utils.h
@@ -21,6 +21,9 @@ typedef struct AcpiAml {
void aml_append(AcpiAml *parent_ctx, AcpiAml child);
+/* non block ASL object primitives */
what does it mean that it's a non block primitive?
I didn't find this concept in the spec.
As for a question what is NON_BLOCK, it's for simple inline ASL
construct that doesn't have to be packaged in special way
examles:
Store(A,B)
Name(FOO, VAL)
IO(...)
while there are different block elements differing in how
they are created see 1/47 aml_append():
ResourceTemplate {
/* block of other ASL items */
}
Package() {
/* block of other ASL items */
}
if ... else ...
Scope() {
/* block of other ASL items */
}
and so on.
+AcpiAml GCC_FMT_ATTR(1, 2) acpi_name(const char *name_format, ...);
+AcpiAml acpi_name_decl(const char *name, AcpiAml val);
/* Block ASL object primitives */
AcpiAml acpi_if(AcpiAml predicate);
AcpiAml acpi_method(const char *name, int arg_count);
--
1.8.3.1
Re: [Qemu-devel] [RfC PATCH] virtio-pci: place msix regions in modern virtio bar
On Fri, Jan 23, 2015 at 01:29:43PM +0100, Gerd Hoffmann wrote:
Only for legacy-free virtio devices, to avoid unpleasent
surprises with old drivers.
mtree snippet:
fea0-fea7 (prio 1, RW): virtio-pci
fea0-fea00fff (prio 0, RW): virtio-pci-common
fea01000-fea01fff (prio 0, RW): virtio-pci-isr
fea02000-fea02fff (prio 0, RW): virtio-pci-device
fea03000-fea42fff (prio 0, RW): virtio-pci-notify
fea7e000-fea7e02f (prio 0, RW): msix-table
fea7f000-fea7f007 (prio 0, RW): msix-pba
Applies on top of mst's virtio-1.0 branch, plus my three virtio-pci
patches posted to the list yesterday.
Signed-off-by: Gerd Hoffmann kra...@redhat.com
Hmm what's the point here?
I wanted to make the modern BAR prefetcheable, so it can
be a full 64-bit one, this is impossible with the MSI-X
BAR.
This requires keeping it separate though.
Again, if we start running of BARs we'll consider our options
then, these things are easy to change.
---
hw/virtio/virtio-pci.c | 39 +++
1 file changed, 27 insertions(+), 12 deletions(-)
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index ba1405f..934ca7a 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1235,7 +1235,7 @@ static void virtio_pci_device_plugged(DeviceState *d)
bool modern = !(proxy-flags VIRTIO_PCI_FLAG_DISABLE_MODERN);
int modern_mem_bar;
uint8_t *config;
-uint32_t size;
+uint32_t modern_mem_size, legacy_io_size;
config = proxy-pci_dev.config;
if (proxy-class_code) {
@@ -1339,9 +1339,10 @@ static void virtio_pci_device_plugged(DeviceState *d)
virtio_pci_add_mem_cap(proxy, notify.cap);
virtio_add_feature(proxy-host_features, VIRTIO_F_VERSION_1);
+modern_mem_size = 2 * QEMU_VIRTIO_PCI_QUEUE_MEM_MULT *
+VIRTIO_PCI_QUEUE_MAX;
memory_region_init(proxy-modern_bar, OBJECT(proxy), virtio-pci,
- 2 * QEMU_VIRTIO_PCI_QUEUE_MEM_MULT *
- VIRTIO_PCI_QUEUE_MAX);
+ modern_mem_size);
memory_region_init_io(proxy-common, OBJECT(proxy),
common_ops,
proxy,
@@ -1369,25 +1370,39 @@ static void virtio_pci_device_plugged(DeviceState *d)
proxy-modern_bar);
}
-if (proxy-nvectors
-msix_init_exclusive_bar(proxy-pci_dev, proxy-nvectors, 1)) {
-error_report(unable to init msix vectors to % PRIu32,
- proxy-nvectors);
-proxy-nvectors = 0;
+if (proxy-nvectors) {
+if (modern modern_mem_bar == 0) {
+if (msix_init(proxy-pci_dev, proxy-nvectors,
+ proxy-modern_bar, modern_mem_bar,
+ modern_mem_size - 0x2000,
+ proxy-modern_bar, modern_mem_bar,
+ modern_mem_size - 0x1000,
+ 0x90)) {
+error_report(unable to init msix vectors to % PRIu32,
+ proxy-nvectors);
+proxy-nvectors = 0;
+}
+} else {
+if (msix_init_exclusive_bar(proxy-pci_dev, proxy-nvectors,
1)) {
+error_report(unable to init msix vectors to % PRIu32,
+ proxy-nvectors);
+proxy-nvectors = 0;
+}
+}
}
proxy-pci_dev.config_write = virtio_write_config;
if (legacy) {
-size = VIRTIO_PCI_REGION_SIZE(proxy-pci_dev)
+legacy_io_size = VIRTIO_PCI_REGION_SIZE(proxy-pci_dev)
+ virtio_bus_get_vdev_config_len(bus);
-if (size (size - 1)) {
-size = 1 qemu_fls(size);
+if (legacy_io_size (legacy_io_size - 1)) {
+legacy_io_size = 1 qemu_fls(legacy_io_size);
}
memory_region_init_io(proxy-bar, OBJECT(proxy),
virtio_pci_config_ops,
- proxy, virtio-pci, size);
+ proxy, virtio-pci, legacy_io_size);
pci_register_bar(proxy-pci_dev, 0, PCI_BASE_ADDRESS_SPACE_IO,
proxy-bar);
--
1.8.3.1
Re: [Qemu-devel] [PATCH v2 11/47] acpi: add acpi_arg0(), acpi_arg1(), acpi_arg2(), acpi_arg3() terms
On Fri, 23 Jan 2015 10:32:57 +0200
Marcel Apfelbaum mar...@redhat.com wrote:
On 01/22/2015 04:49 PM, Igor Mammedov wrote:
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/acpi/acpi-build-utils.c | 32
include/hw/acpi/acpi-build-utils.h | 5 +
2 files changed, 37 insertions(+)
diff --git a/hw/acpi/acpi-build-utils.c b/hw/acpi/acpi-build-utils.c
index df5880f..6e10712 100644
--- a/hw/acpi/acpi-build-utils.c
+++ b/hw/acpi/acpi-build-utils.c
@@ -348,6 +348,38 @@ AcpiAml acpi_name_decl(const char *name, AcpiAml val)
return var;
}
Hi Igor,
Very nice series!!!
+/* ACPI 5.0: 20.2.6.1 Arg Objects Encoding: Arg0Op */
+AcpiAml acpi_arg0(void)
+{
+AcpiAml var = aml_allocate_internal(0, NON_BLOCK);
+build_append_byte(var.buf, 0x68); /* ARG0 op */
+return var;
+}
Maybe we can have a little code reuse and use something like:
static AcpiAml acpi_arg(int idx)
{
AcpiAml var = aml_allocate_internal(0, NON_BLOCK);
build_append_byte(var.buf, 0x68 + idx); /* ARGidx op */
return var;
}
and then:
AcpiAml acpi_arg0(void)
{
return acpi_arg(0);
}
...
I did the same with the local vars.
What do you think?
sure lets use it, and take Michael's suggest dropping wrappers
and just use plain acpi_arg(X)
Thanks,
Marcel
+
+/* ACPI 5.0: 20.2.6.1 Arg Objects Encoding: Arg1Op */
+AcpiAml acpi_arg1(void)
+{
+AcpiAml var = aml_allocate_internal(0, NON_BLOCK);
+build_append_byte(var.buf, 0x69); /* ARG1 op */
+return var;
+}
+
+/* ACPI 5.0: 20.2.6.1 Arg Objects Encoding: Arg2Op */
+AcpiAml acpi_arg2(void)
+{
+AcpiAml var = aml_allocate_internal(0, NON_BLOCK);
+build_append_byte(var.buf, 0x6A); /* ARG2 op */
+return var;
+}
+
+/* ACPI 5.0: 20.2.6.1 Arg Objects Encoding: Arg3Op */
+AcpiAml acpi_arg3(void)
+{
+AcpiAml var = aml_allocate_internal(0, NON_BLOCK);
+build_append_byte(var.buf, 0x6B); /* ARG3 op */
+return var;
+}
+
/* ACPI 5.0: 20.2.5.3 Type 1 Opcodes Encoding: DefIfElse */
AcpiAml acpi_if(AcpiAml predicate)
{
diff --git a/include/hw/acpi/acpi-build-utils.h
b/include/hw/acpi/acpi-build-utils.h
index 9e9ef1a..18d9efa 100644
--- a/include/hw/acpi/acpi-build-utils.h
+++ b/include/hw/acpi/acpi-build-utils.h
@@ -26,6 +26,11 @@ AcpiAml acpi_return(AcpiAml val);
AcpiAml acpi_int(const uint64_t val);
AcpiAml GCC_FMT_ATTR(1, 2) acpi_name(const char *name_format, ...);
AcpiAml acpi_name_decl(const char *name, AcpiAml val);
+AcpiAml acpi_arg0(void);
+AcpiAml acpi_arg1(void);
+AcpiAml acpi_arg2(void);
+AcpiAml acpi_arg3(void);
+
/* Block ASL object primitives */
AcpiAml acpi_if(AcpiAml predicate);
AcpiAml acpi_method(const char *name, int arg_count);
Re: [Qemu-devel] [PATCH v3 0/6] Update filename string sizes in block layer
Am 22.01.2015 um 14:03 hat Jeff Cody geschrieben: The block layer uses a mixture of 'PATH_MAX' and '1024' string sizes for filenames (and backing filenames). This series consolidates all that usage to 'PATH_MAX'. Since most platforms (especially the most common platforms for QEMU) have a PATH_MAX larger than 1024 bytes, this series also changes stack allocations of PATH_MAX to be dynamically allocated. Note: checkpatch.pl complains about an extra space in a printf in patches 1 2. The lines complained about are in the diff context and not the actual changes, so I did not fix them up to satisfy checkpatch. Changes from v3: - simplified extent_path handling in vmdk_parse_extents() (Thanks Stefan) - moved declaration of backing_filename2 to inside if statement in bdrv_query_image_info() (Thanks Stefan) - removed zombie variable in bdrv_commit (Thanks Stefan) - fixed typo in commit message (Thanks Stefan) Changes from v2: - Change stack allocations to dybnamic (Thanks Kevin) - Update qcow/qcow2 ti perform safety checks for platforms that have a PATH_MAX 1024 (thanks John, Kevin). Thanks, applied to the block branch. Kevin
Re: [Qemu-devel] [v3 05/13] arch_init: alloc and free data struct in multi-thread compression
* Liang Li (liang.z...@intel.com) wrote:
Define the data structure and varibles used when doing multiple
thread compression, and add the code to initialize and free them.
Signed-off-by: Liang Li liang.z...@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
---
arch_init.c | 34 +-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/arch_init.c b/arch_init.c
index 2f1d0c4..f21a8ea 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -340,16 +340,29 @@ static bool ram_bulk_stage;
#define COMPRESS_BUF_SIZE (TARGET_PAGE_SIZE + 16)
struct compress_param {
-/* To be done */
+int state;
+QEMUFile *file;
+QemuMutex mutex;
+QemuCond cond;
+RAMBlock *block;
+ram_addr_t offset;
};
typedef struct compress_param compress_param;
+enum {
+DONE,
+START,
+};
+
Do you really need any more than a 'bool busy' ?
struct decompress_param {
/* To be done */
};
typedef struct decompress_param decompress_param;
static compress_param *comp_param;
+static QemuMutex *mutex;
+static QemuCond *cond;
Those need better names and a comment; If I'm reading it
correctly, this cond is used to wake up the parent thread
when one of the workers has finished it's task?
+static QEMUFileOps *empty_ops;
static bool quit_thread;
static decompress_param *decomp_param;
static QemuThread *decompress_threads;
@@ -381,11 +394,22 @@ void migrate_compress_threads_join(MigrationState *s)
thread_count = migrate_compress_threads();
for (i = 0; i thread_count; i++) {
qemu_thread_join(s-compress_thread + i);
+qemu_fclose(comp_param[i].file);
+qemu_mutex_destroy(comp_param[i].mutex);
+qemu_cond_destroy(comp_param[i].cond);
}
+qemu_mutex_destroy(mutex);
+qemu_cond_destroy(cond);
g_free(s-compress_thread);
g_free(comp_param);
+g_free(cond);
+g_free(mutex);
+g_free(empty_ops);
s-compress_thread = NULL;
comp_param = NULL;
+cond = NULL;
+mutex = NULL;
+empty_ops = NULL;
}
void migrate_compress_threads_create(MigrationState *s)
@@ -400,7 +424,15 @@ void migrate_compress_threads_create(MigrationState *s)
s-compress_thread = g_malloc0(sizeof(QemuThread)
* thread_count);
comp_param = g_malloc0(sizeof(compress_param) * thread_count);
+cond = g_malloc0(sizeof(QemuCond));
+mutex = g_malloc0(sizeof(QemuMutex));
+empty_ops = g_malloc0(sizeof(QEMUFileOps));
Again this needs to go with the explanation of what you're using
the special QEMUFile for; but I don't think anything outside of
QEMUFile should be allocating a QEMUFileOps (It could be static anyway
rather than malloc'd). I think you could make empty_ops declared
static in qemu-file.c
+qemu_cond_init(cond);
+qemu_mutex_init(mutex);
for (i = 0; i thread_count; i++) {
+comp_param[i].file = qemu_fopen_ops(NULL, empty_ops);
+qemu_mutex_init(comp_param[i].mutex);
+qemu_cond_init(comp_param[i].cond);
qemu_thread_create(s-compress_thread + i, compress,
do_data_compress, comp_param + i, QEMU_THREAD_JOINABLE);
--
1.8.3.1
--
Dr. David Alan Gilbert / dgilb...@redhat.com / Manchester, UK
Re: [Qemu-devel] [v3 07/13] migraion: Rewrite the function ram_save_page()
* Liang Li (liang.z...@intel.com) wrote:
We rewrite this function to reuse the code in it
Signed-off-by: Liang Li liang.z...@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
---
arch_init.c | 107
++--
1 file changed, 61 insertions(+), 46 deletions(-)
The title would probably be better as 'Split ram_save_page()' - you
don't actually rewrite the code that much.
Note the important comment below.
diff --git a/arch_init.c b/arch_init.c
index 71cc756..0a575ed 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -596,6 +596,63 @@ static void migration_bitmap_sync_range(ram_addr_t
start, ram_addr_t length)
}
}
+static int save_zero_and_xbzrle_page(QEMUFile *f, RAMBlock* block,
+ram_addr_t offset, bool last_stage, bool *send_async)
+{
+int bytes_sent;
+int cont;
+ram_addr_t current_addr;
+MemoryRegion *mr = block-mr;
+uint8_t *p;
+int ret;
+
+cont = (block == last_sent_block) ? RAM_SAVE_FLAG_CONTINUE : 0;
+
+p = memory_region_get_ram_ptr(mr) + offset;
+
+/* In doubt sent page as normal */
+bytes_sent = -1;
+ret = ram_control_save_page(f, block-offset,
+ offset, TARGET_PAGE_SIZE, bytes_sent);
+
+XBZRLE_cache_lock();
+
+current_addr = block-offset + offset;
+if (ret != RAM_SAVE_CONTROL_NOT_SUPP) {
+if (ret != RAM_SAVE_CONTROL_DELAYED) {
+if (bytes_sent 0) {
+acct_info.norm_pages++;
+} else if (bytes_sent == 0) {
+acct_info.dup_pages++;
+}
+}
+} else if (is_zero_range(p, TARGET_PAGE_SIZE)) {
+acct_info.dup_pages++;
+bytes_sent = save_block_hdr(f, block, offset, cont,
+RAM_SAVE_FLAG_COMPRESS);
+qemu_put_byte(f, 0);
+bytes_sent++;
+/* Must let xbzrle know, otherwise a previous (now 0'd) cached
+ * page would be stale
+ */
+xbzrle_cache_zero_page(current_addr);
+} else if (!ram_bulk_stage migrate_use_xbzrle()) {
+bytes_sent = save_xbzrle_page(f, p, current_addr, block,
+ offset, cont, last_stage);
+if (!last_stage) {
+/* Can't send this cached data async, since the cache page
+ * might get updated before it gets to the wire
+ */
+if (send_async != NULL) {
+*send_async = false;
+}
+}
+}
+
+XBZRLE_cache_unlock();
+
+return bytes_sent;
+}
/* Needs iothread lock! */
/* Fix me: there are too many global variables used in migration process. */
@@ -691,55 +748,15 @@ static int ram_save_page(QEMUFile *f, RAMBlock* block,
ram_addr_t offset,
{
int bytes_sent;
int cont;
-ram_addr_t current_addr;
MemoryRegion *mr = block-mr;
uint8_t *p;
-int ret;
bool send_async = true;
-cont = (block == last_sent_block) ? RAM_SAVE_FLAG_CONTINUE : 0;
-
-p = memory_region_get_ram_ptr(mr) + offset;
-
-/* In doubt sent page as normal */
-bytes_sent = -1;
-ret = ram_control_save_page(f, block-offset,
- offset, TARGET_PAGE_SIZE, bytes_sent);
-
-XBZRLE_cache_lock();
-
-current_addr = block-offset + offset;
-if (ret != RAM_SAVE_CONTROL_NOT_SUPP) {
-if (ret != RAM_SAVE_CONTROL_DELAYED) {
-if (bytes_sent 0) {
-acct_info.norm_pages++;
-} else if (bytes_sent == 0) {
-acct_info.dup_pages++;
-}
-}
-} else if (is_zero_range(p, TARGET_PAGE_SIZE)) {
-acct_info.dup_pages++;
-bytes_sent = save_block_hdr(f, block, offset, cont,
-RAM_SAVE_FLAG_COMPRESS);
-qemu_put_byte(f, 0);
-bytes_sent++;
-/* Must let xbzrle know, otherwise a previous (now 0'd) cached
- * page would be stale
- */
-xbzrle_cache_zero_page(current_addr);
-} else if (!ram_bulk_stage migrate_use_xbzrle()) {
-bytes_sent = save_xbzrle_page(f, p, current_addr, block,
- offset, cont, last_stage);
-if (!last_stage) {
-/* Can't send this cached data async, since the cache page
- * might get updated before it gets to the wire
- */
-send_async = false;
-}
-}
-
-/* XBZRLE overflow or normal page */
+bytes_sent = save_zero_and_xbzrle_page(f, block, offset,
+last_stage, send_async);
if (bytes_sent == -1) {
+cont = (block == last_sent_block) ? RAM_SAVE_FLAG_CONTINUE : 0;
+p = memory_region_get_ram_ptr(mr) + offset;
I think this breaks XBZRLE; the 'p' pointer is updated by save_xbzrle_page when
it
copies the page into the cache; when that happens
Re: [Qemu-devel] [PATCH v2 01/47] acpi: introduce AML composer aml_append()
On Fri, 23 Jan 2015 15:24:24 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Fri, Jan 23, 2015 at 11:35:29AM +0100, Igor Mammedov wrote:
On Fri, 23 Jan 2015 10:11:19 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Thu, Jan 22, 2015 at 02:49:45PM +, Igor Mammedov wrote:
Adds for dynamic AML creation, which will be used
for piecing ASL/AML primitives together and hiding
from user/caller details about how nested context
should be closed/packed leaving less space for
mistakes and necessity to know how AML should be
encoded, allowing user to concentrate on ASL
representation instead.
For example it will allow to create AML like this:
AcpiAml scope = acpi_scope(PCI0)
AcpiAml dev = acpi_device(PM)
aml_append(dev, acpi_name_decl(_ADR, acpi_int(addr)))
aml_append(scope, dev);
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/acpi/acpi-build-utils.c | 39
++
include/hw/acpi/acpi-build-utils.h | 16
2 files changed, 55 insertions(+)
diff --git a/hw/acpi/acpi-build-utils.c b/hw/acpi/acpi-build-utils.c
index 602e68c..547ecaa 100644
--- a/hw/acpi/acpi-build-utils.c
+++ b/hw/acpi/acpi-build-utils.c
@@ -267,3 +267,42 @@ void build_append_int(GArray *table, uint32_t
value)
build_append_value(table, value, 4);
}
}
+
+static void build_prepend_int(GArray *array, uint32_t value)
+{
+GArray *data = build_alloc_array();
+
+build_append_int(data, value);
+g_array_prepend_vals(array, data-data, data-len);
+build_free_array(data);
+}
I don't think prepend is generally justified:
it makes code hard to follow and debug.
Adding length is different: of course you need
to first have the package before you can add length.
We currently have build_prepend_package_length - just move it
to utils, and use everywhere.
[...]
+case BUFFER:
+build_prepend_int(child.buf, child.buf-len);
+build_package(child.buf, child.op);
Buffer uses the same concept as package, but adds its own additional length.
Therefore I've added build_prepend_int(),
I can create build_buffer() and mimic build_package()
Sounds good, pls do.
The point is to avoid generic prepend calls as an external API.
but it won't change picture.
It's a better API - what is meant by picture?
build_prepend_int() is a static/non public function,
build_buffer() will also be static/non public function for use only by
API internals.
I pretty much hate long build_append_foo() names so I'm hiding all
lowlevel constructs and try to expose only high-level ASL ones.
Which makes me to think that we need to use asl_ prefix for API calls
instead of acpi_ or aml_.
As for moving to to another file, during all this series lowlevel
build_(some_aml_related_costruct_helper)s are moved into this file
and should be make static to hide from user lowlevel helpers
(including build_package).
That will leave only high level API available.
TODO for me: make sure that moved lowlevel helpers are static
+break;
+default:
+break;
+}
+build_append_array(parent_ctx-buf, child.buf);
+build_free_array(child.buf);
+}
diff --git a/include/hw/acpi/acpi-build-utils.h
b/include/hw/acpi/acpi-build-utils.h
index 199f003..64e7ec3 100644
--- a/include/hw/acpi/acpi-build-utils.h
+++ b/include/hw/acpi/acpi-build-utils.h
@@ -5,6 +5,22 @@
#include glib.h
#include qemu/compiler.h
+typedef enum {
+NON_BLOCK,
+PACKAGE,
+EXT_PACKAGE,
+BUFFER,
+RES_TEMPLATE,
+} AcpiBlockFlags;
+
+typedef struct AcpiAml {
+GArray *buf;
+uint8_t op;
+AcpiBlockFlags block_flags;
+} AcpiAml;
+
+void aml_append(AcpiAml *parent_ctx, AcpiAml child);
+
GArray *build_alloc_array(void);
void build_free_array(GArray *array);
void build_prepend_byte(GArray *array, uint8_t val);
--
1.8.3.1
Re: [Qemu-devel] [v3 09/13] migration: Make compression co-work with xbzrle
* Liang Li (liang.z...@intel.com) wrote:
Now, multiple thread compression can co-work with xbzrle. when
xbzrle is on, multiple thread compression will only work at the
first round of ram data sync.
Signed-off-by: Liang Li liang.z...@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
---
arch_init.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 4109ad7..14bc486 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -905,8 +905,11 @@ static int ram_save_compressed_page(QEMUFile *f,
RAMBlock* block,
* block, and all the pages in last block should have been sent
* out, keeping this order is important.
*/
-if (block != last_sent_block) {
-flush_compressed_data(f);
+if ((!ram_bulk_stage migrate_use_xbzrle()) ||
+block != last_sent_block) {
+if (block != last_sent_block) {
+flush_compressed_data(f);
+}
bytes_sent = save_zero_and_xbzrle_page(f, block, offset,
last_stage, NULL);
if (bytes_sent == -1) {
@@ -961,6 +964,12 @@ static int ram_find_and_save_block(QEMUFile *f, bool
last_stage)
block = QTAILQ_FIRST(ram_list.blocks);
complete_round = true;
ram_bulk_stage = false;
+if (migrate_use_xbzrle()) {
+/* if xbzrle is on, we terminate the compression thread
+ * at this point, there is no benefit from muti-thead */
Typo: 'muti-thead' - 'multi-thread'
Dave
+flush_compressed_data(f);
+terminate_compression_threads();
+}
}
} else {
if (migrate_use_compression()) {
--
1.8.3.1
--
Dr. David Alan Gilbert / dgilb...@redhat.com / Manchester, UK
Re: [Qemu-devel] [v3 08/13] migration: Add the core code of multi-thread compresion
* Liang Li (liang.z...@intel.com) wrote:
At this point, multiple thread compression can't co-work with xbzrle.
Signed-off-by: Liang Li liang.z...@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
---
arch_init.c | 164
+---
1 file changed, 157 insertions(+), 7 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 0a575ed..4109ad7 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -369,23 +369,43 @@ static QemuMutex *mutex;
static QemuCond *cond;
static QEMUFileOps *empty_ops;
static bool quit_thread;
+static int one_byte_count;
static decompress_param *decomp_param;
static QemuThread *decompress_threads;
+static int do_compress_ram_page(compress_param *param);
+
static void *do_data_compress(void *opaque)
{
+compress_param *param = opaque;
while (!quit_thread) {
-
-/* To be done */
-
+qemu_mutex_lock(param-mutex);
+while (param-state != START) {
+qemu_cond_wait(param-cond, param-mutex);
+if (quit_thread) {
+break;
+}
+do_compress_ram_page(param);
+qemu_mutex_lock(mutex);
+param-state = DONE;
+qemu_cond_signal(cond);
+qemu_mutex_unlock(mutex);
+}
+qemu_mutex_unlock(param-mutex);
}
+
return NULL;
}
static inline void terminate_compression_threads(void)
{
+int idx, thread_count;
+
+thread_count = migrate_compress_threads();
quit_thread = true;
-/* To be done */
+for (idx = 0; idx thread_count; idx++) {
+qemu_cond_signal(comp_param[idx].cond);
+}
}
void migrate_compress_threads_join(MigrationState *s)
@@ -770,13 +790,142 @@ static int ram_save_page(QEMUFile *f, RAMBlock* block,
ram_addr_t offset,
return bytes_sent;
}
+static int do_compress_ram_page(compress_param *param)
+{
+int bytes_sent;
+int blen = COMPRESS_BUF_SIZE;
+int cont;
+uint8_t *p;
+RAMBlock *block = param-block;
+ram_addr_t offset = param-offset;
+
+cont = (block == last_sent_block) ? RAM_SAVE_FLAG_CONTINUE : 0;
+p = memory_region_get_ram_ptr(block-mr) + offset;
+
+bytes_sent = save_block_hdr(param-file, block,
+offset, cont, RAM_SAVE_FLAG_COMPRESS_PAGE);
+blen = migrate_qemu_add_compression_data(param-file, p,
+TARGET_PAGE_SIZE, migrate_compress_level());
+bytes_sent += blen;
+atomic_inc(acct_info.norm_pages);
+
+return bytes_sent;
+}
+
+static inline void start_compression(compress_param *param)
+{
+qemu_mutex_lock(param-mutex);
+param-state = START;
+qemu_cond_signal(param-cond);
+qemu_mutex_unlock(param-mutex);
+}
+
+
+static uint64_t bytes_transferred;
+
+static void flush_compressed_data(QEMUFile *f)
+{
+int idx, len, thread_count;
+
+if (!migrate_use_compression()) {
+return;
+}
+thread_count = migrate_compress_threads();
+for (idx = 0; idx thread_count; idx++) {
+if (comp_param[idx].state != DONE) {
+qemu_mutex_lock(mutex);
+while (comp_param[idx].state != DONE) {
+qemu_cond_wait(cond, mutex);
+}
+qemu_mutex_unlock(mutex);
+}
+len = migrate_qemu_flush(f, comp_param[idx].file);
+bytes_transferred += len;
+}
+if ((one_byte_count 0) (bytes_transferred one_byte_count)) {
+bytes_transferred -= one_byte_count;
+one_byte_count = 0;
+}
+}
+
+static inline void set_compress_params(compress_param *param,
+RAMBlock *block, ram_addr_t offset)
+{
+param-block = block;
+param-offset = offset;
+}
+
+
+static int compress_page_with_multi_thread(QEMUFile *f,
+RAMBlock *block, ram_addr_t offset)
+{
+int idx, thread_count, bytes_sent = 0;
+
+thread_count = migrate_compress_threads();
+qemu_mutex_lock(mutex);
+while (true) {
+for (idx = 0; idx thread_count; idx++) {
+if (comp_param[idx].state == DONE) {
+bytes_sent = migrate_qemu_flush(f, comp_param[idx].file);
+set_compress_params(comp_param[idx],
+block, offset);
+start_compression(comp_param[idx]);
+if (bytes_sent == 0) {
+/* set bytes_sent to 1 in this case to prevent migration
+ * from terminating, this 1 byte whill be added to
+ * bytes_transferred later, minus 1 to keep the
+ * bytes_transferred accurate */
+bytes_sent = 1;
+if (bytes_transferred = 0) {
+one_byte_count++;
+} else {
+bytes_transferred -= 1;
+}
+}
+break;
+
Re: [Qemu-devel] [v3 10/13] migration: Add the core code of multi-thread decompression
* Liang Li (liang.z...@intel.com) wrote:
Signed-off-by: Liang Li liang.z...@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
---
arch_init.c | 48 ++--
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 14bc486..7103f4f 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -24,6 +24,7 @@
#include stdint.h
#include stdarg.h
#include stdlib.h
+#include zlib.h
#ifndef _WIN32
#include sys/types.h
#include sys/mman.h
@@ -820,6 +821,14 @@ static inline void start_compression(compress_param
*param)
qemu_mutex_unlock(param-mutex);
}
+static inline void start_decompression(decompress_param *param)
+{
+qemu_mutex_lock(param-mutex);
+param-state = START;
+qemu_cond_signal(param-cond);
+qemu_mutex_unlock(param-mutex);
+}
+
static uint64_t bytes_transferred;
@@ -1351,8 +1360,24 @@ void ram_handle_compressed(void *host, uint8_t ch,
uint64_t size)
static void *do_data_decompress(void *opaque)
{
+decompress_param *param = opaque;
while (!quit_thread) {
-/* To be done */
+qemu_mutex_lock(param-mutex);
+while (param-state != START) {
+qemu_cond_wait(param-cond, param-mutex);
+if (quit_thread) {
+break;
+}
+size_t pagesize = TARGET_PAGE_SIZE;
+/* uncompress() will return failed in some case,
+ * especially when the page is dirted when doing
+ * the compression, ignore the return value because
+ * the dirty page will be retransferred. */
+uncompress((Bytef *)param-des, pagesize,
+(const Bytef *)param-compbuf, param-len);
That's kind of a scary comment! It looks like 'uncompress' is supposed
to be safe, so shouldn't damage any other data; it's worrying me
might not find real problems though.
However,
Reviewed-by: Dr. David Alan Gilbert dgilb...@redhat.com
+param-state = DONE;
+}
+qemu_mutex_unlock(param-mutex);
}
return NULL;
}
@@ -1379,6 +1404,9 @@ void migrate_decompress_threads_join(void)
quit_thread = true;
thread_count = migrate_decompress_threads();
for (i = 0; i thread_count; i++) {
+qemu_cond_signal(decomp_param[i].cond);
+}
+for (i = 0; i thread_count; i++) {
qemu_thread_join(decompress_threads + i);
qemu_mutex_destroy(decomp_param[i].mutex);
qemu_cond_destroy(decomp_param[i].cond);
@@ -1392,7 +1420,23 @@ void migrate_decompress_threads_join(void)
static void decompress_data_with_multi_threads(uint8_t *compbuf,
void *host, int len)
{
-/* To be done */
+int idx, thread_count;
+
+thread_count = migrate_decompress_threads();
+while (true) {
+for (idx = 0; idx thread_count; idx++) {
+if (decomp_param[idx].state == DONE) {
+memcpy(decomp_param[idx].compbuf, compbuf, len);
+decomp_param[idx].des = host;
+decomp_param[idx].len = len;
+start_decompression(decomp_param[idx]);
+break;
+}
+}
+if (idx thread_count) {
+break;
+}
+}
}
static int ram_load(QEMUFile *f, void *opaque, int version_id)
--
1.8.3.1
--
Dr. David Alan Gilbert / dgilb...@redhat.com / Manchester, UK
Re: [Qemu-devel] [PULL 01/01] seccomp: add mlockall to whitelist
On (Fri) 23 Jan 2015 [14:21:46], Eduardo Otubo wrote: From: Paolo Bonzini pbonz...@redhat.com This is used by -realtime mlock=on. Signed-off-by: Eduardo Otubo eduardo.ot...@profitbricks.com Hm, that's not where a signed-off-by of the maintainer goes... Signed-off-by: Paolo Bonzini pbonz...@redhat.com Reviewed-by: Amit Shah amit.s...@redhat.com Reviewed-by: Eduardo Habkost ehabk...@redhat.com Tested-by: Eduardo Habkost ehabk...@redhat.com Acked-by: Eduardo Otubo eduardo.ot...@profitbricks.com Amit
Re: [Qemu-devel] [PATCH v2 06/47] acpi: add acpi_name() acpi_name_decl() term
On Fri, Jan 23, 2015 at 02:32:45PM +0100, Igor Mammedov wrote:
On Fri, 23 Jan 2015 10:59:48 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Thu, Jan 22, 2015 at 02:49:50PM +, Igor Mammedov wrote:
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/acpi/acpi-build-utils.c | 24
include/hw/acpi/acpi-build-utils.h | 3 +++
2 files changed, 27 insertions(+)
diff --git a/hw/acpi/acpi-build-utils.c b/hw/acpi/acpi-build-utils.c
index 40a1769..1bda2ec 100644
--- a/hw/acpi/acpi-build-utils.c
+++ b/hw/acpi/acpi-build-utils.c
@@ -314,6 +314,30 @@ static AcpiAml aml_allocate_internal(uint8_t op,
AcpiBlockFlags flags)
return var;
}
+/*
+ * help to construct NameString, which return AcpiAml object
+ * for using with other aml_append or other acpi_* terms
Here and elsewhere: I can't parse this header text.
I'm guessing you just mean construct NameString,
and that's it?
yes
Also, most other places use build_append_namestring -
so when should acpi_name be used instead?
This should be made clear here in the comment.
acpi_name() is a replacement/wrapper around build_append_namestring()
which returns AcpiAml object. build_append_namestring() is a nonpublic
lowlevel helper that deals with GArray,
while acpi_name() follows semantic of AML API.
+ */
+AcpiAml GCC_FMT_ATTR(1, 2) acpi_name(const char *name_format, ...)
+{
This isn't really a name. It just appends a string. So rename this
acpi_string and then the below one adding a name can be named acpi_name?
acpi_string is introduced in 27/47, which is a prefixed string
as described in spec.
Also, in many places one must use only one nameseg.
Where is it exactly?
Perhaps we could build in acpi_name() a check if we know in
what context enforce it. Better to have single/uniform API
for names than a several which is confusing.
I agree here.
I think a separate api that actually validates
that it's one segment is better than silently failing.
Do we ever use it for more than 1 segment?
Yes we use names with more than one segment.
Interesting. where exactly?
If not, maybe the right thing to do is
to use build_append_nameseg and call this one acpi_nameseg.
acpi_name() is used only for passing name as arguments to methods,
in spec there isn't a limitation to only one segment when it comes
to names, in ASL part of it. namesegment however only AML construct
which helps to build name, I prefer not expose lowlevel AML
unless we have to.
OK, I agree.
+va_list ap;
+AcpiAml var = aml_allocate_internal(0, NON_BLOCK);
0 hard coded? What does it mean?
1st arg for NON_BLOCK context doesn't mean anything/ignored.
alternatively I can make aml_allocate_nonblock() wrapper
around generic allocator.
0 isn't a valid opcode either, it can really be anything.
Same elsewhere.
+va_start(ap, name_format);
+build_append_namestringv(var.buf, name_format, ap);
+va_end(ap);
+return var;
+
+/* ACPI 5.0: 20.2.5.1 Namespace Modifier Objects Encoding: DefName */
Let's quote the earliest spec which documents each object:
one year from now 5.0 will not be the latest.
Applies here and elsewhere.
In most places this will be 1.0b.
Where the construct is newer, this will automatically
document which guests support it.
I'll try to do it.
+AcpiAml acpi_name_decl(const char *name, AcpiAml val)
+{
+AcpiAml var = aml_allocate_internal(0, NON_BLOCK);
+build_append_byte(var.buf, 0x08);
Pls add comment documenting what 0x08 is here.
sure
+build_append_namestring(var.buf, %s, name);
+aml_append(var, val);
+return var;
+}
+
/* ACPI 5.0: 20.2.5.3 Type 1 Opcodes Encoding: DefIfElse */
AcpiAml acpi_if(AcpiAml predicate)
{
diff --git a/include/hw/acpi/acpi-build-utils.h
b/include/hw/acpi/acpi-build-utils.h
index 177f9ed..868cfa5 100644
--- a/include/hw/acpi/acpi-build-utils.h
+++ b/include/hw/acpi/acpi-build-utils.h
@@ -21,6 +21,9 @@ typedef struct AcpiAml {
void aml_append(AcpiAml *parent_ctx, AcpiAml child);
+/* non block ASL object primitives */
what does it mean that it's a non block primitive?
I didn't find this concept in the spec.
As for a question what is NON_BLOCK, it's for simple inline ASL
construct that doesn't have to be packaged in special way
examles:
Store(A,B)
Name(FOO, VAL)
IO(...)
while there are different block elements differing in how
they are created see 1/47 aml_append():
ResourceTemplate {
/* block of other ASL items */
}
Package() {
/* block of other ASL items */
}
if ... else ...
Scope() {
/* block of other ASL items */
}
and so on.
special way is kind of vague.
Maybe add a comment explaining when it's used.
Is it when length isn't used as a prefix?
AML_NO_PREFIX?
+AcpiAml
Re: [Qemu-devel] [v3 11/13] migration: Add interface to control compression
* Liang Li (liang.z...@intel.com) wrote:
The multiple compression threads can be turned on/off through
qmp and hmp interface when doing live migration.
Signed-off-by: Liang Li liang.z...@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
---
migration.c | 7 +--
qapi-schema.json | 6 +-
2 files changed, 10 insertions(+), 3 deletions(-)
Reviewed-by: Dr. David Alan Gilbert dgilb...@redhat.com
diff --git a/migration.c b/migration.c
index 082ddb7..9d1613d 100644
--- a/migration.c
+++ b/migration.c
@@ -576,8 +576,11 @@ bool migrate_zero_blocks(void)
bool migrate_use_compression(void)
{
-/* Disable compression before the series of patches are applied */
-return false;
+MigrationState *s;
+
+s = migrate_get_current();
+
+return s-enabled_capabilities[MIGRATION_CAPABILITY_COMPRESS];
}
int migrate_compress_level(void)
diff --git a/qapi-schema.json b/qapi-schema.json
index 9ffdcf8..d371af3 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -491,13 +491,17 @@
# to enable the capability on the source VM. The feature is
disabled by
# default. (since 1.6)
#
+# @compress: Using the multiple compression threads to accelerate live
migration.
+# This feature can help to reduce the migration traffic, by sending
+# compressed pages. The feature is disabled by default. (since 2.3)
+#
# @auto-converge: If enabled, QEMU will automatically throttle down the guest
# to speed up convergence of RAM migration. (since 1.6)
#
# Since: 1.2
##
{ 'enum': 'MigrationCapability',
- 'data': ['xbzrle', 'rdma-pin-all', 'auto-converge', 'zero-blocks'] }
+ 'data': ['xbzrle', 'rdma-pin-all', 'auto-converge', 'zero-blocks',
'compress'] }
##
# @MigrationCapabilityStatus
--
1.8.3.1
--
Dr. David Alan Gilbert / dgilb...@redhat.com / Manchester, UK
Re: [Qemu-devel] [v3 12/13] migration: Add command to set migration parameter
* Liang Li (liang.z...@intel.com) wrote:
Add the qmp and hmp commands to tune the parameters used in live
migration.
If I understand correctly on the destination side we need to set the number of
decompression threads very early on an incoming migration - I'm not
clear how early that needs to be - especially if you're using fd: so it's
not waiting for a connect ?
Eric: How would libvirt do that?
Signed-off-by: Liang Li liang.z...@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
---
hmp-commands.hx | 15 ++
hmp.c | 32 +
hmp.h | 3 ++
include/migration/migration.h | 4 +--
migration.c | 66
+++
monitor.c | 18
qapi-schema.json | 44 +
qmp-commands.hx | 23 +++
8 files changed, 190 insertions(+), 15 deletions(-)
diff --git a/hmp-commands.hx b/hmp-commands.hx
index e37bc8b..535b5ba 100644
--- a/hmp-commands.hx
+++ b/hmp-commands.hx
@@ -985,6 +985,21 @@ Enable/Disable the usage of a capability
@var{capability} for migration.
ETEXI
{
+.name = migrate_set_parameter,
+.args_type = parameter:s,value:i,
+.params = parameter value,
+.help = Set the parameter for migration,
+.mhandler.cmd = hmp_migrate_set_parameter,
+.command_completion = migrate_set_parameter_completion,
+},
+
+STEXI
+@item migrate_set_parameter @var{parameter} @var{value}
+@findex migrate_set_parameter
+Set the parameter @var{parameter} for migration.
+ETEXI
+
+{
.name = client_migrate_info,
.args_type =
protocol:s,hostname:s,port:i?,tls-port:i?,cert-subject:s?,
.params = protocol hostname port tls-port cert-subject,
diff --git a/hmp.c b/hmp.c
index 63d7686..965c037 100644
--- a/hmp.c
+++ b/hmp.c
@@ -1079,6 +1079,38 @@ void hmp_migrate_set_capability(Monitor *mon, const
QDict *qdict)
}
}
+void hmp_migrate_set_parameter(Monitor *mon, const QDict *qdict)
+{
+const char *param = qdict_get_str(qdict, parameter);
+int value = qdict_get_int(qdict, value);
+Error *err = NULL;
+MigrationParameterStatusList *params = g_malloc0(sizeof(*params));
+int i;
+
+for (i = 0; i MIGRATION_PARAMETER_MAX; i++) {
+if (strcmp(param, MigrationParameter_lookup[i]) == 0) {
+params-value = g_malloc0(sizeof(*params-value));
+params-value-parameter = i;
+params-value-value = value;
+params-next = NULL;
+qmp_migrate_set_parameters(params, err);
+break;
+}
+}
+
+if (i == MIGRATION_PARAMETER_MAX) {
+error_set(err, QERR_INVALID_PARAMETER, param);
+}
+
+qapi_free_MigrationParameterStatusList(params);
+
+if (err) {
+monitor_printf(mon, migrate_set_parameter: %s\n,
+ error_get_pretty(err));
+error_free(err);
+}
+}
+
void hmp_set_password(Monitor *mon, const QDict *qdict)
{
const char *protocol = qdict_get_str(qdict, protocol);
diff --git a/hmp.h b/hmp.h
index 4bb5dca..bd1b203 100644
--- a/hmp.h
+++ b/hmp.h
@@ -63,6 +63,7 @@ void hmp_migrate_cancel(Monitor *mon, const QDict *qdict);
void hmp_migrate_set_downtime(Monitor *mon, const QDict *qdict);
void hmp_migrate_set_speed(Monitor *mon, const QDict *qdict);
void hmp_migrate_set_capability(Monitor *mon, const QDict *qdict);
+void hmp_migrate_set_parameter(Monitor *mon, const QDict *qdict);
void hmp_migrate_set_cache_size(Monitor *mon, const QDict *qdict);
void hmp_set_password(Monitor *mon, const QDict *qdict);
void hmp_expire_password(Monitor *mon, const QDict *qdict);
@@ -111,6 +112,8 @@ void watchdog_action_completion(ReadLineState *rs, int
nb_args,
const char *str);
void migrate_set_capability_completion(ReadLineState *rs, int nb_args,
const char *str);
+void migrate_set_parameter_completion(ReadLineState *rs, int nb_args,
+ const char *str);
void host_net_add_completion(ReadLineState *rs, int nb_args, const char
*str);
void host_net_remove_completion(ReadLineState *rs, int nb_args,
const char *str);
diff --git a/include/migration/migration.h b/include/migration/migration.h
index 0c4f21c..8e09b42 100644
--- a/include/migration/migration.h
+++ b/include/migration/migration.h
@@ -50,9 +50,7 @@ struct MigrationState
QEMUBH *cleanup_bh;
QEMUFile *file;
QemuThread *compress_thread;
-int compress_thread_count;
-int decompress_thread_count;
-int compress_level;
+int parameters[MIGRATION_PARAMETER_MAX];
int state;
MigrationParams params;
Re: [Qemu-devel] [v3 13/13] migration: Add command to query migration parameter
* Liang Li (liang.z...@intel.com) wrote:
Add the qmp and hmp commands to query the parameters used in live
migration.
Eric: I'm OK with this, but since it's interface stuff, I thought
it best to let you check.
Dave
Signed-off-by: Liang Li liang.z...@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
---
hmp-commands.hx | 2 ++
hmp.c| 19 +++
hmp.h| 1 +
migration.c | 25 +
monitor.c| 7 +++
qapi-schema.json | 10 ++
qmp-commands.hx | 24
7 files changed, 88 insertions(+)
diff --git a/hmp-commands.hx b/hmp-commands.hx
index 535b5ba..ed0c06a 100644
--- a/hmp-commands.hx
+++ b/hmp-commands.hx
@@ -1779,6 +1779,8 @@ show user network stack connection states
show migration status
@item info migrate_capabilities
show current migration capabilities
+@item info migrate_parameters
+show current migration parameters
@item info migrate_cache_size
show current migration XBZRLE cache size
@item info balloon
diff --git a/hmp.c b/hmp.c
index 965c037..b321b15 100644
--- a/hmp.c
+++ b/hmp.c
@@ -246,6 +246,25 @@ void hmp_info_migrate_capabilities(Monitor *mon, const
QDict *qdict)
qapi_free_MigrationCapabilityStatusList(caps);
}
+void hmp_info_migrate_parameters(Monitor *mon, const QDict *qdict)
+{
+MigrationParameterStatusList *params, *p;
+
+params = qmp_query_migrate_parameters(NULL);
+
+if (params) {
+monitor_printf(mon, parameters: );
+for (p = params; p; p = p-next) {
+monitor_printf(mon, %s: %d ,
+ MigrationParameter_lookup[p-value-parameter],
+ (int)p-value-value);
+}
+monitor_printf(mon, \n);
+}
+
+qapi_free_MigrationParameterStatusList(params);
+}
+
void hmp_info_migrate_cache_size(Monitor *mon, const QDict *qdict)
{
monitor_printf(mon, xbzrel cache size: % PRId64 kbytes\n,
diff --git a/hmp.h b/hmp.h
index bd1b203..471417c 100644
--- a/hmp.h
+++ b/hmp.h
@@ -28,6 +28,7 @@ void hmp_info_chardev(Monitor *mon, const QDict *qdict);
void hmp_info_mice(Monitor *mon, const QDict *qdict);
void hmp_info_migrate(Monitor *mon, const QDict *qdict);
void hmp_info_migrate_capabilities(Monitor *mon, const QDict *qdict);
+void hmp_info_migrate_parameters(Monitor *mon, const QDict *qdict);
void hmp_info_migrate_cache_size(Monitor *mon, const QDict *qdict);
void hmp_info_cpus(Monitor *mon, const QDict *qdict);
void hmp_info_block(Monitor *mon, const QDict *qdict);
diff --git a/migration.c b/migration.c
index d3d377e..f87aba3 100644
--- a/migration.c
+++ b/migration.c
@@ -179,6 +179,31 @@ MigrationCapabilityStatusList
*qmp_query_migrate_capabilities(Error **errp)
return head;
}
+MigrationParameterStatusList *qmp_query_migrate_parameters(Error **errp)
+{
+MigrationParameterStatusList *head = NULL;
+MigrationParameterStatusList *params;
+MigrationState *s = migrate_get_current();
+int i;
+
+params = NULL; /* silence compiler warning */
+for (i = 0; i MIGRATION_PARAMETER_MAX; i++) {
+if (head == NULL) {
+head = g_malloc0(sizeof(*params));
+params = head;
+} else {
+params-next = g_malloc0(sizeof(*params));
+params = params-next;
+}
+params-value =
+g_malloc(sizeof(*params-value));
+params-value-parameter = i;
+params-value-value = s-parameters[i];
+}
+
+return head;
+}
+
static void get_xbzrle_cache_stats(MigrationInfo *info)
{
if (migrate_use_xbzrle()) {
diff --git a/monitor.c b/monitor.c
index 4cf62b6..6ab269f 100644
--- a/monitor.c
+++ b/monitor.c
@@ -2862,6 +2862,13 @@ static mon_cmd_t info_cmds[] = {
.mhandler.cmd = hmp_info_migrate_capabilities,
},
{
+.name = migrate_parameters,
+.args_type = ,
+.params = ,
+.help = show current migration parameters,
+.mhandler.cmd = hmp_info_migrate_parameters,
+},
+{
.name = migrate_cache_size,
.args_type = ,
.params = ,
diff --git a/qapi-schema.json b/qapi-schema.json
index 2caeccc..ccdb6b2 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -584,6 +584,16 @@
{ 'command': 'migrate-set-parameters',
'data': { 'parameters': ['MigrationParameterStatus'] } }
##
+# @query-migrate-parameters
+#
+# Returns information about the current migration parameters status
+#
+# Returns: @MigrationParametersStatus
+#
+# Since: 2.3
+##
+{ 'command': 'query-migrate-parameters', 'returns':
['MigrationParameterStatus']}
+##
##
# @MouseInfo:
#
diff --git a/qmp-commands.hx b/qmp-commands.hx
index 59d2643..986eb95 100644
--- a/qmp-commands.hx
+++ b/qmp-commands.hx
@@ -3248,6 +3248,30 @@ EQMP
Re: [Qemu-devel] [RfC PATCH] virtio-pci: place msix regions in modern virtio bar
Hi, I wanted to make the modern BAR prefetcheable, so it can be a full 64-bit one, It's not the case right now though, the two bars have identical attributes, and there is plenty of unused space in the modern virtio bar ... this is impossible with the MSI-X BAR. What exactly is impossible? msi-x being in a 64bit bar? msi-x being in a prefetchable bar? Also why the bar needs to be prefetchable to be 64bit bit? xhci looks this way right now: 00:0f.0 USB controller: NEC Corporation uPD720200 USB 3.0 Host Controller (rev 03) (prog-if 30 [XHCI]) Subsystem: Red Hat, Inc QEMU Virtual Machine Physical Slot: 15 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast TAbort- TAbort- MAbort- SERR- PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 10 Region 0: Memory at febd (64-bit, non-prefetchable) [size=16K] Capabilities: [90] MSI-X: Enable+ Count=16 Masked- Vector table: BAR=0 offset=3000 PBA: BAR=0 offset=3800 Capabilities: [70] MSI: Enable- Count=1/16 Maskable- 64bit+ Address: Data: Kernel driver in use: xhci_hcd Which works just fine even with msi-x in a 64-bit (non-prefetchable) bar, but maybe just by pure luck? Also seabios wouldn't map the bar above 4G. cheers, Gerd
Re: [Qemu-devel] [PATCH] linux-user/syscall.c: Fix typo issue for using target_vec[i].iov_len instead of target_vec[i].iov_base
On 1/23/15 19:21, Peter Maydell wrote: On 23 January 2015 at 10:57, Chen Gang S gang.c...@sunrus.com.cn wrote: Thank you for all of your work. I plan to let qemu support tile architecture: can let gcc run testsuite with qemu for tile. It is really hard to me, but I should try, it is my duty (I met it, and it's within my boarder, although no one pay for me). :-) Welcome any ideas, suggestions and completions by any members My single biggest suggestion is to make sure you split the work up so that you can post parts of it as you go along. Typically for a target-*/ new port that looks something like * initial framework, but no instruction decode (so all instructions just throw an illegal instruction exception) * support for one or a few simple classes of instruction * gradually fill in the gaps of missing instructions This way you get the benefit of code review on your early patches, so you can write the later ones in line with the comments you get on the first patches. We also get to review the code in smaller and more manageable chunks. I think the last target code to go in was target-tricore; you could look back in the git history and the archives to get an idea of how to structure the patchset and the kinds of review comment that patchseries received. That sounds a good idea to me. In this way, I will bother qemu upstream frequently (which also means will get much help from qemu upstream for tile, frequently). If can get much help from qemu upstream frequently (in above way), I guess, it is possible to me to finish it: let gcc run testsuit with tile qemu. :-) What I shall do for tile qemu should obey the related license of qemu (all the related code should belong to qemu upstream). If necessary to follow some copyright working flow, please let me know, I shall follow. Thanks. -- Chen Gang Open, share, and attitude like air, water, and life which God blessed
Re: [Qemu-devel] [PATCH v3] sheepdog: selectable object size support
Am 23.01.2015 um 09:24 hat Teruaki Ishizaki geschrieben:
Previously, qemu block driver of sheepdog used hard-coded VDI object size.
This patch enables users to handle block_size_shift value for
calculating VDI object size.
When you start qemu, you don't need to specify additional command option.
But when you create the VDI which doesn't have default object size
with qemu-img command, you specify block_size_shift option.
If you want to create a VDI of 8MB(1 23) object size,
you need to specify following command option.
# qemu-img create -o block_size_shift=23 sheepdog:test1 100M
In addition, when you don't specify qemu-img command option,
a default value of sheepdog cluster is used for creating VDI.
# qemu-img create sheepdog:test2 100M
Signed-off-by: Teruaki Ishizaki ishizaki.teru...@lab.ntt.co.jp
---
V3:
- Delete the needless operation of buffer.
- Delete the needless operations of request header
for SD_OP_GET_CLUSTER_DEFAULT.
- Fix coding style problems.
V2:
- Fix coding style problem (white space).
- Add members, store_policy and block_size_shift to struct SheepdogVdiReq
- Initialize request header to use block_size_shift specified by user.
---
block/sheepdog.c | 140
++---
include/block/block_int.h |1 +
2 files changed, 119 insertions(+), 22 deletions(-)
diff --git a/block/sheepdog.c b/block/sheepdog.c
index be3176f..c9f06db 100644
--- a/block/sheepdog.c
+++ b/block/sheepdog.c
@@ -37,6 +37,7 @@
#define SD_OP_READ_VDIS 0x15
#define SD_OP_FLUSH_VDI 0x16
#define SD_OP_DEL_VDI0x17
+#define SD_OP_GET_CLUSTER_DEFAULT 0x18
#define SD_FLAG_CMD_WRITE0x01
#define SD_FLAG_CMD_COW 0x02
@@ -167,7 +168,8 @@ typedef struct SheepdogVdiReq {
uint32_t base_vdi_id;
uint8_t copies;
uint8_t copy_policy;
-uint8_t reserved[2];
+uint8_t store_policy;
+uint8_t block_size_shift;
uint32_t snapid;
uint32_t type;
uint32_t pad[2];
@@ -186,6 +188,21 @@ typedef struct SheepdogVdiRsp {
uint32_t pad[5];
} SheepdogVdiRsp;
+typedef struct SheepdogClusterRsp {
+uint8_t proto_ver;
+uint8_t opcode;
+uint16_t flags;
+uint32_t epoch;
+uint32_t id;
+uint32_t data_length;
+uint32_t result;
+uint8_t nr_copies;
+uint8_t copy_policy;
+uint8_t block_size_shift;
+uint8_t __pad1;
+uint32_t __pad2[6];
+} SheepdogClusterRsp;
+
typedef struct SheepdogInode {
char name[SD_MAX_VDI_LEN];
char tag[SD_MAX_VDI_TAG_LEN];
@@ -1544,6 +1561,7 @@ static int do_sd_create(BDRVSheepdogState *s, uint32_t
*vdi_id, int snapshot,
hdr.vdi_size = s-inode.vdi_size;
hdr.copy_policy = s-inode.copy_policy;
hdr.copies = s-inode.nr_copies;
+hdr.block_size_shift = s-inode.block_size_shift;
ret = do_req(fd, s-aio_context, (SheepdogReq *)hdr, buf, wlen, rlen);
@@ -1569,9 +1587,11 @@ static int do_sd_create(BDRVSheepdogState *s, uint32_t
*vdi_id, int snapshot,
static int sd_prealloc(const char *filename, Error **errp)
{
BlockDriverState *bs = NULL;
+BDRVSheepdogState *base = NULL;
uint32_t idx, max_idx;
+uint32_t object_size;
int64_t vdi_size;
-void *buf = g_malloc0(SD_DATA_OBJ_SIZE);
+void *buf = NULL;
int ret;
ret = bdrv_open(bs, filename, NULL, NULL, BDRV_O_RDWR | BDRV_O_PROTOCOL,
@@ -1585,18 +1605,23 @@ static int sd_prealloc(const char *filename, Error
**errp)
ret = vdi_size;
goto out;
}
-max_idx = DIV_ROUND_UP(vdi_size, SD_DATA_OBJ_SIZE);
+
+base = bs-opaque;
+object_size = (UINT32_C(1) base-inode.block_size_shift);
+buf = g_malloc0(object_size);
If I understand correctly, block_size_shift can be up to 31, i.e. this
is a 2 GB allocation. Do you really think this is a good idea?
At least use g_try_malloc0() here, so that a memory allocation failure
doesn't crash qemu. (Same goes for all potentially huge allocations that
you make in the whole codebase.)
+max_idx = DIV_ROUND_UP(vdi_size, object_size);
for (idx = 0; idx max_idx; idx++) {
/*
* The created image can be a cloned image, so we need to read
* a data from the source image.
*/
-ret = bdrv_pread(bs, idx * SD_DATA_OBJ_SIZE, buf, SD_DATA_OBJ_SIZE);
+ret = bdrv_pread(bs, idx * object_size, buf, object_size);
if (ret 0) {
goto out;
}
-ret = bdrv_pwrite(bs, idx * SD_DATA_OBJ_SIZE, buf, SD_DATA_OBJ_SIZE);
+ret = bdrv_pwrite(bs, idx * object_size, buf, object_size);
if (ret 0) {
goto out;
}
@@ -1610,7 +1635,9 @@ out_with_err_set:
if (bs) {
bdrv_unref(bs);
}
-g_free(buf);
+if (buf) {
+g_free(buf);
+}
This is unnecessary. g_free(NULL) is valid, it does nothing.
return
Re: [Qemu-devel] [PATCH v2 01/47] acpi: introduce AML composer aml_append()
On Fri, Jan 23, 2015 at 02:40:30PM +0100, Igor Mammedov wrote:
On Fri, 23 Jan 2015 15:24:24 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Fri, Jan 23, 2015 at 11:35:29AM +0100, Igor Mammedov wrote:
On Fri, 23 Jan 2015 10:11:19 +0200
Michael S. Tsirkin m...@redhat.com wrote:
On Thu, Jan 22, 2015 at 02:49:45PM +, Igor Mammedov wrote:
Adds for dynamic AML creation, which will be used
for piecing ASL/AML primitives together and hiding
from user/caller details about how nested context
should be closed/packed leaving less space for
mistakes and necessity to know how AML should be
encoded, allowing user to concentrate on ASL
representation instead.
For example it will allow to create AML like this:
AcpiAml scope = acpi_scope(PCI0)
AcpiAml dev = acpi_device(PM)
aml_append(dev, acpi_name_decl(_ADR, acpi_int(addr)))
aml_append(scope, dev);
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/acpi/acpi-build-utils.c | 39
++
include/hw/acpi/acpi-build-utils.h | 16
2 files changed, 55 insertions(+)
diff --git a/hw/acpi/acpi-build-utils.c b/hw/acpi/acpi-build-utils.c
index 602e68c..547ecaa 100644
--- a/hw/acpi/acpi-build-utils.c
+++ b/hw/acpi/acpi-build-utils.c
@@ -267,3 +267,42 @@ void build_append_int(GArray *table, uint32_t
value)
build_append_value(table, value, 4);
}
}
+
+static void build_prepend_int(GArray *array, uint32_t value)
+{
+GArray *data = build_alloc_array();
+
+build_append_int(data, value);
+g_array_prepend_vals(array, data-data, data-len);
+build_free_array(data);
+}
I don't think prepend is generally justified:
it makes code hard to follow and debug.
Adding length is different: of course you need
to first have the package before you can add length.
We currently have build_prepend_package_length - just move it
to utils, and use everywhere.
[...]
+case BUFFER:
+build_prepend_int(child.buf, child.buf-len);
+build_package(child.buf, child.op);
Buffer uses the same concept as package, but adds its own additional
length.
Therefore I've added build_prepend_int(),
I can create build_buffer() and mimic build_package()
Sounds good, pls do.
The point is to avoid generic prepend calls as an external API.
but it won't change picture.
It's a better API - what is meant by picture?
build_prepend_int() is a static/non public function,
build_buffer() will also be static/non public function for use only by
API internals.
I pretty much hate long build_append_foo() names so I'm hiding all
lowlevel constructs and try to expose only high-level ASL ones.
Which makes me to think that we need to use asl_ prefix for API calls
instead of acpi_ or aml_.
This sounds wrong unless we either accept ASL input or
produce ASL output.
Igor, I think you are aiming a bit too high. Don't try to
write your own language, just use C. It does have
overhead like need to declare functions and variables,
and allocate/free memory, but they are well understood.
Your patches are almost there, they are pretty clean, the only issue I
think is this passing of AcpiAml by value, sometimes freeing buffer in
the process, sometimes not.
Just pass AcpiAml* everywhere, add APIs to allocate and free it
together with the internal buffer.
This makes it trivial to see that value is not misused:
just check it's between alloc and free - and that there are
no leaks - just check we call free on each value.
We can write a semantic patch to catch missing free calls,
it's easy.
As for moving to to another file, during all this series lowlevel
build_(some_aml_related_costruct_helper)s are moved into this file
and should be make static to hide from user lowlevel helpers
(including build_package).
That will leave only high level API available.
TODO for me: make sure that moved lowlevel helpers are static
+break;
+default:
+break;
+}
+build_append_array(parent_ctx-buf, child.buf);
+build_free_array(child.buf);
+}
diff --git a/include/hw/acpi/acpi-build-utils.h
b/include/hw/acpi/acpi-build-utils.h
index 199f003..64e7ec3 100644
--- a/include/hw/acpi/acpi-build-utils.h
+++ b/include/hw/acpi/acpi-build-utils.h
@@ -5,6 +5,22 @@
#include glib.h
#include qemu/compiler.h
+typedef enum {
+NON_BLOCK,
+PACKAGE,
+EXT_PACKAGE,
+BUFFER,
+RES_TEMPLATE,
+} AcpiBlockFlags;
+
+typedef struct AcpiAml {
+GArray *buf;
+uint8_t op;
+AcpiBlockFlags block_flags;
+} AcpiAml;
+
+void
Re: [Qemu-devel] [PATCH] linux-user/syscall.c: Fix typo issue for using target_vec[i].iov_len instead of target_vec[i].iov_base
On 23 January 2015 at 14:01, Chen Gang S gang.c...@sunrus.com.cn wrote: What I shall do for tile qemu should obey the related license of qemu (all the related code should belong to qemu upstream). If necessary to follow some copyright working flow, please let me know, I shall follow. We don't have a copyright assignment process. I recommend reading http://wiki.qemu.org/Contribute/SubmitAPatch if you haven't already. thanks -- PMM
Re: [Qemu-devel] [RfC PATCH] virtio-pci: place msix regions in modern virtio bar
On Fri, Jan 23, 2015 at 02:53:27PM +0100, Gerd Hoffmann wrote: Hi, I wanted to make the modern BAR prefetcheable, so it can be a full 64-bit one, It's not the case right now though, the two bars have identical attributes, and there is plenty of unused space in the modern virtio bar ... It's just POC, I'll change it. this is impossible with the MSI-X BAR. What exactly is impossible? msi-x being in a 64bit bar? msi-x being in a prefetchable bar? This. Also why the bar needs to be prefetchable to be 64bit bit? It doesn't but bridges only have 32 bit windows for non prefetcheable bars. So even if you try to make it 64 bit, only the low 32 bit are used. xhci looks this way right now: 00:0f.0 USB controller: NEC Corporation uPD720200 USB 3.0 Host Controller (rev 03) (prog-if 30 [XHCI]) Subsystem: Red Hat, Inc QEMU Virtual Machine Physical Slot: 15 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast TAbort- TAbort- MAbort- SERR- PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 10 Region 0: Memory at febd (64-bit, non-prefetchable) [size=16K] Capabilities: [90] MSI-X: Enable+ Count=16 Masked- Vector table: BAR=0 offset=3000 PBA: BAR=0 offset=3800 Capabilities: [70] MSI: Enable- Count=1/16 Maskable- 64bit+ Address: Data: Kernel driver in use: xhci_hcd Which works just fine even with msi-x in a 64-bit (non-prefetchable) bar, but maybe just by pure luck? xhci is integrated in a root complex so it can work there. Also seabios wouldn't map the bar above 4G. cheers, Gerd We can teach it to do that, and even if not, OS can do it on hotplug.
[Qemu-devel] Windows 2008 Guest BSODS with CLOCK_WATCHDOG_TIMEOUT on VM migration
Hi all, I'm running a slitely modified migration over tcp test in virt-test, which does a migration from one smp=2 VM to another on the same host over TCP, and exposes some dummy CPU load inside the GUEST while migration, and after a series of runs I'm alwais getting a CLOCK_WATCHDOG_TIMEOUT BSOD inside the guest, which happens when An expected clock interrupt was not received on a secondary processor in an MP system within the allocated interval. This indicates that the specified processor is hung and not processing interrupts. This seems to happen with any qemu version I've tested (1.2 and above, including upstream), and I was testing it with 3.13.0-44-generic kernel on my Ubuntu 14.04.1 LTS with SMP4 host, as well as on 3.12.26-1 kernel with Debian 6 with SMP6 host. One thing I noticed is that exposing a dummy CPU load on the HOST (like running multiple instances of the while true; do false; done script) in parallel with doing migration makes the issue to be quite easily reproducible. Looking inside the windows crash dump, the second CPU is just running at IRQL 0, and it aparently not hung, as Windows is able to save its state in the crash dump correctly, which assumes running some code on it. So this aparently seems to be some timing issue (like host scheduler does not schedule the thread executing secondary CPU's code in time). Could you give me some insight on this, i.e. is there a way to customize QEMU/KVM to avoid such issue? If you think this might be a qemu/kvm issue, I can provide you any info, like windows crash dumps, or the test-case to reproduce this. qemu is started as: from-VM: qemu-system-x86_64 \ -S \ -name 'virt-tests-vm1' \ -sandbox off \ -M pc-1.0 \ -nodefaults \ -vga std \ -chardev socket,id=qmp_id_qmp1,path=/tmp/monitor-qmp1-20150123-112624-aFZmIkNT,server,nowait \ -mon chardev=qmp_id_qmp1,mode=control \ -chardev socket,id=serial_id_serial0,path=/tmp/serial-serial0-20150123-112624-aFZmIkNT,server,nowait \ -device isa-serial,chardev=serial_id_serial0 \ -chardev socket,id=seabioslog_id_20150123-112624-aFZmIkNT,path=/tmp/seabios-20150123-112624-aFZmIkNT,server,nowait \ -device isa-debugcon,chardev=seabioslog_id_20150123-112624-aFZmIkNT,iobase=0x402 \ -device ich9-usb-uhci1,id=usb1,bus=pci.0,addr=03 \ -drive id=drive_image1,if=none,file=/path/to/image.qcow2 \ -device virtio-blk-pci,id=image1,drive=drive_image1,bootindex=0,bus=pci.0,addr=04 \ -device virtio-net-pci,mac=9a:74:75:76:77:78,id=idFdaC4M,vectors=4,netdev=idKFZNXH,bus=pci.0,addr=05 \ -netdev user,id=idKFZNXH,hostfwd=tcp::5000-:22,hostfwd=tcp::5001-:10023 \ -m 2G \ -smp 2,maxcpus=2,cores=1,threads=1,sockets=2 \ -cpu phenom \ -device usb-tablet,id=usb-tablet1,bus=usb1.0,port=1 \ -vnc :0 \ -rtc base=localtime,clock=host,driftfix=none \ -boot order=cdn,once=c,menu=off \ -enable-kvm to-VM: qemu-system-x86_64 \ -S \ -name 'virt-tests-vm1' \ -sandbox off \ -M pc-1.0 \ -nodefaults \ -vga std \ -chardev socket,id=qmp_id_qmp1,path=/tmp/monitor-qmp1-20150123-112750-VehjvEqK,server,nowait \ -mon chardev=qmp_id_qmp1,mode=control \ -chardev socket,id=serial_id_serial0,path=/tmp/serial-serial0-20150123-112750-VehjvEqK,server,nowait \ -device isa-serial,chardev=serial_id_serial0 \ -chardev socket,id=seabioslog_id_20150123-112750-VehjvEqK,path=/tmp/seabios-20150123-112750-VehjvEqK,server,nowait \ -device isa-debugcon,chardev=seabioslog_id_20150123-112750-VehjvEqK,iobase=0x402 \ -device ich9-usb-uhci1,id=usb1,bus=pci.0,addr=03 \ -drive id=drive_image1,if=none,file=/path/to/image.qcow2 \ -device virtio-blk-pci,id=image1,drive=drive_image1,bootindex=0,bus=pci.0,addr=04 \ -device virtio-net-pci,mac=9a:74:75:76:77:78,id=idI46M9C,vectors=4,netdev=idl9vRQt,bus=pci.0,addr=05 \ -netdev user,id=idl9vRQt,hostfwd=tcp::5002-:22,hostfwd=tcp::5003-:10023 \ -m 2G \ -smp 2,maxcpus=2,cores=1,threads=1,sockets=2 \ -cpu phenom \ -device usb-tablet,id=usb-tablet1,bus=usb1.0,port=1 \ -vnc :1 \ -rtc base=localtime,clock=host,driftfix=none \ -boot order=cdn,once=c,menu=off \ -enable-kvm \ -incoming tcp:0:5200 Thanks, Mikhail
Re: [Qemu-devel] [PATCH v2 01/47] acpi: introduce AML composer aml_append()
On Thu, Jan 22, 2015 at 02:49:45PM +, Igor Mammedov wrote:
Adds for dynamic AML creation, which will be used
for piecing ASL/AML primitives together and hiding
from user/caller details about how nested context
should be closed/packed leaving less space for
mistakes and necessity to know how AML should be
encoded, allowing user to concentrate on ASL
representation instead.
For example it will allow to create AML like this:
AcpiAml scope = acpi_scope(PCI0)
AcpiAml dev = acpi_device(PM)
aml_append(dev, acpi_name_decl(_ADR, acpi_int(addr)))
aml_append(scope, dev);
Signed-off-by: Igor Mammedov imamm...@redhat.com
---
hw/acpi/acpi-build-utils.c | 39
++
include/hw/acpi/acpi-build-utils.h | 16
2 files changed, 55 insertions(+)
diff --git a/hw/acpi/acpi-build-utils.c b/hw/acpi/acpi-build-utils.c
index 602e68c..547ecaa 100644
--- a/hw/acpi/acpi-build-utils.c
+++ b/hw/acpi/acpi-build-utils.c
@@ -267,3 +267,42 @@ void build_append_int(GArray *table, uint32_t value)
build_append_value(table, value, 4);
}
}
+
+static void build_prepend_int(GArray *array, uint32_t value)
+{
+GArray *data = build_alloc_array();
+
+build_append_int(data, value);
+g_array_prepend_vals(array, data-data, data-len);
+build_free_array(data);
+}
+
+void aml_append(AcpiAml *parent_ctx, AcpiAml child)
+{
+switch (child.block_flags) {
+case EXT_PACKAGE:
+build_extop_package(child.buf, child.op);
+break;
+
+case PACKAGE:
+build_package(child.buf, child.op);
+break;
+
+case RES_TEMPLATE:
+build_append_byte(child.buf, 0x79); /* EndTag */
+/*
+ * checksum operations is treated as succeeded if checksum
+ * field is zero. [ACPI Spec 5.0, 6.4.2.9 End Tag]
+ */
+build_append_byte(child.buf, 0);
+/* fall through, to pack resources in buffer */
+case BUFFER:
+build_prepend_int(child.buf, child.buf-len);
+build_package(child.buf, child.op);
+break;
+default:
+break;
+}
+build_append_array(parent_ctx-buf, child.buf);
+build_free_array(child.buf);
+}
diff --git a/include/hw/acpi/acpi-build-utils.h
b/include/hw/acpi/acpi-build-utils.h
index 199f003..64e7ec3 100644
--- a/include/hw/acpi/acpi-build-utils.h
+++ b/include/hw/acpi/acpi-build-utils.h
@@ -5,6 +5,22 @@
#include glib.h
#include qemu/compiler.h
+typedef enum {
+NON_BLOCK,
+PACKAGE,
+EXT_PACKAGE,
+BUFFER,
+RES_TEMPLATE,
+} AcpiBlockFlags;
Please prefix values with ACPI_BUILD_ - don't pollute the
global namespace.
Same elsewhere: add build_ to functions, and Build to types.
This makes it clear these are not Acpi spec types,
but helpers to build Aml.
+
+typedef struct AcpiAml {
+GArray *buf;
+uint8_t op;
+AcpiBlockFlags block_flags;
+} AcpiAml;
+
+void aml_append(AcpiAml *parent_ctx, AcpiAml child);
+
GArray *build_alloc_array(void);
void build_free_array(GArray *array);
void build_prepend_byte(GArray *array, uint8_t val);
--
1.8.3.1
[Qemu-devel] [PATCH v3] sheepdog: selectable object size support
Previously, qemu block driver of sheepdog used hard-coded VDI object size.
This patch enables users to handle block_size_shift value for
calculating VDI object size.
When you start qemu, you don't need to specify additional command option.
But when you create the VDI which doesn't have default object size
with qemu-img command, you specify block_size_shift option.
If you want to create a VDI of 8MB(1 23) object size,
you need to specify following command option.
# qemu-img create -o block_size_shift=23 sheepdog:test1 100M
In addition, when you don't specify qemu-img command option,
a default value of sheepdog cluster is used for creating VDI.
# qemu-img create sheepdog:test2 100M
Signed-off-by: Teruaki Ishizaki ishizaki.teru...@lab.ntt.co.jp
---
V3:
- Delete the needless operation of buffer.
- Delete the needless operations of request header
for SD_OP_GET_CLUSTER_DEFAULT.
- Fix coding style problems.
V2:
- Fix coding style problem (white space).
- Add members, store_policy and block_size_shift to struct SheepdogVdiReq
- Initialize request header to use block_size_shift specified by user.
---
block/sheepdog.c | 140 ++---
include/block/block_int.h |1 +
2 files changed, 119 insertions(+), 22 deletions(-)
diff --git a/block/sheepdog.c b/block/sheepdog.c
index be3176f..c9f06db 100644
--- a/block/sheepdog.c
+++ b/block/sheepdog.c
@@ -37,6 +37,7 @@
#define SD_OP_READ_VDIS 0x15
#define SD_OP_FLUSH_VDI 0x16
#define SD_OP_DEL_VDI0x17
+#define SD_OP_GET_CLUSTER_DEFAULT 0x18
#define SD_FLAG_CMD_WRITE0x01
#define SD_FLAG_CMD_COW 0x02
@@ -167,7 +168,8 @@ typedef struct SheepdogVdiReq {
uint32_t base_vdi_id;
uint8_t copies;
uint8_t copy_policy;
-uint8_t reserved[2];
+uint8_t store_policy;
+uint8_t block_size_shift;
uint32_t snapid;
uint32_t type;
uint32_t pad[2];
@@ -186,6 +188,21 @@ typedef struct SheepdogVdiRsp {
uint32_t pad[5];
} SheepdogVdiRsp;
+typedef struct SheepdogClusterRsp {
+uint8_t proto_ver;
+uint8_t opcode;
+uint16_t flags;
+uint32_t epoch;
+uint32_t id;
+uint32_t data_length;
+uint32_t result;
+uint8_t nr_copies;
+uint8_t copy_policy;
+uint8_t block_size_shift;
+uint8_t __pad1;
+uint32_t __pad2[6];
+} SheepdogClusterRsp;
+
typedef struct SheepdogInode {
char name[SD_MAX_VDI_LEN];
char tag[SD_MAX_VDI_TAG_LEN];
@@ -1544,6 +1561,7 @@ static int do_sd_create(BDRVSheepdogState *s, uint32_t
*vdi_id, int snapshot,
hdr.vdi_size = s-inode.vdi_size;
hdr.copy_policy = s-inode.copy_policy;
hdr.copies = s-inode.nr_copies;
+hdr.block_size_shift = s-inode.block_size_shift;
ret = do_req(fd, s-aio_context, (SheepdogReq *)hdr, buf, wlen, rlen);
@@ -1569,9 +1587,11 @@ static int do_sd_create(BDRVSheepdogState *s, uint32_t
*vdi_id, int snapshot,
static int sd_prealloc(const char *filename, Error **errp)
{
BlockDriverState *bs = NULL;
+BDRVSheepdogState *base = NULL;
uint32_t idx, max_idx;
+uint32_t object_size;
int64_t vdi_size;
-void *buf = g_malloc0(SD_DATA_OBJ_SIZE);
+void *buf = NULL;
int ret;
ret = bdrv_open(bs, filename, NULL, NULL, BDRV_O_RDWR | BDRV_O_PROTOCOL,
@@ -1585,18 +1605,23 @@ static int sd_prealloc(const char *filename, Error
**errp)
ret = vdi_size;
goto out;
}
-max_idx = DIV_ROUND_UP(vdi_size, SD_DATA_OBJ_SIZE);
+
+base = bs-opaque;
+object_size = (UINT32_C(1) base-inode.block_size_shift);
+buf = g_malloc0(object_size);
+
+max_idx = DIV_ROUND_UP(vdi_size, object_size);
for (idx = 0; idx max_idx; idx++) {
/*
* The created image can be a cloned image, so we need to read
* a data from the source image.
*/
-ret = bdrv_pread(bs, idx * SD_DATA_OBJ_SIZE, buf, SD_DATA_OBJ_SIZE);
+ret = bdrv_pread(bs, idx * object_size, buf, object_size);
if (ret 0) {
goto out;
}
-ret = bdrv_pwrite(bs, idx * SD_DATA_OBJ_SIZE, buf, SD_DATA_OBJ_SIZE);
+ret = bdrv_pwrite(bs, idx * object_size, buf, object_size);
if (ret 0) {
goto out;
}
@@ -1610,7 +1635,9 @@ out_with_err_set:
if (bs) {
bdrv_unref(bs);
}
-g_free(buf);
+if (buf) {
+g_free(buf);
+}
return ret;
}
@@ -1669,6 +1696,17 @@ static int parse_redundancy(BDRVSheepdogState *s, const
char *opt)
return 0;
}
+static int parse_block_size_shift(BDRVSheepdogState *s, const char *opt)
+{
+struct SheepdogInode *inode = s-inode;
+inode-block_size_shift = (uint8_t)atoi(opt);
+if (inode-block_size_shift 20 || inode-block_size_shift 31) {
+return -EINVAL;
+}
+
+return 0;
+}
+
static int sd_create(const char *filename, QemuOpts *opts,
Error **errp)
{
@@ -1679,6 +1717,7 @@ static int sd_create(const char
Re: [Qemu-devel] [PATCH] target-i386: Disable HLE and RTM on Haswell Broadwell
On 22/01/2015 20:22, Eduardo Habkost wrote:
All Haswell CPUs and some Broadwell CPUs were updated by Intel to have
the HLE and RTM features disabled. This will prevent
-cpu Haswell,enforce and -cpu Broadwell,enforce from running out of
the box on those CPUs.
Disable those features by default on Broadwell and Haswell CPU models,
starting on pc-*-2.3. Users who want to use those features can enable
them explicitly on the command-line.
Signed-off-by: Eduardo Habkost ehabk...@redhat.com
Applied. My offer to add yourself to MAINTAINERS for target-i386/ is
still valid. :)
Paolo
---
hw/i386/pc_piix.c | 4
hw/i386/pc_q35.c | 4
target-i386/cpu.c | 9 -
3 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index f0a3201..a475b33 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -328,6 +328,10 @@ static void pc_compat_2_2(MachineState *machine)
x86_cpu_compat_set_features(Haswell, FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
x86_cpu_compat_set_features(Broadwell, FEAT_1_ECX, 0, CPUID_EXT_F16C);
x86_cpu_compat_set_features(Broadwell, FEAT_1_ECX, 0,
CPUID_EXT_RDRAND);
+x86_cpu_compat_set_features(Haswell, FEAT_7_0_EBX,
+CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_RTM, 0);
+x86_cpu_compat_set_features(Broadwell, FEAT_7_0_EBX,
+CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_RTM, 0);
}
static void pc_compat_2_1(MachineState *machine)
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index a432944..63027ee 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -307,6 +307,10 @@ static void pc_compat_2_2(MachineState *machine)
x86_cpu_compat_set_features(Haswell, FEAT_1_ECX, 0, CPUID_EXT_RDRAND);
x86_cpu_compat_set_features(Broadwell, FEAT_1_ECX, 0, CPUID_EXT_F16C);
x86_cpu_compat_set_features(Broadwell, FEAT_1_ECX, 0,
CPUID_EXT_RDRAND);
+x86_cpu_compat_set_features(Haswell, FEAT_7_0_EBX,
+CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_RTM, 0);
+x86_cpu_compat_set_features(Broadwell, FEAT_7_0_EBX,
+CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_RTM, 0);
}
static void pc_compat_2_1(MachineState *machine)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index b81ac5c..3a9b32e 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1100,9 +1100,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_EXT3_LAHF_LM,
.features[FEAT_7_0_EBX] =
CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
-CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
-CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
-CPUID_7_0_EBX_RTM,
+CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
+CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID,
.features[FEAT_XSAVE] =
CPUID_XSAVE_XSAVEOPT,
.xlevel = 0x800A,
@@ -1135,9 +1134,9 @@ static X86CPUDefinition builtin_x86_defs[] = {
CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
.features[FEAT_7_0_EBX] =
CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 |
-CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
+CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP |
CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCID |
-CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
+CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX |
CPUID_7_0_EBX_SMAP,
.features[FEAT_XSAVE] =
CPUID_XSAVE_XSAVEOPT,
[Qemu-devel] [PATCH] cocoa.m: Adds console items to the view menu
This patch adds these consoles to the View menu:
VGA
QEMU Monitor
Parallel
Serial
Signed-off-by: John Arbuckle programmingk...@gmail.com
---
ui/cocoa.m | 34 ++
1 files changed, 34 insertions(+), 0 deletions(-)
diff --git a/ui/cocoa.m b/ui/cocoa.m
index d37c29b..c88c0d0 100644
--- a/ui/cocoa.m
+++ b/ui/cocoa.m
@@ -801,6 +801,10 @@ QemuCocoaView *cocoaView;
- (void)toggleFullScreen:(id)sender;
- (void)showQEMUDoc:(id)sender;
- (void)showQEMUTec:(id)sender;
+- (void)displayVGA:(id)sender;
+- (void)displayMonitor:(id)sender;
+- (void)displayParallel:(id)sender;
+- (void)displaySerial:(id)sender;
@end
@implementation QemuCocoaAppController
@@ -943,6 +947,31 @@ QemuCocoaView *cocoaView;
[[NSWorkspace sharedWorkspace] openFile:[NSString
stringWithFormat:@%@/../doc/qemu/qemu-tech.html,
[[NSBundle mainBundle] resourcePath]] withApplication:@Help Viewer];
}
+
+/* Displays the VGA screen */
+- (void)displayVGA:(id)sender
+{
+console_select(0);
+}
+
+/* Displays the QEMU Monitor screen */
+- (void)displayMonitor:(id)sender
+{
+console_select(1);
+}
+
+/* Displays the parallel port screen */
+- (void)displayParallel:(id)sender
+{
+console_select(3);
+}
+
+/* Displays the serial port screen */
+- (void)displaySerial:(id)sender
+{
+console_select(2);
+}
+
@end
@@ -1006,6 +1035,11 @@ int main (int argc, const char * argv[]) {
// View menu
menu = [[NSMenu alloc] initWithTitle:@View];
[menu addItem: [[[NSMenuItem alloc] initWithTitle:@Enter Fullscreen
action:@selector(toggleFullScreen:) keyEquivalent:@f] autorelease]]; //
Fullscreen
+[menu addItem:[NSMenuItem separatorItem]]; //Separator
+[menu addItem: [[[NSMenuItem alloc] initWithTitle:@VGA
action:@selector(displayVGA:) keyEquivalent:@] autorelease]]; // VGA
+[menu addItem: [[[NSMenuItem alloc] initWithTitle:@QEMU Monitor
action:@selector(displayMonitor:) keyEquivalent:@] autorelease]]; // QEMU
Monitor
+[menu addItem: [[[NSMenuItem alloc] initWithTitle:@Parallel
action:@selector(displayParallel:) keyEquivalent:@] autorelease]]; // Parallel
+[menu addItem: [[[NSMenuItem alloc] initWithTitle:@Serial
action:@selector(displaySerial:) keyEquivalent:@] autorelease]]; // Serial
menuItem = [[[NSMenuItem alloc] initWithTitle:@View action:nil
keyEquivalent:@] autorelease];
[menuItem setSubmenu:menu];
[[NSApp mainMenu] addItem:menuItem];
--
1.7.5.4
