Re: [Qemu-devel] STM32F205 SysTick emulation

On Sun, May 31, 2015 at 5:18 AM, Liviu Ionescu wrote: > >> On 30 May 2015, at 07:17, Alistair Francis wrote: >> >> I also have a lot better support out of tree, I'm still slowly working >> on upstreaming it (I should have another patch series today). > > my implementation is based on the existing

[Qemu-devel] [PATCH v1 0/8] Extend Microblaze Properties

This patch series extends the MicroBlaze properties that I have been working on. It applies on top of my original work: 'Add Microblaze configuration options'. This patch series converts various MicroBlaze PVR registers to properties. This then allows the individual Microblaze machine reset functi

[Qemu-devel] On x86 MMU modes

[Query on intended logic] I am trying to learn qemu's MMU emulation logic for x86 and came across H. Peter Anvin's SMAP commit (link ). I have the following doubt on the intended logic (apologies if it is trivial) As per my under

Re: [Qemu-devel] [PATCH v3 1/4] iotests: fix exclusion option

On Tue, 06/02 15:18, John Snow wrote: > If you are running out-of-tree, the -x option to exclude > a certain iotest is broken. > > Replace porcelain usage of ls with a sturdier awk command. > > Signed-off-by: John Snow > --- Reviewed-by: Fam Zheng > tests/qemu-iotests/common | 3 ++- > 1 fil

Re: [Qemu-devel] [PATCH v7 1/3] sysbus: register reset handler for main_system_bus when created

Hi Eduardo, On 06/02/2015 11:53 PM, Eduardo Habkost wrote: On Tue, Jun 02, 2015 at 05:23:55PM +0800, Zhu Guihua wrote: Since icc bus will be droped and apic reset should be after bus reset in x86, this patch moves reset handler for main_system_bus from vl.c to sysbus.c So, you are changing res

Re: [Qemu-devel] [PATCH 0/2] sh4 linux-user cpu and hwcap

On 05/24/2015 03:51 PM, Aurelien Jarno wrote: On 2015-05-23 15:06, Richard Henderson wrote: As reported by Rich the other day. As I don't have a user-land binary that depends on this, I merely note that it still runs the linux-user-test sh4 binary. And gdb confirms that the LLSC bit does get s

Re: [Qemu-devel] [PATCH] exec: optimize phys_page_set_level

On 05/21/2015 06:19 AM, Paolo Bonzini wrote: memcpy is faster than struct assignment, which copies each bitfield individually. Arguably a compiler bug, but memcpy is super-special cased anyway so what could go wrong? The compiler has the option of doing the copy either way. Any way to actual

[Qemu-devel] [PATCH v4 4/4] monitor: remove debug prints

The preferred solution is to use tracepoints and there is good chance of bitrot with the debug prints not being enabled at compile time. Remove them. Suggested-by: Markus Armbruster Signed-off-by: Bandan Das --- monitor.c | 19 +-- 1 file changed, 1 insertion(+), 18 deletions(-)

[Qemu-devel] [PATCH v4 3/4] monitor: Fix failure path for "S" argument type

The "S" argument is only used with ? and we don't reach it. Fix it nevertheless. Signed-off-by: Bandan Das --- monitor.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/monitor.c b/monitor.c index 6777cbe..cbc3cc6 100644 --- a/monitor.c +++ b/monitor.c @@ -4069,7 +4069,7 @@ s

[Qemu-devel] [PATCH v4 2/4] When a command fails due to incorrect syntax or input, suggest using the "help" command to get more information about the command. This is only applicable for HMP.

Before: (qemu) drive_add usb_flash_drive drive_add: string expected After: (qemu) drive_add usb_flash_drive drive_add: string expected Try "help drive_add" for more information Reviewed-by: Markus Armbruster Signed-off-by: Bandan Das --- monitor.c | 2 ++ 1 file changed, 2 insertions(+) diff -

[Qemu-devel] [PATCH v4 0/4] monitor: suggest running "help" for command errors

v4: Better name for cmdline index pointer [1/4] Change comment for monitor_parse_command as suggested in review [1/4] Fix potential compilation failure in debug print [1/4] New - Fix failure path for argument type "S" [3/4] New - Remove debug prints [4/4] v3: Track the current location directly in

[Qemu-devel] [PATCH v4 1/4] monitor: cleanup parsing of cmd name and cmd arguments

There's too much going on in monitor_parse_command(). Split up the arguments parsing bits into a separate function monitor_parse_arguments(). Let the original function check for command validity and sub-commands if any and return data (*cmd) that the newly introduced function can process and return

Re: [Qemu-devel] [RFC v8.1 06/13] vfio: add check host bus reset is support or not

On 06/03/2015 12:47 AM, Alex Williamson wrote: On Tue, 2015-06-02 at 15:54 +0800, Chen Fan wrote: On 05/28/2015 05:32 AM, Alex Williamson wrote: On Wed, 2015-05-27 at 10:46 +0800, Chen Fan wrote: we introduce a has_bus_reset capability to sign the vfio devices if support host bus reset. Sign

Re: [Qemu-devel] [PATCH target-arm v1 9/9] arm: xlnx-zynqmp: Add 2xCortexR5 CPUs

On Tue, Jun 2, 2015 at 4:04 AM, Peter Crosthwaite wrote: > Add the 2xCortexR5 CPUs to zynqmp board. They are powered off on reset > (this is true of real hardware). > > Signed-off-by: Peter Crosthwaite > --- > hw/arm/xlnx-zynqmp.c | 26 ++ > include/hw/arm/xlnx-zy

Re: [Qemu-devel] [PATCH target-arm v1 8/9] arm: xlnx-zynqmp: Preface CPU variables with "A"

On Tue, Jun 2, 2015 at 4:04 AM, Peter Crosthwaite wrote: > The CPUs currently supported by zynqmp are the APU (application > processing unit) CPUs. There are other CPUs in Zynqmp so unqualified > "cpus" in ambiguous. Preface the variables with "A" accordingly, to > prepare support adding the RPU (

Re: [Qemu-devel] [PATCH 05/10 v11] arget-tilegx/opcode_tilegx.h: Modify it to fit qemu using

Am 03.06.2015 um 02:43 schrieb Peter Maydell: > On 30 May 2015 at 22:14, Chen Gang wrote: >> Use 'inline' instead of '__inline', and also use 'uint64_t' instead of >> "unsigned long long" >> >> Signed-off-by: Chen Gang >> --- >> target-tilegx/opcode_tilegx.h | 220 >> +--

Re: [Qemu-devel] [PULL 1/8] target-sh4: use bit number for SR constants

Hi Aurelien, On 06/01/2015 05:29 PM, Aurelien Jarno wrote: > Use the bit number for SR constants instead of using a bit mask. This > make possible to also use the constants for shifts. > > Reviewed-by: Richard Henderson > Signed-off-by: Aurelien Jarno > --- > target-sh4/cpu.c | 3 +- >

[Qemu-devel] GSoC 2015 (Mac OS 9 support) report, week 5

[This Week] - Finals ヽ(ｏ`皿′ｏ)ﾉ - Test all patches - Patch: Combined Adler-32 and copyright - This patch will be split into two separate ones as suggested by Mark. - Remove extraneous "interrupts" property from /pci/mac-io - I'm having trouble tracking down where the property is actu

Re: [Qemu-devel] [PATCH v5 00/12] Dirty bitmaps migration

On 05/28/2015 04:56 PM, Denis V. Lunev wrote: > On 28/05/15 23:09, John Snow wrote: >> >> On 05/26/2015 10:51 AM, Denis V. Lunev wrote: >>> On 26/05/15 17:48, Denis V. Lunev wrote: On 21/05/15 19:44, John Snow wrote: > On 05/21/2015 09:57 AM, Denis V. Lunev wrote: >> On 21/05/15 16:5

Re: [Qemu-devel] [PATCH v5 00/12] Dirty bitmaps migration

On 05/13/2015 11:29 AM, Vladimir Sementsov-Ogievskiy wrote: > These patches provide dirty bitmap migration feature. Only named dirty > bitmaps are to be migrated. Migration may be enabled using migration > capabilities. > > v5: > - rebase on master > - drop [PATCH RFC v4 10/13] iotests:

Re: [Qemu-devel] [PATCH 11/12] iotests: add dirty bitmap migration test

On 05/13/2015 11:30 AM, Vladimir Sementsov-Ogievskiy wrote: > The test starts two vms (vm_a, vm_b), create dirty bitmap in > the first one, do several writes to corresponding device and > then migrate vm_a to vm_b with dirty bitmaps. > > Signed-off-by: Vladimir Sementsov-Ogievskiy > --- > test

Re: [Qemu-devel] [PATCH 07/12] migration: add migration/block-dirty-bitmap.c

On 05/13/2015 11:30 AM, Vladimir Sementsov-Ogievskiy wrote: > Live migration of dirty bitmaps. Only named dirty bitmaps, associated with > root nodes and non-root named nodes are migrated. > > If destination qemu is already containing a dirty bitmap with the same name > as a migrated bitmap (for

Re: [Qemu-devel] [PATCH 09/10 v11] target-tilegx: Generate tcg instructions to finish "Hello world"

On 6/3/15 00:32, Richard Henderson wrote: > On 06/01/2015 01:54 PM, Chen Gang wrote: >>> Further, the < TILEGX_R_COUNT restriction is also incorrect. True, you >>> don't >>> actually implement the top 7 special registers, but that doesn't matter, you >>> should still be incrementing them. >>> >>

Re: [Qemu-devel] [PATCH RFC 3/5] softmmu: add a tlb_vaddr_to_host_fill function

On 2 June 2015 at 21:58, Richard Henderson wrote: > On 06/02/2015 01:10 PM, Aurelien Jarno wrote: >> It looks like we have to go through the MMIO functions to get the >> TLB_NOTDIRTY bit cleaned correctly. This is something we don't want for >> probe_write, so we definitely want two different func

Re: [Qemu-devel] [PATCH RFC 3/5] softmmu: add a tlb_vaddr_to_host_fill function

On 06/02/2015 01:10 PM, Aurelien Jarno wrote: > It looks like we have to go through the MMIO functions to get the > TLB_NOTDIRTY bit cleaned correctly. This is something we don't want for > probe_write, so we definitely want two different functions. I think that's why target-arm does it's somewhat

Re: [Qemu-devel] [PATCH RFC 3/5] softmmu: add a tlb_vaddr_to_host_fill function

On 06/02/2015 04:26 AM, Aurelien Jarno wrote: > int index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); > -CPUTLBEntry *tlbentry = &env->tlb_table[mmu_idx][index]; > +CPUTLBEntry *tlbentry; > target_ulong tlb_addr; > uintptr_t haddr; > > +again: > +tlbentry = &env-

Re: [Qemu-devel] [PATCH 06/10 v11] target-tilegx: Add special register information from Tilera Corporation

On 6/3/15 01:44, Peter Maydell wrote: > On 30 May 2015 at 22:15, Chen Gang wrote: >> The related copy is from Linux kernel "arch/tile/include/uapi/arch/ >> spr_def_64.h". >> >> Signed-off-by: Chen Gang >> --- >> target-tilegx/spr_def_64.h | 216 >> + >

Re: [Qemu-devel] [PATCH 06/10 v11] target-tilegx: Add special register information from Tilera Corporation

On 6/3/15 01:44, Peter Maydell wrote: > On 30 May 2015 at 22:15, Chen Gang wrote: >> The related copy is from Linux kernel "arch/tile/include/uapi/arch/ >> spr_def_64.h". >> >> Signed-off-by: Chen Gang >> --- >> target-tilegx/spr_def_64.h | 216 >> + >

Re: [Qemu-devel] [PATCH 07/10 v11] target-tilegx: Add cpu basic features for linux-user

Firstly, thank you very much for your valuable work for all patches. On 6/3/15 01:51, Peter Maydell wrote: > On 30 May 2015 at 22:15, Chen Gang wrote: >> + >> +#define TILEGX_IS_ERRNO(ret) \ >> + ((ret) > 0xf000ULL) /* errno is 0 -- >> 4096 */ > > TILEGX_IS_ER

Re: [Qemu-devel] [PATCH 09/13] target-s390x: implement TRANSLATE EXTENDED instruction

On 06/02/2015 12:05 PM, Aurelien Jarno wrote: >> But why don't we just pass and return (most) of the data to the helper? Like >> >> C(0xb2a5, TRE, RRE, Z, 0, r2, r1_P, 0, tre, 0) >> >> potential_page_fault(s); >> gen_helper_tre(o->out, cpu_env, o->out, o->out2, o->in2); >> return_l

Re: [Qemu-devel] [PATCH 10/10 v11] target-tilegx: Add TILE-Gx building files

On 6/3/15 01:52, Peter Maydell wrote: > On 30 May 2015 at 22:19, Chen Gang wrote: >> Add related configuration, make files for tilegx. Now, qemu tilegx can >> pass building, and finish running "Hello world" static/shared elf64 >> binary. >> >> Signed-off-by: Chen Gang > > Reviewed-by: Peter Mayd

Re: [Qemu-devel] [PATCH 09/10 v11] target-tilegx: Generate tcg instructions to finish "Hello world"

On 6/3/15 01:54, Peter Maydell wrote: > On 30 May 2015 at 22:18, Chen Gang wrote: >> Generate related tcg instructions, and qemu tilegx can finish running >> "Hello world". The elf64 binary can be static or shared. >> >> Signed-off-by: Chen Gang >> --- >> target-tilegx/translate.c | 2787 >> +++

Re: [Qemu-devel] [RFC] extensions to the -m memory option

On Tue, Jun 2, 2015 at 4:01 AM, Liviu Ionescu wrote: > >> On 02 Jun 2015, at 13:42, Peter Maydell wrote: >> >> On 2 June 2015 at 11:32, Peter Crosthwaite >> wrote: >>> On Tue, Jun 2, 2015 at 3:15 AM, Liviu Ionescu wrote: similar content is also present in Table B3-1 "ARMv7-M address map",

Re: [Qemu-devel] [PATCH v2 3/3] qmp/hmp: Add throttle ratio to query-migrate and info migrate

On 06/02/2015 11:46 AM, Jason J. Herne wrote: > Report throttle ratio in info migrate and query-migrate responses when cpu > throttling is active. > > Signed-off-by: Jason J. Herne > --- > hmp.c | 5 + > migration/migration.c | 5 + > qapi-schema.json | 3 ++- > 3 fi

Re: [Qemu-devel] [PATCH RFC 3/5] softmmu: add a tlb_vaddr_to_host_fill function

On 2015-06-02 13:26, Aurelien Jarno wrote: > The softmmu code already provides a tlb_vaddr_to_host function, which > returns the host address corresponding to a guest virtual address, > *if it is already in the QEMU MMU TLB*. > > This patch is an attempt to have a function which try to fill the TL

Re: [Qemu-devel] [PATCH v2 2/3] migration: Dynamic cpu throttling for auto-converge

On 06/02/2015 11:46 AM, Jason J. Herne wrote: > Remove traditional auto-converge static 30ms throttling code and replace it > with a dynamic throttling algorithm. > > Additionally, be more aggressive when deciding when to start throttling. > Previously we waited until four unproductive memory pass

Re: [Qemu-devel] [PATCH 0/4] macio: change DMA methods over to offset/len implementation

On 05/31/2015 04:05 PM, Mark Cave-Ayland wrote: > This patchset follows on from my recent work on fixing issues with the > macio controller, and remodels the new pmac_dma_read() and pmac_dma_write() > functions in a similar manner to the unaligned block functions. > > With this in place, long ch

Re: [Qemu-devel] [PATCH 1/4] macio: switch pmac_dma_read() over to new offset/len implementation

On 05/31/2015 04:05 PM, Mark Cave-Ayland wrote: > For better handling of unaligned block device accesses. > > Signed-off-by: Mark Cave-Ayland > --- > hw/ide/macio.c | 102 > ++-- > 1 file changed, 40 insertions(+), 62 deletions(-) > > diff

[Qemu-devel] [PULL v2 3/8] target-sh4: optimize addc using add2

Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index f9bc24c..a7a8f39 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -642,17 +642,15 @@

Re: [Qemu-devel] [PATCH v4 1/2] qga: add additional win32 cflags and libraries

On 02/06/2015 17:30, Kirk Allan wrote: > I was assuming that if you set _WIN32_WINNT=0x0600 (needed to gain > access to the OnLinkPrefixLength field when running on Windows > Vista/2008 and greater) you would also want to set WINVER=0x600 to > match. Having WINVER in the flags as both 501 and 60

[Qemu-devel] [PULL v2 2/8] target-sh4: Split out T from SR

In preparation for more efficient setting of this field. Signed-off-by: Aurelien Jarno --- target-sh4/cpu.h | 14 +++- target-sh4/gdbstub.c | 4 +- target-sh4/helper.c| 2 +- target-sh4/op_helper.c | 32 ++-- target-sh4/translate.c | 212

[Qemu-devel] [PULL v2 1/8] target-sh4: use bit number for SR constants

Use the bit number for SR constants instead of using a bit mask. This make possible to also use the constants for shifts. Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/cpu.c | 3 +- target-sh4/cpu.h | 30 ++-- target-sh4/gdbstub.c |

[Qemu-devel] [PULL v2 6/8] target-sh4: split out Q and M from of SR and optimize div1

Splitting Q and M out of SR, it's possible to optimize div1 by using TCG code instead of an helper. At the same time removed the now unused gen_copy_bit_i32 function. Signed-off-by: Aurelien Jarno --- target-sh4/cpu.h | 12 +++-- target-sh4/helper.h| 1 - target-sh4/op_helper.c | 1

[Qemu-devel] [PULL v2 8/8] target-sh4: remove dead code

Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 31a6947..f0a11a6 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -18,7 +18,6 @@ *

[Qemu-devel] [PULL v2 5/8] target-sh4: optimize negc using add2 and sub2

Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index d5b448e..250632a 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -795,12 +795,12 @@ s

[Qemu-devel] [PULL v2 4/8] target-sh4: optimize subc using sub2

Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 15 ++- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index a7a8f39..d5b448e 100644 --- a/target-sh4/translate.c +++ b/target-sh4/

[Qemu-devel] [PULL v2 0/8] SH4 patches for upstream

The following changes since commit f5790c3bc81702c98c7ddadedb274758cff8cbe7: Revert "target-alpha: Add vector implementation for CMPBGE" (2015-05-22 12:30:13 +0100) are available in the git repository at: git://git.aurel32.net/qemu.git tags/pull-qemu-sh4-2015-06-02 for you to fetch changes

[Qemu-devel] [PULL v2 7/8] target-sh4: factorize fmov implementation

Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 18 ++ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 6031d91..31a6947 100644 --- a/target-sh4/translate.c +++ b/target-

[Qemu-devel] [PULL 5/5] arch_init: Drop target-x86_64.conf

From: Ikey Doherty The target-x86_64.conf sysconfig file has been empty and essentially ignored now for several years. This change removes the unused file to enable moving towards a stateless configuration. Signed-off-by: Ikey Doherty Acked-by: Paolo Bonzini Reviewed-by: Eduardo Habkost Signe

[Qemu-devel] [PULL 3/5] apic: convert ->busdev.qdev casts to C casts

From: Zhu Guihua Use C casts to avoid accessing ICCDevice's qdev field directly. Signed-off-by: Zhu Guihua Reviewed-by: Igor Mammedov Reviewed-by: Andreas Färber Acked-by: Andreas Färber Signed-off-by: Eduardo Habkost --- hw/intc/apic.c | 9 ++--- 1 file changed, 6 insertions(+), 3 del

[Qemu-devel] [PULL 1/5] pc: Ensure non-zero CPU ref count after attaching to ICC bus

From: Andreas Färber Setting the parent bus of a device increases its ref count, which we ultimately want to level out. However it is only safe to do so after the last reference to the device in local code, as qom-set or similar operations might decrease the ref count. Therefore move the object_

[Qemu-devel] [PULL 4/5] target-i386: Register QOM properties for feature flags

This uses the feature name arrays to register QOM properties for feature flags. This simply adds properties that can be configured using -global, but doesn't change x86_cpu_parse_featurestr() to use them yet. Reviewed-by: Igor Mammedov Signed-off-by: Eduardo Habkost --- target-i386/cpu.c | 122

[Qemu-devel] [PULL 0/5] X86 queue 2015-06-02

The following changes since commit 42d58e7c6760cb9c55627c28ae538e27dcf2f144: Merge remote-tracking branch 'remotes/sstabellini/tags/xen-15-06-02-tag' into staging (2015-06-02 16:47:31 +0100) are available in the git repository at: git://github.com/ehabkost/qemu.git tags/x86-pull-request fo

[Qemu-devel] [PULL 2/5] target-i386: Fix signedness of MSR_IA32_APICBASE_BASE

Existing definition triggers the following when using clang -fsanitize=undefined: hw/intc/apic_common.c:314:55: runtime error: left shift of 1048575 by 12 places cannot be represented in type 'int' Fix it so we won't try to shift a 1 to the sign bit of a signed integer. Suggested-by:

[Qemu-devel] [PATCH v3 2/4] iotests: Add dependency info to groups list

Add a few external dependency groups to the iotests groups list, such as "qemu", "nbd", and "scm". This will assist us in knowing which tests need to be re-run when those dependencies are updated, or by helping us to avoid tests that we know are broken for a certain file. qemu-img and qemu-io are

[Qemu-devel] [PATCH v3 1/4] iotests: fix exclusion option

If you are running out-of-tree, the -x option to exclude a certain iotest is broken. Replace porcelain usage of ls with a sturdier awk command. Signed-off-by: John Snow --- tests/qemu-iotests/common | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tests/qemu-iotests/common

[Qemu-devel] [PATCH v3 4/4] iotests: clarify help text

Split the help text to highlight the groups of options a little better, carving out a clear "format" and "protocols" section. Reviewed-by: Fam Zheng Signed-off-by: John Snow --- tests/qemu-iotests/common | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/tests/qemu-iotests

[Qemu-devel] [PATCH v3 3/4] iotests: add timestamp skip feature

Like a makefile, try to skip tests if we know they have already been executed using the current set of external dependencies. If a user passes the -ts option to ./check, if a test or its output or its dependencies (qemu, qemu-nbd, qemu-io, qemu-img, socket-scm-helper) have been modified, the test

[Qemu-devel] [PATCH v3 0/4] iotests: skip tests with unchanged dependencies

This patchset is a little off the beaten path, but: Add the ability to skip tests that have already been run whose external dependencies have remained unchanged since the last test run. This is useful for, say, re-running a test set to see if a failure was a one-off or is reproducible by just re-

Re: [Qemu-devel] [Qemu-block] [PATCH] sheepdog: Fix error message if failed to load vmstate

On 06/02/2015 06:26 AM, Fam Zheng wrote: > On Tue, 06/02 13:16, Michael Tokarev wrote: >> 02.06.2015 12:32, Fam Zheng wrote: >>> if (ret < 0) { >>> -error_report("failed to save vmstate %s", strerror(errno)); >>> +if (load) { >>> +error_report("fai

Re: [Qemu-devel] [edk2] NVMe question

Hi, On Tue, 2 Jun 2015, Laszlo Ersek wrote: removed the nonzero initialization of Cc.Iosqes (submission queue size?) and Cc.Iocqes (completion queue size?) in function NvmeEnableController(). And the removal of these field initializations seems to cause the early sanity check in QEMU's nvme_star

Re: [Qemu-devel] [PATCH] Add .dir-locals.el file to configure emacs coding style

On 06/02/2015 12:02 PM, Eric Blake wrote: > On 06/02/2015 09:26 AM, Daniel P. Berrange wrote: >> The default emacs setup indents by 2 spaces and uses tabs >> which is counter to the QEMU coding style rules. Adding a >> .dir-locals.el file in the top level of the GIT repo will >> inform emacs abou

Re: [Qemu-devel] [PATCH v2 01/17] mips jazz: compile only in 64 bit little endian

On 2015-06-02 20:04, Hervé Poussineau wrote: > Le 02/06/2015 13:02, Aurelien Jarno a écrit : > >On 2015-05-27 14:19, Hervé Poussineau wrote: > >>Remove now useless device models from other MIPS configurations > >> > >>We're now compiling 18 files less than before. > >> > >>Signed-off-by: Hervé Pous

Re: [Qemu-devel] [PATCH 09/13] target-s390x: implement TRANSLATE EXTENDED instruction

On 2015-06-02 10:07, Richard Henderson wrote: > On 06/01/2015 02:24 PM, Aurelien Jarno wrote: > > +/* TRANSLATE EXTENDED */ > > +C(0xb2a5, TRE, RRE, Z, 0, 0, 0, 0, tre, 0) > ... > > +static ExitStatus op_tre(DisasContext *s, DisasOps *o) > > +{ > > +TCGv_i32 r1 = tcg_const_i32(get_f

Re: [Qemu-devel] [PULL 0/8] SH4 patches for upstream

On 2015-06-02 18:23, Peter Maydell wrote: > On 1 June 2015 at 22:29, Aurelien Jarno wrote: > > The following changes since commit f5790c3bc81702c98c7ddadedb274758cff8cbe7: > > > > Revert "target-alpha: Add vector implementation for CMPBGE" (2015-05-22 > > 12:30:13 +0100) > > > > are available i

[Qemu-devel] [PATCH] tpm: Prevent a call to TPM if no TPM support is requested

Prevent the function tpm_tis_get_tpm_version() from being called if not TPM support is requested. Signed-off-by: Stefan Berger --- include/sysemu/tpm.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/sysemu/tpm.h b/include/sysemu/tpm.h index c143890..c8afa17 100644 --- a/include/sy

Re: [Qemu-devel] [PATCH v2 14/17] net/dp8393x: correctly reset in_use field

Le 02/06/2015 13:04, Aurelien Jarno a écrit : On 2015-05-27 14:19, Hervé Poussineau wrote: Don't write more than the field width, which is always 16 bit. Fixes network in NetBSD 5.1/arc Signed-off-by: Hervé Poussineau --- hw/net/dp8393x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletio

Re: [Qemu-devel] [PATCH v2 01/17] mips jazz: compile only in 64 bit little endian

Le 02/06/2015 13:02, Aurelien Jarno a écrit : On 2015-05-27 14:19, Hervé Poussineau wrote: Remove now useless device models from other MIPS configurations We're now compiling 18 files less than before. Signed-off-by: Hervé Poussineau --- default-configs/mips-softmmu.mak | 5 - defa

Re: [Qemu-devel] [PATCH 13/13] target-s390x: implement high-word facility

On 06/01/2015 02:24 PM, Aurelien Jarno wrote: > Besides RISBHG and RISBLG, all high-word instructions are not > implemented. Fix that. > > Cc: Alexander Graf > Cc: Richard Henderson > Signed-off-by: Aurelien Jarno > --- > target-s390x/insn-data.def | 47

[Qemu-devel] [PATCH v6 2/2] qga: win32 qmp_guest_network_get_interfaces implementation

By default, IPv4 prefixes will be derived by matching the address to those returned by GetAdaptersInfo. IPv6 prefixes can not be matched this way due to the unpredictable order of entries. In Windows Vista/2008 guests and newer, both IPv4 and IPv6 prefixes can be retrieved from OnLinkPrefixLength

[Qemu-devel] [PATCH v6 0/2] qga: qmp_guest_network_get_interfaces for win32

Changes from v5: - Patch 1/2 removed testing for WINVER in QEMU_CFLAGS. Changes from v4: - Fixed up the commit messages to remove the utf-8 characters. Changes from v3: - Patch 1/2 removed setting ARCH_$ARCH - Patch 2/2 implemented feedback from v3. Use WSAAddressToString for inet_ntop functional

[Qemu-devel] [PATCH v6 1/2] qga: add win32 library iphlpapi

Add the iphlpapi library to use APIs such as GetAdaptersInfo and GetAdaptersAddresses. Signed-off-by: Kirk Allan --- configure | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configure b/configure index 4e2f78a..60df96d 100755 --- a/configure +++ b/configure @@ -724,7 +724,7

Re: [Qemu-devel] [PATCH 09/10 v11] target-tilegx: Generate tcg instructions to finish "Hello world"

On 30 May 2015 at 22:18, Chen Gang wrote: > Generate related tcg instructions, and qemu tilegx can finish running > "Hello world". The elf64 binary can be static or shared. > > Signed-off-by: Chen Gang > --- > target-tilegx/translate.c | 2787 > + > 1

Re: [Qemu-devel] [PATCH 10/10 v11] target-tilegx: Add TILE-Gx building files

On 30 May 2015 at 22:19, Chen Gang wrote: > Add related configuration, make files for tilegx. Now, qemu tilegx can > pass building, and finish running "Hello world" static/shared elf64 > binary. > > Signed-off-by: Chen Gang Reviewed-by: Peter Maydell thanks -- PMM

Re: [Qemu-devel] [PATCH 07/10 v11] target-tilegx: Add cpu basic features for linux-user

On 30 May 2015 at 22:15, Chen Gang wrote: > It implements minimized cpu features for linux-user. > > Signed-off-by: Chen Gang > --- > target-tilegx/cpu.c | 143 +++ > target-tilegx/cpu.h | 171 > > 2 fi

[Qemu-devel] [PATCH v2 0/3] migration: Dynamic cpu throttling for auto-converge

This patch set provides a new method for throttling a vcpu and makes use of said method to dynamically increase cpu throttling during an autoconverge migration until the migration completes. This method ensures that all migrations will eventually converge. The method used here for throttling vcpus

[Qemu-devel] [PATCH v2 1/3] cpu: Provide vcpu throttling interface

Provide a method to throttle guest cpu execution. CPUState is augmented with timeout controls and throttle start/stop functions. To throttle the guest cpu the caller simply has to call the throttle start function and provide a ratio of sleep time to normal execution time. Signed-off-by: Jason J. H

[Qemu-devel] [PATCH v2 3/3] qmp/hmp: Add throttle ratio to query-migrate and info migrate

Report throttle ratio in info migrate and query-migrate responses when cpu throttling is active. Signed-off-by: Jason J. Herne --- hmp.c | 5 + migration/migration.c | 5 + qapi-schema.json | 3 ++- 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/hmp.c

[Qemu-devel] [PATCH v2 2/3] migration: Dynamic cpu throttling for auto-converge

Remove traditional auto-converge static 30ms throttling code and replace it with a dynamic throttling algorithm. Additionally, be more aggressive when deciding when to start throttling. Previously we waited until four unproductive memory passes. Now we begin throttling after only two unproductive

Re: [Qemu-devel] [PATCH 06/10 v11] target-tilegx: Add special register information from Tilera Corporation

On 30 May 2015 at 22:15, Chen Gang wrote: > The related copy is from Linux kernel "arch/tile/include/uapi/arch/ > spr_def_64.h". > > Signed-off-by: Chen Gang > --- > target-tilegx/spr_def_64.h | 216 > + > 1 file changed, 216 insertions(+) > create m

Re: [Qemu-devel] [PATCH 05/10 v11] arget-tilegx/opcode_tilegx.h: Modify it to fit qemu using

On 30 May 2015 at 22:14, Chen Gang wrote: > Use 'inline' instead of '__inline', and also use 'uint64_t' instead of > "unsigned long long" > > Signed-off-by: Chen Gang > --- > target-tilegx/opcode_tilegx.h | 220 > +- > 1 file changed, 110 insertions(+), 1

Re: [Qemu-devel] [PATCH 04/10 v11] target-tilegx: Add opcode basic implementation from Tilera Corporation

On 30 May 2015 at 22:13, Chen Gang wrote: > It is copied from Linux kernel "arch/tile/include/uapi/arch/ > opcode_tilegx.h". > > Signed-off-by: Chen Gang > --- > target-tilegx/opcode_tilegx.h | 1406 > + > 1 file changed, 1406 insertions(+) > create mode

Re: [Qemu-devel] [PATCH 03/10 v11] linux-user/syscall.c: conditionalize syscalls which are not defined in tilegx

On 30 May 2015 at 22:12, Chen Gang wrote: > Some of architectures (e.g. tilegx), several syscall macros are not > supported, so switch them. > > Signed-off-by: Chen Gang Reviewed-by: Peter Maydell thanks -- PMM

Re: [Qemu-devel] [PATCH 02/10 v11] linux-user: Support tilegx architecture in linux-user

On 30 May 2015 at 22:10, Chen Gang wrote: > Add main working flow feature, system call processing feature, and elf64 > tilegx binary loading feature, based on Linux kernel tilegx 64-bit > implementation. > > Signed-off-by: Chen Gang > --- > include/elf.h | 2 + > linux-user/elfload

Re: [Qemu-devel] [PATCH v2 0/8] fdc: Clean up and fix command processing

On 05/21/2015 09:19 AM, Kevin Wolf wrote: > The hotfix for CVE-2015-3456 fixed the security problem, but didn't > fully correct the behaviour of the emulated floppy controller. This > series fixes the bug that was the root cause for the problem, and does > some cleanup in the FIFO access functio

Re: [Qemu-devel] [PATCH 12/13] target-s390x: implement load-and-trap facility

On 06/01/2015 02:24 PM, Aurelien Jarno wrote: > At the same time move the trap code from op_ct into gen_trap and use it > for all new functions. The value needs to be stored back to register > before the exception, but also before the brcond (as we don't use > temp locals). That's why we can't use

Re: [Qemu-devel] [PATCH v6 2/8] qmp: Add optional bool "unmap" to drive-mirror

On 05/27/2015 11:29 PM, Fam Zheng wrote: > If specified as "true", it allows discarding on target sectors where source is > not allocated. > > Signed-off-by: Fam Zheng > --- > +++ b/qapi/block-core.json > @@ -954,6 +954,11 @@ > # @on-target-error: #optional the action to take on an error on the

Re: [Qemu-devel] [PULL 0/8] SH4 patches for upstream

On 1 June 2015 at 22:29, Aurelien Jarno wrote: > The following changes since commit f5790c3bc81702c98c7ddadedb274758cff8cbe7: > > Revert "target-alpha: Add vector implementation for CMPBGE" (2015-05-22 > 12:30:13 +0100) > > are available in the git repository at: > > git://git.aurel32.net/qem

[Qemu-devel] [PULL 05/22] target-arm: Add TPIDR_EL2

From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Message-id: 1432881807-18164-7-git-send-email-edgar.igles...@gmail.com [PMM: reordered fields into preferred opc0/opc1/crn/crm/opc2 order] Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target-arm/helper.c | 7 +++ 1

[Qemu-devel] [PULL 00/22] target-arm queue

in the git repository at: git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20150602 for you to fetch changes up to 94edf02c4c94781fa777c459fe86b52131b83cb6: hw/arm/virt: change indentation in a15memmap (2015-06-02 16:3

[Qemu-devel] [PULL 22/22] hw/arm/virt: change indentation in a15memmap

From: Eric Auger Re-indent in a15memmap after VIRT_PLATFORM_BUS introduction Signed-off-by: Eric Auger Reviewed-by: Alex Bennée Reviewed-by: Shannon Zhao Message-id: 1433244554-12898-5-git-send-email-eric.au...@linaro.org Signed-off-by: Peter Maydell --- hw/arm/virt.c | 28 ++---

[Qemu-devel] [PULL 21/22] hw/arm/virt: add dynamic sysbus device support

From: Eric Auger Allows sysbus devices to be instantiated from command line by using -device option. Machvirt creates a platform bus at init. The dynamic sysbus devices are attached to this platform bus device. The platform bus device registers a machine init done notifier whose role will be to

[Qemu-devel] [PULL 16/22] kvm: introduce kvm_arch_msi_data_to_gsi

From: Eric Auger On ARM the MSI data corresponds to the shared peripheral interrupt (SPI) ID. This latter equals to the SPI index + 32. to retrieve the SPI index, matching the gsi, an architecture specific function is introduced. Signed-off-by: Eric Auger Acked-by: Christoffer Dall Acked-by: C

[Qemu-devel] [PULL 07/22] target-arm: Add TLBI_ALLE1{IS}

From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Message-id: 1432881807-18164-9-git-send-email-edgar.igles...@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target-arm/helper.c | 8 1 file changed, 8 insertions(+) diff --git a/target-arm/helper.c b/t

Re: [Qemu-devel] [PULL 0/11] Xen PCI Passthrough security fixes

On 2 June 2015 at 16:39, Stefano Stabellini wrote: > The following changes since commit 3fc827d591679f3e262b9d1f8b34528eabfca8c0: > > target-arm: Correct check for non-EL3 (2015-06-02 13:22:29 +0100) > > are available in the git repository at: > > git://xenbits.xen.org/people/sstabellini/qemu-

Re: [Qemu-devel] [PATCH 11/13] target-s390x: implement miscellaneous-instruction-extensions facility

On 06/01/2015 02:24 PM, Aurelien Jarno wrote: > RISBGN is the same as RISBG, but without setting the condition code. > CLT and CLGT are the same as CLRT and CLGRT, but using memory for the > second operand. > > Cc: Alexander Graf > Cc: Richard Henderson > Signed-off-by: Aurelien Jarno > --- >

[Qemu-devel] [PULL 03/22] target-arm: Add TCR_EL2

From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias Message-id: 1432881807-18164-5-git-send-email-edgar.igles...@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target-arm/helper.c | 8 1 file changed, 8 insertions(+) diff --git a/target-arm/helper.c b/t

[Qemu-devel] [PULL 15/22] pl061: fix wrong calculation of GPIOMIS register

From: Victor CLEMENT The masked interrupt status register should be the state of the interrupt after masking. There should be a logical AND instead of a logical OR between the interrupt status and the interrupt mask. Signed-off-by: Victor CLEMENT Reviewed-by: Peter Crosthwaite Message-id: 1433

Re: [Qemu-devel] [PATCH 09/10 v11] target-tilegx: Generate tcg instructions to finish "Hello world"

On 06/01/2015 01:54 PM, Chen Gang wrote: >> Further, the < TILEGX_R_COUNT restriction is also incorrect. True, you don't >> actually implement the top 7 special registers, but that doesn't matter, you >> should still be incrementing them. >> > > We did not implement them, so can not increment the

Re: [Qemu-devel] [PATCH 10/13] target-s390x: implement LPDFR and LNDFR instructions

On 06/01/2015 02:24 PM, Aurelien Jarno wrote: > This complete the floating point support sign handling facility. > > Cc: Alexander Graf > Cc: Richard Henderson > Signed-off-by: Aurelien Jarno > --- > target-s390x/insn-data.def | 2 ++ > 1 file changed, 2 insertions(+) Reviewed-by: Richard Hen

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