Aurelien Jarno aurel...@aurel32.net writes:
On 2015-08-07 19:03, Alvise Rigo wrote:
Introduce the new --enable-tcg-ldst-excl configure option to enable the
LL/SC operations only for those backends that support them.
Suggested-by: Jani Kokkonen jani.kokko...@huawei.com
Suggested-by:
On 2015-08-09 09:11, Alex Bennée wrote:
Aurelien Jarno aurel...@aurel32.net writes:
On 2015-08-07 19:03, Alvise Rigo wrote:
Introduce the new --enable-tcg-ldst-excl configure option to enable the
LL/SC operations only for those backends that support them.
Suggested-by: Jani
On Sun, Aug 09, 2015 at 12:39:59PM +0300, Victor Kaplansky wrote:
The old rules.mak loads dependency .d files using include directive
with file glob pattern *.d. This breaks the build when build tree has
remanent *.d files from another build.
This patch fixes this by
- loading precise
On Sun, Aug 09, 2015 at 12:39:45PM +0300, Victor Kaplansky wrote:
Changes from v2:
Address comment by Paolo Bonzini:
- Store list of generated hex files in a variable and derive from it
list of dependences to be included.
Address comment by Alex Bennee and
On Sun, Aug 09, 2015 at 12:54:37PM +0100, Peter Maydell wrote:
On 9 August 2015 at 12:39, Michael S. Tsirkin m...@redhat.com wrote:
On Sun, Aug 09, 2015 at 12:39:59PM +0300, Victor Kaplansky wrote:
-$(eval -include $(addsuffix *.d, $(sort $(dir $($v)
+$(eval -include
On 9 August 2015 at 12:39, Michael S. Tsirkin m...@redhat.com wrote:
On Sun, Aug 09, 2015 at 12:39:59PM +0300, Victor Kaplansky wrote:
-$(eval -include $(addsuffix *.d, $(sort $(dir $($v)
+$(eval -include $(patsubst %.o,%.d,$(patsubst %.mo,%.d,$($v
$(eval $v :=
On Sat, Aug 08, 2015 at 02:04:17AM +1000, Alexey Kardashevskiy wrote:
On 08/07/2015 01:33 PM, Gavin Shan wrote:
The patch supports RTAS calls ibm,{open,close}-errinjct to
manupliate the token, which is passed to RTAS call ibm,errinjct
to indicate the valid context for error injection. Each VM is
Changes from v2:
Address comment by Paolo Bonzini:
- Store list of generated hex files in a variable and derive from it
list of dependences to be included.
Address comment by Alex Bennee and Michael S. Tsirkin:
- Add a comment about difference between $(@D) and
In rules like bar/%.o: %.c there is a difference between $(*D) and
$(@D). $(*D) expands to '.', while $(@D) expands to 'bar'. It is
cleaner to generate *.d in the same directory where appropriate *.o
resides. This allows precise including of dependency info from .d files.
As a hack, we also
The old rules.mak loads dependency .d files using include directive
with file glob pattern *.d. This breaks the build when build tree has
remanent *.d files from another build.
This patch fixes this by
- loading precise list of .d files made from *.o and *.mo.
- specifying explicit list of
Aurelien Jarno aurel...@aurel32.net writes:
On 2015-08-09 09:11, Alex Bennée wrote:
Aurelien Jarno aurel...@aurel32.net writes:
On 2015-08-07 19:03, Alvise Rigo wrote:
Introduce the new --enable-tcg-ldst-excl configure option to enable the
LL/SC operations only for those backends
On 2015-08-09 10:51, Alex Bennée wrote:
Aurelien Jarno aurel...@aurel32.net writes:
On 2015-08-09 09:11, Alex Bennée wrote:
Aurelien Jarno aurel...@aurel32.net writes:
On 2015-08-07 19:03, Alvise Rigo wrote:
Introduce the new --enable-tcg-ldst-excl configure option to enable
Using ccache with CCACHE_BASEDIR set to $(SRC_PATH) or a parent will
rewrite all absolute paths to relative paths. This interacts poorly with
QEMU's two-level build directory scheme. For example, lets say
BUILD_DIR=$(SRC_PATH)/build so build/blockdev.d will contain:
blockdev.o: ../blockdev.c
Aurelien Jarno aurel...@aurel32.net writes:
On 2015-08-09 10:51, Alex Bennée wrote:
Aurelien Jarno aurel...@aurel32.net writes:
On 2015-08-09 09:11, Alex Bennée wrote:
Aurelien Jarno aurel...@aurel32.net writes:
On 2015-08-07 19:03, Alvise Rigo wrote:
Introduce the new
On 07.08.15 05:37, Sam Bobroff wrote:
Hello Aravinda and all,
On Wed, Jul 08, 2015 at 01:58:13PM +0530, Aravinda Prasad wrote:
On Friday 03 July 2015 11:31 AM, David Gibson wrote:
On Thu, Jul 02, 2015 at 07:11:52PM +1000, Alexey Kardashevskiy wrote:
On 04/02/2015 03:46 PM, David Gibson
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
disas.c | 4
target-m68k/translate.c | 3 ++-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/disas.c b/disas.c
index 69a6066..2512001 100644
--- a/disas.c
+++ b/disas.c
@@ -185,6 +185,7 @@ static int
Scaled index is not supported by 68000, 68008, and 68010.
EA = (bd + PC) + Xn.SIZE*SCALE + od
Ignore it:
M68000 FAMILY PROGRAMMER’S REFERENCE MANUAL
2.4 BRIEF EXTENSION WORD FORMAT COMPATIBILITY
If the MC68000 were to execute an instruction that
encoded a scaling factor, the scaling
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/helper.c| 12 +++-
target-m68k/helper.h| 4 +++-
target-m68k/translate.c | 29 +
3 files changed, 35 insertions(+), 10 deletions(-)
diff --git a/target-m68k/helper.c
Current QEMU m68k emulation only supports ColdFire processors.
This series adds compatibility with 680x0 processors.
Only non-privileged instruction are implemented.
680x0 FPU instructions are not implemented.
Once this series included in the QEMU mainline I will send a new series
with FPU
Laurent Vivier laur...@vivier.eu writes:
Read a 8, 16 or 32bit immediat constant.
An Immediat constant is stored in the instruction opcode and
s/Immediat/immediate/
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 52 -
1 file changed, 39 insertions(+), 13 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index f52aca3..d3a3695 100644
---
Copied from target-i386
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
cpu-exec.c | 6 --
target-m68k/cpu.c | 2 -
target-m68k/cpu.h | 6 +-
target-m68k/helper.c| 34 ++---
target-m68k/helper.h| 2 +-
target-m68k/translate.c | 195
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 34 +-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index adf4521..b7d15e9 100644
--- a/target-m68k/translate.c
+++
The following instruction can use all access modes and data sizes:
add, sub, neg, not, and, or, eor, ori, andi, subi, addi, eori, cmpi, swap
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 123 ++--
1 file changed, 76
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 95 ++---
1 file changed, 58 insertions(+), 37 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 6a426e1..9e379b3 100644
---
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/helper.c| 196
target-m68k/helper.h| 15 +++-
target-m68k/translate.c | 183 ++--
3 files changed, 317 insertions(+), 77 deletions(-)
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/helper.c| 212
target-m68k/helper.h| 14
target-m68k/translate.c | 207 ++
3 files changed, 433 insertions(+)
diff --git
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/helper.c| 61 +
target-m68k/helper.h| 4 +
target-m68k/translate.c | 331
3 files changed, 396 insertions(+)
diff --git a/target-m68k/helper.c
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 9a7558a..95d58d1 100644
--- a/target-m68k/translate.c
+++
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/cpu.h | 3 +
target-m68k/helper.h| 6 ++
target-m68k/op_helper.c | 143
target-m68k/qregs.def | 1 +
target-m68k/translate.c | 65 ++
5 files
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/cpu.h | 14 -
target-m68k/helper.c| 139 ++--
target-m68k/translate.c | 82 ++--
3 files changed, 151 insertions(+), 84 deletions(-)
diff --git
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 370a2f0..f52aca3 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@
This patch defines five new Motorola 680x0 family CPUs:
- M68K_CPUID_M68000,
- M68K_CPUID_M68020,
- M68K_CPUID_M68030,
- M68K_CPUID_M68040,
- M68K_CPUID_M68060
And seven new features:
- M68K_FEATURE_SCALED_INDEX, scaled address index register
-
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/helper.c| 91 +
target-m68k/helper.h| 3 ++
target-m68k/translate.c | 82
3 files changed, 176 insertions(+)
diff --git
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/helper.c| 96 ++---
target-m68k/helper.h| 8 ++-
target-m68k/translate.c | 141
3 files changed, 192 insertions(+), 53 deletions(-)
diff --git
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 47 +++
1 file changed, 47 insertions(+)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 95d58d1..cb746d7 100644
--- a/target-m68k/translate.c
+++
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index ae57792..adf4521 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@
Overflow may be detected and set before the instruction completes.
If the instruction detects an overflow, it sets the overflow condition
code, and the operands are unaffected.
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 26 +-
1 file
Improve TCG constant use by creating only once for several uses.
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 46 +++---
1 file changed, 27 insertions(+), 19 deletions(-)
diff --git a/target-m68k/translate.c
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index b7d15e9..add3b69 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1625,6 +1625,11 @@
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 65 +
1 file changed, 65 insertions(+)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index add3b69..9a7558a 100644
--- a/target-m68k/translate.c
+++
This allows to compare simulation results with a real 68040.
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/op_helper.c | 38 ++
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c
Generate the TCG constant and use it twice, instead
of generating the TCG constant twice to use it twice.
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/target-m68k/translate.c
Read a 8, 16 or 32bit immediat constant.
An Immediat constant is stored in the instruction opcode and
can be in one or two extension words.
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 73 -
1 file changed, 35
The operand is signed.
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 5fa39db..359c761 100644
--- a/target-m68k/translate.c
+++
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index eb7f503..f22155d 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@
Signed-off-by: Laurent Vivier laur...@vivier.eu
---
target-m68k/translate.c | 78 +
1 file changed, 47 insertions(+), 31 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 6ba71a2..eb7f503 100644
---
Public bug reported:
Root Problem:
IOPS limit does not work for VIRTIO devices if the disk workload is a
sequential write.
To confirm:
IDE disk devices - the IOPS limit works fine. Disk transfer speed limit works
fine.
VIRTIO disk devices - the IOPS limit works fine for random IO (write/read)
That original coreboot code certainly looks like a mistake. Thanks for
helping close the decade-long loop.
On Fri, Aug 7, 2015 at 12:15 PM, Eduardo Habkost ehabk...@redhat.com
wrote:
The existing i440fx initialization code sets a PCI config register that
isn't documented anywhere in the
On 08/07/2015 09:12 PM, Alberto Garcia wrote:
On Fri 31 Jul 2015 11:19:14 AM CEST, Wen Congyang wrote:
+##
+# @child-add
+#
+# Add a new child to quorum. This is useful to fix a broken quorum
child.
But the idea is that this can be eventually used by other drivers, isn't
it?
Yes, but is
On Thu, Aug 06, 2015 at 04:42:05PM +0800, Zhu Guihua wrote:
On 08/06/2015 01:27 PM, Bharata B Rao wrote:
Hi,
This is the next version of CPU hotplug support patchset for PowerPC
sPAPR guests. This is a split-out from the previous version (v3) that
was carrying CPU and memory hotplug
On Sun, Aug 09, 2015 at 03:53:02PM +0200, Alexander Graf wrote:
On 07.08.15 05:37, Sam Bobroff wrote:
Hello Aravinda and all,
On Wed, Jul 08, 2015 at 01:58:13PM +0530, Aravinda Prasad wrote:
On Friday 03 July 2015 11:31 AM, David Gibson wrote:
On Thu, Jul 02, 2015 at 07:11:52PM
2015-08-05 21:58 GMT+03:00 Jeff Cody jc...@redhat.com:
Hi Vasiliy,
If you run configure with --disable-strip, it will not strip the
debugging symbols from the binary after the build. Then, you can run
gdb on qemu, and do a backtrace after you hit the segfault ('bt').
That may shed some
53 matches
Mail list logo
