On Fri, Jan 15, 2016 at 3:58 PM, Andrew Baumann
wrote:
> Signed-off-by: Andrew Baumann
> ---
>
> Notes:
> Pi1 requires more peripherals, and will be added in a later patch
> series.
>
> v4:
> * drop header comment from versatile
> * made smpboot and board setup blobs relocatab
This discussion becomes a little difficult for a newbie like me :(
On 01/28/2016 11:23 PM, Alex Williamson wrote:
> On Thu, 2016-01-28 at 14:00 +0800, Jike Song wrote:
>> On 01/28/2016 12:19 AM, Alex Williamson wrote:
>>> On Wed, 2016-01-27 at 13:43 +0800, Jike Song wrote:
>> {snip}
>>
Had
On Fri, Jan 15, 2016 at 3:58 PM, Andrew Baumann
wrote:
> The new version is slightly different, to support Rasbperry Pi (in
> particular, Pi1's arm11 core which doesn't support v7 instructions
> such as MOVW).
>
> Signed-off-by: Andrew Baumann
> ---
>
> Notes:
> This has not yet been tested o
Hi,
> 1) The OpRegion MemoryRegion is mapped into system_memory through
> programming of the 0xFC config space register.
> a) vfio-pci could pick an address to do this as it is realized.
> b) SeaBIOS/OVMF could program this.
>
> Discussion: 1.a) Avoids any BIOS dependency, but vfio-pci would
On 2016/1/29 14:32, Ashok Kumar wrote:
> Hi,
>
> On Sat, Jan 23, 2016 at 07:36:41PM +0800, Shannon Zhao wrote:
>> > From: Shannon Zhao
>> >
>> > Add NUMA support for machine virt. Tested successfully running a guest
>> > Linux kernel with the following patch applied:
>> >
>> > - [PATCH v9 0/
On 01/27/2016 07:03 PM, Dr. David Alan Gilbert wrote:
> Hi,
> I've got a block error if I kill the secondary.
>
> Start both primary & secondary
> kill -9 secondary qemu
> x_colo_lost_heartbeat on primary
>
> The guest sees a block error and the ext4 root switches to read-only.
>
> I gdb'd the
On Thu, Jan 28, 2016 at 02:56:41PM -0700, Eric Blake wrote:
> On 01/27/2016 10:49 PM, Bharata B Rao wrote:
> > This is the hmp equivalent of "query ppc-cpu-cores"
>
> The QMP command is spelled "query-ppc-cpu-cores".
>
> Most HMP commands prefer '_' over '-'; so this should be 'info
> ppc_cpu_cor
On Thu, Jan 28, 2016 at 10:53:43PM +0100, Lluís Vilanova wrote:
> Replaces all direct uses of 'error_setg(&error_fatal/abort)' with
> 'error_report_fatal/abort'. Also reimplements the former on top of the
> latter.
>
> Signed-off-by: Lluís Vilanova
I think the spapr parts of this will be obsolet
When migrating the 'pseries' machine type with KVM, we use a special fd
to access the hash page table stored within KVM. Usually, this fd is
opened at the beginning of migration, and kept open until the migration
is complete.
However, if there is a guest reset during the migration, the fd can bec
This introduces stub implementations of the H_RESIZE_HPT_PREPARE and
H_RESIZE_HPT_COMMIT hypercalls which we hope to add in a PAPR
extension to allow run time resizing of a guest's hash page table. It
also adds a new machine property for controlling whether this new
facility is available.
Finally
We've now implemented a PAPR extension allowing PAPR guest to resize
their hash page table (HPT) during runtime.
This patch makes use of that facility to allocate smaller HPTs by default.
Specifically when a guest is aware of the HPT resize facility, qemu sizes
the HPT to the initial memory size,
This series implements the host / qemu side to allow hash page table
(HPT) resizing for PAPR (pseries machine type) guests. This is a
proposed extension to the PAPR spec. It also requires awareness on
the guest side, which I've posted a series for today.
This applies on top of my ppc-for-2.6 bra
At the moment the size of the hash page table (HPT) is fixed based on the
maximum memory allowed to the guest. As such, we allocate the table during
machine construction, and just clear it at reset.
However, we're planning to implement a PAPR extension allowing the hash
page table to be resized a
We've now implemented a PAPR extensions which allows PAPR guests (i.e.
"pseries" machine type) to resize their hash page table during runtime.
However, that extension is only enabled if explicitly chosen on the
command line. This patch enables it by default for qemu-2.6, but leaves it
disabled (b
This patch implements hypercalls allowing a PAPR guest to resize its own
hash page table. This will eventually allow for more flexible memory
hotplug.
The implementation is partially asynchronous, handled in a special thread
running the hpt_prepare_thread() function. The state of a pending resiz
On Thu, Jan 28, 2016 at 01:52:26PM -0700, Eric Blake wrote:
> On 01/27/2016 10:49 PM, Bharata B Rao wrote:
> > Show the details of PPC CPU cores via a new QMP command.
> >
> > TODO: update qmp-commands.hx with example
>
> Is this a stale comment? [1]
Yes, I missed removing it after I put the exa
Hi,
On Sat, Jan 23, 2016 at 07:36:41PM +0800, Shannon Zhao wrote:
> From: Shannon Zhao
>
> Add NUMA support for machine virt. Tested successfully running a guest
> Linux kernel with the following patch applied:
>
> - [PATCH v9 0/6] arm64, numa: Add numa support for arm64 platforms
> https://lw
On 01/29/2016 10:54 AM, Alex Williamson wrote:
> On Fri, 2016-01-29 at 02:22 +, Kay, Allen M wrote:
>>
>>> -Original Message-
>>> From: iGVT-g [mailto:igvt-g-boun...@lists.01.org] On Behalf Of Alex
>>> Williamson
>>> Sent: Thursday, January 28, 2016 11:36 AM
>>> To: Gerd Hoffmann; qem
> Am 29.01.2016 um 04:47 schrieb David Gibson :
>
>> On Thu, Jan 28, 2016 at 10:04:58PM +0100, Alexander Graf wrote:
>>
>>
>>> On 01/19/2016 12:02 PM, David Gibson wrote:
On Tue, Jan 19, 2016 at 01:18:17PM +0530, Bharata B Rao wrote:
> On Mon, Jan 18, 2016 at 04:44:38PM +1100, David G
On Thu, Jan 28, 2016 at 05:19:33PM -0200, Eduardo Habkost wrote:
> On Thu, Jan 28, 2016 at 11:19:44AM +0530, Bharata B Rao wrote:
> > CPUState *cpu gets added to the cpus list during cpu_exec_init(). It
> > should be removed from cpu_exec_exit().
> >
> > cpu_exec_init() is called from generic CPU:
A physical usb mouse becomes invalid when redirected from pc and attached to a
xHCI controller.
The QEMU running command is as follow.
/root/sqx/qemu-root/bin/qemu-system-x86_64 \
-name win7_sqx_qemu \
-machine pc-i440fx-2.1,accel=kvm,usb=off \
-m 1024 \
-realtime mlock=off \
-smp 1,sockets=1,co
From: James Clarke
Signed-off-by: James Clarke
Signed-off-by: David Gibson
---
target-ppc/cpu.h | 31 ++-
1 file changed, 22 insertions(+), 9 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 0820390..f300c86 100644
--- a/target-ppc/cpu.h
+++ b/ta
From: Mark Cave-Ayland
Currently the aiocb is held within MACIOIDEState, however the IDE core code
assumes that the current actvie DMA aiocb is held in aiocb in a few places,
e.g. ide_bus_reset() and ide_reset().
Switch over to using IDEDMA aiocb to store the aiocb for the current active
DMA req
ppc_store_slb updates the SLB for PPC cpus with 64-bit hash MMUs.
Currently it takes two parameters, which contain values encoded as the
register arguments to the slbmte instruction, one register contains the
ESID portion of the SLBE and also the slot number, the other contains the
VSID portion of
When HPTEs are removed or modified by hypercalls on spapr, we need to
invalidate the relevant pages in the qemu TLB.
Currently we do that by doing some complicated calculations to work out the
right encoding for the tlbie instruction, then passing that to
ppc_tlb_invalidate_one()... which totally
h_enter() in the spapr code needs to know the page size of the HPTE it's
about to insert. Unlike other paths that do this, it doesn't have access
to the SLB, so at the moment it determines this with some open-coded
tests which assume POWER7 or POWER8 page size encodings.
To make this more flexibl
Currently both the tlbiva instruction (used on 44x chips) and the tlbie
instruction (used on hash MMU chips) are both handled via
ppc_tlb_invalidate_one(). This is silly, because they're invoked from
different places, and do different things.
Clean this up by separating out the tlbiva instruction
Now that the TCG and spapr code has been extended to allow (semi-)
arbitrary page encodings in the CPU's 'sps' table, we can add the many
page sizes supported by real POWER7 and POWER8 hardware that we previously
didn't support in TCG.
Signed-off-by: David Gibson
Acked-by: Benjamin Herrenschmidt
Currently, the ppc_hash64_page_shift() function looks up a page size based
on information in an SLB entry. It open codes the bit translation for
existing CPUs, however different CPU models can have different SLB
encodings. We already store those in the 'sps' table in CPUPPCState, but
we don't cur
ppc_tlb_invalidate_one() has a big switch handling many different MMU
types. However, most of those branches can never be reached:
It is called from 3 places: from remove_hpte() and h_protect() in
spapr_hcall.c (which always has a 64-bit hash MMU type), and from
helper_tlbie() in mmu_helper.c.
C
From: Greg Kurz
Let's reuse the ppc_maybe_bswap_register() helper, like we already do
with the general registers.
Signed-off-by: Greg Kurz
Signed-off-by: David Gibson
---
target-ppc/translate_init.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/target-ppc/tra
At present the 64-bit hash MMU code uses information from the SLB to
determine the page size of a translation. We do need that information to
correctly look up the hash table. However the MMU also allows a
possibly larger page size to be encoded into the HPTE itself, which is used
to populate the
This stub function is in the !KVM ifdef in target-ppc/kvm_ppc.h. However
no such function exists on the KVM side, or is ever used.
I think this originally referenced a function which read host page size
information from /proc, for we we now use the KVM GET_SMMU_INFO extension
instead.
In any cas
Like a lot of places these files include a mixture of functions taking
both the older CPUPPCState *env and newer PowerPCCPU *cpu. Move a step
closer to cleaning this up by standardizing on PowerPCCPU, except for the
helper_* functions which are called with the CPUPPCState * from tcg.
Callers and
From: Programmingkid
Darwin/OS X use the undocumented kMacRISCPCIAddressSelect (0x48) to
configure PCI memory space size for mac99 machines. Without this
register, warnings similar to below are emitted to the console during boot:
AppleMacRiscPCI: bad range 2(8000:0100)
AppleMacRiscPCI: b
From: Greg Kurz
This helper will be used to support FP, Altivec and VSX registers when
the guest is little-endian.
Signed-off-by: Greg Kurz
Signed-off-by: David Gibson
---
target-ppc/cpu.h | 1 +
target-ppc/gdbstub.c | 10 +-
2 files changed, 6 insertions(+), 5 deletions(-)
diff
From: Greg Kurz
Let's reuse the ppc_maybe_bswap_register() helper, like we already do
with the general registers.
Signed-off-by: Greg Kurz
Signed-off-by: David Gibson
---
target-ppc/translate_init.c | 4
1 file changed, 4 insertions(+)
diff --git a/target-ppc/translate_init.c b/target-p
The implementation of the H_ENTER hypercall for PAPR guests needs to
enforce correct access attributes on the inserted HPTE. This means
determining if the HPTE's real address is a regular RAM address (which
requires attributes for coherent access) or an IO address (which requires
attributes for ca
Use error_setg() and return an error, rather than using an explicit exit().
Also improve messages, and be more explicit about which constraint failed.
Signed-off-by: David Gibson
Reviewed-by: Bharata B Rao
Reviewed-by: Thomas Huth
Reviewed-by: Alexey Kardashevskiy
Reviewed-by: Markus Armbrust
Currently spapr_cpu_init() is hardcoded to handle any errors as fatal.
That works for now, since it's only called from initial setup where an
error here means we really can't proceed.
However, we'll want to handle this more flexibly for cpu hotplug in future
so generalize this using the error repo
From: Anton Blanchard
Add the XML and functions to get and set VSX registers.
Signed-off-by: Anton Blanchard
(fixed little-endian guests)
Signed-off-by: Greg Kurz
Signed-off-by: David Gibson
---
configure | 6 +++---
gdb-xml/power-vsx.xml | 44 +++
From: Greg Kurz
On VSX capable CPUs, the 32 FP registers are mapped to the high-bits
of the 32 first VSX registers. So if you have:
VSR31 = (uint128) 0x0102030405060708090a0b0c0d0e0f00
then
FPR31 = (uint64) 0x0102030405060708
The kernel stores the VSX registers in the fp_state struct followin
From: Greg Kurz
Altivec registers are 128-bit wide. They are stored in memory as two
64-bit values that must be byteswapped when the guest is little-endian.
Let's reuse the ppc_maybe_bswap_register() helper for this.
We also need to fix the ordering of the 64-bit elements according to
the target
Current ppc_set_compat() returns -1 for errors, and also (unconditionally)
reports an error message. The caller in h_client_architecture_support()
may then report it again using an outdated fprintf().
Clean this up by using the modern error reporting mechanisms. Also add
strerror(errno) to the e
h_client_architecture_support() uses rtas_ld() for general purpose memory
access, despite the fact that it's not an RTAS routine at all and rtas_ld
makes things more awkward.
Clean this up by replacing rtas_ld() calls with appropriate ldXX_phys()
calls.
Signed-off-by: David Gibson
Reviewed-by: A
From: Alyssa Milburn
This avoids MacsBug hanging at startup in the absence of ADB mouse
input, by replying with an error (which is also what MOL does) when
it sends an unknown command (0x1c).
Signed-off-by: Alyssa Milburn
Signed-off-by: David Gibson
---
hw/misc/macio/cuda.c | 5 +
1 file
rtas_st_buffer_direct() is a not particularly useful wrapper around
cpu_physical_memory_write(). All the callers are in
rtas_ibm_configure_connector, where it's better handled by local helper.
Signed-off-by: David Gibson
Reviewed-by: Alexey Kardashevskiy
---
hw/ppc/spapr_rtas.c| 17 +++
From: Bharata B Rao
If guest doesn't have any dynamically reconfigurable (DR) logical memory
blocks (LMB), then we shouldn't create ibm,dynamic-reconfiguration-memory
device tree node.
Signed-off-by: Bharata B Rao
Signed-off-by: David Gibson
---
hw/ppc/spapr.c | 9 -
1 file changed, 8
Use error_setg() to return an error rather than an explicit exit().
Previously it was an exit(0) instead of a non-zero exit code, which was
simply a bug. Also improve the error message.
While we're at it change the type of spapr_vga_init() to bool since that's
how we're using it anyway.
Signed-o
The functions for migrating the hash page table on pseries machine type
(htab_save_setup() and htab_load()) can report some errors with an
explicit fprintf() before returning an appropriate error code. Change some
of these to use error_report() instead. htab_save_setup() is omitted for
now to avoi
Use the error handling infrastructure to pass an error out from
try_create_xics() instead of assuming &error_abort - the caller is in a
better position to decide on error handling policy.
Also change the error handling from an &error_abort to &error_fatal, since
this occurs during the initial mach
The errors detected in this function necessarily indicate bugs in the rest
of the qemu code, rather than an external or configuration problem.
So, a simple assert() is more appropriate than any more complex error
reporting.
Signed-off-by: David Gibson
Reviewed-by: Thomas Huth
Reviewed-by: Alexe
From: Greg Kurz
This helper will be used to support Altivec registers in little-endian guests.
This patch does not change functionnality.
Note: I had to put the helper some lines away from the gdb_*_avr_reg()
routines to get a more readable patch.
Signed-off-by: Greg Kurz
Signed-off-by: David
This function includes a number of explicit fprintf()s for errors.
Change these to use error_report() instead.
Also replace the single exit(EXIT_FAILURE) with an explicit exit(1), since
the latter is the more usual idiom in qemu by a large margin.
Signed-off-by: David Gibson
Reviewed-by: Alexey
rtas_st_buffer() appears in spapr.h as though it were a widely used helper,
but in fact it is only used for saving data in a format used by
rtas_ibm_get_system_parameter(). This changes it to a local helper more
specifically for that function.
While we're there fix a couple of small defects in
rt
From: Mark Cave-Ayland
Otherwise some internal xer variables fail to get set post-migration.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Alexey Kardashevskiy
Signed-off-by: David Gibson
---
target-ppc/machine.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-ppc/m
From: Mark Cave-Ayland
Include some fields missed from the previous VMState conversion to the
migration stream, as well as the new SR_INT delay timer.
Signed-off-by: Mark Cave-Ayland
Signed-off-by: David Gibson
---
hw/misc/macio/cuda.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions
From: Benjamin Herrenschmidt
We never released anything older than POWER8 DD2.0 and POWER8E DD2.1,
so let's use these versions, without that some firmware or Linux code
might fail to use some HW features that were non functional in earlier
internal only spins of the chip.
Signed-off-by: Benjamin
The following changes since commit 357e81c7e880f868833edf9f53cce1f3b09ea8ec:
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20160128' into
staging (2016-01-28 11:46:34 +)
are available in the git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-2.6-201
From: Mark Cave-Ayland
Make sure that we include the value of dma_active in the migration stream.
Signed-off-by: Mark Cave-Ayland
Acked-by: John Snow
Signed-off-by: David Gibson
---
hw/ide/macio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/ide/macio.c b/hw/ide/m
From: Mark Cave-Ayland
Make sure that we include the DBDMA controller state in the migration
stream.
Signed-off-by: Mark Cave-Ayland
Signed-off-by: David Gibson
---
hw/misc/macio/mac_dbdma.c | 40
1 file changed, 36 insertions(+), 4 deletions(-)
diff
The following changes since commit 357e81c7e880f868833edf9f53cce1f3b09ea8ec:
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20160128' into
staging (2016-01-28 11:46:34 +)
are available in the git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-2.6-201
SoC in subject line.
On Fri, Jan 15, 2016 at 3:58 PM, Andrew Baumann
wrote:
> This is the SoC for Raspberry Pi 2.
>
> Signed-off-by: Andrew Baumann
> ---
>
> Notes:
> v4:
> * s/ic/control/
> * replace use of smp_cpus with enabled-cpus property
> * propagate errors rather than exi
Hi Peter,
> From: Peter Crosthwaite [mailto:crosthwaitepe...@gmail.com]
> Sent: Thursday, 28 January 2016 20:38
>
> On Fri, Jan 15, 2016 at 3:58 PM, Andrew Baumann
> wrote:
> > This module is specific to the bcm2836 (Pi2). It implements the top
> > level interrupt controller, and mailboxes used
On Fri, Jan 15, 2016 at 3:58 PM, Andrew Baumann
wrote:
> This module is specific to the bcm2836 (Pi2). It implements the top
> level interrupt controller, and mailboxes used for inter-processor
> synchronisation.
>
> Signed-off-by: Andrew Baumann
> ---
>
> Notes:
> v4:
> * delete unused d
On Thu, Jan 28, 2016 at 09:44:53PM +0100, Alexander Graf wrote:
>
>
> On 01/27/2016 11:13 AM, David Gibson wrote:
> >Encoding of page sizes on 64-bit hash MMUs for Power is rather arcane,
> >involving control bits in both the SLB and HPTE. At present we
> >support a few of the options, but far f
On Tue, Jan 26, 2016 at 09:13:34AM +, Peter Maydell wrote:
> On 26 January 2016 at 05:37, David Gibson wrote:
> > Good grief. And this would be why I don't generally test 32-bit
> > builds...
>
> 32-bit on 64-bit host is a special case of a cross-compile,
> and cross-compiling is always pain
On Sun, Jan 24, 2016 at 03:41:26PM +, James Clarke wrote:
> Signed-off-by: James Clarke
So, first, for a patch making a subtle behavioural change like this a
detailed commit message is absolutely essential. In this case I can
take the description from 0/2, but in future please include
ration
On Thu, Jan 28, 2016 at 11:19:43AM +0530, Bharata B Rao wrote:
> Prevent guests from booting with CPU topologies that have partially
> filled CPU cores or can result in partially filled CPU cores after
> CPU hotplug like
>
> -smp 15,sockets=1,cores=4,threads=4,maxcpus=16 or
> -smp 15,sockets=1,cor
On Thu, Jan 28, 2016 at 10:04:58PM +0100, Alexander Graf wrote:
>
>
> On 01/19/2016 12:02 PM, David Gibson wrote:
> >On Tue, Jan 19, 2016 at 01:18:17PM +0530, Bharata B Rao wrote:
> >>On Mon, Jan 18, 2016 at 04:44:38PM +1100, David Gibson wrote:
> >>>Here is a draft qemu implementation of my prop
On Sun, Jan 24, 2016 at 03:41:24PM +, James Clarke wrote:
> Here is the description of the mcrfs instruction from the PowerPC Architecture
> Book, Version 2.02, Book I: PowerPC User Instruction Set Architecture
> (http://www.ibm.com/developerworks/systems/library/es-archguide-v2.html),
> found
On Thu, Jan 28, 2016 at 04:45:21PM +0100, Thomas Huth wrote:
> On 27.01.2016 11:13, David Gibson wrote:
> > ppc_tlb_invalidate_one() has a big switch handling many different MMU
> > types. However, most of those branches can never be reached:
> >
> > It is called from 3 places: from remove_hpte()
On 01/28/2016 11:15 PM, Stefan Hajnoczi wrote:
On Thu, Jan 28, 2016 at 09:13:24AM +0800, Wen Congyang wrote:
On 01/27/2016 10:46 PM, Stefan Hajnoczi wrote:
On Wed, Jan 13, 2016 at 05:18:31PM +0800, Changlong Xie wrote:
+static void secondary_do_checkpoint(BDRVReplicationState *s, Error **errp)
On 01/21/2016 06:58 AM, Markus Armbruster wrote:
> Eric Blake writes:
>
>> The previous commit documented an inconsistency in how we are
>> using the stack of qmp-output-visitor. Normally, pushing a
>> single top-level object puts the object on the stack twice:
>> once as the root, and once as t
On Fri, 2016-01-29 at 02:22 +, Kay, Allen M wrote:
>
> > -Original Message-
> > From: iGVT-g [mailto:igvt-g-boun...@lists.01.org] On Behalf Of Alex
> > Williamson
> > Sent: Thursday, January 28, 2016 11:36 AM
> > To: Gerd Hoffmann; qemu-devel@nongnu.org
> > Cc: igv...@ml01.01.org; xen-
> -Original Message-
> From: iGVT-g [mailto:igvt-g-boun...@lists.01.org] On Behalf Of Alex
> Williamson
> Sent: Thursday, January 28, 2016 11:36 AM
> To: Gerd Hoffmann; qemu-devel@nongnu.org
> Cc: igv...@ml01.01.org; xen-de...@lists.xensource.com; Eduardo Habkost;
> Stefano Stabellini; Ca
With a mirror job running on a virtio-blk dataplane disk, sending "q" to
HMP will cause a dead loop in block_job_finish_sync.
This is because the aio_poll() only processes the AIO context of bs
which has no more work to do, while the main loop BH that is scheduled
for setting the job->completed fl
On 2016年01月28日 22:54, Peter Maydell wrote:
> On 27 January 2016 at 01:37, Chen Gang wrote:
>> Within one single call to target_mmap(), it should be OK.
>>
>> But multiple call to target_mmap(), may call mmap_frag() multiple times
>> for the same host page (also for the same target page). In our c
On 01/28/2016 01:44 PM, Jason Wang wrote:
On 01/27/2016 10:40 AM, Zhang Chen wrote:
From: ZhangChen
Traffic-mirror is a netfilter plugin.
It gives qemu the ability to copy and mirror guest's
net packet. we output packet to chardev.
usage:
-netdev tap,id=hn0
-chardev socket,id=mirror0,hos
Le 28/01/2016 23:29, Eric Blake a écrit :
> On 01/28/2016 03:08 PM, Laurent Vivier wrote:
>
> Subject line is TOOO long. I suggest:
>
> linux-user: Fix qemu-binfmt-conf.h to store config across reboot
OK. I was waiting this comment ;)
>
>> This script can configure debian and systemd servic
On 01/20/2016 08:19 AM, Markus Armbruster wrote:
> Eric Blake writes:
>
>> All other successful clients of visit_start_struct() were paired
>> with an unconditional visit_end_struct(); but the generated
>> code for events was relying on qmp_output_visitor_cleanup() to
>> work on an incomplete vis
On 01/27/2016 11:13 AM, David Gibson wrote:
Encoding of page sizes on 64-bit hash MMUs for Power is rather arcane,
involving control bits in both the SLB and HPTE. At present we
support a few of the options, but far fewer than real hardware.
We're able to get away with that in practice, becau
On 28/01/2016 20:57, John Snow wrote:
> This is fine for now as it protects us against doing something stupid in
> a mechanical fashion, but I still wonder under which case we are
> "starting" the FIS or CLB engines without getting a valid address. (The
> unmap should only be happening when we /s
The LTTng tracing backend includes the system's "syscall.h", but QEMU
replaces it with its own for linux-user builds. This results in a double
include on some targets (when LTTng is enabled).
Signed-off-by: Lluís Vilanova
---
linux-user/aarch64/syscall.h |5 +
linux-user/alpha/syscall.h
On 01/28/2016 03:08 PM, Laurent Vivier wrote:
Subject line is TOOO long. I suggest:
linux-user: Fix qemu-binfmt-conf.h to store config across reboot
> This script can configure debian and systemd services to restore
> configuration on reboot. Moreover, it is able to manage binfmt
> credential a
Eric Blake writes:
> On 01/28/2016 02:41 PM, Lluís Vilanova wrote:
>> Signed-off-by: Lluís Vilanova
>> ---
>> target-ppc/kvm.c|4 ++--
>> target-ppc/kvm_ppc.h| 15 +--
>> target-ppc/mmu-hash32.c |5 +++--
>> target-ppc/mmu_helper.c |3 +--
>> 4 files changed, 15
Eric Blake writes:
> On 01/28/2016 02:41 PM, Lluís Vilanova wrote:
>> Gives some general guidelines for reporting errors in QEMU.
>>
>> Signed-off-by: Lluís Vilanova
>> ---
>> HACKING | 33 +
>> 1 file changed, 33 insertions(+)
>>
>> diff --git a/HACKING b/HACKI
On Thu, Jan 28, 2016 at 10:04:58PM +0100, Alexander Graf wrote:
>
> Does this work on real hardware? Say, a G5?
Do you mean, could a bare-metal kernel change its hashed page table?
It could - it would have to allocate a new table, copy over the bolted
mappings (at least), switch to real mode, cha
This script can configure debian and systemd services to restore
configuration on reboot. Moreover, it is able to manage binfmt
credential and to configure the path of the interpreter.
List of supported CPU is:
i386 i486 alpha arm sparc32plus ppc ppc64 ppc64le
m68k mips mipsel mipsn32 mipsn32el m
On 01/28/2016 02:53 PM, Lluís Vilanova wrote:
> Gives some general guidelines for reporting errors in QEMU.
>
> Signed-off-by: Lluís Vilanova
> ---
> HACKING | 33 +
> 1 file changed, 33 insertions(+)
I'm not sure if my v4 review crossed paths with this, but I
On Wed, Jan 27, 2016 at 6:46 AM, KONRAD Frederic
wrote:
> Hi,
>
>
> Le 19/01/2016 23:34, Alistair Francis a écrit :
>>
>> From: Peter Crosthwaite
>>
>> This API provides some encapsulation of registers and factors our some
>> common functionality to common code. Bits of device state (usually MMIO
Gives some general guidelines for reporting errors in QEMU.
Signed-off-by: Lluís Vilanova
---
HACKING | 33 +
1 file changed, 33 insertions(+)
diff --git a/HACKING b/HACKING
index 12fbc8a..aecc77c 100644
--- a/HACKING
+++ b/HACKING
@@ -157,3 +157,36 @@ painful.
On 01/27/2016 10:49 PM, Bharata B Rao wrote:
> This is the hmp equivalent of "query ppc-cpu-cores"
The QMP command is spelled "query-ppc-cpu-cores".
Most HMP commands prefer '_' over '-'; so this should be 'info
ppc_cpu_cores'.
>
> Signed-off-by: Bharata B Rao
> ---
> hmp-commands-info.hx | 1
Please ignore this version; I forgot to fix a typo (fixed in v5).
Cheers,
Lluis
Lluís Vilanova writes:
> Adds leaner error-reporting functions for simple cases, and documents the
> purpose of the different facilities available in QEMU.
> Although not all printf+exit/abort are replaced with th
Signed-off-by: Lluís Vilanova
---
target-ppc/kvm.c|4 ++--
target-ppc/kvm_ppc.h| 15 +--
target-ppc/mmu-hash32.c |5 +++--
target-ppc/mmu_helper.c |3 +--
4 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
ind
Replaces all direct uses of 'error_setg(&error_fatal/abort)' with
'error_report_fatal/abort'. Also reimplements the former on top of the
latter.
Signed-off-by: Lluís Vilanova
---
hw/block/fdc.c |6 +++---
hw/ppc/spapr.c |8
hw/ppc/spapr_drc.c |2 +-
util/error.c
Signed-off-by: Lluís Vilanova
---
target-ppc/kvm.c|5 +--
target-ppc/translate.c |7 ++--
target-ppc/translate_init.c | 80 +--
3 files changed, 44 insertions(+), 48 deletions(-)
diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
i
Provide two lean functions to report error messages that fatal/abort
QEMU.
Signed-off-by: Lluís Vilanova
---
include/qemu/error-report.h | 19 +++
util/qemu-error.c | 33 +
2 files changed, 52 insertions(+)
diff --git a/include/qemu/
Adds leaner error-reporting functions for simple cases, and documents the
purpose of the different facilities available in QEMU.
Although not all printf+exit/abort are replaced with the proper functions, a few
are ported as an example.
Changes in v5
=
* Fix typo in documentation [Er
On 01/28/2016 02:41 PM, Lluís Vilanova wrote:
> Gives some general guidelines for reporting errors in QEMU.
>
> Signed-off-by: Lluís Vilanova
> ---
> HACKING | 33 +
> 1 file changed, 33 insertions(+)
>
> diff --git a/HACKING b/HACKING
> index 12fbc8a..f5783d4
1 - 100 of 288 matches
Mail list logo
