Re: [Qemu-devel] [RFC PATCH v3 2/3] VFIO driver for vGPU device

On 5/5/2016 2:44 AM, Neo Jia wrote: On Wed, May 04, 2016 at 11:06:19AM -0600, Alex Williamson wrote: On Wed, 4 May 2016 03:23:13 + "Tian, Kevin" wrote: From: Alex Williamson [mailto:alex.william...@redhat.com] Sent: Wednesday, May 04, 2016 6:43 AM + +

Re: [Qemu-devel] [PATCH v6 00/26] IOMMU: Enable interrupt remapping for Intel IOMMU

On Thu, May 05, 2016 at 11:25:35AM +0800, Peter Xu wrote: > Hi, all, > > This is v6 for Intel IOMMU IR support. This series introduced quite > a few new patches based on v5. Sorry for that (Yes, Jan is > contributing to it as well, though most of which are really good > ideas for me :). Hopefully

[Qemu-devel] [PATCH v4 3/6] qemu-io: Allow unaligned access by default

There's no reason to require the user to specify a flag just so they can pass in unaligned numbers. Keep 'read -p' and 'write -p' as no-ops so that I don't have to hunt down and update all users of qemu-io, but otherwise make their behavior default as 'read' and 'write'. Also fix 'write -z',

[Qemu-devel] [PATCH v4 1/6] qemu-io: Add missing option documentation

Commit 499afa2 added --image-opts, but forgot to document it in --help. Likewise for commit 9e8f183 and -d/--discard. Finally, commit 10d9d75 removed -g/--growable, but forgot to cull it from the valid short options. Signed-off-by: Eric Blake --- qemu-io.c | 4 +++- 1 file

[Qemu-devel] [PATCH v4 2/6] qemu-io: Use bool for command line flags

We require a C99 compiler; let's use it to express what we really mean. Signed-off-by: Eric Blake --- qemu-io-cmds.c | 94 +- 1 file changed, 47 insertions(+), 47 deletions(-) diff --git a/qemu-io-cmds.c

[Qemu-devel] [PATCH v4 5/6] qemu-io: Add 'open -u' to set BDRV_O_UNMAP after the fact

When opening a file from the command line, qemu-io defaults to BDRV_O_UNMAP but allows -d to give full control to disable unmaps. But when opening via the 'open' command, qemu-io did not set BDRV_O_UNMAP, and had no way to allow it. Make it at least possible to symmetrically test things: 'qemu-io

[Qemu-devel] [PATCH v4 6/6] qemu-io: Add 'write -z -u' to test MAY_UNMAP flag

Make it easier to control whether the BDRV_REQ_MAY_UNMAP flag can be passed through a write_zeroes command, by adding the '-u' flag to qemu-io 'write -z' and 'aio_write -z'. To be useful, the device has to be opened with 'qemu-io -d unmap' (or the just-added 'open -u' subcommand). Signed-off-by:

[Qemu-devel] [PATCH v4 4/6] qemu-io: Add 'write -f' to test FUA flag

Make it easier to test block drivers with BDRV_REQ_FUA in .supported_write_flags, by adding the '-f' flag to qemu-io to conditionally pass the flag through to specific writes ('write', 'write -z', 'writev', 'aio_write', 'aio_write -z'). You'll want to use 'qemu-io -t none' to actually make -f

[Qemu-devel] [PATCH v4 0/6] qemu-io: UI enhancements

While working on NBD, I found myself cursing the qemu-io UI for not letting me test various scenarios, particularly after fixing NBD to serve at byte granularity [1]. And in the process of writing these qemu-io enhancements, I also managed to flush out several other bugs in the block layer

[Qemu-devel] [PATCH v6 24/26] kvm-irqchip: i386: add hook for add/remove virq

Adding two hooks to be notified when adding/removing msi routes. On x86 platform, one list is maintained for all existing msi routes. Signed-off-by: Peter Xu --- include/sysemu/kvm.h | 6 ++ kvm-all.c| 2 ++ target-arm/kvm.c | 11 +++

Re: [Qemu-devel] [PATCH 11/18] vhost-user: add shutdown support

Hello, On Wed, May 04, 2016 at 10:13:49PM +0300, Michael S. Tsirkin wrote: > How do you avoid it? > > > > Management is required to make this robust, auto-reconnect > > > is handy for people bypassing management. > > > > tbh, I don't like autoreconnect. My previous series didn't include > >

[Qemu-devel] [PATCH v6 26/26] kvm-irqchip: do explicit commit when update irq

In the past, we are doing gsi route commit for each irqchip route update. This is not efficient if we are updating lots of routes in the same time. This patch removes the committing phase in kvm_irqchip_update_msi_route(). Instead, we do explicit commit after all routes updated. Signed-off-by:

[Qemu-devel] [PATCH v6 25/26] kvm-irqchip: x86: add msi route notify fn

One more IEC notifier is added to let msi routes know about the IEC changes. When interrupt invalidation happens, all registered msi routes will be updated for all PCI devices. Since both vfio and vhost are possible gsi route consumers, this patch will go one step further to keep them safe in

[Qemu-devel] [PATCH v6 23/26] kvm-irqchip: simplify kvm_irqchip_add_msi_route

Changing the original MSIMessage parameter in kvm_irqchip_add_msi_route into the vector number. Vector index provides more information than the MSIMessage, we can retrieve the MSIMessage using the vector easily. This will avoid fetching MSIMessage every time before adding MSI routes. Meanwhile,

[Qemu-devel] [PATCH v6 22/26] x86-iommu: replace existing VT-d hooks into X86 ones

Previously, there are lots of VT-d hooks in common codes (like q35, ioapic, etc.). A better way is to avoid using VT-d interfaces. Also, we can start to abstract some common functions between Intel and future AMD IOMMU device. This patch cleaned up all the VT-d hooks into x86 ones, and moved IEC

[Qemu-devel] [PATCH v6 19/26] intel_iommu: Add support for Extended Interrupt Mode

From: Jan Kiszka As neither QEMU nor KVM support more than 255 CPUs so far, this is simple: we only need to switch the destination ID translation in vtd_remap_irq_get if EIME is set. Once CFI support is there, it will have to take EIM into account as well. So far,

[Qemu-devel] [PATCH v6 17/26] ioapic: keep RO bits for IOAPIC entry

Currently IOAPIC RO bits can be written. To be better aligned with hardware, we should let them read-only. Reviewed-by: Radim Krčmář Signed-off-by: Peter Xu --- hw/intc/ioapic.c | 4 include/hw/i386/ioapic_internal.h | 5 + 2

[Qemu-devel] [PATCH v6 16/26] ioapic: register VT-d IEC invalidate notifier

Let IOAPIC the first consumer of VT-d IEC invalidation notifiers. This is only used for split irqchip case, when VT-d receives IR invalidation requests, IOAPIC will be notified to update kernel irq routes. For simplicity, we just update all IOAPIC routes, even if the invalidated entries are not

[Qemu-devel] [PATCH v6 21/26] x86-iommu: introduce parent class

Introducing parent class for intel-iommu devices named "x86-iommu". This is preparation work to abstract shared functionalities out from Intel and AMD IOMMUs. Currently, only the parent class is introduced. It does nothing yet. Signed-off-by: Peter Xu ---

[Qemu-devel] [PATCH v6 11/26] q35: ioapic: add support for emulated IOAPIC IR

This patch translates all IOAPIC interrupts into MSI ones. One pseudo ioapic address space is added to transfer the MSI message. By default, it will be system memory address space. When IR is enabled, it will be IOMMU address space. Currently, only emulated IOAPIC is supported. Idea suggested by

[Qemu-devel] [PATCH v6 15/26] intel_iommu: introduce IEC notifiers

This patch introduces Intel VT-d IEC (Interrupt Entry Cache) invalidation notifier list. When vIOMMU receives IEC invalidate request, all the registered units will be notified with specific invalidation requests. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 56

[Qemu-devel] [PATCH v6 20/26] intel_iommu: add SID validation for IR

This patch enables SID validation. Invalid interrupts will be dropped. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 70 +++ include/hw/i386/intel_iommu.h | 21 - target-i386/kvm.c | 3 +- 3 files

[Qemu-devel] [PATCH v6 12/26] ioapic: introduce ioapic_entry_parse() helper

Abstract IOAPIC entry parsing logic into a helper function. Signed-off-by: Peter Xu --- hw/intc/ioapic.c | 110 +++ 1 file changed, 54 insertions(+), 56 deletions(-) diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c index

[Qemu-devel] [PATCH v6 14/26] q35: add "intremap" parameter to enable IR

One flag is added to specify whether to enable IR for emulated IOMMU. By default, interrupt remapping is not supportted. To enable it, we should specify something like: $ qemu-system-x86_64 -M q35,iommu=on,intremap=on To be more clear, the following command: $ qemu-system-x86_64 -M q35,iommu=on

[Qemu-devel] [PATCH v6 06/26] intel_iommu: handle interrupt remap enable

Handle writting to IRE bit in global command register. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 20 1 file changed, 20 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 00b873c..4d14124 100644 ---

[Qemu-devel] [PATCH v6 08/26] intel_iommu: provide helper function vtd_get_iommu

Moves acpi_get_iommu() under VT-d to make it a public function. Signed-off-by: Peter Xu --- hw/i386/acpi-build.c | 7 +-- hw/i386/intel_iommu.c | 13 + include/hw/i386/intel_iommu.h | 2 ++ 3 files changed, 16 insertions(+), 6 deletions(-)

[Qemu-devel] [PATCH v6 18/26] ioapic: clear remote irr bit for edge-triggered interrupts

This is to better emulate IOAPIC version 0x1X hardware. Linux kernel leveraged this "feature" to do explicit EOI since EOI register is still not introduced at that time. This will also fix the issue that level triggered interrupts failed to work when IR enabled (tested with Linux kernel version

[Qemu-devel] [PATCH v6 10/26] intel_iommu: Add support for PCI MSI remap

This patch enables interrupt remapping for PCI devices. To play the trick, one memory region "iommu_ir" is added as child region of the original iommu memory region, covering range 0xfeeX (which is the address range for APIC). All the writes to this range will be taken as MSI, and translation

[Qemu-devel] [PATCH v6 04/26] acpi: add DMAR scope definition for root IOAPIC

To enable interrupt remapping for intel IOMMU device, each IOAPIC device in the system reported via ACPI MADT must be explicitly enumerated under one specific remapping hardware unit. This patch adds the root-complex IOAPIC into the default DMAR device. Please refer to VT-d spec 8.3.1.1 for more

[Qemu-devel] [PATCH v6 07/26] intel_iommu: define several structs for IOMMU IR

Several data structs are defined to better support the rest of the patches: IRTE to parse remapping table entries, and IOAPIC/MSI related structure bits to parse interrupt entries to be filled in by guest kernel. Signed-off-by: Peter Xu --- include/hw/i386/intel_iommu.h | 60

[Qemu-devel] [PATCH v6 09/26] intel_iommu: add IR translation faults defines

Adding translation fault definitions for interrupt remapping. Please refer to VT-d spec section 7.1. Signed-off-by: Peter Xu --- hw/i386/intel_iommu_internal.h | 13 + 1 file changed, 13 insertions(+) diff --git a/hw/i386/intel_iommu_internal.h

[Qemu-devel] [PATCH v6 13/26] intel_iommu: add support for split irqchip

In split irqchip mode, IOAPIC is working in user space, only update kernel irq routes when entry changed. When IR is enabled, we directly update the kernel with translated messages. It works just like a kernel cache for the remapping entries. Since KVM irqfd is using kernel gsi routes to deliver

[Qemu-devel] [PATCH v6 02/26] intel_iommu: allow queued invalidation for IR

Queued invalidation is required for IR. This patch add basic support for interrupt cache invalidate requests. Since we currently have no IR cache implemented yet, we can just skip all interrupt cache invalidation requests for now. Signed-off-by: Peter Xu ---

[Qemu-devel] [PATCH v6 05/26] intel_iommu: define interrupt remap table addr register

Defined Interrupt Remap Table Address register to store IR table pointer. Also, do proper handling on global command register writes to store table pointer and its size. One more debug flag "DEBUG_IR" is added for interrupt remapping. Signed-off-by: Peter Xu ---

[Qemu-devel] [PATCH v6 03/26] intel_iommu: set IR bit for ECAP register

Enable IR in IOMMU Extended Capability register. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 7 +++ hw/i386/intel_iommu_internal.h | 2 ++ 2 files changed, 9 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 4b0558e..17668d6

[Qemu-devel] [PATCH v6 01/26] acpi: enable INTR for DMAR report structure

Introduce iommu_intr in MachineState to show whether IOMMU IR is enabled. By default, IR is off. In ACPI DMA remapping report structure, enable INTR flag when specified. Signed-off-by: Peter Xu --- hw/core/machine.c | 2 ++ hw/i386/acpi-build.c | 12

[Qemu-devel] [PATCH v6 00/26] IOMMU: Enable interrupt remapping for Intel IOMMU

Hi, all, This is v6 for Intel IOMMU IR support. This series introduced quite a few new patches based on v5. Sorry for that (Yes, Jan is contributing to it as well, though most of which are really good ideas for me :). Hopefully we can get its convergence in this version. To make the review

Re: [Qemu-devel] [PATCH 0/5] QOM'ify hw/display devices

在 2016年05月04日 22:26, Peter Maydell 写道: On 24 March 2016 at 10:29, xiaoqiang zhao wrote: This patch set trys to QOM'ify hw/display files, see commit messages for more details xiaoqiang zhao (5): hw/display: QOM'ify exynos4210_fimd.c hw/display: QOM'ify jazz_led.c

Re: [Qemu-devel] [RFC PATCH V3 4/4] colo-compare: add TCP, UDP, ICMP packet comparison

On 05/05/2016 11:03 AM, Zhang Chen wrote: On 04/29/2016 03:44 AM, Dr. David Alan Gilbert wrote: * Zhang Chen (zhangchen.f...@cn.fujitsu.com) wrote: Signed-off-by: Zhang Chen Signed-off-by: Li Zhijian Signed-off-by: Wen Congyang

[Qemu-devel] [PATCH RESEND 2/5] hw/display: QOM'ify jazz_led.c

* Drop the old SysBus init function and use instance_init * Move graphic_console_init into realize stage Signed-off-by: xiaoqiang zhao --- hw/display/jazz_led.c | 18 +++--- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/hw/display/jazz_led.c

[Qemu-devel] [PATCH RESEND 4/5] hw/display: QOM'ify milkymist-vgafb.c

* Drop the old SysBus init function and use instance_init * Move graphic_console_init into realize stage Signed-off-by: xiaoqiang zhao --- hw/display/milkymist-vgafb.c | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git

[Qemu-devel] [PATCH RESEND 1/5] hw/display: QOM'ify exynos4210_fimd.c

* Drop the old SysBus init function and use instance_init * Move graphic_console_init into realize stage Signed-off-by: xiaoqiang zhao --- hw/display/exynos4210_fimd.c | 19 --- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git

[Qemu-devel] [PATCH RESEND 5/5] hw/display: QOM'ify pl110.c

* Drop the old SysBus init function and use instance_init * Move graphic_console_init into realize stage Signed-off-by: xiaoqiang zhao --- hw/display/pl110.c | 19 +-- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/hw/display/pl110.c

[Qemu-devel] [PATCH RESEND 3/5] hw/display: QOM'ify milkymist-tmu2.c

* Drop the old SysBus init function and use instance_init * Move tmu2_glx_init into realize stage Signed-off-by: xiaoqiang zhao --- hw/display/milkymist-tmu2.c | 24 ++-- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git

[Qemu-devel] [PATCH RESEND 0/5] QOM'ify hw/display devices

This patch set trys to QOM'ify hw/display files, see commit messages for more details. xiaoqiang zhao (5): hw/display: QOM'ify exynos4210_fimd.c hw/display: QOM'ify jazz_led.c hw/display: QOM'ify milkymist-tmu2.c hw/display: QOM'ify milkymist-vgafb.c hw/display: QOM'ify pl110.c

Re: [Qemu-devel] [RFC PATCH V3 4/4] colo-compare: add TCP, UDP, ICMP packet comparison

On 04/29/2016 03:44 AM, Dr. David Alan Gilbert wrote: * Zhang Chen (zhangchen.f...@cn.fujitsu.com) wrote: Signed-off-by: Zhang Chen Signed-off-by: Li Zhijian Signed-off-by: Wen Congyang --- net/colo-compare.c

Re: [Qemu-devel] [PATCH 0/5] QOM'ify hw/display devices

在 2016年05月04日 22:26, Peter Maydell 写道: On 24 March 2016 at 10:29, xiaoqiang zhao wrote: This patch set trys to QOM'ify hw/display files, see commit messages for more details xiaoqiang zhao (5): hw/display: QOM'ify exynos4210_fimd.c hw/display: QOM'ify jazz_led.c

[Qemu-devel] [PATCH qemu] vfio: Fix 128 bit handling when deleting region

7532d3cbf "vfio: Fix 128 bit handling" added support for 64bit IOMMU memory regions when those are added to VFIO address space; however removing code cannot cope with these as int128_get64() will fail on 1<<64. This copies 128bit handling from region_add() to region_del(). Since the only machine

Re: [Qemu-devel] [PATCH 1/2] block: Invalidate all children

On Wed, 05/04 12:10, Kevin Wolf wrote: > Am 19.04.2016 um 03:42 hat Fam Zheng geschrieben: > > Currently we only recurse to bs->file, which will miss the children in > > quorum > > and VMDK. > > > > Recurse into the whole subtree to avoid that. > > > > Signed-off-by: Fam Zheng

Re: [Qemu-devel] [PATCH 2/2] block: Inactivate all children

On Wed, 05/04 12:12, Kevin Wolf wrote: > Am 19.04.2016 um 03:42 hat Fam Zheng geschrieben: > > Currently we only inactivate the top BDS. Actually bdrv_inactivate > > should be the opposite of bdrv_invalidate_cache. > > > > Recurse into the whole subtree instead. > > > > Signed-off-by: Fam Zheng

[Qemu-devel] [PATCH v6 07/20] scsi-disk: Switch to byte-based aio block access

Sector-based blk_aio_readv() and blk_aio_writev() should die; switch to byte-based blk_aio_preadv() and blk_aio_pwritev() instead. Signed-off-by: Eric Blake --- hw/scsi/scsi-disk.c | 31 +++ 1 file changed, 15 insertions(+), 16 deletions(-) diff

[Qemu-devel] [PATCH v6 17/20] nbd: Switch to byte-based block access

Sector-based blk_read() should die; switch to byte-based blk_pread() instead. Signed-off-by: Eric Blake --- qemu-nbd.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/qemu-nbd.c b/qemu-nbd.c index c55b40f..c07ceef 100644 --- a/qemu-nbd.c +++

[Qemu-devel] [PATCH v6 16/20] atapi: Switch to byte-based block access

Sector-based blk_read() should die; switch to byte-based blk_pread() instead. Add new defines ATAPI_SECTOR_BITS and ATAPI_SECTOR_SIZE to use anywhere we were previously scaling BDRV_SECTOR_* by 4, for better legibility. Signed-off-by: Eric Blake --- v4: add new defines for

[Qemu-devel] [PATCH v6 13/20] pflash: Switch to byte-based block access

Sector-based blk_write() should die; switch to byte-based blk_pwrite() instead. Likewise for blk_read(). Signed-off-by: Eric Blake --- hw/block/pflash_cfi01.c | 12 ++-- hw/block/pflash_cfi02.c | 12 ++-- 2 files changed, 12 insertions(+), 12 deletions(-)

[Qemu-devel] [PATCH v6 20/20] block: Kill unused sector-based blk_* functions

Now that there are no remaining clients, we can drop the sector-based blk_read(), blk_write(), blk_aio_readv(), and blk_aio_writev(). Sadly, there are still remaining sector-based interfaces, such as blk_*discard(), or blk_write_compressed(); those will have to wait for another day.

[Qemu-devel] [PATCH v6 08/20] virtio: Switch to byte-based aio block access

Sector-based blk_aio_readv() and blk_aio_writev() should die; switch to byte-based blk_aio_preadv() and blk_aio_pwritev() instead. The trace is modified at the same time, and nb_sectors is now unused. Fix a comment typo while in the vicinity. Signed-off-by: Eric Blake ---

[Qemu-devel] [PATCH v6 19/20] qemu-io: Switch to byte-based block access

qemu-io is the last user of several sector-based interfaces. This patch upgrades to the new interfaces under the hood, then deletes the resulting dead code. Note that for maximum back-compat, while the -p option is no longer required to get blk_pread(), it is still needed to allow for unaligned

[Qemu-devel] [PATCH v6 18/20] qemu-img: Switch to byte-based block access

Sector-based blk_write() should die; switch to byte-based blk_pwrite() instead. Likewise for blk_read(). Signed-off-by: Eric Blake --- qemu-img.c | 28 +++- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/qemu-img.c b/qemu-img.c index

[Qemu-devel] [PATCH v6 05/20] block: Introduce byte-based aio read/write

blk_aio_readv() and blk_aio_writev() are annoying in that they can't access sub-sector granularity, and cannot pass flags. Also, they require the caller to pass redundant information about the size of the I/O. Add new blk_aio_preadv() and blk_aio_pwritev() functions to fix the flaws. The next few

[Qemu-devel] [PATCH v6 10/20] fdc: Switch to byte-based block access

Sector-based blk_write() should die; switch to byte-based blk_pwrite() instead. Likewise for blk_read(). Signed-off-by: Eric Blake --- hw/block/fdc.c | 25 + 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/hw/block/fdc.c

[Qemu-devel] [PATCH v6 02/20] block: Drop private ioctl-only members of BlockRequest

I was thrown by the fact that the public type BlockRequest had an anonymous union, but no obvious discriminator. Turns out that the only client of the second branch of the union was code internal to io.c, and that with a slight abuse of QEMUIOVector* to pass a void* pointer, we can make the

[Qemu-devel] [PATCH v6 15/20] m25p80: Switch to byte-based block access

Sector-based blk_read() should die; switch to byte-based blk_pread() instead. Likewise for blk_aio_readv() and blk_aio_writev(). Signed-off-by: Eric Blake --- hw/block/m25p80.c | 23 +++ 1 file changed, 7 insertions(+), 16 deletions(-) diff --git

[Qemu-devel] [PATCH v6 09/20] xen_disk: Switch to byte-based aio block access

Sector-based blk_aio_readv() and blk_aio_writev() should die; switch to byte-based blk_aio_preadv() and blk_aio_pwritev() instead. Signed-off-by: Eric Blake --- hw/block/xen_disk.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git

[Qemu-devel] [PATCH v6 14/20] sd: Switch to byte-based block access

Sector-based blk_write() should die; switch to byte-based blk_pwrite() instead. Likewise for blk_read(). Greatly simplifies the code, now that we let the block layer take care of alignment and read-modify-write on our behalf :) In fact, we no longer need to include 'buf' in the migration stream

[Qemu-devel] [PATCH v6 01/20] block: Allow BDRV_REQ_FUA through blk_pwrite()

We have several block drivers that understand BDRV_REQ_FUA, and emulate it in the block layer for the rest by a full flush. But without a way to actually request BDRV_REQ_FUA during a pass-through blk_pwrite(), FUA-aware block drivers like NBD are forced to repeat the emulation logic of a full

[Qemu-devel] [PATCH v6 11/20] nand: Switch to byte-based block access

Sector-based blk_write() should die; switch to byte-based blk_pwrite() instead. Likewise for blk_read(). This file is doing some complex computations to map various flash page sizes (256, 512, and 2048) atop generic uses of 512-byte sector operations. Perhaps someone will want to tidy up the

[Qemu-devel] [PATCH v6 03/20] block: Switch blk_read_unthrottled() to byte interface

Sector-based blk_read() should die; convert the one-off variant blk_read_unthrottled(). Signed-off-by: Eric Blake --- include/sysemu/block-backend.h | 4 ++-- block/block-backend.c | 8 hw/block/hd-geometry.c | 2 +- 3 files changed, 7 insertions(+),

[Qemu-devel] [PATCH v6 12/20] onenand: Switch to byte-based block access

Sector-based blk_write() should die; switch to byte-based blk_pwrite() instead. Likewise for blk_read(). This particular device picks its size during onenand_initfn(), and can be at most 0x8000 bytes; therefore, shifting an 'int sec' request to get back to a byte offset should never overflow

[Qemu-devel] [PATCH v6 04/20] block: Switch blk_*write_zeroes() to byte interface

Sector-based blk_write() should die; convert the one-off variant blk_write_zeroes() to use an offset/count interface instead. Likewise for blk_co_write_zeroes() and blk_aio_write_zeroes(). Signed-off-by: Eric Blake --- include/sysemu/block-backend.h | 12 ++--

[Qemu-devel] [PATCH v6 00/20] block: kill sector-based blk_write/read

2.7 material, depends on Kevin's block-next: git://repo.or.cz/qemu/kevin.git block-next Previously posted as part of a larger NBD series [1] and as v5 [2]. Mostly orthogonal to Kevin's recent work to also kill sector interfaces from the driver. [1]

[Qemu-devel] [PATCH v6 06/20] ide: Switch to byte-based aio block access

Sector-based blk_aio_readv() and blk_aio_writev() should die; switch to byte-based blk_aio_preadv() and blk_aio_pwritev() instead. The patch had to touch multiple files at once, because dma_blk_io() takes pointers to the functions, and ide_issue_trim() piggybacks on the same interface (while

Re: [Qemu-devel] [Bug 1576347] [NEW] Only one NVMe device is usable in Windows (10) guest

> > C:\Windows\system32>sg_vpd -p sn PD1 > > Unit serial number VPD page: > > Unit serial number: ___." I checked your serial number against the SNT refernce on nvmexpress.org and it's definitely the wrong translation, so that has to be a guest OS driver bug (Linux has the

Re: [Qemu-devel] [Bug 1576347] [NEW] Only one NVMe device is usable in Windows (10) guest

On Fri, Apr 29, 2016 at 10:10:39AM +0100, Stefan Hajnoczi wrote: > On Thu, Apr 28, 2016 at 05:44:21PM -, Tom Yan wrote: > > CCing Keith Busch , maintainer of QEMU NVMe. > Maybe he has an idea. Thanks for the report. Sounds like a Windows specific issue as I have no

[Qemu-devel] [PATCH 51/52] target-m68k: add cmpm

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 21 + 1 file changed, 21 insertions(+) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 029c166..2d92bdd 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@

[Qemu-devel] [PATCH 52/52] target-m68k: sr/ccr cleanup

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 35 ++- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 2d92bdd..4f3e8ca 100644 --- a/target-m68k/translate.c +++

[Qemu-devel] [PATCH 50/52] target-m68k: immediate ops manage word and byte operands

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 57 ++--- 1 file changed, 35 insertions(+), 22 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index a22ee67..029c166 100644 ---

[Qemu-devel] [PATCH 43/52] target-m68k: or can manage word and byte operands

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 14 -- 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index cfe878a..15109ed 100644 --- a/target-m68k/translate.c +++

[Qemu-devel] [PATCH 46/52] target-m68k: introduce byte and word cc_ops

Signed-off-by: Laurent Vivier --- target-m68k/cpu.h | 6 +-- target-m68k/helper.c| 25 + target-m68k/translate.c | 99 ++--- 3 files changed, 80 insertions(+), 50 deletions(-) diff --git a/target-m68k/cpu.h

[Qemu-devel] [PATCH 48/52] target-m68k: add/sub manage word and byte operands

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 71 ++--- 1 file changed, 38 insertions(+), 33 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index bd7394f..f880a2a 100644 ---

[Qemu-devel] [PATCH 44/52] target-m68k: and can manage word and byte operands

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 15109ed..9fed334 100644 --- a/target-m68k/translate.c +++

[Qemu-devel] [PATCH 47/52] target-m68k: add addressing modes to neg

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 20 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 2b6ba15..bd7394f 100644 --- a/target-m68k/translate.c +++

[Qemu-devel] [PATCH 49/52] target-m68k: cmp manages word and bytes operands

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index f880a2a..a22ee67 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c

[Qemu-devel] [PATCH 42/52] target-m68k: eor can manage word and byte operands

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 13 +++-- 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 1c3c9a2..cfe878a 100644 --- a/target-m68k/translate.c +++

[Qemu-devel] [PATCH 45/52] target-m68k: suba/adda can manage word operand

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 9fed334..a8e9b64 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@

[Qemu-devel] [PATCH 41/52] target-m68k: add addressing modes to not

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index df5ce94..1c3c9a2 100644 --- a/target-m68k/translate.c +++

[Qemu-devel] [PATCH 40/52] target-m68k: add exg ops

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 45 + 1 file changed, 45 insertions(+) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 53c3c41..df5ce94 100644 --- a/target-m68k/translate.c +++

Re: [Qemu-devel] [RFC PATCH v3 2/3] VFIO driver for vGPU device

On Wed, May 04, 2016 at 11:06:19AM -0600, Alex Williamson wrote: > On Wed, 4 May 2016 03:23:13 + > "Tian, Kevin" wrote: > > > > From: Alex Williamson [mailto:alex.william...@redhat.com] > > > Sent: Wednesday, May 04, 2016 6:43 AM > > > > + > > > > + if

[Qemu-devel] [PATCH 38/52] target-m68k: add linkl

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 26 +- 1 file changed, 21 insertions(+), 5 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 80033fc..9a38235 100644 --- a/target-m68k/translate.c +++

[Qemu-devel] [PATCH 36/52] target-m68k: inline shift ops

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 211 1 file changed, 176 insertions(+), 35 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index d183a3c..d48ab66 100644 ---

[Qemu-devel] [PATCH 39/52] target-m68k: movem

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 51 ++--- 1 file changed, 36 insertions(+), 15 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 9a38235..53c3c41 100644 ---

[Qemu-devel] [PATCH 35/52] target-m68k: inline rotate ops

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 353 1 file changed, 353 insertions(+) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 1d05c6a..d183a3c 100644 --- a/target-m68k/translate.c +++

[Qemu-devel] [PATCH 37/52] target-m68k: add cas/cas2 ops

Signed-off-by: Laurent Vivier --- linux-user/main.c | 193 target-m68k/cpu.h | 9 +++ target-m68k/qregs.def | 5 ++ target-m68k/translate.c | 175 +++ 4 files changed,

[Qemu-devel] [PATCH 34/52] target-m68k: add 64bit mull

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 54 ++--- 1 file changed, 42 insertions(+), 12 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index b47f9c1..1d05c6a 100644 ---

[Qemu-devel] [PATCH 33/52] target-m68k: inline divu/divs

Signed-off-by: Laurent Vivier --- linux-user/main.c | 7 ++ target-m68k/cpu.h | 4 - target-m68k/helper.h| 2 - target-m68k/op_helper.c | 49 target-m68k/qregs.def | 2 - target-m68k/translate.c | 198

[Qemu-devel] [PATCH 30/52] target-m68k: add scc/dbcc

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 46 ++ 1 file changed, 46 insertions(+) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 5914185..cd656fe 100644 --- a/target-m68k/translate.c +++

[Qemu-devel] [PATCH 29/52] target-m68k: factorize flags computing

Signed-off-by: Laurent Vivier --- target-m68k/helper.c | 125 +-- 1 file changed, 42 insertions(+), 83 deletions(-) diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 42a2f1c..e9e7cee 100644 ---

[Qemu-devel] [PATCH 31/52] target-m68k: some bit ops cleanup

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 34 +++--- 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index cd656fe..817f0b3 100644 --- a/target-m68k/translate.c +++

[Qemu-devel] [PATCH 28/52] target-m68k: add addx/subx/negx ops

Signed-off-by: Laurent Vivier --- target-m68k/translate.c | 200 ++-- 1 file changed, 160 insertions(+), 40 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 13ae953..5914185 100644 ---

[Qemu-devel] [PATCH 26/52] target-m68k: Inline shifts

From: Richard Henderson Signed-off-by: Richard Henderson fix arithmetical/logical switch Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 52 --- target-m68k/helper.h| 3 --

[Qemu-devel] [PATCH 27/52] target-m68k: Inline addx, subx, negx

From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Laurent Vivier --- target-m68k/helper.c| 40 - target-m68k/helper.h| 2 -- target-m68k/translate.c | 67

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