Re: [Qemu-devel] [Qemu-ppc] [PULL 02/12] ppc: Use split I/D mmu modes to avoid flushes on interrupts

On 02/06/16 04:15, David Gibson wrote: > On Wed, Jun 01, 2016 at 08:33:30PM +0100, Mark Cave-Ayland wrote: >> On 31/05/16 01:41, David Gibson wrote: >> >>> From: Benjamin Herrenschmidt >>> >>> We rework the way the MMU indices are calculated, providing separate >>>

Re: [Qemu-devel] [RFC PATCH v0 0/2] Increase max memslots to 512 for PowerPC

On Thu, Jun 02, 2016 at 10:42:23AM +1000, David Gibson wrote: > On Wed, Jun 01, 2016 at 12:18:22PM +0200, Thomas Huth wrote: > > On 01.06.2016 11:51, Bharata B Rao wrote: > > > Recently the number of memory slots supported by KVM for PowerPC was > > > changed > > > from 32 to 512. QEMU was

Re: [Qemu-devel] [PATCH qemu v17 07/12] vfio: spapr: Add DMA memory preregistering (SPAPR IOMMU v2)

On Wed, Jun 01, 2016 at 06:57:38PM +1000, Alexey Kardashevskiy wrote: > This makes use of the new "memory registering" feature. The idea is > to provide the userspace ability to notify the host kernel about pages > which are going to be used for DMA. Having this information, the host > kernel can

Re: [Qemu-devel] [PATCH qemu v17 08/12] spapr_pci: Add and export DMA resetting helper

On Wed, Jun 01, 2016 at 06:57:39PM +1000, Alexey Kardashevskiy wrote: > This will be later used by the "ibm,reset-pe-dma-window" RTAS handler > which resets the DMA configuration to the defaults. > > Signed-off-by: Alexey Kardashevskiy > Reviewed-by: David Gibson

Re: [Qemu-devel] [PATCH v8 04/25] acpi: add DMAR scope definition for root IOAPIC

On Wed, Jun 01, 2016 at 02:56:38PM +0200, Igor Mammedov wrote: [...] > > @@ -2561,6 +2563,9 @@ build_dmar_q35(MachineState *ms, GArray *table_data, > > GArray *linker) > > AcpiTableDmar *dmar; > > AcpiDmarHardwareUnit *drhd; > > uint8_t dmar_flags = 0; > > +

Re: [Qemu-devel] [QEMU RFC PATCH v3 1/6] Migration: Defined VMStateDescription struct for spapr_drc

On Tue, May 31, 2016 at 11:02:39AM -0700, Jianjun Duan wrote: > To manage hotplug/unplug of dynamic resources such as PCI cards, > memory, and CPU on sPAPR guests, a firmware abstraction known as > a Dynamic Resource Connector (DRC) is used to assign a particular > dynamic resource to the guest,

Re: [Qemu-devel] [QEMU RFC PATCH v3 4/6] Migration: migrate QTAILQ

On Tue, May 31, 2016 at 11:02:42AM -0700, Jianjun Duan wrote: > Currently we cannot directly transfer a QTAILQ instance because of the > limitation in the migration code. Here we introduce an approach to > transfer such structures. In our approach such a structure is tagged > with VMS_CSTM. We

[Qemu-devel] [PATCH] seccomp: Add support for ppc/ppc64

Support for ppc/ppc64 is official in libseccomp 2.3.0, so modify the configuration script to allow qemuu to enable seccomp for those platforms. Signed-off-by: Michael Strosaker --- configure | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configure

Re: [Qemu-devel] [PATCH 4/6 Resend] Vhost-pci RFC: Detailed Description in the Virtio Specification Format

On 06/02/2016 11:15 AM, Wang, Wei W wrote: On Wed 6/1/2016 4:15 PM, Xiao Guangrong wrote: On 05/29/2016 04:11 PM, Wei Wang wrote: Signed-off-by: Wei Wang --- Details | 324 1 file changed, 324

Re: [Qemu-devel] [PATCH qemu v17 00/12] spapr: vfio: Enable Dynamic DMA windows (DDW)

On Wed, Jun 01, 2016 at 06:57:31PM +1000, Alexey Kardashevskiy wrote: > Each Partitionable Endpoint (IOMMU group) has an address range on a PCI bus > where devices are allowed to do DMA. These ranges are called DMA windows. > By default, there is a single DMA window, 1 or 2GB big, mapped at zero >

Re: [Qemu-devel] [for-2.7 PATCH v3 06/15] cpu: Abstract CPU core type

On Thu, May 12, 2016 at 09:18:16AM +0530, Bharata B Rao wrote: > Add an abstract CPU core type that could be used by machines that want > to define and hotplug CPUs in core granularity. > > Signed-off-by: Bharata B Rao > Signed-off-by: Igor Mammedov

Re: [Qemu-devel] [PATCH qemu v17 06/12] memory: Add reporting of supported page sizes

On Wed, Jun 01, 2016 at 06:57:37PM +1000, Alexey Kardashevskiy wrote: > Every IOMMU has some granularity which MemoryRegionIOMMUOps::translate > uses when translating, however this information is not available outside > the translate context for various checks. > > This adds a get_page_sizes

Re: [Qemu-devel] [Qemu-ppc] [PULL 04/12] ppc: tlbie, tlbia and tlbisync are HV only

On Wed, Jun 01, 2016 at 08:03:08AM +0100, Mark Cave-Ayland wrote: > On 01/06/16 03:15, David Gibson wrote: > > > On Tue, May 31, 2016 at 11:28:49PM +0100, Mark Cave-Ayland wrote: > >> On 31/05/16 01:41, David Gibson wrote: > >> > >>> From: Benjamin Herrenschmidt > >>> >

Re: [Qemu-devel] [PATCH 4/6 Resend] Vhost-pci RFC: Detailed Description in the Virtio Specification Format

On Wed 6/1/2016 4:15 PM, Xiao Guangrong wrote: > On 05/29/2016 04:11 PM, Wei Wang wrote: > > Signed-off-by: Wei Wang > > --- > > Details | 324 > > > 1 file changed, 324 insertions(+) > > create mode

Re: [Qemu-devel] [PATCH] block/raw-posix: Fix error_report of mounting message

On Thu, 06/02 03:04, Wei, Jiangang wrote: > On Wed, 2016-06-01 at 15:23 +0800, Fam Zheng wrote: > > On Wed, 06/01 15:08, Wei Jiangang wrote: > > > Use a single error_printf to replace triple error_report. > > > > > > Signed-off-by: Wei Jiangang > > > --- > > >

Re: [Qemu-devel] [Qemu-ppc] [PULL 02/12] ppc: Use split I/D mmu modes to avoid flushes on interrupts

On Wed, Jun 01, 2016 at 08:33:30PM +0100, Mark Cave-Ayland wrote: > On 31/05/16 01:41, David Gibson wrote: > > > From: Benjamin Herrenschmidt > > > > We rework the way the MMU indices are calculated, providing separate > > indices for I and D side based on MSR:IR and

Re: [Qemu-devel] [PATCH] block/raw-posix: Fix error_report of mounting message

On Wed, 2016-06-01 at 15:23 +0800, Fam Zheng wrote: > On Wed, 06/01 15:08, Wei Jiangang wrote: > > Use a single error_printf to replace triple error_report. > > > > Signed-off-by: Wei Jiangang > > --- > > block/raw-posix.c | 10 +- > > 1 file changed, 5

[Qemu-devel] [Bug 1586611] Re: usb-hub can not be detached when detach usb device from VM

** Description changed: I give a host usb device to guest in the way of using "virsh attach-device" cmd. In guest os,use "lsusb" cmd I can see two devices have been added,one is usb device and the other is usb-hub（0409:55aa NEC Corp. Hub）. when I use "virsh detach-device" detach the usb

Re: [Qemu-devel] [RFC PATCH v4 0/3] Add Mediated device support[was: Add vGPU support]

On 05/31/2016 10:29 PM, Alex Williamson wrote: > On Tue, 31 May 2016 10:29:10 +0800 > Jike Song wrote: > >> On 05/28/2016 10:56 PM, Alex Williamson wrote: >>> On Fri, 27 May 2016 22:43:54 + >>> "Tian, Kevin" wrote: >>> My impression

Re: [Qemu-devel] [for-2.7 PATCH v3 05/15] qdev: hotplug: Introduce HotplugHandler.pre_plug() callback

On Thu, May 12, 2016 at 09:18:15AM +0530, Bharata B Rao wrote: > From: Igor Mammedov > > pre_plug callback is to be called before device.realize() is executed. > This would allow to check/set device's properties from HotplugHandler. > > Signed-off-by: Igor Mammedov

Re: [Qemu-devel] [PATCH v3 2/2] Makefile: Derive "PKGVERSION" from "git describe" by default

On Wed, 06/01 15:55, Paolo Bonzini wrote: > > > On 01/06/2016 13:13, Laszlo Ersek wrote: > > On 06/01/16 12:40, Gerd Hoffmann wrote: > >> Hi, > >> > >>> + git describe 2>/dev/null | tr -d '\n'; \ > >>> + if ! git diff-index --quiet HEAD

Re: [Qemu-devel] heterogenous cores

On Wed, Jun 1, 2016 at 2:39 PM, Peter Maydell wrote: > On 1 June 2016 at 22:34, Michael Rolnik wrote: >> as I understand it's not possible right off the shelf as some functions >> like gen_intermediate_code are global. >> so, the question is *is it a

Re: [Qemu-devel] [RFC PATCH v0 1/2] kvm: API to obtain max supported mem slots

On Wed, Jun 01, 2016 at 11:56:07AM +0200, Paolo Bonzini wrote: > > > On 01/06/2016 11:51, Bharata B Rao wrote: > > Introduce kvm_get_max_memslots() API that can be used to obtain the > > maximum number of memslots supported by KVM. > > > > Signed-off-by: Bharata B Rao

Re: [Qemu-devel] [PATCH qemu v16 04/19] vmstate: Define VARRAY with VMS_ALLOC

On Wed, Jun 01, 2016 at 10:11:05AM +0200, Paolo Bonzini wrote: > > > On 01/06/2016 04:29, Alexey Kardashevskiy wrote: > > On 27/05/16 17:54, Alexey Kardashevskiy wrote: > >> On 04/05/16 16:52, Alexey Kardashevskiy wrote: > >>> This allows dynamic allocation for migrating arrays. > >>> > >>>

Re: [Qemu-devel] [RFC PATCH v0 0/2] Increase max memslots to 512 for PowerPC

On Wed, Jun 01, 2016 at 12:18:22PM +0200, Thomas Huth wrote: > On 01.06.2016 11:51, Bharata B Rao wrote: > > Recently the number of memory slots supported by KVM for PowerPC was changed > > from 32 to 512. QEMU was restricting the user specifiable hot-pluggable > > memory > > slots to 32. This

[Qemu-devel] [PATCH] throttle: refuse iops-size without iops-total/read/write

In a similar vein to commit ee2bdc33c913b7d765baa5aa338c29fb30a05c9a ("throttle: refuse bps_max/iops_max without bps/iops") it is likely that the user made a configuration error if iops-size has been set but no iops limit has been set. Print an error message so the user can check their throttling

Re: [Qemu-devel] [PATCH] hw/char: QOM'ify escc.c (fix)

> 在 2016年6月2日，03:44，Mark Cave-Ayland 写道： > >> On 01/06/16 08:58, xiaoqiang zhao wrote: >> >> The previous commit e7c9136977cb99c6eb52c9139f7b8d8b5fa87db9 >> (hw/char: QOM'ify escc.c) cause qemu-system-ppc/ppc64 >> OpenBIOS to freeze on startup, this commit fix

Re: [Qemu-devel] [PATCH v4 00/11] nbd: tighter protocol compliance

ping On 05/11/2016 04:39 PM, Eric Blake wrote: > Fix several corner-case bugs in our implementation of the NBD > protocol, both as client and as server. > > Depends on Kevin's block-next branch: > git://repo.or.cz/qemu/kevin.git block-next > > Also available as a tag at this location: > git

Re: [Qemu-devel] [PATCH v5 1/4] Provide support for the CUSE TPM

> * BICKFORD, JEFFREY E (jb6...@att.com) wrote: > > > * Daniel P. Berrange (berra...@redhat.com) wrote: > > > > On Wed, Jan 20, 2016 at 10:54:47AM -0500, Stefan Berger wrote: > > > > > On 01/20/2016 10:46 AM, Daniel P. Berrange wrote: > > > > > >On Wed, Jan 20, 2016 at 10:31:56AM -0500, Stefan

Re: [Qemu-devel] [Qemu-ppc] [PATCH] target-ppc/fpu_helper: Fix efscmp* instructions handling

On Fri, May 27, 2016 at 07:43:46AM +, Imran, Talha wrote: > > On 05/27/2016 06:37 AM, David Gibson wrote: > > On Thu, May 19, 2016 at 05:11:35PM +0500, Talha Imran wrote: > >> With specification at hand from the reference manual from Freescale > >>

Re: [Qemu-devel] [RFC v2 PATCH 02/13] tcg/i386: Add support for fence

On Wed, Jun 1, 2016 at 5:17 PM, Richard Henderson wrote: > > Because x86 has a strong memory model. > > It does not require barriers to keep normal loads and stores in order. The > primary reason for the *fence instructions is to order the "non-temporal" > memory operations

Re: [Qemu-devel] heterogenous cores

On 1 June 2016 at 22:34, Michael Rolnik wrote: > as I understand it's not possible right off the shelf as some functions > like gen_intermediate_code are global. > so, the question is *is it a complex task to make a heterogenous setup > possible*? Yes, it's a complex task.

Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier

On 06/01/2016 11:43 AM, Pranith Kumar wrote: This is, IMO, confused. Either we should use the C++11 barrier types, or the Linux barrier types, but not both. This part of the design is still being fleshed out. The above listing is all the kinds of barriers we can encounter during translation.

Re: [Qemu-devel] heterogenous cores

as I understand it's not possible right off the shelf as some functions like gen_intermediate_code are global. so, the question is *is it a complex task to make a heterogenous setup possible*? On Thu, Jun 2, 2016 at 12:28 AM, Michael Rolnik wrote: > Hi all, > > Is there a way

[Qemu-devel] heterogenous cores

Hi all, Is there a way to build a platform with two or more different cores e.g. PPC & ARM ? -- Best Regards, Michael Rolnik

Re: [Qemu-devel] [RFC v2 PATCH 02/13] tcg/i386: Add support for fence

On 06/01/2016 11:49 AM, Pranith Kumar wrote: On Tue, May 31, 2016 at 4:27 PM, Richard Henderson wrote: On 05/31/2016 11:39 AM, Pranith Kumar wrote: +case INDEX_op_mb: +tcg_out_mb(s); You need to look at the barrier type and DTRT. In particular, the Linux

[Qemu-devel] [PATCH v2 04/13] block: Switch bdrv_write_zeroes() to byte interface

Rename to bdrv_pwrite_zeroes() to let the compiler ensure we cater to the updated semantics. Do the same for bdrv_aio_write_zeroes() and bdrv_co_write_zeroes(). Two of the three places map to the byte-based counterparts; but for now, since we have no byte-based aio write, we still require sector

[Qemu-devel] [PATCH v2 08/13] gluster: Convert to bdrv_co_pwrite_zeroes()

Another step on our continuing quest to switch to byte-based interfaces. Signed-off-by: Eric Blake Reviewed-by: Kevin Wolf --- block/gluster.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/block/gluster.c

[Qemu-devel] [PATCH v2 09/13] qed: Convert to bdrv_co_pwrite_zeroes()

Another step on our continuing quest to switch to byte-based interfaces. Kill an abuse of the comma operator while at it (fortunately, the semantics were still right). Also, the test for requests not aligned to clusters should be applied always, not just when a backing file is present.

[Qemu-devel] [PATCH v2 12/13] vmdk: Convert to bdrv_co_pwrite_zeroes()

Another step on our continuing quest to switch to byte-based interfaces. Signed-off-by: Eric Blake Reviewed-by: Kevin Wolf --- block/vmdk.c | 12 +--- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/block/vmdk.c b/block/vmdk.c index

[Qemu-devel] [PATCH v2 13/13] block: Kill bdrv_co_write_zeroes()

Now that all drivers have been converted to a byte interface, we no longer need a sector interface. Signed-off-by: Eric Blake Reviewed-by: Kevin Wolf --- include/block/block_int.h | 2 -- block/io.c| 15 ++- 2 files changed, 2

[Qemu-devel] [PATCH v2 05/13] iscsi: Convert to bdrv_co_pwrite_zeroes()

Another step on our continuing quest to switch to byte-based interfaces. As this is the first byte-based iscsi interface, convert is_request_lun_aligned() into two versions, one for sectors and one for bytes. Also, change from outright -EINVAL failure on an unaligned request, to instead failing

[Qemu-devel] [PATCH v2 10/13] raw-posix: Convert to bdrv_co_pwrite_zeroes()

Another step on our continuing quest to switch to byte-based interfaces. Signed-off-by: Eric Blake --- block/raw-posix.c | 34 +- trace-events | 2 +- 2 files changed, 18 insertions(+), 18 deletions(-) diff --git a/block/raw-posix.c

[Qemu-devel] [PATCH v2 07/13] blkreplay: Convert to bdrv_co_pwrite_zeroes()

Another step on our continuing quest to switch to byte-based interfaces. Signed-off-by: Eric Blake Reviewed-by: Kevin Wolf --- block/blkreplay.c | 10 -- 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/block/blkreplay.c

[Qemu-devel] [PATCH v2 06/13] qcow2: Convert to bdrv_co_pwrite_zeroes()

Another step on our continuing quest to switch to byte-based interfaces. Signed-off-by: Eric Blake --- block/qcow2.c | 37 +++-- trace-events | 4 ++-- 2 files changed, 21 insertions(+), 20 deletions(-) diff --git a/block/qcow2.c

[Qemu-devel] [PATCH v2 11/13] raw_bsd: Convert to bdrv_co_pwrite_zeroes()

Another step on our continuing quest to switch to byte-based interfaces. Signed-off-by: Eric Blake Reviewed-by: Kevin Wolf --- block/raw_bsd.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/block/raw_bsd.c b/block/raw_bsd.c

[Qemu-devel] [PATCH v2 03/13] block: Add .bdrv_co_pwrite_zeroes()

Update bdrv_co_do_write_zeroes() to be byte-based, and select between the new byte-based bdrv_co_pwrite_zeroes() or the old bdrv_co_write_zeroes(). The next patches will convert drivers, then remove the old interface. Signed-off-by: Eric Blake --- include/block/block_int.h |

[Qemu-devel] [PATCH v2 01/13] iscsi: Use block size as minimum zero/discard alignment

If hardware does not advertise a minimum zero/discard alignment, we still want to guarantee that the block layer will align requests to our blocks, rather than the arbitrary 512-byte BDRV sector size. Signed-off-by: Eric Blake --- block/iscsi.c | 5 + 1 file changed, 5

[Qemu-devel] [PATCH v2 02/13] block: Track write zero limits in bytes

Another step towards removing sector-based interfaces: convert the maximum write and minimum alignment values from sectors to bytes. Rename the variables to let the compiler check that all users are converted to the new semantics. The maximum remains an int as long as BDRV_REQUEST_MAX_SECTORS is

[Qemu-devel] [PATCH v2 00/13] Kill sector-based write_zeroes

Kevin pointed out that my recent change to byte-based instead of sector-based blk_write_zeroes() (commit 983a1600) makes life harder as long as bdrv_write_zeroes is still sector-based, and where the compiler doesn't flag any change in parameter types. Complete the conversion, by making all

Re: [Qemu-devel] [PATCH v6 10/15] qht: QEMU's fast, resizable and scalable Hash Table

On 31/05/16 10:46, Alex Bennée wrote: > Sergey Fedorov writes: > >> On 25/05/16 04:13, Emilio G. Cota wrote: >>> diff --git a/include/qemu/qht.h b/include/qemu/qht.h >>> new file mode 100644 >>> index 000..aec60aa >>> --- /dev/null >>> +++ b/include/qemu/qht.h >>> @@

[Qemu-devel] [Bug 1568356] Re: ERROR:ui/sdl2-2d.c:120:sdl2_2d_switch:

Could you add a debug printf before that assert statement in the code to see which format is missing here? So that the default case looks like: default: printf("Surface format is: %x\n", surface_format(scon->surface)); g_assert_not_reached(); -- You received this bug

Re: [Qemu-devel] [PATCH 02/10] qcow2: add qcow2_co_write_compressed

On Wed, Jun 01, 2016 at 11:25:57AM +0200, Kevin Wolf wrote: > Am 27.05.2016 um 19:33 hat Stefan Hajnoczi geschrieben: > > On Sat, May 14, 2016 at 03:45:50PM +0300, Denis V. Lunev wrote: > > > +qemu_co_mutex_lock(>lock); > > > +cluster_offset = \ > > > +

Re: [Qemu-devel] [PATCH] scsi: mark TYPE_SCSI_DISK_BASE as abstract

On Wed, Jun 01, 2016 at 03:15:09PM +0200, Paolo Bonzini wrote: > Suggested-by: Stefan Hajnoczi > Signed-off-by: Paolo Bonzini > --- > hw/scsi/scsi-disk.c | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Stefan Hajnoczi

Re: [Qemu-devel] [PATCH] block: Drop bdrv_ioctl_bh_cb

On Wed, Jun 01, 2016 at 09:52:23AM +0800, Fam Zheng wrote: > Similar to the "!drv || !drv->bdrv_aio_ioctl" case above, here it is > okay to set co.ret and return. As pointed out by Paolo, a BH will be > created as necessary by the caller (bdrv_co_maybe_schedule_bh). > Besides, as pointed out by

Re: [Qemu-devel] [PATCH] hw/char: QOM'ify escc.c (fix)

On 01/06/16 08:58, xiaoqiang zhao wrote: > The previous commit e7c9136977cb99c6eb52c9139f7b8d8b5fa87db9 > (hw/char: QOM'ify escc.c) cause qemu-system-ppc/ppc64 > OpenBIOS to freeze on startup, this commit fix it. > > Signed-off-by: xiaoqiang zhao > --- > hw/char/escc.c | 12

Re: [Qemu-devel] [Qemu-ppc] [PULL 02/12] ppc: Use split I/D mmu modes to avoid flushes on interrupts

On 31/05/16 01:41, David Gibson wrote: > From: Benjamin Herrenschmidt > > We rework the way the MMU indices are calculated, providing separate > indices for I and D side based on MSR:IR and MSR:DR respectively, > and thus no longer need to flush the TLB on context

Re: [Qemu-devel] [RESEND PATCH] pc: allow raising low memory via max-ram-below-4g option

On Wed, Jun 01, 2016 at 03:02:56PM +0200, Paolo Bonzini wrote: > On 01/06/2016 14:28, Gerd Hoffmann wrote: > > This patch extends the functionality of the max-ram-below-4g option > > to also allow increasing lowmem. Use case: Give as much memory as > > possible to legacy non-PAE guests. > > > >

Re: [Qemu-devel] [PATCH 4/7] scsi-disk: introduce dma_readv and dma_writev

On 23/05/16 13:54, Paolo Bonzini wrote: > These are replacements for blk_aio_preadv and blk_aio_pwritev that allow > customization of the data path. They reuse the DMA helpers' DMAIOFunc > callback type, so that the same function can be used in either the > QEMUSGList or the bounce-buffered

Re: [Qemu-devel] [RESEND PATCH] pc: allow raising low memory via max-ram-below-4g option

On Wed, Jun 01, 2016 at 02:28:11PM +0200, Gerd Hoffmann wrote: > This patch extends the functionality of the max-ram-below-4g option > to also allow increasing lowmem. Use case: Give as much memory as > possible to legacy non-PAE guests. > > While being at it also rework the lowmem calculation

Re: [Qemu-devel] [PATCH RFC 6/8] cpu: use CPUClass->parse_features() as convertor to global properties

On Wed, Jun 01, 2016 at 06:37:28PM +0200, Igor Mammedov wrote: > Currently CPUClass->parse_features() is used to parse > -cpu features string and set properties on created CPU > instances. > > But considering that features specified -cpu apply to > every created CPU instance, it doesn't make

Re: [Qemu-devel] [PATCH RFC 0/8] cpus: make "-cpu cpux, features" global properties

On Wed, Jun 01, 2016 at 07:21:00PM +0100, Peter Maydell wrote: > On 1 June 2016 at 17:37, Igor Mammedov wrote: > > Current CLI option -cpu cpux,features serves as template > > for all created cpus of type: cpux. However QEMU parses > > "features" every time it creates a cpu

Re: [Qemu-devel] [RFC v2 PATCH 02/13] tcg/i386: Add support for fence

On Tue, May 31, 2016 at 4:27 PM, Richard Henderson wrote: > On 05/31/2016 11:39 AM, Pranith Kumar wrote: >> >> +case INDEX_op_mb: >> +tcg_out_mb(s); > > > You need to look at the barrier type and DTRT. In particular, the Linux > smp_rmb and smp_wmb types need not

Re: [Qemu-devel] [PATCH RFC 4/8] target-i386: cpu: consolidate calls of object_property_parse() in x86_cpu_parse_featurestr

On Wed, Jun 01, 2016 at 06:37:26PM +0200, Igor Mammedov wrote: > Signed-off-by: Igor Mammedov > --- > target-i386/cpu.c | 32 +--- > 1 file changed, 17 insertions(+), 15 deletions(-) > > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index

Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for memory barrier

Hi Richard, Thanks for the review. I will make the changes you pointed out. One point below: On Tue, May 31, 2016 at 4:24 PM, Richard Henderson wrote: > On 05/31/2016 11:39 AM, Pranith Kumar wrote: >> +/* TCGOpmb args */ >> +#define TCG_MB_FULL ((TCGArg)(0)) >>

Re: [Qemu-devel] [QEMU RFC PATCH v3 4/6] Migration: migrate QTAILQ

On 01/06/2016 19:06, Jianjun Duan wrote: > On 06/01/2016 08:29 AM, Paolo Bonzini wrote: >> On 31/05/2016 23:53, Jianjun Duan wrote: >>> On 05/31/2016 12:54 PM, Paolo Bonzini wrote: > +/* put for QTAILQ */ > +static void put_qtailq(QEMUFile *f, void *pv, size_t unused_size, > +

Re: [Qemu-devel] [PATCH RFC 0/8] cpus: make "-cpu cpux, features" global properties

On 1 June 2016 at 17:37, Igor Mammedov wrote: > Current CLI option -cpu cpux,features serves as template > for all created cpus of type: cpux. However QEMU parses > "features" every time it creates a cpu instance and applies > them to it while doing parsing. > > That doesn't

[Qemu-devel] [Bug 1587970] [NEW] QEMU Crashes when attaching USB 3.00 devices to xhci bus

Public bug reported: Using qemu 2.6 with a windows7 32-bit VM, if I plug a USB 3.0 memory stick in to a USB 3.0 port, then pass it through to the VM via the monitor (device_add usb-host,bus=xhci.0,hostbus=xx,hostaddr=xx,id=stick1) then qemu asserts and dies - I have seen 2 different asserts

Re: [Qemu-devel] [PATCH RFC 3/8] target-i386: cpu: use cpu_generic_init() in cpu_x86_init()

On Wed, Jun 01, 2016 at 06:37:25PM +0200, Igor Mammedov wrote: > now cpu_x86_init() does nothing more or less > than duplicating cpu_generic_init() logic. > So simplify it by using cpu_generic_init(). > > Signed-off-by: Igor Mammedov Awesome. It bothers me that we're

Re: [Qemu-devel] [PATCH RFC 2/8] target-i386: cpu: move xcc->kvm_required check to reaize time

On Wed, Jun 01, 2016 at 06:37:24PM +0200, Igor Mammedov wrote: > it will allow to drop custom cpu_x86_init() and use > cpu_generic_init() instead reducing cpu_x86_create() > to a simple 3-liner. > > Signed-off-by: Igor Mammedov Nice, it also gets us closer to finally making

Re: [Qemu-devel] [PATCH RFC 1/8] target-i386: cpu: move features logic that requires CPUState to realize time

On Wed, Jun 01, 2016 at 06:37:23PM +0200, Igor Mammedov wrote: > it will allow to make x86_cpu_parse_featurestr() a pure convertor > of legacy features string into global properties. > That way -cpu FOOCPU,feat1=x,feat2=y,... is parsed only once I would write it as "will be parsed only once (this

Re: [Qemu-devel] [PATCH v4 1/1] Introduce "xen-load-devices-state"

* Amit Shah (amit.s...@redhat.com) wrote: > Dave, can you take a look? Yes, I think I'm happy with it; Reviewed-by: Dr. David Alan Gilbert I think people might try interesting non-Xen things with it; for example I think if you backed QEMU's main RAM by a /tmp file perhaps

Re: [Qemu-devel] [Qemu-devel [RFC] [WIP] v1] Keeping the Destination side alive incase of network failure (Migration recover from network failure)

* Md Haris Iqbal (haris.p...@gmail.com) wrote: > --- > include/migration/migration.h | 3 +++ > migration/migration.c | 12 > migration/savevm.c| 25 + > 3 files changed, 32 insertions(+), 8 deletions(-) > > diff --git

Re: [Qemu-devel] [QEMU RFC PATCH v3 4/6] Migration: migrate QTAILQ

On 06/01/2016 08:29 AM, Paolo Bonzini wrote: > > > On 31/05/2016 23:53, Jianjun Duan wrote: >> >> >> On 05/31/2016 12:54 PM, Paolo Bonzini wrote: >>> >>> >>> - Original Message - From: "Jianjun Duan" To: qemu-devel@nongnu.org Cc:

Re: [Qemu-devel] [PATCH v4 12/28] qapi: Add new visit_complete() function

Eric Blake writes: > Making each output visitor provide its own output collection > function was the only remaining reason for exposing visitor > sub-types to the rest of the code base. Add a polymorphic > visit_complete() function which is a no-op for input visitors, > and

[Qemu-devel] [PATCH RFC 8/8] pc: parse cpu features only once

considering that features are converted to global properties and global properties are automatically applied to every new instance of created CPU (at object_new() time), there is no point in parsing cpu_model string every time a CPU created. So move parsing outside CPU creation loop and do it only

[Qemu-devel] [PATCH 2/2] crypto: implement sha224, sha384, sha512 and ripemd160 hashes

Wire up the nettle and gcrypt hash backends so that they can support the sha224, sha384, sha512 and ripemd160 hash algorithms. Signed-off-by: Daniel P. Berrange --- crypto/hash-gcrypt.c | 4 crypto/hash-nettle.c | 29 +

[Qemu-devel] [PATCH 1/2] crypto: switch hash code to use nettle/gcrypt directly

Currently the internal hash code is using the gnutls hash APIs. GNUTLS in turn is wrapping either nettle or gcrypt. Not only were the GNUTLS hash APIs not added until GNUTLS 2.9.10, but they don't expose support for all the algorithms QEMU needs to use with LUKS. Address this by directly wrapping

[Qemu-devel] [PATCH 0/2] Change QEMU crypto hash implementation

This series changes the QEMU crypto hash implementation to use gcrypt/nettle directly instead of using gnutls abstraction. This then lets us support several more hash algorithms that gnutls does not expose itself. This is useful for LUKS block driver compatibility with dm-crypt. Daniel P.

[Qemu-devel] [PATCH RFC 7/8] arm: virt: parse cpu_model only once

considering that features are converted to global properties and global properties are automatically applied to every new instance of created CPU (at object_new() time), there is no point in parsing cpu_model string every time a CPU created. So move parsing outside CPU creation loop and do it only

[Qemu-devel] [PATCH RFC 5/8] target-sparc: cpu: use sparc_cpu_parse_features() directly

make SPARC target use sparc_cpu_parse_features() directly so it won't get in the way of switching other propertified targets to handling features as global properties. Signed-off-by: Igor Mammedov --- SPARC target could be switched to features properties later but that would

[Qemu-devel] [PATCH RFC 6/8] cpu: use CPUClass->parse_features() as convertor to global properties

Currently CPUClass->parse_features() is used to parse -cpu features string and set properties on created CPU instances. But considering that features specified -cpu apply to every created CPU instance, it doesn't make sence to parse the same features string for every CPU created. It also makes

[Qemu-devel] [PATCH RFC 2/8] target-i386: cpu: move xcc->kvm_required check to reaize time

it will allow to drop custom cpu_x86_init() and use cpu_generic_init() instead reducing cpu_x86_create() to a simple 3-liner. Signed-off-by: Igor Mammedov --- target-i386/cpu.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git

[Qemu-devel] [PATCH RFC 3/8] target-i386: cpu: use cpu_generic_init() in cpu_x86_init()

now cpu_x86_init() does nothing more or less than duplicating cpu_generic_init() logic. So simplify it by using cpu_generic_init(). Signed-off-by: Igor Mammedov --- target-i386/cpu.c | 20 +--- 1 file changed, 1 insertion(+), 19 deletions(-) diff --git

Re: [Qemu-devel] [PATCH] vhost-user: fix unreasonable return value when vhost-user read failed

Hi On Mon, May 23, 2016 at 8:50 AM, Gonglei wrote: > At present all corresponding functions which calling vhost_user_read() > don't return failure when vhost_user_read() executed failed. That's > dangerous, because VhostUserMsg will be a random value, and cause the >

[Qemu-devel] [PATCH RFC 4/8] target-i386: cpu: consolidate calls of object_property_parse() in x86_cpu_parse_featurestr

Signed-off-by: Igor Mammedov --- target-i386/cpu.c | 32 +--- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 238f69d..618aef9 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@

[Qemu-devel] [PATCH v2 5/7] ipmi: Fix SSIF ACPI handling to use the right CRS

From: Corey Minyard Signed-off-by: Corey Minyard --- hw/acpi/ipmi.c | 13 +++-- hw/acpi/noipmi.c | 2 +- hw/i386/acpi-build.c | 2 +- include/hw/acpi/ipmi.h | 2 +- 4 files changed, 10 insertions(+), 9 deletions(-) diff

[Qemu-devel] [PATCH RFC 0/8] cpus: make "-cpu cpux, features" global properties

Current CLI option -cpu cpux,features serves as template for all created cpus of type: cpux. However QEMU parses "features" every time it creates a cpu instance and applies them to it while doing parsing. That doesn't work well with -device/device_add infrastructure as it has no idea about cpu

[Qemu-devel] [PATCH RFC 1/8] target-i386: cpu: move features logic that requires CPUState to realize time

it will allow to make x86_cpu_parse_featurestr() a pure convertor of legacy features string into global properties. That way -cpu FOOCPU,feat1=x,feat2=y,... is parsed only once and as result of x86_cpu_parse_featurestr() a corresponding set of global properties for specified CPU type are

[Qemu-devel] [PATCH v2 7/7] pc: Add an SMB0 ACPI device to q35

From: Corey Minyard This is so I2C devices can be found in the ACPI namespace. Currently that's only IPMI, but devices can be easily added now. Adding the devices required some PCI information, and the bus itself to be added to the PCMachineState structure. Note that this

Re: [Qemu-devel] [PATCH 05/13] iscsi: Convert to bdrv_co_pwrite_zeroes()

On 05/25/2016 07:34 AM, Kevin Wolf wrote: > Am 25.05.2016 um 00:25 hat Eric Blake geschrieben: >> Another step on our continuing quest to switch to byte-based >> interfaces. >> >> As this is the first byte-based iscsi interface, convert >> is_request_lun_aligned() into two versions, one for

Re: [Qemu-devel] [PATCH v4 11/28] tests: Factor out common code in qapi output tests

Eric Blake writes: > Create a new visitor_get() function to capture common > actions taken in collecting output from an output visitor, > to make it easier to refactor the output visitors in a > later patch. While making test improvements, also use > _abort and

[Qemu-devel] [PATCH v2 6/7] pc: Add 2.7 machine options

From: Corey Minyard Signed-off-by: Corey Minyard --- hw/i386/pc_piix.c| 16 +--- hw/i386/pc_q35.c | 13 +++-- include/hw/i386/pc.h | 3 +++ 3 files changed, 27 insertions(+), 5 deletions(-) diff --git a/hw/i386/pc_piix.c

[Qemu-devel] [PATCH v2 1/7] i2c: Fix the PM SMBus driver so it actually works correctly

From: Corey Minyard The PM SMBus driver really just didn't work. This patch fixes it to be fairly hardware compliant with the actual hardware. Plus it adds interrupts and working block transfers. Signed-off-by: Corey Minyard --- hw/i2c/pm_smbus.c

[Qemu-devel] [PATCH v2 3/7] ipmi: Add an SMBus IPMI interface

From: Corey Minyard Signed-off-by: Corey Minyard --- default-configs/i386-softmmu.mak | 1 + default-configs/x86_64-softmmu.mak | 1 + hw/ipmi/Makefile.objs | 1 + hw/ipmi/smbus_ipmi.c | 230

[Qemu-devel] [PATCH v2 4/7] acpi: Add i2c serial bus CRS handling

From: Corey Minyard Signed-off-by: Corey Minyard --- hw/acpi/aml-build.c | 40 include/hw/acpi/aml-build.h | 18 ++ 2 files changed, 58 insertions(+) diff --git a/hw/acpi/aml-build.c

[Qemu-devel] [PATCH v2 0/7] An IPMI over SMBus device

This set of patches requires the previous IPMI ACPI patches, at least starting with patch 4. This set of patches fixes some fairly significant bugs with the pm_smbus device, which basically just wasn't functional beyond some very basic things. It's close to a rewrite of the state machine. After

[Qemu-devel] [PATCH v2 2/7] pm_smbus: Add the ability to force block transfer enable

From: Corey Minyard The PIIX4 hardware has block transfer buffer always enabled in the hardware, but the i801 does not. Add a parameter to pm_smbus_init to force on the block transfer so the PIIX4 handler can enable this by default, as it was disabled by default before.

Re: [Qemu-devel] [RFC Patch 0/3] Accept passed in socket 'fd' open from outside for unix socket

On 2016年06月01日 00:44, Daniel P. Berrange wrote: On Wed, Jun 01, 2016 at 12:30:44AM +0800, w...@redhat.com wrote: From: Wei Xu Recently I'm working on a fd passing issue, selinux forbids qemu to create a unix socket for a chardev when managing VMs with libvirt, because qemu

Re: [Qemu-devel] [RFC Patch 2/3] chardev: save the passed in 'fd' parameter during parsing

On 2016年06月01日 01:26, Eric Blake wrote: On 05/31/2016 10:30 AM, w...@redhat.com wrote: From: Wei Xu Save the 'fd' paramter as unix socket 'sockfd' member. Signed-off-by: Wei Xu --- qemu-char.c | 7 +++ 1 file changed, 7 insertions(+) diff --git

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