There is a new common one in virtio.h, use it.
Signed-off-by: Fam Zheng
---
hw/scsi/virtio-scsi.c | 5 +++--
include/hw/virtio/virtio-scsi.h | 6 ++
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/virtio-scsi.c
index
This reverts commit ab27c3b5e7408693dde0b565f050aa55c4a1bcef.
The virtio storage device host notifiers now work with
bdrv_drained_begin/end, so we don't need this hack any more.
Signed-off-by: Fam Zheng
---
block/mirror.c | 9 -
1 file changed, 9 deletions(-)
diff
AIO based handler is more appropriate here because it will then
cooperate with bdrv_drained_begin/end. It is needed by the coming
revert patch.
Signed-off-by: Fam Zheng
---
hw/block/virtio-blk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
AIO based handler is more appropriate here because it will then
cooperate with bdrv_drained_begin/end. It is needed by the coming
revert patch.
Signed-off-by: Fam Zheng
---
hw/scsi/virtio-scsi.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git
The function pointer signature has been repeated a few times, using a
typedef may make coding easier.
Signed-off-by: Fam Zheng
Reviewed-by: Stefan Hajnoczi
---
hw/virtio/virtio.c | 9 -
include/hw/virtio/virtio.h | 5 +++--
2 files changed,
On 07/13/2016 10:54 AM, Jason Wang wrote:
On 2016年07月11日 18:02, Zhang Chen wrote:
+static int colo_packet_compare_icmp(Packet *spkt, Packet *ppkt)
+{
+int network_length;
+struct icmp *icmp_ppkt, *icmp_spkt;
+
+trace_colo_compare_main("compare icmp");
+network_length =
v4: Drop patch 1. [Cornelia]
Add the last trivial patch.
v3: Rebase to master.
Squash 4 into 3. [Paolo]
Add comment and commit message. [Stefan]
Add Stefan's r-b in patch 1 and 2.
v2: Only convert virtio-{blk,scsi}. [Paolo]
The benifit of this is we don't use
Using this function instead of virtio_add_queue marks the vq as aio
based. This differentiation will be useful in later patches.
Distinguish between virtqueue processing in the iohandler context and main loop
AioContext. iohandler context is isolated from AioContexts and therefore does
not run
Currently, we use memory_region_is_mapped() to detect if the host
backend memory is being used. This works if the memory is directly
mapped into guest's address space, however, it is not true for
nvdimm as it uses aliased memory region to map the memory. This is
why this bug can happen:
'info memdev' crashes QEMU:
(qemu) info memdev
Unexpected error in parse_str() at qapi/string-input-visitor.c:111:
Parameter 'null' expects an int64 value or range
It is caused by null uint16List is returned if 'host-nodes' is the default
value
Return MAX_NODES under this case to fix
On Tue, Jul 12, 2016 at 12:43:24PM -0400, Theodore Ts'o wrote:
> On Tue, Jul 12, 2016 at 03:14:38PM +0800, Zhangfei Gao wrote:
> > Some update:
> >
> > If test with ext2, no problem in iblock.
> > If test with ext4, ext4_mb_generate_buddy reported error in the
> > removing files after reboot.
> >
On Tue, Jul 12, 2016 at 03:14:38PM +0800, Zhangfei Gao wrote:
> Some update:
>
> If test with ext2, no problem in iblock.
> If test with ext4, ext4_mb_generate_buddy reported error in the
> removing files after reboot.
>
>
> root@(none)$ rm test
> [ 21.006549] EXT4-fs error (device sda):
if I fold this patch into previous ones, they will become non buildable,
because this patch assumes existance of functions from the preceding patch.
Is this acceptable?
On Tue, Jul 12, 2016 at 10:30 AM, Richard Henderson wrote:
> On 07/06/2016 03:33 PM, Michael Rolnik wrote:
>
Hi Alex,
I will use workable state support flag
to let user know whether the kenerl support block feature.
And make configure space writing and ioctl function blocked.
And what of my suggestion that a user may desire to poll the state of
the device?
I will also add a poll function to
Hi Richard,
Please explain why I am not accessing fullacc correctly.
On Tue, Jul 12, 2016 at 10:19 AM, Richard Henderson wrote:
> On 07/06/2016 03:33 PM, Michael Rolnik wrote:
> > +static bool avr_cpu_has_work(CPUState *cs)
> > +{
> > +AVRCPU *cpu = AVR_CPU(cs);
> > +
On 2016年07月11日 18:02, Zhang Chen wrote:
+static int colo_packet_compare_icmp(Packet *spkt, Packet *ppkt)
+{
+int network_length;
+struct icmp *icmp_ppkt, *icmp_spkt;
+
+trace_colo_compare_main("compare icmp");
+network_length = ppkt->ip->ip_hl * 4;
+if (ppkt->size !=
Emil, Thanks for your effort ( today I just come back to return my laptop).
btw, sstabell...@kernel.org may be the right email.
Stefan / Stefano, could you help us review these patches? Thanks in advance!!
Quan
On July 10, 2016 7:48 PM, Emil Condrea wrote:
>
On Wed, 13 Jul 2016 09:04:16 +0800
Zhou Jie wrote:
> Hi Alex,
>
> >> I will use workable state support flag
> >> to let user know whether the kenerl support block feature.
> >> And make configure space writing and ioctl function blocked.
> >
> > And what of my
e1000e needs net_tx_pkt.o and net_rx_pkt.o too.
Cc: Dmitry Fleytman
Cc: Leonid Bloch
Signed-off-by: Jason Wang
---
hw/net/Makefile.objs | 1 +
1 file changed, 1 insertion(+)
diff --git
On 2016年07月12日 18:15, Marc-André Lureau wrote:
Hi
On Tue, Jul 12, 2016 at 11:23 AM, Paolo Bonzini wrote:
We would like to move back net_cleanup() at the end of main function,
like it used to be until f30dbae63a46f23116715dff8d130c, but minimum
cleanup is needed
On 2016年07月12日 15:51, Paolo Bonzini wrote:
On 12/07/2016 09:43, Jason Wang wrote:
On 2016年07月11日 22:48, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
We would like to move back net_cleanup() at the end of main function,
like it used to be until
On Wed, 07/13 10:26, Cao jin wrote:
> Parameter **errp of aio_context_setup() is useless, remove it
> and clean up the related code.
>
> Signed-off-by: Cao jin
> ---
> aio-posix.c | 3 ++-
> async.c | 8 ++--
> include/block/aio.h | 2 +-
> 3
On Tue, 07/12 19:51, Roman Pen wrote:
> Invoking io_setup(MAX_EVENTS) we ask kernel to create ring buffer for us
> with specified number of events. But kernel ring buffer allocation logic
> is a bit tricky (ring buffer is page size aligned + some percpu allocation
> are required) so eventually
Parameter **errp of aio_context_setup() is useless, remove it
and clean up the related code.
Signed-off-by: Cao jin
---
aio-posix.c | 3 ++-
async.c | 8 ++--
include/block/aio.h | 2 +-
3 files changed, 5 insertions(+), 8 deletions(-)
diff
On 07/13/2016 09:33 AM, Fam Zheng wrote:
On Tue, 07/12 09:41, Eric Blake wrote:
On 07/12/2016 05:34 AM, Cao jin wrote:
The current judegement of caller is meaningless, make it useful.
Is this something you can trigger? If so, what command line? If not,
how did you find it?
Spelled
On Tue, Jul 12, 2016 at 10:11:58AM +0200, Igor Mammedov wrote:
> On Tue, 12 Jul 2016 15:07:09 +1000
> David Gibson wrote:
>
> > On Mon, Jul 11, 2016 at 03:42:29PM +0200, Igor Mammedov wrote:
> > > this approach i I preffer as it uses less per machine migration glue
>
On 07/12/2016 11:41 PM, Eric Blake wrote:
On 07/12/2016 05:34 AM, Cao jin wrote:
The current judegement of caller is meaningless, make it useful.
Is this something you can trigger? If so, what command line? If not,
how did you find it?
No, I didn't find it by "trigger" it. I just a very
On Tue, 07/12 09:41, Eric Blake wrote:
> On 07/12/2016 05:34 AM, Cao jin wrote:
> > The current judegement of caller is meaningless, make it useful.
>
> Is this something you can trigger? If so, what command line? If not,
> how did you find it?
>
> Spelled 'judgment', not 'judegement'; but
Hi Alex,
I will use workable state support flag
to let user know whether the kenerl support block feature.
And make configure space writing and ioctl function blocked.
And what of my suggestion that a user may desire to poll the state of
the device?
I will also add a poll function to
On Tue, Jul 12, 2016 at 09:05:24AM -0700, Andrey Smirnov wrote:
> On Mon, Jul 11, 2016 at 10:27 PM, David Gibson
> wrote:
> > On Mon, Jul 11, 2016 at 05:27:50PM +0100, Peter Maydell wrote:
> >> On 11 July 2016 at 03:24, David Gibson
On Tue, Jul 12, 2016 at 9:40 AM, Peter Maydell wrote:
> On 2 July 2016 at 02:07, Alistair Francis wrote:
>> If the caller didn't specify an architecture for the ELF machine
>> the load_elf() function will auto detect it based on the ELF
On Tue, Jul 12, 2016 at 23:13:36 +0300, Sergey Fedorov wrote:
> From: Sergey Fedorov
> It is naturally expected that some memory ordering should be provided
> around qht_insert(), qht_remove(), and qht_lookup(). Document these
> assumptions in the header file and put some
On 06/03/2016 12:32 AM, Fam Zheng wrote:
> HBitmap is an implementation detail of block dirty bitmap that should be
> hidden
> from users. Introduce a BdrvDirtyBitmapIter to encapsulate the underlying
> HBitmapIter.
>
> A small difference in the interface is, before, an HBitmapIter is
On 07/11/2016 03:50 PM, Colin Lord wrote:
> Adds a new iotest for testing that the format probing functions work as
> expected. This is done by booting up a vm with a disk image without
> specifying the image format. Then the format is checked using a call to
> query-block.
>
> For any format
On 07/12/2016 01:35 PM, Peter Maydell wrote:
> I tested this patch with a compile on OSX, and it does compile
> without warnings or errors. (NB: haven't tested that it
> fixes the warning that was being complained about in the
> other patchset.)
Ultimately, the combination of this patch plus the
On 07/12/2016 01:11 PM, Vladimir Sementsov-Ogievskiy wrote:
> On 12.07.2016 21:43, Eric Blake wrote:
>> On 07/12/2016 11:43 AM, Vladimir Sementsov-Ogievskiy wrote:
>>> There are no needs to allocate more than one cluster, as we set
>>> avail_out for deflate to one cluster.
>>>
>>> ...
>>>
On 12-Jul-16 10:07, Eric Blake wrote:
On 07/11/2016 09:42 PM, Christopher Pereira wrote:
Hi,
Let's say we have this chain:
base <--- sn1 <--- sn2 <--- active
Can we shutdown the VM and "qemu-img convert sn2 -O qcow2 sn2_new" and
rebase active to sn2_new like this:
sn2_new <---
From: Sergey Fedorov
These functions are not too big and can be merged together. This makes
locking scheme more clear and easier to follow.
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
---
cpu-exec.c | 72
From: Sergey Fedorov
When invalidating a translation block, set an invalid CPU state into the
TranslationBlock structure first. All subsequent changes are ordered
after it with smp_wmb(). This pairs with implied smp_rmb() of
qht_lookup() in tb_find_physical().
As soon as
From: Sergey Fedorov
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
---
cpu-exec.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index
From: Alex Bennée
Lock contention in the hot path of moving between existing patched
TranslationBlocks is the main drag in multithreaded performance. This
patch pushes the tb_lock() usage down to the two places that really need
it:
- code generation (tb_gen_code)
-
From: Alex Bennée
This ensures that if we find the TB on the slow path that tb->page_addr
is correctly set before being tested.
Signed-off-by: Alex Bennée
Reviewed-by: Sergey Fedorov
Signed-off-by: Sergey Fedorov
From: Sergey Fedorov
These functions will be used to make translation block invalidation safe
with concurrent lockless lookup in the global hash table.
Most targets don't use 'cs_base'; so marking TB as invalid is as simple
as assigning -1 to 'cs_base'. SPARC target stores
From: Sergey Fedorov
'HF_SOFTMMU_MASK' is only set when 'CONFIG_SOFTMMU' is defined. So
there's no need in this flag: test 'CONFIG_SOFTMMU' instead.
Suggested-by: Paolo Bonzini
Signed-off-by: Sergey Fedorov
Signed-off-by: Sergey
From: Sergey Fedorov
Ensure atomicity of CPU's 'tb_flushed' access for future translation
block lookup out of 'tb_lock'.
This field can only be touched from another thread by tb_flush() in user
mode emulation. So the only access to be atomic is:
* a single write in
From: Sergey Fedorov
This is a small clean up. tb_find_fast() is a final consumer of this
variable so no need to pass it by reference. 'last_tb' is always updated
by subsequent cpu_loop_exec_tb() in cpu_exec().
This change also simplifies calling cpu_exec_nocache() in
From: Sergey Fedorov
It is naturally expected that some memory ordering should be provided
around qht_insert(), qht_remove(), and qht_lookup(). Document these
assumptions in the header file and put some comments in the source to
denote how that memory ordering requirements
From: Sergey Fedorov
Ensure atomicity of CPU's 'tb_jmp_cache' access for future translation
block lookup out of 'tb_lock'.
Note that this patch does *not* make CPU's TLB invalidation safe if it
is done from some other thread while the CPU is in its execution loop.
From: Sergey Fedorov
Hi,
This is my respin of Alex's v2 series [1].
The first 8 patches are preparation for the patch 9, the subject matter
of this series, which enables lockless translation block lookup. The
main change here is that Paolo's suggestion is implemented: TBs
On 07/11/2016 03:50 PM, Colin Lord wrote:
> Adds option to test the dmg format.
>
> Signed-off-by: Colin Lord
> ---
> tests/qemu-iotests/common | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/tests/qemu-iotests/common b/tests/qemu-iotests/common
> index
add Fabrice Bellard
On 12.07.2016 20:43, Vladimir Sementsov-Ogievskiy wrote:
There are no needs to allocate more than one cluster, as we set
avail_out for deflate to one cluster.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
Hi all!
Please, can anybody say me
On 12.07.2016 21:43, Eric Blake wrote:
On 07/12/2016 11:43 AM, Vladimir Sementsov-Ogievskiy wrote:
There are no needs to allocate more than one cluster, as we set
avail_out for deflate to one cluster.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
Hi all!
Please,
By arranging for explicit writes to cpu_fsr after floating point
operations, we are able to mark the helpers as not writing to
tcg globals, which means that we don't need to invalidate the
integer register set across said calls.
Tested-by: Mark Cave-Ayland
On 12 July 2016 at 19:23, Eric Blake wrote:
> This violates POSIX, which requires that:
> http://pubs.opengroup.org/onlinepubs/9699919799/basedefs/stdint.h.html#tag_13_48
> "Each instance of these macros shall be replaced by a constant
> expression suitable for use in #if
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 45 +++--
1 file changed, 27 insertions(+), 18 deletions(-)
diff --git a/target-sparc/translate.c
This avoids needing to save state before every FP operation.
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/fop_helper.c | 17 +
target-sparc/translate.c | 6 +-
2 files changed, 14
On Jul 12, 2016 08:12, "Alex Williamson" wrote:
>
> On Tue, 12 Jul 2016 02:30:44 -0700
> Robert Ou wrote:
>
> > I would like to report on a hack that I created to successfully use
> > vfio-pci to pass through a boot GPU. The short TL;DR summary is
On 07/12/2016 01:43 PM, Vladimir Sementsov-Ogievskiy wrote:
> There are no needs to allocate more than one cluster, as we set
> avail_out for deflate to one cluster.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
>
> Hi all!
>
> Please, can anybody say me
Reduces the argument count for helper_ld_asi; do helper_st_asi
for consistency.
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/helper.h | 4 +--
target-sparc/ldst_helper.c | 73
We've now implemented all fp asis inline, except for the no-fault
memory reads. The latter can be passed directly to helper_ld_asi.
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/helper.h | 2 -
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 45 +
1 file changed, 45 insertions(+)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index ed0853a..dea1b5f 100644
Also implement a few more twinx asis.
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/helper.h | 2 +-
target-sparc/ldst_helper.c | 156 -
target-sparc/translate.c
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/ldst_helper.c | 459 +++--
target-sparc/translate.c | 6 +-
2 files changed, 235 insertions(+), 230 deletions(-)
diff --git
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 122 +++
1 file changed, 122 insertions(+)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 104 ---
1 file changed, 90 insertions(+), 14 deletions(-)
diff --git a/target-sparc/translate.c
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/ldst_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c
index ba48687..49082c5 100644
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 115 ++-
1 file changed, 103 insertions(+), 12 deletions(-)
diff --git a/target-sparc/translate.c
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/asi.h | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/target-sparc/asi.h b/target-sparc/asi.h
index aace6f3..c9a1849 100644
Copied from tag v4.2, 64291f7db5bd8150a74ad2036f1037e6a0428df2.
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/asi.h | 297 +
1 file changed, 297 insertions(+)
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 48 +---
1 file changed, 13 insertions(+), 35 deletions(-)
diff --git a/target-sparc/translate.c
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
Replace gen_get_asi, and use it for both 32-bit and 64-bit.
For v8, do supervisor and immediate checks here.
Also, move save_state and TB ending into the respective
subroutines, out of disas_sparc_insn.
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
We now have a single copy of gen_ld_asi, gen_st_asi,
gen_swap_asi, and everything uses gen_get_asi.
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 285 ++-
This unifies quite a few duplicate code fragments.
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 75 +---
1 file changed, 20 insertions(+), 55 deletions(-)
Quite a few helpers do not modify tcg globals but did not so indicate.
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
---
target-sparc/helper.h | 48
1 file changed, 24
The global is only ever read for one insn; we can just as well
use a load from env instead and generate the same code. This
also allows us to indicate the the associated helpers do not
touch TCG globals.
Tested-by: Mark Cave-Ayland
Signed-off-by: Richard Henderson
Knowing the value of %asi at translation time means that we
can handle the common settings without a function call.
The steady state appears to be %asi == ASI_P, so that sparcv9
code can use offset forms of lda/sta. The %asi register gets
pushed and popped on entry to certain functions, but it
commit ca3d87d4c84032f19478010b5604cac88b045c25:
Merge remote-tracking branch 'remotes/armbru/tags/pull-include-2016-07-12'
into staging (2016-07-12 16:04:36 +0100)
are available in the git repository at:
git://github.com/rth7680/qemu.git tags/pull-rth-20160712
for you to fetch changes up
Doing this instead of saving the raw PS_PRIV and TL. This means
that all nucleus mode TBs (TL > 0) can be shared. This fixes a
bug in that we didn't include HS_PRIV in the TB flags, and so could
produce incorrect TB matches for hypervisor state.
The LSU and DMMU states were unused by the
On 07/12/2016 11:43 AM, Vladimir Sementsov-Ogievskiy wrote:
> There are no needs to allocate more than one cluster, as we set
> avail_out for deflate to one cluster.
>
> Signed-off-by: Vladimir Sementsov-Ogievskiy
> ---
>
> Hi all!
>
> Please, can anybody say me what
On 07/12/2016 09:21 AM, Eric Blake wrote:
> C99 requires SIZE_MAX to be declared with the same type as the
> integral promotion of size_t, but OSX mistakenly defines it as
> an unsigned long long expression even though size_t is only
> unsigned long. Rather than futzing around with whether size_t
Hi Peter,
This commit simply updates the OpenBIOS submodule to point to the same HEAD as
the new official
repository hosted on github. Please pull.
ATB,
Mark.
The following changes since commit ca3d87d4c84032f19478010b5604cac88b045c25:
Merge remote-tracking branch
Adding following instructions for ISA3.0 support
modud: Modulo Unsigned Dword
modsd: Modulo Signed Dword
Signed-off-by: Nikunj A Dadhania
---
target-ppc/translate.c | 45 +
1 file changed, 45 insertions(+)
diff --git
This flag will be used for POWER9 instructions.
Signed-off-by: Nikunj A Dadhania
---
target-ppc/cpu.h| 5 -
target-ppc/translate_init.c | 2 +-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index
Adding following instructions:
moduw: Modulo Unsigned Word
modsw: Modulo Signed Word
Signed-off-by: Nikunj A Dadhania
---
target-ppc/translate.c | 50 ++
1 file changed, 50 insertions(+)
diff --git
From: "Aneesh Kumar K.V"
Signed-off-by: Aneesh Kumar K.V
[ rebased and added POWER9 alias ]
Signed-off-by: Nikunj A Dadhania
---
target-ppc/cpu-models.c | 5 +++
target-ppc/cpu-models.h | 2
ISA 3.0 instruction for adding immediate value with next instruction
address and return the result in the target register.
Signed-off-by: Nikunj A Dadhania
---
target-ppc/translate.c | 27 +++
1 file changed, 27 insertions(+)
diff --git
This set starts adding new instructions for POWER9 described in ISA3.0.
First two patches adds the required POWER9 cpu model and ISA defines.
Next four patches adds following instructions:
addpcis : Add PC Immediate Shifted
cmprb : Compare Ranged Byte
moduw : Modulo Unsigned Word
ISA 3.0 Compare Ranged Byte instruction useful for
isupper/islower/isaplha kind of operation.
Signed-off-by: Nikunj A Dadhania
---
target-ppc/translate.c | 40
1 file changed, 40 insertions(+)
diff --git
Invoking io_setup(MAX_EVENTS) we ask kernel to create ring buffer for us
with specified number of events. But kernel ring buffer allocation logic
is a bit tricky (ring buffer is page size aligned + some percpu allocation
are required) so eventually more than requested events number is allocated.
There are no needs to allocate more than one cluster, as we set
avail_out for deflate to one cluster.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
Hi all!
Please, can anybody say me what I'm missing?
I've looked through deflate documentation at
On 07/12/2016 10:23 AM, Peter Lieven wrote:
> evaluation with the recently introduced maximum stack usage monitoring
> revealed
> that the actual used stack size was never above 4kB so allocating 1MB stack
> for each coroutine is a lot of wasted memory. So reduce the stack size to
> 64kB which
On 07/12/2016 10:23 AM, Peter Lieven wrote:
> the allocated stack will be adjusted to the minimum supported stack size
> by the OS and rounded up to be a multiple of the system pagesize.
> Additionally an architecture dependent guard page is added to the stack
> to catch stack overflows.
>
>
On 07/06/2016 03:33 PM, Michael Rolnik wrote:
> Signed-off-by: Michael Rolnik
> ---
> target-avr/Makefile.objs | 4 +-
> target-avr/translate.c | 142
> ---
> 2 files changed, 64 insertions(+), 82 deletions(-)
>
> diff --git
On 07/06/2016 03:33 PM, Michael Rolnik wrote:
> Signed-off-by: Michael Rolnik
> ---
> target-avr/helper.c | 118 +-
> target-avr/helper.h |1 +
> target-avr/translate-inst.c | 2621
> +++
> target-avr/translate.c
On 07/06/2016 03:33 PM, Michael Rolnik wrote:
> Signed-off-by: Michael Rolnik
> ---
> target-avr/helper.c | 222
> +---
> target-avr/helper.h | 6 ++
> 2 files changed, 215 insertions(+), 13 deletions(-)
>
> diff --git
On Tue, Jul 12, 2016 at 03:42:58PM +0200, Igor Mammedov wrote:
> On Tue, 12 Jul 2016 14:48:43 +0200
> Igor Mammedov wrote:
>
> > On Tue, 12 Jul 2016 00:29:08 -0300
> > Eduardo Habkost wrote:
> [...]
> > > 1) x86_cpu_realizefn():
> > > if
On 07/06/2016 03:33 PM, Michael Rolnik wrote:
> +static bool avr_cpu_has_work(CPUState *cs)
> +{
> +AVRCPU *cpu = AVR_CPU(cs);
> +CPUAVRState *env = >env;
> +
> +return (cs->interrupt_request
> +& (CPU_INTERRUPT_HARD
> +| CPU_INTERRUPT_RESET))
On Tue, Jul 12, 2016 at 02:48:43PM +0200, Igor Mammedov wrote:
> On Tue, 12 Jul 2016 00:29:08 -0300
> Eduardo Habkost wrote:
>
> > On Wed, Jul 06, 2016 at 08:20:45AM +0200, Igor Mammedov wrote:
> > > currently present CPUs counter in CMOS only contains
> > > smp_cpus (i.e.
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