Add vbpermd instruction from ISA 3.0.
Signed-off-by: Rajalakshmi Srinivasaraghavan
---
target-ppc/helper.h |1 +
target-ppc/int_helper.c | 20
target-ppc/translate/vmx-impl.inc.c |1 +
target-ppc/translate/vmx-ops.inc.c |1 +
4 file
Add vpermr instruction from ISA 3.0.
Signed-off-by: Rajalakshmi Srinivasaraghavan
---
target-ppc/helper.h |1 +
target-ppc/int_helper.c | 23 +++
target-ppc/translate/vmx-impl.inc.c | 18 ++
target-ppc/translate/vmx-ops.inc.
The following vector insert instructions are added from ISA 3.0.
vinsertb - Vector Insert Byte
vinserth - Vector Insert Halfword
vinsertw - Vector Insert Word
vinsertd - Vector Insert Doubleword
Signed-off-by: Rajalakshmi Srinivasaraghavan
---
target-ppc/helper.h |4
ta
The following vector count trailing zeros instructions are
added from ISA 3.0.
vctzb - Vector Count Trailing Zeros Byte
vctzh - Vector Count Trailing Zeros Halfword
vctzw - Vector Count Trailing Zeros Word
vctzd - Vector Count Trailing Zeros Doubleword
Signed-off-by: Rajalakshmi Srinivasaraghavan
This series contains 14 new instructions for POWER9 described in ISA3.0.
Patches:
01: Adds vector insert instructions.
vinsertb - Vector Insert Byte
vinserth - Vector Insert Halfword
vinsertw - Vector Insert Word
vinsertd - Vector Insert Doub
The following vector extract instructions are added from ISA 3.0.
vextractub - Vector Extract Unsigned Byte
vextractuh - Vector Extract Unsigned Halfword
vextractuw - Vector Extract Unsigned Word
vextractd - Vector Extract Unsigned Doubleword
Signed-off-by: Rajalakshmi Srinivasaraghavan
---
tar
On 08/31/2016 05:39 PM, Zhang Chen wrote:
On 08/31/2016 05:20 PM, Jason Wang wrote:
On 2016年08月31日 17:03, Zhang Chen wrote:
On 08/31/2016 03:53 PM, Jason Wang wrote:
On 2016年08月17日 16:10, Zhang Chen wrote:
This a COLO net ascii figure:
Primary qemu Secondary qemu
+---
2016-09-01 13:46 GMT+08:00 Li, Liang Z :
>> Subject: Re: [PATCH v3 kernel 0/7] Extend virtio-balloon for fast
>> (de)inflating
>> & fast live migration
>>
>> 2016-08-08 14:35 GMT+08:00 Liang Li :
>> > This patch set contains two parts of changes to the virtio-balloon.
>> >
>> > One is the change f
> Subject: Re: [PATCH v3 kernel 0/7] Extend virtio-balloon for fast
> (de)inflating
> & fast live migration
>
> 2016-08-08 14:35 GMT+08:00 Liang Li :
> > This patch set contains two parts of changes to the virtio-balloon.
> >
> > One is the change for speeding up the inflating & deflating process
I am still waiting for review on this one.
On Tue, Aug 16, 2016 at 10:40 PM, Ashijeet Acharya
wrote:
> Fix a memory leak in ide_register_restart_cb() in hw/ide/core.c and add
> idebus_unrealize() in hw/ide/qdev.c to have calls to
> qemu_del_vm_change_state_handler() to deal with the dangling ch
Oops, my mistake, copy-paste from different part.
I'll correct it in next spin.
Eric, you are most welcome to review though :)
On Thu, Sep 1, 2016 at 3:14 AM, Auger Eric wrote:
> Hi Prem,
> On 22/08/2016 18:17, Prem Mallappa wrote:
> > v1 -> v2:
> > - Adopted review comments from Eric A
On 08/31/2016 05:33 PM, Jason Wang wrote:
On 2016年08月17日 16:10, Zhang Chen wrote:
We add TCP,UDP,ICMP packet comparison to replace
IP packet comparison. This can increase the
accuracy of the package comparison.
Less checkpoint more efficiency.
Signed-off-by: Zhang Chen
Signed-off-by: Li Zh
Hello Dmitry,
+-- On Wed, 31 Aug 2016, Dmitry Fleytman wrote --+
| > -if ((ri->reqRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES)
| > -|| (ri->cmpRingNumPages > PVSCSI_SETUP_RINGS_MAX_NUM_PAGES)) {
| > -return -1;
| > -}
|
| Hello Prasad,
|
| Why did you decide to move
On 08/31/2016 05:13 PM, Jason Wang wrote:
On 2016年08月17日 16:10, Zhang Chen wrote:
If primary packet is same with secondary packet,
we will send primary packet and drop secondary
packet, otherwise notify COLO frame to do checkpoint.
If primary packet comes but secondary packet does not,
after
2016-08-08 14:35 GMT+08:00 Liang Li :
> This patch set contains two parts of changes to the virtio-balloon.
>
> One is the change for speeding up the inflating & deflating process,
> the main idea of this optimization is to use bitmap to send the page
> information to host instead of the PFNs, to r
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Wednesday, August 31, 2016 11:49 PM
>
> > >
> > > IGD doesn't have such peer-to-peer resource setup requirement. So
> > > it's sufficient to create/destroy a mdev instance in a single action on
> > > IGD. However I'd expect we sti
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Wednesday, August 31, 2016 11:49 PM
>
> On Wed, 31 Aug 2016 15:04:13 +0800
> Jike Song wrote:
>
> > On 08/31/2016 02:12 PM, Tian, Kevin wrote:
> > >> From: Alex Williamson [mailto:alex.william...@redhat.com]
> > >> Sent: Wednesd
On Wed, Aug 31, 2016 at 08:43:42PM -0600, Alex Williamson wrote:
> > > >>This reverts commit 3cb3b1549f5401dc3a5e1d073e34063dc274136f. Vhost
> > > >>device IOTLB API will get notified and send invalidation request to
> > > >>vhost through this notifier.
> > > >AFAICT this series does not address
Hi,
Your series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Subject: [Qemu-devel] [PATCH COLO-Frame v19 00/22] COarse-grain
LOck-stepping(COLO) Virtual Machines for Non-stop Service (FT
Hi Amit，
On 2016/8/26 5:45, Amit Shah wrote:
On (Wed) 03 Aug 2016 [20:25:39], zhanghailiang wrote:
configure --enable-colo/--disable-colo to switch COLO
support on/off.
COLO support is On by default.
Can you please make this the last patch in the series - so we get the
code in before we add i
Add a new migration state: MIGRATION_STATUS_COLO. Migration source side
enters this state after the first live migration successfully finished
if COLO is enabled by command 'migrate_set_capability x-colo on'.
We reuse migration thread, so the process of checkpointing will be handled
in migration t
We should not destroy the state of SVM (Secondary VM) until we receive
the complete data of PVM's state, in case the primary fails in the process
of sending the state, so we cache the VM's state in secondary side before
load it into SVM.
Besides, we should call qemu_system_reset() before load VM s
If the net connection between primary host and secondary host
is broken while COLO/COLO incoming thread is blocked in read()/write()
socket fd.
It will be a long time to detect this error until connection is timeout.
Here we shutdown all the related socket file descriptors to wake up the
blocking
We add helper function colo_supported() to indicate whether
colo is supported or not, with which we use to control whether or not
showing 'x-colo' string to users, they can use qmp command
'query-migrate-capabilities' or hmp command 'info migrate_capabilities'
to learn if colo is supported.
Cc: Ju
On Tue, Aug 30, 2016 at 11:06:59AM +0800, Jason Wang wrote:
> This patches implements Device IOTLB support for vhost kernel. This is
> done through:
>
> 1) switch to use dma helpers when map/unmap vrings from vhost codes
> 2) kernel support for Device IOTLB API:
>
> - allow vhost-net to query the
VM checkpointing is to synchronize the state of PVM to SVM, just
like migration does, we re-use save helpers to achieve migrating
PVM's state to Secondary side.
COLO need to cache the data of VM's state in the secondary side before
synchronize it to SVM. COLO need the size of the data to determine
We leave users to choose whatever heartbeat solution they want,
if the heartbeat is lost, or other errors they detect, they can use
experimental command 'x_colo_lost_heartbeat' to tell COLO to do failover,
COLO will do operations accordingly.
For example, if the command is sent to the PVM, the Pri
When handling failover, COLO processes differently according to
the different stage of failover process, here we introduce a global
atomic variable to record the status of failover.
We add four failover status to indicate the different stage of failover process.
You should use the helpers to get a
On 2016/8/26 5:47, Amit Shah wrote:
On (Wed) 03 Aug 2016 [20:25:40], zhanghailiang wrote:
We add helper function colo_supported() to indicate whether
colo is supported or not, with which we use to control whether or not
showing 'x-colo' string to users, they can use qmp command
'query-migrate-ca
Do checkpoint periodically, the default interval is 200ms.
Signed-off-by: zhanghailiang
Signed-off-by: Li Zhijian
Reviewed-by: Dr. David Alan Gilbert
---
v12:
- Add Reviewed-by tag
v11:
- Fix wrong sleep time for checkpoint period. (Dave's comment)
---
migration/colo.c | 12
1 fil
Make sure master start block replication after slave's block
replication started.
Signed-off-by: zhanghailiang
Signed-off-by: Wen Congyang
Signed-off-by: Li Zhijian
Cc: Stefan Hajnoczi
Cc: Kevin Wolf
Cc: Max Reitz
---
migration/colo.c | 52 ++
We need communications protocol of user-defined to control
the checkpointing process.
The new checkpointing request is started by Primary VM,
and the interactive process like below:
Checkpoint synchronizing points:
Primary Secondary
Guest will enter this state when paused to save/restore VM state
under COLO checkpoint.
Cc: Eric Blake
Cc: Markus Armbruster
Signed-off-by: zhanghailiang
Signed-off-by: Li Zhijian
Signed-off-by: Gonglei
Reviewed-by: Dr. David Alan Gilbert
Reviewed-by: Eric Blake
---
qapi-schema.json | 5 ++
Introduce the design of COLO, and how to test it.
Signed-off-by: zhanghailiang
---
docs/COLO-FT.txt | 190 +++
1 file changed, 190 insertions(+)
create mode 100644 docs/COLO-FT.txt
diff --git a/docs/COLO-FT.txt b/docs/COLO-FT.txt
new file mod
If users require SVM to takeover work, COLO incoming thread should
exit from loop while failover BH helps backing to migration incoming
coroutine.
Signed-off-by: zhanghailiang
Signed-off-by: Li Zhijian
Reviewed-by: Dr. David Alan Gilbert
---
v12:
- Improve error message that suggested by Dave
-
We should not do failover work while the main thread is loading
VM's state. Otherwise it will destroy the consistent of VM's memory and
device state.
Here we add a new failover status 'RELAUNCH' which means we should
relaunch the process of failover.
Signed-off-by: zhanghailiang
Signed-off-by: L
For primary side, if COLO gets failover request from users.
To be exact, gets 'x_colo_lost_heartbeat' command.
COLO thread will exit the loop while the failover BH does the
cleanup work and resumes VM.
Signed-off-by: zhanghailiang
Signed-off-by: Li Zhijian
Reviewed-by: Dr. David Alan Gilbert
--
configure --enable-colo/--disable-colo to switch COLO
support on/off.
COLO feature is enabled by default.
Signed-off-by: zhanghailiang
Signed-off-by: Li Zhijian
Signed-off-by: Gonglei
Reviewed-by: Dr. David Alan Gilbert
---
v19:
- fix colo_supported() to return true
v11:
- Turn COLO on in defa
If we start qemu with -S, the runstate will change from 'prelaunch' to 'running'
after going into colo state.
So it is necessary to update the global runstate after going into colo state.
Signed-off-by: zhanghailiang
Signed-off-by: Li Zhijian
Reviewed-by: Dr. David Alan Gilbert
---
migration/c
This is the 19th version of COLO frame series.
According to the suggestion of Juan and Amit,
I dropped parts of the optimization patches to make it easier for review.
Besides, I discarded the network related patches since the development of
COLO proxy goes well, It is very likely to be merged in
Add checkpoint-delay parameter for migrate-set-parameters, so that
we can control the checkpoint frequency when COLO is in periodic mode.
Cc: Luiz Capitulino
Cc: Eric Blake
Cc: Markus Armbruster
Signed-off-by: zhanghailiang
Signed-off-by: Li Zhijian
Reviewed-by: Dr. David Alan Gilbert
---
v1
Switch from normal migration loadvm process into COLO checkpoint process if
COLO mode is enabled.
We add three new members to struct MigrationIncomingState,
'have_colo_incoming_thread' and 'colo_incoming_thread' record the COLO
related thread for secondary VM, 'migration_incoming_co' records the
o
This new communication path will be used for returning messages
from Secondary side to Primary side.
Signed-off-by: zhanghailiang
Signed-off-by: Li Zhijian
Reviewed-by: Dr. David Alan Gilbert
---
v13:
- Remove useless error report
v12:
- Add Reviewed-by tag
v11:
- Rebase master to use qemu_file
We can determine whether or not VM in destination should go into COLO mode
by referring to the info that was migrated.
We skip this section if COLO is not enabled (i.e.
migrate_set_capability colo off), so that, It doesn't break compatibility
with migration no matter whether users configure the --
If VM is in COLO FT state, we should do some extra work before
normal shutdown process. SVM will ignore the shutdown command if
this command is issued directly to it.
COLO will send the shutdown command to Secondary side if it gets
shutdown request from user.
Cc: Paolo Bonzini
Signed-off-by: zha
[cc +dgibson]
On Thu, 1 Sep 2016 10:29:29 +0800
Peter Xu wrote:
> On Wed, Aug 31, 2016 at 10:45:37AM +0800, Jason Wang wrote:
> >
> >
> > On 2016年08月30日 11:37, Alex Williamson wrote:
> > >On Tue, 30 Aug 2016 11:06:58 +0800
> > >Jason Wang wrote:
> > >
> > >>From: Peter Xu
> > >>
> > >>Th
On Wed, Aug 31, 2016 at 10:45:37AM +0800, Jason Wang wrote:
>
>
> On 2016年08月30日 11:37, Alex Williamson wrote:
> >On Tue, 30 Aug 2016 11:06:58 +0800
> >Jason Wang wrote:
> >
> >>From: Peter Xu
> >>
> >>This reverts commit 3cb3b1549f5401dc3a5e1d073e34063dc274136f. Vhost
> >>device IOTLB API will
On Wed, 31 Aug 2016 13:56:20 -0600
Alex Williamson wrote:
> On Tue, 19 Jul 2016 15:38:23 +0800
> Zhou Jie wrote:
>
> > From: Chen Fan
> >
> > When assigning a vfio device with AER enabled, we must check whether
> > the device supports a host bus reset (ie. hot reset) as this may be
> > used b
Signed-off-by: Cao jin
---
docs/rcu.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/docs/rcu.txt b/docs/rcu.txt
index 2f70954..a70b72c 100644
--- a/docs/rcu.txt
+++ b/docs/rcu.txt
@@ -37,7 +37,7 @@ do not matter; as soon as all previous critical sections have
finished,
t
On Fri, Aug 12, 2016 at 05:41:27PM +0800, Peter Xu wrote:
> Adding one extra property for intel-iommu device to decide whether we
> should support EIM bit for IR.
>
> Now we are throwing high 24 bits of dest_id away directly. This will
> cause interrupt issues with guests that:
>
> - enabled x2ap
On Wed, Aug 31, 2016 at 10:54:36AM +0800, Jason Wang wrote:
> >> static void x86_iommu_instance_init(Object *o)
> >> {
> >> X86IOMMUState *s = X86_IOMMU_DEVICE(o);
> >>@@ -108,6 +120,11 @@ static void x86_iommu_instance_init(Object *o)
> >> s->intr_supported = false;
> >> object_pr
Hi Michael,
On Wed, Aug 31, 2016 at 05:54:04PM +0300, Michael S. Tsirkin wrote:
> On Wed, Aug 31, 2016 at 05:08:00PM +0900, Namhyung Kim wrote:
> > The virtio pstore driver provides interface to the pstore subsystem so
> > that the guest kernel's log/dump message can be saved on the host
> > machi
smp_read_barrier_depends() should be used only if you are reading
dependent pointers which are shared. Here 'bh' is a local variable and
dereferencing it will always be ordered after loading 'bh', i.e.,
bh->next will always be ordered after fetching bh.
This patch removes the barrier and adds a co
Hi Drew,
On 30/08/2016 16:28, Auger Eric wrote:
> Hi Drew,
>
> Proper commit message?
> ... also selects the vgic model corresponding to the host
>> Reviewed-by: Alex Bennée
>> Signed-off-by: Andrew Jones
>> ---
>> arm/run | 19 ---
>> arm/selftest.c
Hi,
Your series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Subject: [Qemu-devel] [PATCH] vl: Delay initialization of memory backends
Type: series
Message-id: 1472674630-18886-1-git-send
Hi Prem,
On 22/08/2016 18:17, Prem Mallappa wrote:
> v1 -> v2:
> - Adopted review comments from Eric Auger
Although I am really interested in your series, those comments are not
mine and credit should be given to somebody else (Edgar?)
I will do my utmost to review it too ;-)
Thanks
Eric
>
On Wed, Aug 31, 2016 at 02:13:09PM -0600, Alex Williamson wrote:
> On Tue, 19 Jul 2016 15:38:28 +0800
> Zhou Jie wrote:
>
> > From: Chen Fan
> >
> > For supporting aer recovery, host and guest would run the same aer
> > recovery code, that would do the secondary bus reset if the error
> > is fa
Initialization of memory backends may take a while when
prealloc=yes is used, depending on their size. Initializing
memory backends before chardevs may delay the creation of monitor
sockets, and trigger timeouts on management software that waits
until the monitor socket is created by QEMU. See, fo
On Tue, 19 Jul 2016 15:38:28 +0800
Zhou Jie wrote:
> From: Chen Fan
>
> For supporting aer recovery, host and guest would run the same aer
> recovery code, that would do the secondary bus reset if the error
> is fatal, the aer recovery process:
> 1. error_detected
> 2. reset_link (if fatal)
On 2016-08-31 18:31, Reda Sallahi wrote:
> The page that was previously linked in the source code and the README file is
> no longer available so it now returns a 404 error message.
>
> This puts a previous snapshot from archive.org instead.
>
> Signed-off-by: Reda Sallahi
> ---
> Changes from v
On Tue, 19 Jul 2016 15:38:23 +0800
Zhou Jie wrote:
> From: Chen Fan
>
> When assigning a vfio device with AER enabled, we must check whether
> the device supports a host bus reset (ie. hot reset) as this may be
> used by the guest OS in order to recover the device from an AER
> error. QEMU mus
On Tue, 19 Jul 2016 15:38:21 +0800
Zhou Jie wrote:
> From: Chen Fan
>
> Calling pcie_aer_init to initilize aer related registers for
> vfio device, then reload physical related registers to expose
> device capability.
>
> Signed-off-by: Chen Fan
> ---
> hw/vfio/pci.c | 75
>
** Changed in: qemu
Assignee: (unassigned) => John Snow (jnsnow)
--
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https://bugs.launchpad.net/bugs/670769
Title:
CDROM size not updated when changing image files
Status in QEMU:
** Changed in: qemu
Assignee: (unassigned) => John Snow (jnsnow)
--
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https://bugs.launchpad.net/bugs/1070762
Title:
savevm fails with inserted CD, "Device '%s' is writable but does n
** Changed in: qemu
Assignee: Natalia Portillo (claunia) => John Snow (jnsnow)
--
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https://bugs.launchpad.net/bugs/588691
Title:
QEMU is not correctly detecting host CDs
Status in Q
** Changed in: qemu
Assignee: (unassigned) => John Snow (jnsnow)
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https://bugs.launchpad.net/bugs/1368204
Title:
WinME isn't able to detect QEMU's cdrom drive and other hard drive
** Changed in: qemu
Assignee: (unassigned) => John Snow (jnsnow)
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https://bugs.launchpad.net/bugs/1219234
Title:
-device ide-hd will assign bus with with no free units
Status in
** Changed in: qemu
Assignee: (unassigned) => John Snow (jnsnow)
--
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https://bugs.launchpad.net/bugs/786208
Title:
Missing checks for non-existent device in ide_exec_cmd
Status in Q
Also happens on Ubuntu 16.04.1 64-bit with QEMU 1:2.5+dfsg-5ubuntu10.4.
I have the following settings added to instance xml config:
It looks like forwarding does not happen at all. When I try to connect
to guest instance, I get exactly the same results regardless of whether
sshd
On 08/30/2016 10:54 PM, Stefan Hajnoczi wrote:
> On Mon, Aug 22, 2016 at 10:00 AM, Denis V. Lunev
> wrote:
>> On 08/15/2016 08:54 AM, Stefan Hajnoczi wrote:
>>> The VirtQueue->inuse field is not always updated correctly. These patches
>>> fix
>>> it.
>>>
>>> Originally this series was called "vir
This is largy inspired by sPAPRCPUCore with some simplification, no
hotplug for instance. But the differences are small and the objects
could possibly be merged.
A set of PnvCore objects is added to the PnvChip and the device
tree is populated looping on these cores.
Real HW cpu ids are now gener
On PowerNV, CPU ids start at 0x8 or 0x20, we don't have a CPU 0
anymore. So let's use the first_cpu index to initialize the monitor.
Signed-off-by: Cédric Le Goater
---
So that you can dump the cpu list with the monitor :
(qemu) info cpus
* CPU #8: nip=0x0010 thread
On Wed, Aug 31, 2016 at 04:44:47PM +0800, Xiao Guangrong wrote:
> On 08/31/2016 01:09 AM, Dan Williams wrote:
> >
> > Can you post your exact reproduction steps? This test is not failing for
> > me.
> >
>
> Sure.
>
> 1. make the guest kernel based on your tree, the top commit is
>10d7902f
This will be used to build real HW ids for the cores and enforce some
limits on the available cores per chip.
Signed-off-by: Cédric Le Goater
---
hw/ppc/pnv.c | 27 +++
include/hw/ppc/pnv.h | 2 ++
2 files changed, 29 insertions(+)
diff --git a/hw/ppc/pnv.c b/hw
From: Benjamin Herrenschmidt
The goal is to emulate a PowerNV system at the level of the skiboot
firmware, which loads the OS and provides some runtime services. Power
Systems have a lower firmware (HostBoot) that does low level system
initialization, like DRAM training. This is beyond the scope
Now that we are using real HW ids for the cores in PowerNV chips, we
can route the XSCOM accesses to them. We just need to attach a
XScomDevice to each core with the associated ranges in the XSCOM
address space.
To start with, let's install the DTS (Digital Thermal Sensor) handlers
which are easy
Hello,
Here is a new version to address the comments from v1 plus a couple of
improvements, the most important being :
- PnvChip now has PnvChipClass depending on the cpu model
- the device tree uses the fdt "rw" routines
- the XSCOM bus makes its first appearance.
- the cores now use rea
On Mon, Aug 29, 2016 at 08:46:02PM +0200, Lluís Vilanova wrote:
> >> Also, I'm still not sure how to interact with QEMU's monitor interface from
> >> within the probe code (probes execute in kernel mode, including "guru mode"
> >> code).
>
> > When SystemTap is used the QEMU monitor interface does
From: Benjamin Herrenschmidt
XSCOM is an interface to a sideband bus provided by the POWER8 chip
pervasive unit, which gives access to a number of facilities in the
chip that are needed by the OPAL firmware and to a lesser extent,
Linux. This is among others how the PCI Host bridges get configure
Report IOAPIC via IVRS which effectively allows linux AMD-Vi
driver to enable interrupt remapping
Signed-off-by: David Kiarie
---
hw/i386/acpi-build.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 49bd183..c2559ff 100644
--- a/hw/i386/acp
This is is an abstraction of a POWER8 chip which is a set of cores
plus other 'units', like the pervasive unit, the interrupt controller,
the memory controller, the on-chip microcontroller, etc. The whole can
be seen as a socket. It depends on a cpu model and its characteristics,
max cores, specifi
Introduce AMD IOMMU interrupt remapping and hook it onto
the existing interrupt remapping infrastructure
Signed-off-by: David Kiarie
---
hw/i386/amd_iommu.c | 241 +++-
hw/i386/amd_iommu.h | 4 +-
hw/intc/ioapic.c| 9 +-
3 files changed, 24
When using IOMMU platform devices like IOAPIC are required to make
interrupt remapping requests using explicit SID.We affiliate an MSI
route with a requester ID and a PCI device if present which ensures
that platform devices can call IOMMU interrupt remapping code with
explicit SID while maintainin
Hello all,
Changes since V2
-formating fixes.
-fixed an issue where the right IOAPIC id was not being correctly set when
using kernel_irqchip=off
The following patchset implements AMD-Vi interrupt remapping logic and hooks it
onto existing IR infrastucture.
I have bundled this patchset tog
Enabling interrupt remapping with kernel_irqchip=on should result
in an error for both VT-d and AMD-Vi
Signed-off-by: David Kiarie
---
hw/i386/intel_iommu.c | 9 -
hw/i386/x86-iommu.c | 8
2 files changed, 8 insertions(+), 9 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/h
The page that was previously linked in the source code and the README file is
no longer available so it now returns a 404 error message.
This puts a previous snapshot from archive.org instead.
Signed-off-by: Reda Sallahi
---
Changes from v1:
* Add the 'https://' part to the link in hw/sh4/shix.c
Platform device are now able to make interrupt request with
explicit SIDs hence we can safely expect triggered AddressSpace ID
to match the requesting ID
Signed-off-by: David Kiarie
---
hw/i386/intel_iommu.c | 77 ++-
1 file changed, 39 insertions(
Signed-off-by: David Kiarie
---
hw/i386/trace-events | 29 +
1 file changed, 29 insertions(+)
diff --git a/hw/i386/trace-events b/hw/i386/trace-events
index 7735e46..60bdf6a 100644
--- a/hw/i386/trace-events
+++ b/hw/i386/trace-events
@@ -13,3 +13,32 @@ mhp_pc_dimm_as
Introduce macros and trace events for use in AMD IOMMU
interrupt remapping
Signed-off-by: David Kiarie
---
hw/i386/amd_iommu.h | 80
hw/i386/trace-events | 7 +
2 files changed, 87 insertions(+)
diff --git a/hw/i386/amd_iommu.h b/hw/i38
The ISA DMA controller needs to be wired up to the ISA bus by
isa_bus_dma() to actually work.
Signed-off-by: Markus Armbruster
---
hw/dma/i8257.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c
index f345c54..f90df1d 100644
--- a/hw/dma/i8257.c
+++ b/hw/dma/
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU.
The IOMMU does basic translation, error checking and has a
minimal IOTLB implementation. This IOMMU bypassed the need
for target aborts by responding with IOMMU_NONE access rights
and exempts the region 0xfee0-0xfeef from translatio
Introduce PCI macros from for use by AMD IOMMU
Signed-off-by: David Kiarie
---
include/hw/pci/pci.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 929ec2f..5ff92de 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci
Hi all,
This patchset adds basic AMD IOMMU emulation support to Qemu.
Changes since v16 - this is mainly supposed to come as a ping :-)
-minor endian-ness fixes
Changes since v15
-Endian-ness issue fix
-cleaned up unused macros
-removed guest frame number(gfn) from cache entry
Chan
On 2016-08-31 17:54, Reda Sallahi wrote:
> The page that was previously linked in the source code and the README file is
> no longer available so it now returns a 404 error message.
>
> This puts a previous snapshot from archive.org instead.
>
> Signed-off-by: Reda Sallahi
> ---
> hw/sh4/shix.c
On Tue, Aug 30, 2016 at 10:08:01AM +, Wang, Wei W wrote:
> On Monday, August 29, 2016 11:25 PM, Stefan Hajnoczi wrote:
> > To: Wang, Wei W
> > Cc: k...@vger.kernel.org; qemu-devel@nongnu.org; virtio-
> > comm...@lists.oasis-open.org; m...@redhat.com; pbonz...@redhat.com
> > Subject: Re: [virt
The page that was previously linked in the source code and the README file is
no longer available so it now returns a 404 error message.
This puts a previous snapshot from archive.org instead.
Signed-off-by: Reda Sallahi
---
hw/sh4/shix.c | 2 +-
target-sh4/README.sh4 | 2 +-
2 files ch
On Wed, 31 Aug 2016 15:04:13 +0800
Jike Song wrote:
> On 08/31/2016 02:12 PM, Tian, Kevin wrote:
> >> From: Alex Williamson [mailto:alex.william...@redhat.com]
> >> Sent: Wednesday, August 31, 2016 12:17 AM
> >>
> >> Hi folks,
> >>
> >> At KVM Forum we had a BoF session primarily around the media
Hello QEMU folks,
AdaCore [1] is opening a QEMU and/or GDB engineer position. You guessed
it, we are looking for someone familiar with low-level programming,
assembly, CPU architectures, etc. On the QEMU side we work on the ARM,
PPC, SPARC and x86 architectures in "full" system emulation only. Pr
Hi,
I'm trying to implement a buslogic scsi adapter(BT-958) for qemu. I
realized the driver interaction with the ports through which the driver can
write / read commands and parameters for the adapter. The driver was able
to make an adapter sample procedure. The problem is that I do not
understand
On Wed, Aug 31, 2016 at 05:08:00PM +0900, Namhyung Kim wrote:
> The virtio pstore driver provides interface to the pstore subsystem so
> that the guest kernel's log/dump message can be saved on the host
> machine. Users can access the log file directly on the host, or on the
> guest at the next bo
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