Re: [Qemu-devel] [PATCH v2 3/3] hostmem-file: make option 'size' optional

On 10/28/16 10:06 +0800, Haozhong Zhang wrote: On 10/27/16 12:55 -0200, Eduardo Habkost wrote: On Thu, Oct 27, 2016 at 12:23:00PM +0800, Haozhong Zhang wrote: [..] static char *get_mem_path(Object *o, Error **errp) diff --git a/exec.c b/exec.c index 264a25f..89065bd 100644 --- a/exec.c +++

[Qemu-devel] [PATCH v13 0/2] virtio-crypto: virtio crypto device specification

This is the specification about a new virtio crypto device. You can get the source code from the below website: [PATCH v3 00/10] virtio-crypto: introduce framework and device emulation https://lists.gnu.org/archive/html/qemu-devel/2016-09/msg04132.html [PATCH v4 00/13] virtio-crypto:

[Qemu-devel] [PATCH v13 1/2] virtio-crypto: Add virtio crypto device specification

The virtio crypto device is a virtual crypto device (ie. hardware crypto accelerator card). Currently, the virtio crypto device provides the following crypto services: CIPHER, MAC, HASH, and AEAD. In this patch, CIPHER, MAC, HASH, AEAD services are introduced. VIRTIO-153 Signed-off-by: Gonglei

[Qemu-devel] [PATCH v13 2/2] virtio-crypto: Add conformance clauses

Add the conformance targets and clauses for virtio-crypto device. Signed-off-by: Gonglei --- conformance.tex | 30 ++ 1 file changed, 30 insertions(+) diff --git a/conformance.tex b/conformance.tex index f59e360..3bde4b6 100644 ---

[Qemu-devel] [RFC] powernv: CPU compatibility modes don't make sense for powernv

powernv has some code (derived from the spapr equivalent) used in device tree generation which depends on the CPU's compatibility mode / logical PVR. However, compatibility modes don't make sense on powernv - at least not as a property controlled by the host - because the guest in powernv has

Re: [Qemu-devel] [PATCH v9 04/12] vfio iommu: Add support for mediated devices

On 27/10/16 23:31, Kirti Wankhede wrote: > > > On 10/27/2016 12:50 PM, Alexey Kardashevskiy wrote: >> On 18/10/16 08:22, Kirti Wankhede wrote: >>> VFIO IOMMU drivers are designed for the devices which are IOMMU capable. >>> Mediated device only uses IOMMU APIs, the underlying hardware can be >>>

Re: [Qemu-devel] [Bug 1384892] Re: RTL8168 NIC VFIO not working anymore since QEMU 2.1

Hi *, it seems we could finally fix this bug: https://bugs.launchpad.net/qemu/+bug/1384892 with the following patches: https://lists.nongnu.org/archive/html/qemu-devel/2016-10/msg07260.html Regards, Thorsten Am 22.06.2016 um 13:10 schrieb T. Huth: > Alex' patch has been included here: >

Re: [Qemu-devel] [PATCH COLO-Frame (Base) v23 18/18] MAINTAINERS: Add maintainer for COLO framework related files

Hi Amit, On 2016/10/27 15:34, Amit Shah wrote: On (Thu) 27 Oct 2016 [14:43:09], zhanghailiang wrote: Add myself as co-maintainer of COLO framework, so that I can get CC'ed on future patches and bugs for this feature. Signed-off-by: zhanghailiang Reviewed-by:

Re: [Qemu-devel] [PATCH v2 3/3] hostmem-file: make option 'size' optional

On 10/27/16 12:55 -0200, Eduardo Habkost wrote: On Thu, Oct 27, 2016 at 12:23:00PM +0800, Haozhong Zhang wrote: If 'size' option is not given, Qemu will use the file size of 'mem-path' instead. If an empty file, a non-existing file or a directory is specified by option 'mem-path', a non-zero

[Qemu-devel] [PULL 50/73] adb: change handler only when recognized

From: Hervé Poussineau ADB devices must take new handler into account only when they recognize it. This lets operating systems probe for valid/invalid handles, to know device capabilities. Add a FIXME in keyboard handler, which should use a different translation table

[Qemu-devel] [PULL 73/73] ppc: allow certain HV interrupts to be delivered to guests

From: Nicholas Piggin ppc hypervisors have delivered system reset and machine check exception interrupts to guests in some situations (e.g., see FWNMI feature of LoPAPR, or NMI injection in QEMU). These exceptions are architected to set the HV bit in hardware, however when

[Qemu-devel] [PATCH v1 1/1] virtio crypto device specification: asymmetric crypto service

This patch introduces asymmetric crypto service into virtio crypto device spec. The asymmetric crypto service can be referred as signature, verification, encryption, decryption, key generation and key exchange. This patch depends on another virtio crypto device spec patch:

Re: [Qemu-devel] [PATCH v2 1/3] exec.c: do not truncate non-empty memory backend file

On 10/27/16 12:31 -0200, Eduardo Habkost wrote: On Thu, Oct 27, 2016 at 12:22:58PM +0800, Haozhong Zhang wrote: For '-object memory-backend-file,mem-path=foo,size=xyz', if the size of file 'foo' does not match the given size 'xyz', the current QEMU will truncate the file to the given size,

[Qemu-devel] [PULL 68/73] spapr_events: add support for dedicated hotplug event source

From: Michael Roth Hotplug events were previously delivered using an EPOW interrupt and were queued by linux guests into a circular buffer. For traditional EPOW events like shutdown/resets, this isn't an issue, but for hotplug events there are cases where this buffer

[Qemu-devel] [PULL 72/73] spapr: Memory hot-unplug support

From: Bharata B Rao Add support to hot remove pc-dimm memory devices. Since we're introducing a machine-level unplug_request hook, we also had handling for CPU unplug there as well to ensure CPU unplug continues to work as it did before. Signed-off-by: Bharata B Rao

[Qemu-devel] [PULL 61/73] tests: Don't assume structure of PCI IO base in ahci-test

In a couple of places ahci-test makes assumptions about how the tokens returned from qpci_iomap() are formatted in ways it probably shouldn't. First in verify_state() it uses a non-NULL token to indicate that the AHCI device has been enabled (part of enabling is to iomap()). This changes it to

[Qemu-devel] [PULL 63/73] spapr_nvram: Pre-initialize the NVRAM to support the -prom-env parameter

From: Thomas Huth In case we do not load the NVRAM contents from a file and the user specified the "-prom-env" parameter, use the new CHRP NVRAM helper functions to pre-initialize the NVRAM partitions, so that the SLOF firmware now can pick up the environment variables from the

[Qemu-devel] [PULL 54/73] libqos: Better handling of PCI legacy IO

The usual model for PCI IO with libqos is to use qpci_iomap() to map a specific BAR for a PCI device, then perform IOs within that BAR using qpci_io_{read,write}*(). However, certain devices also have legacy PCI IO. In this case, instead of (or as well as) being accessed via PCI BARs, the device

[Qemu-devel] [PULL 67/73] spapr: update spapr hotplug documentation

From: Michael Roth This updates the existing documentation to reflect recent updates to the hotplug event structure, which are in draft form but slated for inclusion in PAPR/LoPAPR. Signed-off-by: Michael Roth Reviewed-by: David Gibson

[Qemu-devel] [PULL 57/73] libqos: Implement mmio accessors in terms of mem{read, write}

In the libqos PCI code we now have accessors both for registers (byte significance preserving) and for streaming data (byte address order preserving). These exist in both the interface for qtest drivers and in the machine specific backends. However, the register-style accessors aren't actually

[Qemu-devel] [PULL 53/73] libqos: Move BAR assignment to common code

The PCI backends in libqos each supply an iomap() and iounmap() function which is used to set up a specified PCI BAR. But PCI BAR allocation takes place entirely within PCI space, so doesn't really need per-backend versions. For example, Linux includes generic BAR allocation code used on

[Qemu-devel] [PULL 60/73] tests: Use qpci_mem{read, write} in ivshmem-test

ivshmem implements a block of shared memory in a PCI BAR. Currently our test case accesses this using qtest_mem{read,write}. However, deducing the correct addresses for these requires making assumptions about the internel format returned by qpci_iomap(), along with some ugly casts. This patch

[Qemu-devel] [PULL 62/73] libqos: Change PCI accessors to take opaque BAR handle

The usual use model for the libqos PCI functions is to map a specific PCI BAR using qpci_iomap() then pass the returned token into IO accessor functions. This, and the fact that iomap() returns a (void *) which actually contains a PCI space address, kind of suggests that the return value from

[Qemu-devel] [PULL 59/73] libqos: Add 64-bit PCI IO accessors

Currently the libqos PCI layer includes accessor helpers for 8, 16 and 32 bit reads and writes. It's likely that we'll want 64-bit accesses in the future (plenty of modern peripherals will have 64-bit reigsters). This adds them. For PIO (not MMIO) accesses on the PC backend, this is implemented

[Qemu-devel] [PULL 70/73] spapr: Add DRC count indexed hotplug identifier type

From: Bharata B Rao Add support for DRC count indexed hotplug ID type which is primarily needed for memory hot unplug. This type allows for specifying the number of DRs that should be plugged/unplugged starting from a given DRC index. Signed-off-by: Bharata B Rao

[Qemu-devel] [PULL 49/73] spapr: improve ibm, architecture-vec-5 property handling

From: Michael Roth ibm,architecture-vec-5 is supposed to encode all option vector 5 bits negotiated between platform/guest. Currently we hardcode this property in the boot-time device tree to advertise a single negotiated capability, "Form 1" NUMA Affinity, regardless

[Qemu-devel] [PULL 48/73] spapr: add option vector handling in CAS-generated resets

From: Michael Roth In some cases, ibm,client-architecture-support calls can fail. This could happen in the current code for situations where the modified device tree segment exceeds the buffer size provided by the guest via the call parameters. In these cases, QEMU

[Qemu-devel] [PULL 51/73] libqos: Give qvirtio_config_read*() consistent semantics

The 'addr' parameter to qvirtio_config_read*() doesn't have a consistent meaning: when using the virtio-pci versions, it's a full PCI space address, but for virtio-mmio, it's an offset from the device's base mmio address. This means that the callers need to do different things to calculate the

[Qemu-devel] [PULL 56/73] libqos: Add streaming accessors for PCI MMIO

Currently PCI memory (aka MMIO) space is accessed via a set of readb/writeb style accessors. This is what we want for accessing discrete registers of a certain size. However, there are a few cases where we instead need a "bag of bytes" style streaming interface to PCI MMIO space. This can be

[Qemu-devel] [PULL 66/73] target-ppc: Add xvcmpnesp, xvcmpnedp instructions

From: Swapnil Bokade xvcmpnedp[.]: VSX Vector Compare Not Equal Double-Precision xvcmpnesp[.]: VSX Vector Compare Not Equal Single-Precision Signed-off-by: Swapnil Bokade Signed-off-by: Nikunj A Dadhania

[Qemu-devel] [PULL 64/73] tests: Add pseries machine to the prom-env-test, too

Now that we also support the "-prom-env" parameter for the pseries machine, we can enable this test for this machine, too. Since booting with TCG is rather slow with the pseries machine, we also enable the "-nodefaults" parameter for this test now, so that SLOF does not have to check that much

[Qemu-devel] [PULL 58/73] tests: Clean up IO handling in ide-test

ide-test uses many explicit inb() / outb() operations for its IO, which means it's not portable to non-x86 platforms. This cleans it up to use the libqos PCI accessors instead. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- tests/ide-test.c

[Qemu-devel] [PULL 65/73] target-ppc: add xscmp[eq, gt, ge, ne]dp instructions

From: Sandipan Das xscmpeqdp: VSX Scalar Compare Equal Double-Precision xscmpgedp: VSX Scalar Compare Greater Than or Equal Double-Precision xscmpgtdp: VSX Scalar Compare Greater Than Double-Precision xscmpnedp: VSX Scalar Compare Not Equal Double-Precision

[Qemu-devel] [PULL 71/73] spapr: use count+index for memory hotplug

From: Michael Roth Commit 0a417869: spapr: Move memory hotplug to RTAS_LOG_V6_HP_ID_DRC_COUNT type dropped per-DRC/per-LMB hotplugs event in favor of a bulk add via a single LMB count value. This was to avoid overrunning the guest EPOW event queue with hotplug

[Qemu-devel] [PULL 69/73] spapr: add hotplug interrupt machine options

From: Michael Roth This adds machine options of the form: -machine pseries,modern-hotplug-events=true -machine pseries,modern-hotplug-events=false If false, QEMU will force the use of "legacy" style hotplug events, which are surfaced through EPOW events instead

[Qemu-devel] [PULL 55/73] tests: Adjust tco-test to use qpci_legacy_iomap()

Avoid tco-test making assumptions about the internal format of the address tokens passed to PCI IO accessors, by using the new qpci_legacy_iomap() function. Signed-off-by: David Gibson Reviewed-by: Laurent Vivier Reviewed-by: Greg Kurz

[Qemu-devel] [PULL 39/73] pseries: Move construction of /interrupt-controller fdt node

Currently the device tree node for the XICS interrupt controller is in spapr_create_fdt_skel(). As part of consolidating device tree construction to reset time, this moves it to a function called from spapr_build_fdt(). In addition we move the actual code into hw/intc/xics_spapr.c with the rest

[Qemu-devel] [PULL 47/73] spapr_hcall: use spapr_ovec_* interfaces for CAS options

From: Michael Roth Currently we access individual bytes of an option vector via ldub_phys() to test for the presence of a particular capability within that byte. Currently this is only done for the "dynamic reconfiguration memory" capability bit. If that bit is

[Qemu-devel] [PULL 45/73] pseries: Remove spapr_create_fdt_skel()

For historical reasons construction of the guest device tree in spapr is divided between spapr_create_fdt_skel() which is called at init time, and spapr_build_fdt() which runs at reset time. Over time, more and more things have needed to be moved to reset time. Previous cleanups mean the only

[Qemu-devel] [PULL 37/73] pseries: Move adding of fdt reserve map entries

The flattened device tree passed to pseries guests contains a list of reserved memory areas. Currently we construct this list early in spapr_create_fdt_skel() as we sequentially write the fdt. This will be inconvenient for upcoming cleanups, so this patch moves the reserve map changes to the end

[Qemu-devel] [PULL 52/73] libqos: Handle PCI IO de-multiplexing in common code

The PCI IO space (aka PIO, aka legacy IO) and PCI memory space (aka MMIO) are distinct address spaces by the PCI spec (although parts of one might be aliased to parts of the other in some cases). However, qpci_io_read*() and qpci_io_write*() can perform accesses to either space depending on

[Qemu-devel] [PULL 32/73] ppc/pnv: add a ISA bus

From: Cédric Le Goater As Qemu only supports a single instance of the ISA bus, we use the LPC controller of chip 0 to create one and plug in a couple of useful devices, like an UART and RTC. An IPMI BT device, which is also an ISA device, can be defined on the command line to

[Qemu-devel] [PULL 30/73] ppc/pnv: add XSCOM handlers to PnvCore

From: Cédric Le Goater Now that we are using real HW ids for the cores in PowerNV chips, we can route the XSCOM accesses to them. We just need to attach a specific XSCOM memory region to each core in the appropriate window for the core number. To start with, let's install the DTS

[Qemu-devel] [PULL 29/73] ppc/pnv: add XSCOM infrastructure

From: Cédric Le Goater On a real POWER8 system, the Pervasive Interconnect Bus (PIB) serves as a backbone to connect different units of the system. The host firmware connects to the PIB through a bridge unit, the Alter-Display-Unit (ADU), which gives him access to all the chiplets

[Qemu-devel] [PULL 42/73] pseries: Move /event-sources construction to spapr_build_fdt()

The /event-sources device tree node is built from spapr_create_fdt_skel(). As part of consolidating device tree construction to reset time, this moves it to spapr_build_fdt(). Signed-off-by: David Gibson Reviewed-by: Thomas Huth Reviewed-by:

[Qemu-devel] [PULL 31/73] ppc/pnv: add a LPC controller

From: Benjamin Herrenschmidt The LPC (Low Pin Count) interface on a POWER8 is made accessible to the system through the ADU (XSCOM interface). This interface is part of set of units connected together via a local OPB (On-Chip Peripheral Bus) which act as a bridge

[Qemu-devel] [PULL 35/73] pseries: Remove rtas_addr and fdt_addr fields from machinestate

These values are used only within ppc_spapr_reset(), so just change them to local variables. Signed-off-by: David Gibson Reviewed-by: Thomas Huth Reviewed-by: Alexey Kardashevskiy Reviewed-by: Michael Roth

[Qemu-devel] [PULL 41/73] pseries: Consolidate construction of /rtas device tree node

For historical reasons construction of the /rtas node in the device tree (amongst others) is split into several places. In particular it's split between spapr_create_fdt_skel(), spapr_build_fdt() and spapr_rtas_device_tree_setup(). In fact, as well as adding the actual RTAS tokens to the device

[Qemu-devel] [PULL 36/73] pseries: Make spapr_create_fdt_skel() get information from machine state

Currently spapr_create_fdt_skel() takes a bunch of individual parameters for various things it will put in the device tree. Some of these can already be taken directly from sPAPRMachineState. This patch alters it so that all of them can be taken from there, which will allow this code to be moved

[Qemu-devel] [PULL 44/73] pseries: Consolidate construction of /vdevice device tree node

Construction of the /vdevice node (and its children) is divided between spapr_create_fdt_skel() (at init time), which creates the base node, and spapr_populate_vdevice() (at reset time) which creates the nodes for each individual virtual device. This consolidates both into a single function

[Qemu-devel] [PULL 33/73] target-ppc: add vmul10[u, eu, cu, ecu]q instructions

From: Vasant Hegde vmul10uq : Vector Multiply-by-10 Unsigned Quadword VX-form vmul10euq : Vector Multiply-by-10 Extended Unsigned Quadword VX-form vmul10cuq : Vector Multiply-by-10 & write Carry Unsigned Quadword VX-form vmul10ecuq: Vector Multiply-by-10 Extended

[Qemu-devel] [PULL 28/73] ppc/pnv: add a PnvCore object

From: Cédric Le Goater This is largy inspired by sPAPRCPUCore with some simplification, no hotplug for instance. A set of PnvCore objects is added to the PnvChip and the device tree is populated looping on these cores. Real HW cpu ids are now generated depending on the chip cpu

[Qemu-devel] [PULL 21/73] ppc: Fix single step with gdb stub

From: Benjamin Herrenschmidt Signed-off-by: Benjamin Herrenschmidt Signed-off-by: David Gibson --- target-ppc/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-ppc/translate.c

[Qemu-devel] [PULL 43/73] pseries: Move /hypervisor node construction to fdt_build_fdt()

Currently the /hypervisor device tree node is constructed in spapr_create_fdt_skel(). As part of consolidating device tree construction to reset time, move it to a function called from spapr_build_fdt(). Signed-off-by: David Gibson Reviewed-by: Thomas Huth

[Qemu-devel] [PULL 25/73] ppc/pnv: add a PnvChip object

From: Cédric Le Goater This is is an abstraction of a POWER8 chip which is a set of cores plus other 'units', like the pervasive unit, the interrupt controller, the memory controller, the on-chip microcontroller, etc. The whole can be seen as a socket. It depends on a cpu model

[Qemu-devel] [PULL 17/73] ppc/xics: add a XICSState backlink in ICPState

From: Cédric Le Goater The link will be used to change the API of the icp_* routines which are still using an XICSState as an argument. Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson --- hw/intc/xics.c| 1 +

[Qemu-devel] [PULL 07/73] tests: use qtest_pc_boot()/qtest_shutdown() in virtio tests

From: Laurent Vivier This patch replaces calls to qtest_start() and qtest_end() by calls to qtest_pc_boot() and qtest_shutdown(). This allows to initialize memory allocator and PCI interface functions. This will ease to enable virtio tests on other architectures by only

[Qemu-devel] [PULL 18/73] ppc/xics: change the icp_ routines API to use an 'ICPState *' argument

From: Cédric Le Goater The routines : void icp_set_cppr(ICPState *icp, uint8_t cppr); void icp_set_mfrr(ICPState *icp, uint8_t mfrr); void icp_eoi(ICPState *icp, uint32_t xirr); now use one 'ICPState *icp' argument instead of a 'XICSState *' and a server

[Qemu-devel] [PULL 23/73] configure, ppc64: Copy skiboot.lid to build directory when configuring

From: Alexey Kardashevskiy When configured to compile out of tree, the configure script copies BIOS blobs to the build directory. However since the PPC64 powernv machine ROM has .lid extension, it is ignored and "make check" fails when trying the powernv machine. This adds *.lid

[Qemu-devel] [PULL 40/73] pseries: Consolidate construction of /chosen device tree node

For historical reasons, building the /chosen node in the guest device tree is split across several places and includes both parts which write the DT sequentially and others which use random access functions. This patch consolidates construction of the node into one place, using random access

[Qemu-devel] [PULL 38/73] pseries: Consolidate RTAS loading

At each system reset, the pseries machine needs to load RTAS (the runtime portion of the guest firmware) into the VM. This means copying the actual RTAS code into guest memory, and also updating the device tree so that the guest OS and boot firmware can locate it. For historical reasons the copy

[Qemu-devel] [PULL 27/73] ppc/pnv: add a PIR handler to PnvChip

From: Cédric Le Goater The Processor Identification Register (PIR) is a register that holds a processor identifier which is used for bus transactions (XSCOM) and for processor differentiation in multiprocessor systems. It also used in the interrupt vector entries (IVE) to identify

[Qemu-devel] [PULL 13/73] nvram: Rename openbios_firmware_abi.h into sun_nvram.h

From: Thomas Huth The header now only contains inline functions related to the Sun NVRAM, so the a name like sun_nvram.h seems to be more appropriate now. Signed-off-by: Thomas Huth Tested-by: Mark Cave-Ayland Signed-off-by:

[Qemu-devel] [PULL 20/73] pseries: Remove unused callbacks from sPAPR VIO bus state

The original QOMification of the spapr VIO devices in 3954d33 "spapr: convert to QEMU Object Model (v2)" moved some callbacks from the VIOsPAPRBus structure to the VIOsPAPRDeviceClass. Except, that it forgot to actually remove them from the VIOsPAPRBus structure (which still exists, though it

[Qemu-devel] [PULL 06/73] tests: rename target_big_endian() as qvirtio_is_big_endian()

From: Laurent Vivier Move the definition to libqos/virtio.h as it must be used only with virtio functions. Add a QVirtioDevice parameter as it will be needed to know if the virtio device is using virtio 1.0 specification and thus is always little-endian (to do)

[Qemu-devel] [PULL 15/73] target-ppc: implement xxbr[qdwh] instruction

From: Nikunj A Dadhania Add required helpers (GEN_XX2FORM_EO) for supporting this instruction. xxbrh: VSX Vector Byte-Reverse Halfword xxbrw: VSX Vector Byte-Reverse Word xxbrd: VSX Vector Byte-Reverse Doubleword xxbrq: VSX Vector Byte-Reverse Quadword Signed-off-by:

[Qemu-devel] [PULL 46/73] spapr_ovec: initial implementation of option vector helpers

From: Michael Roth PAPR guests advertise their capabilities to the platform by passing an ibm,architecture-vec structure via an ibm,client-architecture-support hcall as described by LoPAPR v11, B.6.2.3. during early boot. Using this information, the platform enables

[Qemu-devel] [PULL 08/73] tests: enable virtio tests on SPAPR

From: Laurent Vivier but disable MSI-X tests on SPAPR as we can't check the result (the memory region used on PC is not readable on SPAPR). Signed-off-by: Laurent Vivier Signed-off-by: David Gibson ---

[Qemu-devel] [PULL 14/73] target-ppc: implement vnegw/d instructions

From: Nikunj A Dadhania Vector Integer Negate Instructions: vnegw: Vector Negate Word vnegd: Vector Negate Doubleword Signed-off-by: Nikunj A Dadhania Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson

[Qemu-devel] [PULL 12/73] nvram: Move the remaining CHRP NVRAM related code to chrp_nvram.[ch]

From: Thomas Huth Everything that is related to CHRP NVRAM should rather reside in chrp_nvram.c / chrp_nvram.h instead of openbios_firmware_abi.h. Signed-off-by: Thomas Huth Tested-by: Mark Cave-Ayland Signed-off-by: David

[Qemu-devel] [PULL 34/73] pseries: Split device tree construction from device tree load

spapr_finalize_fdt() both finishes building the device tree for the guest and loads it into guest memory. For future cleanups, it's going to be more convenient to do these two things separately. The loading portion is pretty trivial, so we move it inline into the caller, ppc_spapr_reset(). We

Re: [Qemu-devel] [PATCH v2 3/6] target-ppc: add vrldnmi and vrlwmi instructions

On Thu, Oct 27, 2016 at 02:03:01PM +0530, Nikunj A Dadhania wrote: > David Gibson writes: > >> diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c > >> index dca4798..b54cd7c 100644 > >> --- a/target-ppc/int_helper.c > >> +++ b/target-ppc/int_helper.c > >>

[Qemu-devel] [PULL 10/73] nvram: Introduce helper functions for CHRP "system" and "free space" partitions

From: Thomas Huth The "system partition" and "free space" partition layouts are defined by the CHRP and LoPAPR specification, and used by OpenBIOS and SLOF. We can re-use this code for other machines that use OpenBIOS and SLOF, too. So let's make this code independent from the

[Qemu-devel] [PULL 16/73] ppc/xics: add a xics_set_nr_servers common routine

From: Cédric Le Goater xics_spapr and xics_kvm nearly define the same 'set_nr_servers' handler. Only the type of the ICP differs. So let's make a common one to remove some duplicated code. Signed-off-by: Cédric Le Goater Signed-off-by: David Gibson

[Qemu-devel] [PULL 26/73] ppc/pnv: add a core mask to PnvChip

From: Cédric Le Goater This will be used to build real HW ids for the cores and enforce some limits on the available cores per chip. Signed-off-by: Cédric Le Goater Reviewed-by: David Gibson Signed-off-by: David Gibson

[Qemu-devel] [PULL 03/73] tests: fix memory leak in virtio-scsi-test

From: Laurent Vivier vs is allocated in qvirtio_scsi_pci_init() and never freed. Signed-off-by: Laurent Vivier Reviewed-by: Greg Kurz Reviewed-by: Thomas Huth Signed-off-by: David Gibson

[Qemu-devel] [PULL 11/73] sparc: Use the new common NVRAM functions for system and free space partition

From: Thomas Huth The system and free space NVRAM partitions (for OpenBIOS) are created in exactly the same way as the Mac-style CHRP NVRAM partitions, so we can use the new common helper functions to do this job here, too. Signed-off-by: Thomas Huth

[Qemu-devel] [PULL 24/73] ppc/pnv: add skeleton PowerNV platform

From: Benjamin Herrenschmidt The goal is to emulate a PowerNV system at the level of the skiboot firmware, which loads the OS and provides some runtime services. Power Systems have a lower firmware (HostBoot) that does low level system initialization, like DRAM

[Qemu-devel] [PULL 19/73] ppc: fix MSR_ME handling for system reset interrupt

From: Nicholas Piggin Power ISA specifies ME bit handling for system reset interrupt: if the interrupt occurred while the thread was in power-saving mode, set to 1; otherwise not altered Power ISA 3.0, section 6.5 "Interrupt Definitions", Figure 64. Signed-off-by:

[Qemu-devel] [PULL 02/73] ppc/xics: Add xics to the monitor "info pic" command

From: Benjamin Herrenschmidt Useful to debug interrupt problems. Signed-off-by: Benjamin Herrenschmidt [clg: - updated for qemu-2.7 - added a test on ->irqs as it is not necessarily allocated (PHB3_MSI) - removed static

[Qemu-devel] [PULL 09/73] spapr_pci: advertise explicit numa IDs even when there's 1 node

From: Michael Roth With the addition of "numa_node" properties for PHBs we began advertising NUMA affinity in cases where nb_numa_nodes > 1. Since the default on the guest side is to make no assumptions about PHB NUMA affinity (defaulting to -1), there is still a

[Qemu-devel] [PULL 04/73] tests: don't check if qtest_spapr_boot() returns NULL

From: Laurent Vivier qtest_spapr_boot()/qtest_pc_boot()/qtest_boot() call qtest_vboot() and qtest_vboot() calls g_malloc(), and g_malloc() never fails: if memory allocation fails, the application is terminated. Signed-off-by: Laurent Vivier Reviewed-by:

Re: [Qemu-devel] [PULL 00/49] ppc-for-2.8 queue 20161026

On Thu, Oct 27, 2016 at 04:25:57PM +0200, Cédric Le Goater wrote: > On 10/27/2016 03:34 PM, David Gibson wrote: > > On Thu, Oct 27, 2016 at 02:06:12PM +0100, Peter Maydell wrote: > >> On 26 October 2016 at 12:42, David Gibson > >> wrote: > >>> Merge remote-tracking

[Qemu-devel] [PULL 00/73] ppc-for-2.8 queue 20161028

The following changes since commit 835f3d24b42fcbeca5c49048994a4e5d0fe905c5: Merge remote-tracking branch 'remotes/kraxel/tags/pull-audio-20161027-1' into staging (2016-10-27 17:24:29 +0100) are available in the git repository at: git://github.com/dgibson/qemu.git tags/ppc-for-2.8-20161028

[Qemu-devel] [PULL 05/73] tests: move QVirtioBus pointer into QVirtioDevice

From: Laurent Vivier This allows to not have to pass bus and device for every virtio functions. Signed-off-by: Laurent Vivier Reviewed-by: Greg Kurz Reviewed-by: Thomas Huth [dwg: Fix style nit] Signed-off-by: David

Re: [Qemu-devel] [PATCH v2 5/6] target-ppc: add vprtyb[w/d/q] instructions

On Thu, Oct 27, 2016 at 07:16:24AM -0700, Richard Henderson wrote: > On 10/27/2016 01:36 AM, Nikunj A Dadhania wrote: > > Right, it does reduce number of operations: > > > > +#define SIZE_MASK(x) ((1ULL << (x)) - 1) > > +static uint64_t vparity(uint64_t f1, uint64_t f2, int size) > > +{ > > +

Re: [Qemu-devel] [PATCH v5 11/17] ppc/xics: Add "native" XICS subclass

On Thu, Oct 27, 2016 at 07:43:10PM +0200, Cédric Le Goater wrote: > On 10/27/2016 05:09 AM, David Gibson wrote: > > On Wed, Oct 26, 2016 at 09:13:18AM +0200, Cédric Le Goater wrote: > >> On 10/25/2016 07:08 AM, David Gibson wrote: > >>> On Sat, Oct 22, 2016 at 11:46:44AM +0200, Cédric Le Goater

Re: [Qemu-devel] [PATCH v5 13/17] ppc/xics: add a xics_get_cpu_index_by_pir helper

On Thu, Oct 27, 2016 at 08:05:02PM +0200, Cédric Le Goater wrote: > On 10/27/2016 05:12 AM, David Gibson wrote: > > On Tue, Oct 25, 2016 at 12:58:11PM +0200, Cédric Le Goater wrote: > >> On 10/25/2016 07:36 AM, David Gibson wrote: > >>> On Sat, Oct 22, 2016 at 11:46:46AM +0200, Cédric Le Goater

Re: [Qemu-devel] [virtio-dev] Re: [PATCH v12 0/2] virtio-crypto: virtio crypto device specification

> From: Michael S. Tsirkin [mailto:m...@redhat.com] > Sent: Friday, October 28, 2016 9:13 AM > To: Gonglei (Arei) > Subject: Re: [virtio-dev] Re: [PATCH v12 0/2] virtio-crypto: virtio crypto > device > specification > > On Fri, Oct 28, 2016 at 01:01:40AM +, Gonglei (Arei) wrote: > > > > >

Re: [Qemu-devel] [PATCH v2 0/2] memory: Convert skip_dump to ram_device and avoid memcpy

I tested these https://lists.nongnu.org/archive/html/qemu-devel/2016-10/msg05900.html https://lists.nongnu.org/archive/html/qemu-devel/2016-10/msg05901.html https://lists.nongnu.org/archive/html/qemu-devel/2016-10/msg05902.html together with [Qemu-devel] [PULL 18/19] vfio/pci: Fix

Re: [Qemu-devel] [PATCH] tests: Remove unneeded "-vnc none" option

On Mon, Oct 24, 2016 at 02:25:49PM -0200, Eduardo Habkost wrote: > Some tests use the "-vnc none" option without any clear reason, > making those tests break when --disable-vnc is specified on > ./configure. Remove the unnecessary option. > > Signed-off-by: Eduardo Habkost

Re: [Qemu-devel] [virtio-dev] Re: [PATCH v12 0/2] virtio-crypto: virtio crypto device specification

On Fri, Oct 28, 2016 at 01:01:40AM +, Gonglei (Arei) wrote: > > > -Original Message- > > From: virtio-...@lists.oasis-open.org > > [mailto:virtio-...@lists.oasis-open.org] > > On Behalf Of Michael S. Tsirkin > > Sent: Friday, October 28, 2016 6:14 AM > > Subject: [virtio-dev] Re:

Re: [Qemu-devel] [virtio-dev] Re: [PATCH v12 0/2] virtio-crypto: virtio crypto device specification

> -Original Message- > From: virtio-...@lists.oasis-open.org [mailto:virtio-...@lists.oasis-open.org] > On Behalf Of Michael S. Tsirkin > Sent: Friday, October 28, 2016 6:14 AM > Subject: [virtio-dev] Re: [PATCH v12 0/2] virtio-crypto: virtio crypto device > specification > > On Mon, Oct

Re: [Qemu-devel] [virtio-dev] Re: [PATCH v9 09/12] virtio-crypto: add data queue processing handler

Hi Michael, Thanks for your comments. > -Original Message- > From: virtio-...@lists.oasis-open.org [mailto:virtio-...@lists.oasis-open.org] > On Behalf Of Michael S. Tsirkin > Sent: Friday, October 28, 2016 12:59 AM > Subject: [virtio-dev] Re: [PATCH v9 09/12] virtio-crypto: add data

Re: [Qemu-devel] [PATCH] fixup! pc: add 'etc/boot-cpus' fw_cfg file for machine with more than 255 CPUs

On Fri, Oct 28, 2016 at 01:08:32AM +0300, Michael S. Tsirkin wrote: > On Fri, Oct 21, 2016 at 10:53:27AM +0200, Igor Mammedov wrote: > > On Thu, 20 Oct 2016 16:51:48 -0200 > > Eduardo Habkost wrote: > > > > > On Thu, Oct 20, 2016 at 04:58:42PM +0200, Igor Mammedov wrote: > >

[Qemu-devel] [PATCH] tcg: correct 32-bit tcg_gen_ld8s_i64 sign-extension

The version of tcg_gen_ld8s_i64 for 32-bit systems does a load into the low part of the return value - then attempts a sign extension into the high part, but wrongly sets the high part to a sign extension of itself rather than of the low part. This results in TCG internal errors from the use of

Re: [Qemu-devel] [PATCH v2 6/8] loader: Support Flattened Image Trees (FIT images)

On 08/09/2016 15:51, Paul Burton wrote: > Introduce support for loading Flattened Image Trees, as used by modern > U-Boot. FIT images are essentially flattened device tree files which > contain binary images such as kernels, FDTs or ramdisks along with one > or more configuration nodes

Re: [Qemu-devel] [PATCH v10 09/19] vfio iommu type1: Add support for mediated devices

On Thu, 27 Oct 2016 02:59:16 +0530 Kirti Wankhede wrote: > VFIO IOMMU drivers are designed for the devices which are IOMMU capable. > Mediated device only uses IOMMU APIs, the underlying hardware can be > managed by an IOMMU domain. > > Aim of this change is: > - To use

[Qemu-devel] [QEMU PATCH v9 2/3] migration: migrate QTAILQ

Currently we cannot directly transfer a QTAILQ instance because of the limitation in the migration code. Here we introduce an approach to transfer such structures. We created VMStateInfo vmstate_info_qtailq for QTAILQ. Similar VMStateInfo can be created for other data structures such as list.

[Qemu-devel] [QEMU PATCH v9 1/3] migration: extend VMStateInfo

Current migration code cannot handle some data structures such as QTAILQ in qemu/queue.h. Here we extend the signatures of put/get in VMStateInfo so that customized handling is supported. Signed-off-by: Jianjun Duan --- hw/display/virtio-gpu.c | 6 ++-

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