[Qemu-devel] Introduction

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Re: [Qemu-devel] [PATCH v6 1/3] pci: Add support for Designware IP block

On Sat, Mar 3, 2018 at 7:55 PM, Michael S. Tsirkin wrote: > On Tue, Feb 13, 2018 at 02:47:24PM -0800, Andrey Smirnov wrote: >> On Tue, Feb 13, 2018 at 2:15 PM, Michael S. Tsirkin wrote: >> > On Tue, Feb 13, 2018 at 12:24:40PM -0800, Andrey Smirnov wrote: >> >>

Re: [Qemu-devel] [PATCH v6 1/3] pci: Add support for Designware IP block

On Tue, Feb 13, 2018 at 02:47:24PM -0800, Andrey Smirnov wrote: > On Tue, Feb 13, 2018 at 2:15 PM, Michael S. Tsirkin wrote: > > On Tue, Feb 13, 2018 at 12:24:40PM -0800, Andrey Smirnov wrote: > >> On Tue, Feb 13, 2018 at 10:13 AM, Michael S. Tsirkin > >>

[Qemu-devel] [Bug 1753186] [NEW] qemu-nbd: always first snapshot loaded from VDI images with snapshots

Public bug reported: When mounting a virtual box disk image of a VM with snapshots, always the state of the first snapshot is shown. How to reproduce: 1. Create a new VirtualBox VM or use an existing one, while choosing VDI as the disk image format. 2. Create a snapshot of the VM. 3. Modify the

Re: [Qemu-devel] [PATCH v6 1/3] pci: Add support for Designware IP block

On Tue, Feb 13, 2018 at 2:47 PM, Andrey Smirnov wrote: > On Tue, Feb 13, 2018 at 2:15 PM, Michael S. Tsirkin wrote: >> On Tue, Feb 13, 2018 at 12:24:40PM -0800, Andrey Smirnov wrote: >>> On Tue, Feb 13, 2018 at 10:13 AM, Michael S. Tsirkin

Re: [Qemu-devel] [PULL] RISC-V QEMU Port Submission v8

On 3 March 2018 at 02:46, Michael Clark wrote: > On Sat, Mar 3, 2018 at 3:22 AM, Peter Maydell > wrote: >> Please don't send pull requests until after patches have been put >> on list and been reviewed. A minor update to a pullreq is OK if >> it's

Re: [Qemu-devel] [PATCH 1/1] tci: eliminate UB due to unaligned reads

2018-03-03 18:41 GMT+03:00 Stefan Weil : > Am 03.03.2018 um 15:07 schrieb Anatoly Trosinenko: > > Can rewriting TCI in such a way that every operation is aligned at 4- or > > even 8-byte boundary fix the situation or are there some more serious > > problems? > > That's my

Re: [Qemu-devel] [PATCH 1/1] tci: eliminate UB due to unaligned reads

Am 03.03.2018 um 15:07 schrieb Anatoly Trosinenko: > Can rewriting TCI in such a way that every operation is aligned at 4- or > even 8-byte boundary fix the situation or are there some more serious > problems? That's my preferred solution. Are there cases which would require 8-byte alignment?

Re: [Qemu-devel] [PATCH 1/1] tci: eliminate UB due to unaligned reads

> So. Why do you want to use TCI instead of a native TCG backend? Frankly speaking, personally I just have a strange experiment on porting QEMU to JavaScript. :) I used the TCI bytecode as some intermediate patchable form for rarely executing BBs and for (re)generating asm.js from it when

[Qemu-devel] [PATCH v4 5/5] aarch64-linux-user: Add support for SVE signal frame records

Depending on the currently selected size of the SVE vector registers, we can either store the data within the "standard" allocation, or we may beedn to allocate additional space with an EXTRA record. Signed-off-by: Richard Henderson --- linux-user/signal.c | 210

[Qemu-devel] [PATCH v4 4/5] aarch64-linux-user: Add support for EXTRA signal frame records

The EXTRA record allows for additional space to be allocated beyon what is currently reserved. Add code to emit and read this record type. Nothing uses extra space yet. Signed-off-by: Richard Henderson --- linux-user/signal.c | 74

[Qemu-devel] [PATCH v4 1/5] linux-user: Implement aarch64 PR_SVE_SET/GET_VL

As an implementation choice, widening VL has zeroed the previously inaccessible portion of the sve registers. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- linux-user/aarch64/target_syscall.h | 3 +++ target/arm/cpu.h

[Qemu-devel] [PATCH v4 3/5] aarch64-linux-user: Remove struct target_aux_context

This changes the qemu signal frame layout to be more like the kernel's, in that the various records are dynamically allocated rather than fixed in place by a structure. For now, all of the allocation is out of uc.tuc_mcontext.__reserved, so the allocation is actually trivial. That will change

[Qemu-devel] [PATCH v4 2/5] aarch64-linux-user: Split out helpers for guest signal handling

Split out helpers from target_setup_frame and target_restore_sigframe for dealing with general registers, fpsimd registers, and the end record. When we add support for sve registers, the relative positions of these will change. Reviewed-by: Peter Maydell Signed-off-by:

[Qemu-devel] [PATCH v4 0/5] target/arm linux-user changes for sve

Changes since v3: * Review comments applied. * Frame allocation generalized in patch 5; hopefully this eliminates some of the confusion seen during review. Changes since v2: * 5 patches merged, * The PR_SVE_SET/GET_VL patch is more specifically user-only. * Split the signal frame

Re: [Qemu-devel] [PATCH 1/1] tci: eliminate UB due to unaligned reads

On 03/03/2018 06:07 AM, Anatoly Trosinenko wrote: > Can rewriting TCI in such a way that every operation is aligned at 4- or even > 8-byte boundary fix the situation or are there some more serious problems? With the current TCI, there are also problems with calls to helper functions. The only

Re: [Qemu-devel] [PATCH 10/10] linux-user: init_guest_space: Try to make ARM space+commpage continuous

On 03/02/2018 06:13 AM, Peter Maydell wrote: > Does anybody know why we allow the user to specify > it on the command line? (git revision history doesn't help, it just says > there's been a -pagesize argument since commit 54936004fddc5 in 2003, > right back when mmap emulation was first added...)

Re: [Qemu-devel] [PATCH 1/1] tci: eliminate UB due to unaligned reads

Can rewriting TCI in such a way that every operation is aligned at 4- or even 8-byte boundary fix the situation or are there some more serious problems? 2018-03-03 16:57 GMT+03:00 Richard Henderson : > On 03/03/2018 12:54 AM, Anatoly Trosinenko wrote: > > Ping. > > Patchwork

Re: [Qemu-devel] [PATCH 1/1] tci: eliminate UB due to unaligned reads

On 03/03/2018 12:54 AM, Anatoly Trosinenko wrote: > Ping. > Patchwork link: http://patchwork.ozlabs.org/patch/866732/ > > Patchew link: > http://patchew.org/QEMU/20180127134908.24095-1-anatoly.trosine...@gmail.com/ >

Re: [Qemu-devel] [PATCH 1/1] tci: eliminate UB due to unaligned reads

Ping. Patchwork link: http://patchwork.ozlabs.org/patch/866732/ Patchew link: http://patchew.org/QEMU/20180127134908.24095-1-anatoly. trosine...@gmail.com/ The code in tcg/tci.c reads some data from TCI bytecode through pointer dereferencing. As far as I know unaligned reads in such a way are

[Qemu-devel] [PATCH] PPC: e500: Add check for NULL return value from qemu_find_file.

This prints a message and exits if the e500 BIOS firmware can't be found, to avoid dereferencing a null pointer. Signed-off-by: Nia Alarie --- hw/ppc/e500.c | 4 1 file changed, 4 insertions(+) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index a40d3ec3e3..6ce03d6ff4

[Qemu-devel] [Bug 1673976] Re: linux-user clone() can't handle glibc posix_spawn() (causes locale-gen to assert)

Unfortunately that won't work, because if we do a clone(CLONE_VM) in QEMU that will mean that parent and child share not just the guest address space, but also all the QEMU data structures for the emulated CPUs and also the host libc data structures. Then actions done by the child will update

Re: [Qemu-devel] [PATCH v4 09/11] sdcard: display protocol used when tracing

On 02/22/2018 10:02 AM, Peter Maydell wrote: > On 15 February 2018 at 22:05, Philippe Mathieu-Daudé wrote: >> put the function in sdmmc-common.c since we will reuse it in hw/sd/core.c >> >> Signed-off-by: Philippe Mathieu-Daudé > > Commit message talks about a

Re: [Qemu-devel] [PATCH v4 00/20] SDCard: bugfixes, support UHS-I (part 5)

Hi Peter, On 02/22/2018 11:31 AM, Peter Maydell wrote: > On 15 February 2018 at 22:13, Philippe Mathieu-Daudé wrote: >> Some refactors, few bugfixes, better SD/SPI support. >> >> With this series apply, machines can use SD cards in UHS-I mode. >> (mostly imported from Alistair

Re: [Qemu-devel] [PATCH v4 10/20] sdcard: handle the Security Specification commands

On 02/15/2018 07:54 PM, Alistair Francis wrote: > On Thu, Feb 15, 2018 at 2:13 PM, Philippe Mathieu-Daudé > wrote: >> returning sd_illegal, since they are not implemented. >> >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> hw/sd/sd.c | 11 +++ >> 1

Re: [Qemu-devel] [PATCH v4 20/20] sdcard: add an enum for the SD PHY Spec version

On 02/22/2018 11:26 AM, Peter Maydell wrote: > On 15 February 2018 at 22:13, Philippe Mathieu-Daudé wrote: >> So far this device intends to model the Spec v1.10 >> >> Signed-off-by: Philippe Mathieu-Daudé >> Reviewed-by: Alistair Francis

Re: [Qemu-devel] [PATCH v4 19/20] sdcard: add a 'uhs' property, update the OCR register ACCEPT_SWITCH_1V8 bit

Hi Peter, On 02/22/2018 11:25 AM, Peter Maydell wrote: > On 15 February 2018 at 22:13, Philippe Mathieu-Daudé wrote: >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> hw/sd/sd.c | 4 >> 1 file changed, 4 insertions(+) >> >> diff --git a/hw/sd/sd.c