Re: [Qemu-devel] [PULL 0/8] Ui 20180308 patches

Hi, > Maybe I should move the code to a separate source file so it can be > built with different compiler flags, without needing #pragma? I don't > feel like building all gtk code with -Wno-deprecated-declarations ... Hmm, that idea doesn't fly, seems per-object cflags don't work for object

Re: [Qemu-devel] [Qemu-ppc] [PATCH] hw/ppc/spapr: Allow "spapr-vlan" as NIC model name beside "ibmveth"

On Fri, 9 Mar 2018 08:01:38 +0100 Thomas Huth wrote: > With the new "--nic" command line parameter option, the "old" way of > specifying a NIC model via the nd_table[] is becoming more prominent > again. But for the pseries "spapr-vlan" device, there is a confusing >

Re: [Qemu-devel] [PATCH 3/3] q35: change default NIC to e1000e

On 2018年03月09日 01:28, Paolo Bonzini wrote: The e1000 NIC is getting old and is not a very good default for a PCIe machine type. Change it to e1000e, which should be supported by a good number of guests. In particular, drivers for 82574 were added first to Linux 2.6.27 (2008) and Windows 2008

Re: [Qemu-devel] [PATCH 2/3] net: allow using any PCI NICs in -net or -nic

On 2018年03月09日 01:28, Paolo Bonzini wrote: Remove the hard-coded list of PCI NIC names; instead, fill an array using all PCI devices listed under DEVICE_CATEGORY_NETWORK. Keep the old shortcut "virtio" for virtio-net-pci. Suggested-by: Thomas Huth Cc: Jason Wang

Re: [Qemu-devel] [PATCH v3 07/12] vfio/pci: register sva notifier

On Thu, Mar 08, 2018 at 11:22:26AM +, Liu, Yi L wrote: > > From: Peter Xu [mailto:pet...@redhat.com] > > Sent: Tuesday, March 6, 2018 8:10 PM > > To: Liu, Yi L > > Cc: Liu, Yi L ; qemu-devel@nongnu.org; > > m...@redhat.com; > >

[Qemu-devel] [PATCH] hw/ppc/spapr: Allow "spapr-vlan" as NIC model name beside "ibmveth"

With the new "--nic" command line parameter option, the "old" way of specifying a NIC model via the nd_table[] is becoming more prominent again. But for the pseries "spapr-vlan" device, there is a confusing discrepancy between the model name that is used for "--device" (i.e. "spapr-vlan") and the

Re: [Qemu-devel] [PULL 0/8] Ui 20180308 patches

Hi, > Hi. This gives me a new warning on FreeBSD: > > CC ui/gtk.o > /root/qemu/ui/gtk.c:2141:13: warning: 'gtk_widget_set_double_buffered' > is deprecated [-Wdeprecated-declarations] > gtk_widget_set_double_buffered(vc->gfx.drawing_area, FALSE); > ^ >

Re: [Qemu-devel] [PATCH v8 8/9] vfio/display: adding region support

Reviewed By: Kirti Wankhede Thanks, Kirti On 3/6/2018 5:04 PM, Gerd Hoffmann wrote: > Wire up region-based display. > > Signed-off-by: Gerd Hoffmann > --- > hw/vfio/pci.h | 1 + > include/hw/vfio/vfio-common.h | 8 +++ >

Re: [Qemu-devel] [PATCH v8 7/9] vfio/display: core & wireup

Reviewed By: Kirti Wankhede Thanks, Kirti On 3/6/2018 5:04 PM, Gerd Hoffmann wrote: > Infrastructure for display support. Must be enabled > using 'display' property. > > Signed-off-by: Gerd Hoffmann > --- > hw/vfio/pci.h | 4 >

Re: [Qemu-devel] [PATCH v8 6/9] vfio/common: cleanup in vfio_region_finalize

Looks good. Reviewed by: Kirti Wankhede Thanks, Kirti On 3/6/2018 5:04 PM, Gerd Hoffmann wrote: > Signed-off-by: Gerd Hoffmann > --- > hw/vfio/common.c | 7 +++ > 1 file changed, 7 insertions(+) > > diff --git a/hw/vfio/common.c

[Qemu-devel] [PATCH] qemu-doc: Rework the network options chapter to make "-net" less prominent

"-net" is clearly a legacy option. Yet we still use it in almost all examples in the qemu documentation, and many other spots in the network chapter. We should make it less prominent that users are not lured into using it so often anymore. So instead of starting the network chapter with "-net nic"

Re: [Qemu-devel] [PATCH v8 3/9] ui/pixman: add qemu_drm_format_to_pixman()

Looks good. Reviewed by: Kirti Wankhede Thanks, Kirti On 3/6/2018 5:04 PM, Gerd Hoffmann wrote: > Map drm fourcc codes to pixman formats. > > Signed-off-by: Gerd Hoffmann > --- > include/ui/qemu-pixman.h | 5 + > ui/qemu-pixman.c | 22

Re: [Qemu-devel] [PATCH v8 16/23] RISC-V Spike Machines

On Sat, Mar 3, 2018 at 2:51 AM, Michael Clark wrote: > RISC-V machines compatble with Spike aka riscv-isa-sim, the RISC-V > Instruction Set Simulator. The following machines are implemented: > > - 'spike_v1.9.1'; HTIF console, config-string, Privileged ISA Version 1.9.1 > -

[Qemu-devel] Apparently fpu/softfloat.c:1374 is reachable

I need to dig into this. I'll need to take the assertions out, or run with tracing to see which fcvt test is triggering this unreachable piece of code. FYI. I can look into it. $ sh run-riscv-tests.sh rv64ua-v-amoadd_d rv64ua-v-amoadd_w rv64ua-v-amoand_d rv64ua-v-amoand_w rv64ua-v-amomax_d

[Qemu-devel] [PATCH v2 23/23] RISC-V: Convert cpu definition towards future model

- Model borrowed from target/sh4/cpu.c - Rewrote riscv_cpu_list to use object_class_get_list - Dropped 'struct RISCVCPUInfo' and used TypeInfo array - Replaced riscv_cpu_register_types with DEFINE_TYPES - Marked base class as abstract Cc: Igor Mammedov Cc: Palmer Dabbelt

[Qemu-devel] [PATCH v2 21/23] RISC-V: No traps on writes to misa, minstret, mcycle

These fields are marked WARL in the specification so illegal writes are silently dropped. Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt ---

[Qemu-devel] [PATCH v2 15/23] RISC-V: Use memory_region_is_ram in pte update

After reading cpu_physical_memory_write and friends, it seems that memory_region_is_ram is a more appropriate interface, and matches the intent of the code that is calling it. Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by:

[Qemu-devel] [PATCH v2 22/23] RISC-V: Remove support for adhoc X_COP interrupt

This is essentially dead-code elimination. Support for more local interrupts will be added in a future revision, as they will be defined in a future version of the Privileged ISA specification. Cc: Sagar Karandikar Cc: Bastian Koppelmann

[Qemu-devel] [PATCH v2 20/23] RISC-V: vectored traps are optional

Vectored traps for asynchrounous interrupts are optional. The mtvec/stvec mode field is WARL and hence does not trap if an illegal value is written. Illegal values are ignored. Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by:

[Qemu-devel] [PATCH v2 17/23] RISC-V: Hardwire satp to 0 for no-mmu case

satp is WARL so it should not trap on illegal writes, rather it can be hardwired to zero and silently ignore illegal writes. It seems the RISC-V WARL behaviour is preferred to having to trap overhead versus simply reading back the value and checking if the write took (saves hundreds of cycles and

[Qemu-devel] [PATCH v2 19/23] RISC-V: riscv-qemu port supports sv39 and sv48

Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- target/riscv/cpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[Qemu-devel] [PATCH v2 14/23] RISC-V: Make virt header comment title consistent

Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- include/hw/riscv/virt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Qemu-devel] [PATCH v2 18/23] RISC-V: Remove braces from satp case statement

Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt Reviewed-by: Philippe Mathieu-Daudé --- target/riscv/op_helper.c | 3 +-- 1

[Qemu-devel] [PATCH v2 11/23] RISC-V: Improve page table walker spec compliance

- Inline PTE_TABLE check for better readability - Improve readibility of User page U mode and SUM test - Disallow non U mode from fetching from User pages - Add reserved PTE flag check: W or W|X - Add misaligned PPN check - Change access checks from ternary operator to if statements - Improves

[Qemu-devel] [PATCH v2 08/23] RISC-V: Make sure rom has space for fdt

Remove a potential buffer overflow (not seen in practice). Perhaps cpu_physical_memory_write already has bound checks. This change however makes space for the maximum device tree size and adds an explicit bounds check and error message. It doesn't trigger, but it may help in the future if the

[Qemu-devel] [PATCH v2 16/23] RISC-V: Remove EM_RISCV ELF_MACHINE indirection

Pointless indirection. Other ports use EM_ constants directly. Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- hw/riscv/sifive_e.c | 2 +-

[Qemu-devel] [PATCH v2 13/23] RISC-V: Make some header guards more specific

Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- include/hw/riscv/spike.h | 4 ++-- include/hw/riscv/virt.h | 4 ++-- 2 files changed, 4

[Qemu-devel] [PATCH v2 04/23] RISC-V: Use ROM base address and size from memmap

Another case of replaceing hard coded constants, this time referring to the definition in the virt machine's memmap. Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt

[Qemu-devel] [PATCH v2 07/23] RISC-V: Remove unused class definitions

Removes a whole lot of unnecessary boilerplate code. Machines don't need to be objects. The expansion of the SOC object model for the RISC-V machines will happen in the future as SiFive plans to add their FE310 and FU540 SOCs to QEMU. However, it seems that this present boilerplate is complete

[Qemu-devel] [PATCH v2 10/23] RISC-V: Hold rcu_read_lock when accessing memory

>From reading other code that accesses memory regions directly, it appears that the rcu_read_lock needs to be held. Note: the original code for accessing RAM directly was added because there is no other way to use atomic_cmpxchg on guest physical address space. Cc: Sagar Karandikar

[Qemu-devel] [PATCH v2 12/23] RISC-V: Update E order and I extension order

Section 22.8 Subset Naming Convention of the RISC-V ISA Specification defines the canonical order for extensions in the ISA string. It is silent on the position of the E extension however E is a substitute for I so it must come early in the extension list order. A comment is added to state E and I

[Qemu-devel] [PATCH v2 03/23] RISC-V: Make virt board description match spike

This makes 'qemu-system-riscv64 -machine help' output more tidy and consistent. Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt ---

[Qemu-devel] [PATCH v2 09/23] RISC-V: Include intruction hex in disassembly

This was added to help debug issues using -d in_asm. It is useful to see the instruction bytes, as one can detect if one is trying to execute ASCII or device-tree magic. Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Michael

[Qemu-devel] [PATCH v2 05/23] RISC-V: Remove identity_translate from load_elf

When load_elf is called with NULL as an argument to the address translate callback, it does an identity translation. This commit removes the redundant identity_translate callback. Cc: Sagar Karandikar Cc: Bastian Koppelmann

[Qemu-devel] [PATCH v2 02/23] RISC-V: Replace hardcoded constants with enum values

The RISC-V device-tree code has a number of hard-coded constants and this change moves them into header enums. Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt

[Qemu-devel] [PATCH v2 01/23] RISC-V: Make virt create_fdt interface consistent

create_fdt sets the fdt variable on RISCVVirtState and this is used to access the fdt. This reverts a change introduced in https://github.com/riscv/riscv-qemu/pull/109 which introduced a redundant return value, overlooking the RISCVVirtState structure member that made create_fdt inconsistent with

[Qemu-devel] [PATCH v2 06/23] RISC-V: Mark ROM read-only after copying in code

The sifive_u machine already marks its ROM readonly. This fixes the remaining boards. Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt ---

[Qemu-devel] [PATCH v2 00/23] RISC-V Post-merge spec conformance and cleanup

Apparently there is at least one logic bug in amongst this set of 23 patches. I'll shout you a beer if you can find it. I found one myself so there was probably at least two. Hey, it boots SMP Linux here, but I think it needs more testing. This is a series of spec conformance bug fixes and code

Re: [Qemu-devel] [PATCH v1 11/22] RISC-V: Improve page table walker spec compliance

On Wed, Mar 7, 2018 at 9:43 AM, Michael Clark wrote: > - Inline PTE_TABLE check for better readability > - Improve readibility of User page U mode and SUM test > - Disallow non U mode from fetching from User pages > - Add reserved PTE flag check: W or W|X > - Add misaligned PPN

[Qemu-devel] [Bug 1754542] Re: colo: secondary vm crash when execute x-colo-lost-heartbeat

** Description changed: I use Arch Linux x86_64 both qemu 2.11.1 and Zhang Chen's(https://github.com/zhangckid/qemu/commits/colo-with-virtio-net-internal-jul10) Following document 'COLO-FT.txt', I test colo feature on my hosts I run this command Primary: sudo qemu-system-x86_64

[Qemu-devel] [Bug 1754542] [NEW] colo: secondary vm crash when execute x-colo-lost-heartbeat

Public bug reported: I use Arch Linux x86_64 both qemu 2.11.1 and Zhang Chen's(https://github.com/zhangckid/qemu/commits/colo-with-virtio-net-internal-jul10) Following document 'COLO-FT.txt', I test colo feature on my hosts I run this command Primary: sudo qemu-system-x86_64 -boot c

Re: [Qemu-devel] [PATCH v2] ppc440_pcix: Change some error_report to qemu_log_mask(LOG_UNIMP, ...)

On Fri, Mar 09, 2018 at 10:44:46AM +1100, David Gibson wrote: > On Thu, Mar 08, 2018 at 12:08:08PM +0100, BALATON Zoltan wrote: > > Using log unimp is more appropriate for these messages and this also > > silences them by default so they won't clobber make check output when > > tests are added for

Re: [Qemu-devel] [edk2] [PATCH v2 0/8] RFC: ovmf: preliminary TPM2 support

Hi Marcandre, Thanks for your command steps and I tried them, but my qemu failed to connect the socket tpmemu.sock. When I added the control channel to the TPM, the swtpm socket command stuck there and never exit. Not sure whether it was successful. Below are the command steps running output in

Re: [Qemu-devel] [PATCH v2 0/2] slirp: Add query-usernet QMP command

Gentle ping.. On Mon, 02/26 15:58, Fam Zheng wrote: > v2: Fix compiler error. [patchew] > > The command is a counterpart of HMP "info usernet" and is at least very useful > for the VM tests. So add it. > > Fam Zheng (2): > slirp: Add "query-usernet" QMP command > tests: Use query-usernet

Re: [Qemu-devel] [PATCH v4 2/5] qmp: distinguish PC-DIMM and NVDIMM in MemoryDeviceInfoList

On 03/08/18 11:22 -0600, Eric Blake wrote: > On 03/07/2018 08:33 PM, Haozhong Zhang wrote: > > It may need to treat PC-DIMM and NVDIMM differently, e.g., when > > deciding the necessity of non-volatile flag bit in SRAT memory > > affinity structures. > > > > NVDIMMDeviceInfo, which inherits from

Re: [Qemu-devel] [PATCH v2 8/8] ovmf: add DxeTpm2MeasureBootLib

Besides the comment below, I should have used the example in OvmfPkg. Please refer to https://github.com/tianocore/edk2/blob/master/OvmfPkg/Library/PlatformBootManagerLib/BdsPlatform.c The EfiBootManagerDispatchDeferredImages() API call is added just after gEfiDxeSmmReadyToLockProtocolGuid.

Re: [Qemu-devel] [PATCH] PPC e500: Fix gap between u-boot and kernel

On Thu, Mar 08, 2018 at 12:50:36PM +0100, David Engraf wrote: > This patch moves the gap between u-boot and kernel at the correct location. > > Signed-off-by: David Engraf Applied, thanks. > --- > hw/ppc/e500.c | 9 - > 1 file changed, 4 insertions(+), 5

Re: [Qemu-devel] [PATCH 04/19] uninorth: remove stray PCIBus realize from mac_newworld.c

On Tue, Mar 06, 2018 at 08:30:48PM +, Mark Cave-Ayland wrote: > After QOMification this is clearly no longer needed (and possibly hasn't been > for some time). > > Signed-off-by: Mark Cave-Ayland Applied, thanks. > --- > hw/ppc/mac_newworld.c | 1 - > 1 file

Re: [Qemu-devel] [PATCH 03/19] uninorth: QOMify PCI and AGP host bridges

On Tue, Mar 06, 2018 at 08:30:47PM +, Mark Cave-Ayland wrote: > Signed-off-by: Mark Cave-Ayland Applied, thanks. > --- > hw/pci-host/uninorth.c | 79 > -- > 1 file changed, 32 insertions(+), 47 deletions(-) >

Re: [Qemu-devel] [PATCH v2 8/8] ovmf: add DxeTpm2MeasureBootLib

Very good question. Comment below: > -Original Message- > From: Laszlo Ersek [mailto:ler...@redhat.com] > Sent: Friday, March 9, 2018 3:54 AM > To: marcandre.lur...@redhat.com; edk2-de...@lists.01.org; Yao, Jiewen > > Cc: pjo...@redhat.com;

Re: [Qemu-devel] [PATCH v2] ppc440_pcix: Change some error_report to qemu_log_mask(LOG_UNIMP, ...)

On Thu, Mar 08, 2018 at 12:08:08PM +0100, BALATON Zoltan wrote: > Using log unimp is more appropriate for these messages and this also > silences them by default so they won't clobber make check output when > tests are added for this board. > > Signed-off-by: BALATON Zoltan >

Re: [Qemu-devel] [PATCH v12 28/28] tests/qmp-test: blacklist sev specific qmp commands

On Thu, Mar 08, 2018 at 06:45:04PM -0300, Eduardo Habkost wrote: > On Thu, Mar 08, 2018 at 02:18:55PM -0600, Brijesh Singh wrote: > > > > > > On 3/8/18 11:08 AM, Daniel P. Berrangé wrote: > > > On Thu, Mar 08, 2018 at 06:49:01AM -0600, Brijesh Singh wrote: > > >> Blacklist the following commands

Re: [Qemu-devel] [PATCH 0/4] qapi: generate a literal qobject for introspection

On 03/05/2018 11:29 AM, Marc-André Lureau wrote: Hi, This is a small series of a few preliminary patches taken off the "[PATCH v4 00/51]" qapi-conditional series that were already reviewed by Markus. They are improvements worthwhile for 2.12 inclusion. Marc-André Lureau (4): qapi2texi:

Re: [Qemu-devel] [PATCH v12 08/28] target/i386: add Secure Encrypted Virtulization (SEV) object

On Thu, Mar 08, 2018 at 04:22:52PM -0600, Brijesh Singh wrote: > > > On 3/8/18 10:49 AM, Daniel P. Berrangé wrote: > > On Thu, Mar 08, 2018 at 06:48:41AM -0600, Brijesh Singh wrote: > >> Add a new memory encryption object 'sev-guest'. The object will be used > >> to create enrypted VMs on AMD

[Qemu-devel] [PATCH 23/25] hw/alpha/dp264: Add the ISA DMA controller

Signed-off-by: Philippe Mathieu-Daudé --- default-configs/alpha-softmmu.mak | 2 ++ hw/alpha/dp264.c | 4 2 files changed, 6 insertions(+) diff --git a/default-configs/alpha-softmmu.mak b/default-configs/alpha-softmmu.mak index e0d75e3058..3740adc5e9

[Qemu-devel] [PATCH 21/25] MAINTAINERS: Split the Alpha TCG/machine section

Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index facdab44e1..e806491d6c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -127,7 +127,6 @@ Alpha M: Richard Henderson

[Qemu-devel] [PATCH 22/25] hw/isa/superio: Add the SMC FDC37C669 Super I/O

Signed-off-by: Philippe Mathieu-Daudé --- Richard: I added the smc37c669 device in the Alpha machine, since it is the only user, as Michael previously suggested the non-PC devices should not be in the "PC chipset" entry which is already big (that's why some devices got moved from

[Qemu-devel] [PATCH 15/25] hw/mips/malta: Code movement

Move the SouthBridge peripherals first, and keep the Super I/O peripherals last. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/mips_malta.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index

[Qemu-devel] [PATCH 20/25] MAINTAINERS: Add entries for the VT82C686B Super I/O

So far, it is only used by the MIPS Fulong 2E mini PC. Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 98a8918c20..facdab44e1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -689,6 +689,8

[Qemu-devel] [PATCH 12/25] hw/isa/superio: Factor out the floppy disc controller code from pc87312.c

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/pc87312.h | 4 include/hw/isa/superio.h | 2 ++ hw/isa/isa-superio.c | 36 hw/isa/pc87312.c | 46 +++--- hw/isa/trace-events

[Qemu-devel] [PATCH 19/25] hw/isa/vt82c686: Add the TYPE_VT82C686B_SUPERIO

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/vt82c686.h | 2 ++ hw/isa/vt82c686.c | 20 hw/mips/mips_fulong2e.c | 15 +++ 3 files changed, 25 insertions(+), 12 deletions(-) diff --git a/include/hw/isa/vt82c686.h

Re: [Qemu-devel] [PATCH v12 26/28] qmp: add query-sev-capabilities command

On 3/8/18 11:05 AM, Daniel P. Berrangé wrote: > On Thu, Mar 08, 2018 at 06:48:59AM -0600, Brijesh Singh wrote: >> The command can be used by libvirt to query the SEV capabilities. >> >> Cc: "Daniel P. Berrangé" >> Cc: "Dr. David Alan Gilbert" >> Cc:

[Qemu-devel] [PATCH 10/25] hw/isa/superio: Factor out the parallel code from pc87312.c

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/pc87312.h | 4 --- include/hw/isa/superio.h | 6 + hw/isa/isa-superio.c | 65 hw/isa/pc87312.c | 38 +++- hw/isa/trace-events

[Qemu-devel] [PATCH 17/25] hw/mips/mips_fulong2e: Factor out vt82c686b_southbridge_init()

Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/mips_fulong2e.c | 83 - 1 file changed, 41 insertions(+), 42 deletions(-) diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index 9339e02120..ca1f76a724 100644 ---

[Qemu-devel] [PATCH 24/25] hw/alpha/dp264: Use the TYPE_SMC37C669_SUPERIO

Signed-off-by: Philippe Mathieu-Daudé --- default-configs/alpha-softmmu.mak | 3 +++ hw/alpha/dp264.c | 10 -- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/default-configs/alpha-softmmu.mak b/default-configs/alpha-softmmu.mak index

Re: [Qemu-devel] [RFC PATCH v2 18/22] hw/isa/vt82c686: Add the TYPE_VT82C686B_SUPERIO

On 03/05/2018 10:19 PM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > include/hw/isa/vt82c686.h | 2 ++ > hw/isa/vt82c686.c | 20 > hw/mips/mips_fulong2e.c | 15 +++ > 3 files changed, 25 insertions(+),

[Qemu-devel] [PATCH 25/25] hw/i386/pc: Factor out the superio code

Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/pc.c | 72 ++-- 1 file changed, 41 insertions(+), 31 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index cdcdfafe8e..20fa62f5d6 100644 --- a/hw/i386/pc.c +++

[Qemu-devel] [PATCH 11/25] hw/isa/superio: Factor out the serial code from pc87312.c

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/pc87312.h | 4 include/hw/isa/superio.h | 2 ++ hw/isa/isa-superio.c | 41 + hw/isa/pc87312.c | 43 --- hw/isa/trace-events

[Qemu-devel] [PATCH 18/25] hw/isa/vt82c686: Rename vt82c686b_init() -> vt82c686b_isa_init()

This function only initialize the ISA bus. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/vt82c686.h | 2 +- hw/isa/vt82c686.c | 2 +- hw/mips/mips_fulong2e.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/hw/isa/vt82c686.h

[Qemu-devel] [PATCH 14/25] hw/isa/superio: Factor out the IDE code from pc87312.c

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/superio.h | 2 ++ hw/isa/isa-superio.c | 22 ++ hw/isa/pc87312.c | 36 hw/isa/trace-events | 2 +- 4 files changed, 45 insertions(+), 17

[Qemu-devel] [PATCH 16/25] hw/isa/superio: Factor out the FDC37M817 Super I/O from mips_malta.c

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/superio.h | 2 ++ hw/isa/isa-superio.c | 19 +++ hw/mips/mips_malta.c | 35 ++- 3 files changed, 31 insertions(+), 25 deletions(-) diff --git

[Qemu-devel] [PATCH 09/25] hw/isa/pc87312: Inherit from the abstract TYPE_ISA_SUPERIO

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/pc87312.h | 6 -- hw/isa/pc87312.c | 11 ++- 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/include/hw/isa/pc87312.h b/include/hw/isa/pc87312.h index b65b219a8a..f3761d6fe1 100644 ---

[Qemu-devel] [PATCH 05/25] hw/isa/pc87312: Rename the device type as TYPE_PC87312_SUPERIO

Signed-off-by: Philippe Mathieu-Daudé Acked-by: David Gibson (hw/ppc) --- include/hw/isa/pc87312.h | 4 ++-- hw/isa/pc87312.c | 2 +- hw/ppc/prep.c| 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git

[Qemu-devel] [PATCH 07/25] hw/isa/pc87312: Use 'unsigned int' for the irq value

Signed-off-by: Philippe Mathieu-Daudé --- hw/isa/pc87312.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c index 105c23e680..fda91fed21 100644 --- a/hw/isa/pc87312.c +++ b/hw/isa/pc87312.c @@ -76,9 +76,9 @@ static

[Qemu-devel] [PATCH 13/25] hw/isa/superio: Add a keyboard/mouse controller (8042)

Since the PC87312 inherits this abstract model, we remove the I8042 instance in the PREP machine. Signed-off-by: Philippe Mathieu-Daudé Acked-by: David Gibson --- include/hw/isa/superio.h | 1 + hw/isa/isa-superio.c | 3 +++ hw/ppc/prep.c

[Qemu-devel] [PATCH 04/25] MAINTAINERS: Fix the PC87312 include path

Missed while moving it in 0d09e41a51aa. Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 6622efc1da..212eaa836a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -765,9

[Qemu-devel] [PATCH 06/25] hw/isa/pc87312: Use uint16_t for the ISA I/O base address

This matches the isa_register_ioport() prototype. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/pc87312.h | 2 +- hw/isa/pc87312.c | 14 +++--- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/include/hw/isa/pc87312.h

[Qemu-devel] [PATCH 02/25] hw/dma/i8257: Rename DMA_init() to i8257_dma_init()

- Move the header from hw/isa/ to hw/dma/ - Remove the old i386/pc dependency - use a bool type for the high_page_enable argument Signed-off-by: Philippe Mathieu-Daudé --- include/hw/{isa => dma}/i8257.h | 6 ++ include/hw/isa/isa.h| 2 -- hw/dma/i82374.c

[Qemu-devel] [PATCH 08/25] hw/isa/superio: Add a Super I/O template based on the PC87312 device

Signed-off-by: Philippe Mathieu-Daudé --- include/hw/isa/superio.h | 44 hw/isa/isa-superio.c | 28 MAINTAINERS | 2 ++ hw/isa/Makefile.objs | 1 + 4 files changed, 75 insertions(+)

[Qemu-devel] [PATCH 01/25] hw/isa: Move parallel_hds_isa_init() to hw/char/parallel-isa.c

Again... (after 07dc788054d7 and 9157eee1b1c0). We now extract the ISA bus specific helpers. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/char/parallel.h | 14 ++ include/hw/i386/pc.h | 8 hw/char/parallel-isa.c | 36

[Qemu-devel] [PATCH 03/25] hw/input/i8042: Extract declarations from i386/pc.h into input/i8042.h

Signed-off-by: Philippe Mathieu-Daudé Acked-by: David Gibson (hw/ppc) --- include/hw/i386/pc.h | 9 - include/hw/input/i8042.h | 24 hw/alpha/dp264.c | 3 ++- hw/i386/pc.c | 1 +

[Qemu-devel] [PATCH 00/25] remove i386/pc dependency: generic SuperIO

Hi Paolo, Michael, Hervé and Yongbok. This series could be the 'part 2' of my previous "remove i386/pc dependency from non-PC world" I started around 2.9. The goal is to unify the Super I/O device pattern. In this rewrite I: - extract the common SuperIO code from pc87312.c - use it in few MIPS

Re: [Qemu-devel] [PATCH v6 00/11] xen: xen-domid-restrict improvements

Hi, This series failed build test on ppcle host. Please find the details below. Message-id: 1520530757-4477-1-git-send-email-ian.jack...@eu.citrix.com Subject: [Qemu-devel] [PATCH v6 00/11] xen: xen-domid-restrict improvements Type: series === TEST SCRIPT BEGIN === #!/bin/bash # Testing script

Re: [Qemu-devel] [PATCH v6 00/11] xen: xen-domid-restrict improvements

For reasons I still don't quite understand, this cover letter was not sent to the whole CC list so I am doing that by hand now. Ian Jackson writes ("[PATCH v6 00/11] xen: xen-domid-restrict improvements"): > This series provides necessary support for running qemu as a Xen > device model without

Re: [Qemu-devel] [PATCH v6 00/11] xen: xen-domid-restrict improvements

no-re...@patchew.org writes ("Re: [Qemu-devel] [PATCH v6 00/11] xen: xen-domid-restrict improvements"): > This series seems to have some coding style problems. See output below for > more information: Obviously I should have run checkpatch myself. I will send a v6.1. Ian.

Re: [Qemu-devel] [PATCH v12 08/28] target/i386: add Secure Encrypted Virtulization (SEV) object

On 3/8/18 10:49 AM, Daniel P. Berrangé wrote: > On Thu, Mar 08, 2018 at 06:48:41AM -0600, Brijesh Singh wrote: >> Add a new memory encryption object 'sev-guest'. The object will be used >> to create enrypted VMs on AMD EPYC CPU. The object provides the properties >> to pass guest owner's public

Re: [Qemu-devel] [RFC PATCH v2 21/22] hw/alpha/dp264: Use the TYPE_SMC37C669_SUPERIO

On 03/08/2018 09:39 PM, Philippe Mathieu-Daudé wrote: > On 03/05/2018 10:19 PM, Philippe Mathieu-Daudé wrote: >> Signed-off-by: Philippe Mathieu-Daudé >> --- >> default-configs/alpha-softmmu.mak | 3 +++ >> hw/alpha/dp264.c | 10 -- >> 2 files changed,

Re: [Qemu-devel] [PATCH v12 28/28] tests/qmp-test: blacklist sev specific qmp commands

On Thu, Mar 08, 2018 at 02:18:55PM -0600, Brijesh Singh wrote: > > > On 3/8/18 11:08 AM, Daniel P. Berrangé wrote: > > On Thu, Mar 08, 2018 at 06:49:01AM -0600, Brijesh Singh wrote: > >> Blacklist the following commands to fix the 'make check' failure. > >> > >> query-sev-launch-measure: it

Re: [Qemu-devel] [RFC] Defining firmware (OVMF, et al) metadata format & file

On 03/08/18 16:47, Daniel P. Berrangé wrote: > On Thu, Mar 08, 2018 at 12:10:30PM +0100, Laszlo Ersek wrote: >> I suggest (or agree) that the property list be composed of free-form >> name=value pairs (at least conceptually). I understand Gerd is proposing >> a QAPI schema for this, so maybe do {

Re: [Qemu-devel] [RFC PATCH v2 15/22] hw/isa/superio: Factor out the FDC37M817 Super I/O from mips_malta.c

On 03/05/2018 10:19 PM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > include/hw/isa/superio.h | 2 ++ > hw/isa/isa-superio.c | 20 > hw/mips/mips_malta.c | 35 ++- > 3 files changed,

Re: [Qemu-devel] [RFC PATCH v2 21/22] hw/alpha/dp264: Use the TYPE_SMC37C669_SUPERIO

On 03/05/2018 10:19 PM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > default-configs/alpha-softmmu.mak | 3 +++ > hw/alpha/dp264.c | 10 -- > 2 files changed, 7 insertions(+), 6 deletions(-) > > diff --git

Re: [Qemu-devel] [RFC PATCH v2 09/22] hw/isa/superio: Factor out the parallel code from pc87312.c

On 03/05/2018 10:19 PM, Philippe Mathieu-Daudé wrote: > Signed-off-by: Philippe Mathieu-Daudé > --- > include/hw/isa/pc87312.h | 4 --- > include/hw/isa/superio.h | 6 + > hw/isa/isa-superio.c | 63 > > hw/isa/pc87312.c

Re: [Qemu-devel] [PATCH 03/11] xen: defer call to xen_restrict until just before os_setup_post

On Thu, Mar 08, 2018 at 05:39:09PM +, Ian Jackson wrote: [...] > diff --git a/vl.c b/vl.c > index dae986b..e6e8e1e 100644 > --- a/vl.c > +++ b/vl.c > @@ -4719,6 +4719,7 @@ int main(int argc, char **argv, char **envp) > vm_start(); > } > > +xen_setup_post(); I don't think

Re: [Qemu-devel] [PATCH 2/2 v2] slirp: Add classless static routes support to DHCP server

On 03/08/2018 02:07 PM, Benjamin Drung wrote: Am Donnerstag, den 08.03.2018, 13:46 -0600 schrieb Eric Blake: On 03/08/2018 12:57 PM, Benjamin Drung wrote: This patch will allow the user to specify classless static routes for the replies from the built-in DHCP server. Signed-off-by: Benjamin

Re: [Qemu-devel] [PULL] RISC-V QEMU Port Submission v8.2

On Fri, Mar 9, 2018 at 12:48 AM, Daniel P. Berrangé wrote: > On Thu, Mar 08, 2018 at 11:18:30AM +, Michael Clark wrote: > > On Fri, 9 Mar 2018 at 12:10 AM, Michael Clark wrote: > > > > > On Thu, 8 Mar 2018 at 11:02 PM, Peter Maydell < >

Re: [Qemu-devel] [PATCH 2/2 v2] slirp: Add classless static routes support to DHCP server

Am Donnerstag, den 08.03.2018, 13:46 -0600 schrieb Eric Blake: > On 03/08/2018 12:57 PM, Benjamin Drung wrote: > > This patch will allow the user to specify classless static routes > > for > > the replies from the built-in DHCP server. > > > > Signed-off-by: Benjamin Drung

[Qemu-devel] [PATCH v4 26/29] vhost: Huge page align and merge

From: "Dr. David Alan Gilbert" Align RAMBlocks to page size alignment, and adjust the merging code to deal with partial overlap due to that alignment. This is needed for postcopy so that we can place/fetch whole hugepages when under userfault. Signed-off-by: Dr. David Alan

Re: [Qemu-devel] [PATCH v12 28/28] tests/qmp-test: blacklist sev specific qmp commands

On 3/8/18 11:08 AM, Daniel P. Berrangé wrote: > On Thu, Mar 08, 2018 at 06:49:01AM -0600, Brijesh Singh wrote: >> Blacklist the following commands to fix the 'make check' failure. >> >> query-sev-launch-measure: it returns meaninful data only when we launch >> SEV guest otherwise the command

Re: [Qemu-devel] [PATCH v2 0/2] block latency histogram

On Thu, Mar 08, 2018 at 22:07:35 +0300, Vladimir Sementsov-Ogievskiy wrote: > 08.03.2018 21:56, Emilio G. Cota wrote: > > * Binning happens only at print time, so that we retain the flexibility to > > * choose the binning. This might not be ideal for workloads that do not > > care > > * much

[Qemu-devel] [PATCH v4 25/29] vhost+postcopy: Wire up POSTCOPY_END notify

From: "Dr. David Alan Gilbert" Wire up a call to VHOST_USER_POSTCOPY_END message to the vhost clients right before we ask the listener thread to shutdown. Signed-off-by: Dr. David Alan Gilbert --- hw/virtio/trace-events | 2 ++

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