Re: [Qemu-devel] [PATCH RFC v3 1/7] Fix segmentation fault when qemu_signal_init fails

2018-09-19 Thread Peter Xu
On Thu, Sep 20, 2018 at 12:46:39PM +0800, Fei Li wrote: > > > On 09/20/2018 11:28 AM, Peter Xu wrote: > > On Wed, Sep 19, 2018 at 09:35:17PM +0800, Fei Li wrote: > > > Currently, when qemu_signal_init() fails it only returns a non-zero > > > value but without propagating any Error. But its caller

Re: [Qemu-devel] [RFC v5 0/6] pci_expander_brdige: support separate pci domain for pxb-pcie

2018-09-19 Thread Marcel Apfelbaum
Hi Zihan, Gerd On 09/20/2018 09:09 AM, Gerd Hoffmann wrote: As for the management, will some checks when adding mcfg be enough for management? Or I can maintain a variable to indicate how many space have been consumed and warn the user if they exceed the threshold? The latter allows us to do the

Re: [Qemu-devel] [RFC v5 0/6] pci_expander_brdige: support separate pci domain for pxb-pcie

2018-09-19 Thread Marcel Apfelbaum
 Hi Zihan, On 09/18/2018 04:41 PM, Michael S. Tsirkin wrote: Cc Laine, Eric for an opinion about the management interface. On Mon, Sep 17, 2018 at 10:57:31PM +0800, Zihan Yang wrote: Hi all Here is a minimal working version of supporting multiple pci domains. The next a few paragraphs will il

Re: [Qemu-devel] [QEMU PATCH] net: Deprecate the old way of using a legacy net via "name" instead of "id"

2018-09-19 Thread Peter Maydell
On 19 September 2018 at 23:07, Markus Armbruster wrote: > Thomas Huth writes: > >> In early times, network backends were specified by a "vlan" and "name" >> tuple. With the introduction of netdevs, the "name" was replaced by an >> "id" (which is supposed to be unique), but the "name" parameter st

Re: [Qemu-devel] [RFC v5 0/6] pci_expander_brdige: support separate pci domain for pxb-pcie

2018-09-19 Thread Gerd Hoffmann
> > > As for the management, will some checks when adding mcfg be enough for > > > management? Or I can maintain a variable to indicate how many space > > > have been consumed and warn the user if they exceed the threshold? > > > The latter allows us to do the check when the pxb-pcie is initializin

Re: [Qemu-devel] [QEMU PATCH] net: Deprecate the old way of using a legacy net via "name" instead of "id"

2018-09-19 Thread Markus Armbruster
Thomas Huth writes: > In early times, network backends were specified by a "vlan" and "name" > tuple. With the introduction of netdevs, the "name" was replaced by an > "id" (which is supposed to be unique), but the "name" parameter stayed > as an alias which could be used instead of "id". Unfortu

Re: [Qemu-devel] [PATCH 0/5] 40p: LSI SCSI IRQ routing patch roll-up

2018-09-19 Thread Mark Cave-Ayland
On 20/09/2018 05:26, Peter Maydell wrote: > On 19 September 2018 at 19:55, David Gibson > wrote: >> On Wed, Sep 19, 2018 at 06:20:56PM +0100, Mark Cave-Ayland wrote: >>> Here is the final set of 40p LSI SCSI routing patches with reviewer tags >>> rebased upon ppc-for-3.1 as requested by David. >

Re: [Qemu-devel] [PATCH RFC v3 4/7] migration: fix the compression code

2018-09-19 Thread Peter Xu
On Thu, Sep 20, 2018 at 01:06:21PM +0800, Fei Li wrote: > > > On 09/20/2018 12:31 PM, Peter Xu wrote: > > On Wed, Sep 19, 2018 at 09:35:20PM +0800, Fei Li wrote: > > > Add judgement in compress_threads_save_cleanup() to check whether the > > > static CompressParam *comp_param has been allocated.

Re: [Qemu-devel] [PATCH RFC v3 4/7] migration: fix the compression code

2018-09-19 Thread Fei Li
On 09/20/2018 12:31 PM, Peter Xu wrote: On Wed, Sep 19, 2018 at 09:35:20PM +0800, Fei Li wrote: Add judgement in compress_threads_save_cleanup() to check whether the static CompressParam *comp_param has been allocated. If not, just return; or else Segmentation fault will occur when using the

Re: [Qemu-devel] [PATCH RFC v3 6/7] qemu_thread_join: fix segmentation fault

2018-09-19 Thread Fei Li
On 09/19/2018 11:14 PM, Fam Zheng wrote: On Wed, 09/19 21:35, Fei Li wrote: To avoid the segmentation fault in qemu_thread_join(), just directly return when the QemuThread *thread was failed to be created in both qemu-thread-posix.c and qemu-thread-win32.c. Per English grammar, I think "when

Re: [Qemu-devel] [PATCH RFC v3 1/7] Fix segmentation fault when qemu_signal_init fails

2018-09-19 Thread Fei Li
On 09/20/2018 11:28 AM, Peter Xu wrote: On Wed, Sep 19, 2018 at 09:35:17PM +0800, Fei Li wrote: Currently, when qemu_signal_init() fails it only returns a non-zero value but without propagating any Error. But its callers need a non-null err when runs error_report_err(err), or else 0->msg occu

Re: [Qemu-devel] [PATCH RFC v3 1/7] Fix segmentation fault when qemu_signal_init fails

2018-09-19 Thread Fei Li
On 09/19/2018 10:49 PM, Fam Zheng wrote: On Wed, 09/19 21:35, Fei Li wrote: Currently, when qemu_signal_init() fails it only returns a non-zero value but without propagating any Error. But its callers need a non-null err when runs error_report_err(err), or else 0->msg occurs. To avoid such s

Re: [Qemu-devel] [PATCH RFC v3 4/7] migration: fix the compression code

2018-09-19 Thread Peter Xu
On Wed, Sep 19, 2018 at 09:35:20PM +0800, Fei Li wrote: > Add judgement in compress_threads_save_cleanup() to check whether the > static CompressParam *comp_param has been allocated. If not, just > return; or else Segmentation fault will occur when using the > NULL comp_param's parameters in termin

Re: [Qemu-devel] [PATCH 0/5] 40p: LSI SCSI IRQ routing patch roll-up

2018-09-19 Thread Peter Maydell
On 19 September 2018 at 19:55, David Gibson wrote: > On Wed, Sep 19, 2018 at 06:20:56PM +0100, Mark Cave-Ayland wrote: >> Here is the final set of 40p LSI SCSI routing patches with reviewer tags >> rebased upon ppc-for-3.1 as requested by David. >> >> Signed-off-by: Mark Cave-Ayland > > So, when

Re: [Qemu-devel] [PATCH RFC v3 0/7] qemu_thread_create: propagate errors to callers to check

2018-09-19 Thread Peter Xu
On Wed, Sep 19, 2018 at 09:35:16PM +0800, Fei Li wrote: > Hi, > > This idea comes from BiteSizedTasks, and this patch series implement > the error checking of qemu_thread_create: make qemu_thread_create > return a flag to indicate if it succeeded rather than failing with an > error; make all calle

Re: [Qemu-devel] [PATCH RFC v3 1/7] Fix segmentation fault when qemu_signal_init fails

2018-09-19 Thread Peter Xu
On Wed, Sep 19, 2018 at 09:35:17PM +0800, Fei Li wrote: > Currently, when qemu_signal_init() fails it only returns a non-zero > value but without propagating any Error. But its callers need a > non-null err when runs error_report_err(err), or else 0->msg occurs. > > To avoid such segmentation faul

Re: [Qemu-devel] [PATCH 0/5] 40p: LSI SCSI IRQ routing patch roll-up

2018-09-19 Thread David Gibson
On Wed, Sep 19, 2018 at 06:20:56PM +0100, Mark Cave-Ayland wrote: > Here is the final set of 40p LSI SCSI routing patches with reviewer tags > rebased upon ppc-for-3.1 as requested by David. > > Signed-off-by: Mark Cave-Ayland So, when I requested that, I hadn't realized there were arm patches i

Re: [Qemu-devel] [PATCH] sm501: Adjust endianness of pixel value in rectangle fill

2018-09-19 Thread David Gibson
On Wed, Sep 19, 2018 at 09:29:31AM -0700, Peter Maydell wrote: > On 19 September 2018 at 07:46, BALATON Zoltan wrote: > > On Wed, 19 Sep 2018, Marcus Comstedt wrote: > >> > >> The value from twoD_foreground (which is in host endian format) must > >> be converted to the endianness of the framebuffe

Re: [Qemu-devel] [PATCH v4 3/3] x86: define a new MSR based feature word -- FEATURE_WORDS_ARCH_CAPABILITIES

2018-09-19 Thread Eduardo Habkost
On Sun, Sep 02, 2018 at 07:46:07PM +0800, Robert Hoo wrote: > Note RSBA is specially treated -- no matter host support it or not, qemu > pretends it is supported. > > Signed-off-by: Robert Hoo > --- > target/i386/cpu.c | 27 ++- > target/i386/cpu.h | 12 > 2

Re: [Qemu-devel] [PATCH v4 2/3] kvm: Add support to KVM_GET_MSR_FEATURE_INDEX_LIST and KVM_GET_MSRS system ioctl

2018-09-19 Thread Eduardo Habkost
Hi, Thanks for the patch and sorry for taking so long to review it. On Sun, Sep 02, 2018 at 07:46:06PM +0800, Robert Hoo wrote: > Add kvm_get_supported_feature_msrs() to get supported MSR feature index list. > Add kvm_arch_get_supported_msr_feature() to get each MSR features value. > > Signed-of

Re: [Qemu-devel] [PULL 6/7] monitor: move init global earlier

2018-09-19 Thread Peter Xu
On Wed, Sep 19, 2018 at 04:58:06PM +0200, Wolfgang Bumiller wrote: > On Wed, Sep 19, 2018 at 03:36:02PM +0200, Markus Armbruster wrote: > > Peter Xu writes: > > > > > On Wed, Sep 05, 2018 at 05:05:10PM +0200, Wolfgang Bumiller wrote: > > >> On Mon, Jun 18, 2018 at 04:08:53PM +0200, Markus Armbrus

Re: [Qemu-devel] [PATCH v4 1/3] x86: Data structure changes to support MSR based features

2018-09-19 Thread Eduardo Habkost
Hi, Thanks for the patch, and sorry for taking so long to review it. On Sun, Sep 02, 2018 at 07:46:05PM +0800, Robert Hoo wrote: > Add FeatureWordType indicator in struct FeatureWordInfo. > Change feature_word_info[] accordingly. > Change existing functions that refer to feature_word_info[] accor

Re: [Qemu-devel] [PATCH v10 6/6] tpm: add ACPI memory clear interface

2018-09-19 Thread Eduardo Habkost
On Wed, Sep 19, 2018 at 08:15:25PM +0100, Dr. David Alan Gilbert wrote: > * Igor Mammedov (imamm...@redhat.com) wrote: > > On Wed, 19 Sep 2018 13:14:05 +0100 > > "Dr. David Alan Gilbert" wrote: > > > > > * Igor Mammedov (imamm...@redhat.com) wrote: > > > > On Wed, 19 Sep 2018 11:58:22 +0100 > > >

Re: [Qemu-devel] [PATCH] sm501: Adjust endianness of pixel value in rectangle fill

2018-09-19 Thread David Gibson
On Wed, Sep 19, 2018 at 06:23:14PM +0200, Marcus Comstedt wrote: > > Hi, > > BALATON Zoltan writes: > > > Thanks for testing on big endian host and fixing this bug. Have you > > also tried KVM? That would be interesting but I think it may have > > problems currently and maybe only PR KVM would

Re: [Qemu-devel] [RFC v5 0/6] pci_expander_brdige: support separate pci domain for pxb-pcie

2018-09-19 Thread Zihan Yang
Gerd Hoffmann 于2018年9月19日周三 下午12:26写道: > > > > > 2. Only 4x devices is supported, you need to be careful not to overuse > > > > > > Could you elaborate on this please? What happens if you are not careful? > > > How does management know what the limits are? > > > > It means the user might use more

Re: [Qemu-devel] [PATCH v3 2/2] hw/pci: add PCI resource reserve capability to legacy PCI bridge

2018-09-19 Thread Liu, Jing2
Hi Marcle and Michael, Re-ping if this is not in the PR list :) Thanks, Jing On 9/6/2018 10:16 AM, Liu, Jing2 wrote: Hi Marcle, On 9/6/2018 12:36 AM, Marcel Apfelbaum wrote: On 09/05/2018 05:08 AM, Liu, Jing2 wrote: Hi Marcel and Michael, Got no response so I would like to ask if I need

Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 0/2] 40p: fix PCI interrupt routing

2018-09-19 Thread David Gibson
On Wed, Sep 19, 2018 at 04:47:36PM +0200, Roman Kapl wrote: > Hi, > > On 09/19/2018 08:57 AM, Mark Cave-Ayland wrote: > > On 18/09/2018 22:12, Mark Cave-Ayland wrote: > > > > > Roman, can you reproduce this locally at all? My setup is nothing > > > special, just Debian Stretch on amd64. > > Ok,

Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-09-19 Thread Peter Maydell
On 19 September 2018 at 17:19, Alex Bennée wrote: >> An additional improvement that I have thought of is to get rid >> of memset(-1) altogether. Instead, we'd store addresses in the TLB >> as $real_address+1, so that 0xff..ff is stored as 0x00..00. That way, >> instead of malloc+memset we'd just c

Re: [Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-09-19 Thread Alex Bennée
Emilio G. Cota writes: > I've been thinking about ways to increase softmmu performance > by speeding up TLB accesses. > > Last year, Pranith proposed to increase the size of the TLBs: > https://patchwork.kernel.org/patch/9927793/ > The problem with that approach is that it slows down flushes

Re: [Qemu-devel] [PATCH] dirty-bitmaps: allow merging to disabled bitmaps

2018-09-19 Thread John Snow
On 09/19/2018 04:58 PM, Eric Blake wrote: > On 9/19/18 2:58 PM, John Snow wrote: >> We wish to prohibit merging to read-only bitmaps and frozen bitmaps, >> but "disabled" bitmaps only preclude their recording of live, new >> information. It does not prohibit them from manual writes at the behest

Re: [Qemu-devel] [PATCH] dirty-bitmaps: allow merging to disabled bitmaps

2018-09-19 Thread John Snow
On 09/19/2018 04:58 PM, Eric Blake wrote: > On 9/19/18 2:58 PM, John Snow wrote: >> We wish to prohibit merging to read-only bitmaps and frozen bitmaps, >> but "disabled" bitmaps only preclude their recording of live, new >> information. It does not prohibit them from manual writes at the behest

Re: [Qemu-devel] [PATCH 3/5] scsi: remove unused lsi53c895a_create() and lsi53c810_create() functions

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/19/18 7:20 PM, Mark Cave-Ayland wrote: > Now that these functions are no longer required they can be removed. > > Signed-off-by: Mark Cave-Ayland > Reviewed-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daudé > --- > hw/scsi/lsi53c895a.c | 14 -- > include/hw/pci/pci.h | 2

Re: [Qemu-devel] [PATCH 1/5] scsi: add lsi53c8xx_handle_legacy_cmdline() function

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/19/18 7:20 PM, Mark Cave-Ayland wrote: > This is the function that will soon be used to replace lsi53c895a_create() and > lsi53c810_create(). > > Signed-off-by: Mark Cave-Ayland > Reviewed-by: Thomas Huth This could be squashed in the next patch (2/5). Reviewed-by: Philippe Mathieu-Daudé

Re: [Qemu-devel] [PATCH 2/5] scsi: move lsi53c8xx_create() callers to lsi53c8xx_handle_legacy_cmdline()

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/19/18 7:20 PM, Mark Cave-Ayland wrote: > As part of commits a64aa5785d "hw: Deprecate -drive if=scsi with non-onboard > HBAs" and b891538e81 "hw/ppc/prep: Fix implicit creation of "-drive if=scsi" > devices" the lsi53c895a_create() and lsi53c810_create() functions were added > to wrap pci_crea

Re: [Qemu-devel] [PATCH v4 00/10] Clock framework API.

2018-09-19 Thread Peter Maydell
On 17 September 2018 at 01:40, wrote: > Regarding the migration strategy, clocks do not hold the clock state > internally, so there is nothing to migrate there. The consequence is that > a device must update its output clocks in its post_load to propagate the > migrated clock state. This allows m

Re: [Qemu-devel] [PATCH 32/35] target/i386/kvm: do not acquire the BQL to call cpu_reset_interrupt

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:31 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > It's not needed anymore. > > Cc: Marcelo Tosatti > Cc: Richard Henderson > Cc: Eduardo Habkost > Cc: k...@vger.kernel.org > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé

Re: [Qemu-devel] [PATCH 31/35] translate-all: drop BQL assertion from cpu_interrupt

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > This patch explicitly drops the BQL assertion from > the user-mode version; previous patches have taken > care of softmmu's cpu_interrupt. > > Cc: Peter Crosthwaite > Cc: Richard Henderson > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu

Re: [Qemu-devel] [PATCH] dirty-bitmaps: allow merging to disabled bitmaps

2018-09-19 Thread John Snow
On 09/19/2018 05:08 PM, Eric Blake wrote: > On 9/19/18 2:58 PM, John Snow wrote: >> We wish to prohibit merging to read-only bitmaps and frozen bitmaps, >> but "disabled" bitmaps only preclude their recording of live, new >> information. It does not prohibit them from manual writes at the behest

Re: [Qemu-devel] [PATCH 30/35] tcg: drop BQL assertion from tcg_handle_interrupt

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Peter Crosthwaite > Cc: Richard Henderson > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > accel/tcg/tcg-all.c | 1 - > 1 file changed, 1 deletion(-) > > diff

Re: [Qemu-devel] [PATCH 19/35] target/moxie: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Anthony Green > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > target/moxie/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/targ

Re: [Qemu-devel] [PATCH 27/35] hw/sparc64: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Mark Cave-Ayland > Cc: Artyom Tarasenko > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > hw/sparc64/sparc64.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 de

Re: [Qemu-devel] [PATCH 26/35] target/unicore32: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Guan Xuetao > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > target/unicore32/cpu.c | 2 +- > target/unicore32/softmmu.c | 2 +- > 2 files changed, 2 insert

Re: [Qemu-devel] [PATCH 25/35] target/sparc: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Mark Cave-Ayland > Cc: Artyom Tarasenko > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > target/sparc/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletio

Re: [Qemu-devel] [PATCH 20/35] target/nios2: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Chris Wulff > Cc: Marek Vasut > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > target/nios2/cpu.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) >

Re: [Qemu-devel] [PATCH] dirty-bitmaps: allow merging to disabled bitmaps

2018-09-19 Thread Eric Blake
On 9/19/18 2:58 PM, John Snow wrote: We wish to prohibit merging to read-only bitmaps and frozen bitmaps, but "disabled" bitmaps only preclude their recording of live, new information. It does not prohibit them from manual writes at the behest of the user, as is the case for merge operations. Re

Re: [Qemu-devel] [PATCH 24/35] target/sh4: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Aurelien Jarno > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > target/sh4/cpu.c| 2 +- > target/sh4/helper.c | 2 +- > 2 files changed, 2 insertions(+), 2

Re: [Qemu-devel] [PATCH 21/35] target/openrisc: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Stafford Horne > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > hw/openrisc/cputimer.c | 2 +- > target/openrisc/cpu.c | 4 ++-- > 2 files changed, 3 insertion

Re: [Qemu-devel] [PATCH] qapi: birtmap-merge: document name change

2018-09-19 Thread Eric Blake
On 9/19/18 2:09 PM, John Snow wrote: In the subject-line: s/birtmap/bitmap/ We named these using underscores instead of the preferred dash, document this nearby so we cannot possibly forget to rectify this when we remove the 'x-' prefixes when the feature becomes stable. We do not implement th

Re: [Qemu-devel] [PATCH 17/35] target/microblaze: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: "Edgar E. Iglesias" > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > target/microblaze/cpu.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff

Re: [Qemu-devel] [PATCH 16/35] target/m68k: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Laurent Vivier > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > target/m68k/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/targ

Re: [Qemu-devel] [PATCH 15/35] target/lm32: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Michael Walle > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > target/lm32/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/targe

Re: [Qemu-devel] [PATCH 12/35] hax: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > I am not familiar with hax, so I opted for the safe > (and slow) route of performing probably many unnecessary > atomic_reads. > > Cc: Richard Henderson > Cc: Eduardo Habkost > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > ---

Re: [Qemu-devel] [PATCH 10/35] target/hppa: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Richard Henderson > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > target/hppa/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/t

Re: [Qemu-devel] [PATCH 09/35] target/cris: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: "Edgar E. Iglesias" > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > target/cris/cpu.c| 3 ++- > target/cris/helper.c | 8 > 2 files changed, 6 ins

Re: [Qemu-devel] [PATCH 07/35] target/alpha: access cpu->interrupt_request with atomics

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > Cc: Richard Henderson > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > target/alpha/cpu.c | 8 > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff

Re: [Qemu-devel] [PATCH 06/35] exec: use cpu_reset_interrupt

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > It will be changed to an atomic operation soon. > > Cc: Peter Crosthwaite > Cc: Richard Henderson > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > accel/tcg/cpu-e

Re: [Qemu-devel] [PATCH] dirty-bitmaps: allow merging to disabled bitmaps

2018-09-19 Thread Eric Blake
On 9/19/18 2:58 PM, John Snow wrote: We wish to prohibit merging to read-only bitmaps and frozen bitmaps, but "disabled" bitmaps only preclude their recording of live, new information. It does not prohibit them from manual writes at the behest of the user, as is the case for merge operations. I

Re: [Qemu-devel] [PATCH 04/35] target/ppc: use cpu_reset_interrupt

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > It will be changed to an atomic operation soon. > > Cc: David Gibson > Cc: Alexander Graf > Cc: qemu-...@nongnu.org > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > ---

Re: [Qemu-devel] [PATCH 03/35] target/openrisc: use cpu_reset_interrupt

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/17/18 6:30 PM, Emilio G. Cota wrote: > From: Paolo Bonzini > > It will be changed to an atomic operation soon. > > Cc: Stafford Horne > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota Reviewed-by: Philippe Mathieu-Daudé > --- > target/openrisc/sys_helper.c | 2 +- > 1 fi

Re: [Qemu-devel] [QEMU PATCH] net: Deprecate the old way of using a legacy net via "name" instead of "id"

2018-09-19 Thread Philippe Mathieu-Daudé
On 9/19/18 10:12 PM, Thomas Huth wrote: > In early times, network backends were specified by a "vlan" and "name" > tuple. With the introduction of netdevs, the "name" was replaced by an > "id" (which is supposed to be unique), but the "name" parameter stayed > as an alias which could be used instea

[Qemu-devel] [QEMU PATCH] net: Deprecate the old way of using a legacy net via "name" instead of "id"

2018-09-19 Thread Thomas Huth
In early times, network backends were specified by a "vlan" and "name" tuple. With the introduction of netdevs, the "name" was replaced by an "id" (which is supposed to be unique), but the "name" parameter stayed as an alias which could be used instead of "id". Unfortunately, we miss the duplicatio

[Qemu-devel] [PATCH] dirty-bitmaps: allow merging to disabled bitmaps

2018-09-19 Thread John Snow
We wish to prohibit merging to read-only bitmaps and frozen bitmaps, but "disabled" bitmaps only preclude their recording of live, new information. It does not prohibit them from manual writes at the behest of the user, as is the case for merge operations. Reported-by: Eric Blake Signed-off-by: J

[Qemu-devel] [Bug 1788665] Re: Low 2D graphics performance with Windows 10 (1803) VGA passthrough VM using "Spectre" protection

2018-09-19 Thread Dr. David Alan Gilbert
It doesn't surprise me too much that the time spent on the host between exit&entry is higher on a host dealing with spec-ctrl; but I wouldn't really expect it to change depending on the guests settings. -- You received this bug notification because you are a member of qemu- devel-ml, which is su

Re: [Qemu-devel] [PATCH] qapi: birtmap-merge: document name change

2018-09-19 Thread Eric Blake
On 9/19/18 2:09 PM, John Snow wrote: We named these using underscores instead of the preferred dash, document this nearby so we cannot possibly forget to rectify this when we remove the 'x-' prefixes when the feature becomes stable. We do not implement the change ahead of time to avoid more work

Re: [Qemu-devel] [PATCH v10 6/6] tpm: add ACPI memory clear interface

2018-09-19 Thread Dr. David Alan Gilbert
* Igor Mammedov (imamm...@redhat.com) wrote: > On Wed, 19 Sep 2018 13:14:05 +0100 > "Dr. David Alan Gilbert" wrote: > > > * Igor Mammedov (imamm...@redhat.com) wrote: > > > On Wed, 19 Sep 2018 11:58:22 +0100 > > > "Dr. David Alan Gilbert" wrote: > > > > > > > * Marc-André Lureau (marcandre.lu

[Qemu-devel] [Bug 1788665] Re: Low 2D graphics performance with Windows 10 (1803) VGA passthrough VM using "Spectre" protection

2018-09-19 Thread George Amanakis
Just to be sure, I repeated it, with the same result. I have the impression that it might be the time spent between a vmentry and a vmexit that matters in the CPU performance of the guest. I am no expert though. This is what I am seeing in the graphs: vmentryinterval A(s)vmexitinterva

[Qemu-devel] [Bug 1788665] Re: Low 2D graphics performance with Windows 10 (1803) VGA passthrough VM using "Spectre" protection

2018-09-19 Thread George Amanakis
I also tried to give ESXi a try. VMware lets me download only 6.7 from their site. Although I have a workstation motherboard (Supermicro X9SRA), it won't let me start a VM with IOMMU enabled, it complains about failing to register the passthrough GPU. -- You received this bug notification because

[Qemu-devel] [PATCH] qapi: birtmap-merge: document name change

2018-09-19 Thread John Snow
We named these using underscores instead of the preferred dash, document this nearby so we cannot possibly forget to rectify this when we remove the 'x-' prefixes when the feature becomes stable. We do not implement the change ahead of time to avoid more work for libvirt to do in order to figure o

Re: [Qemu-devel] [PATCH 28/35] exec: access cpu->interrupt_request with atomics

2018-09-19 Thread Emilio G. Cota
On Wed, Sep 19, 2018 at 11:18:48 -0700, Richard Henderson wrote: > On 9/19/18 10:02 AM, Paolo Bonzini wrote: > > On 18/09/2018 23:07, Richard Henderson wrote: > >> On 9/17/18 9:30 AM, Emilio G. Cota wrote: > >>> From: Paolo Bonzini > >>> > >>> Cc: Peter Crosthwaite > >>> Cc: Richard Henderson >

Re: [Qemu-devel] [PATCH 28/35] exec: access cpu->interrupt_request with atomics

2018-09-19 Thread Richard Henderson
On 9/19/18 10:02 AM, Paolo Bonzini wrote: > On 18/09/2018 23:07, Richard Henderson wrote: >> On 9/17/18 9:30 AM, Emilio G. Cota wrote: >>> From: Paolo Bonzini >>> >>> Cc: Peter Crosthwaite >>> Cc: Richard Henderson >>> Signed-off-by: Paolo Bonzini >>> Signed-off-by: Emilio G. Cota >>> --- >>>

[Qemu-devel] [PATCH v5 3/8] target/mips: Support R5900 instructions MOVN, MOVZ and PREF from MIPS IV

2018-09-19 Thread Fredrik Noring
CPU_R5900 is defined as CPU_MIPS3 but it has the MIPS IV instructions MOVN, MOVZ and PREF as well. Signed-off-by: Fredrik Noring Reviewed-by: Philippe Mathieu-Daudé --- target/mips/translate.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/target/mips/translate.c b/tar

[Qemu-devel] [PATCH v5 7/8] linux-user/mips: Recognise the R5900 CPU model

2018-09-19 Thread Fredrik Noring
Signed-off-by: Fredrik Noring Reviewed-by: Philippe Mathieu-Daudé --- linux-user/mips/target_elf.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/linux-user/mips/target_elf.h b/linux-user/mips/target_elf.h index fa5d30bf99..a98c9bd6ad 100644 --- a/linux-user/mips/target_elf.h +++ b/linux

[Qemu-devel] [PATCH v5 8/8] elf: Toshiba/Sony rather than MIPS are the implementors of the R5900

2018-09-19 Thread Fredrik Noring
Sources [1][2] indicate that the Emotion Engine was designed by Toshiba and licensed to Sony. Others [3][4] claim it was a joint effort. It may therefore make sense to refer to the CPU as "Toshiba/Sony R5900". [1] http://cs.nyu.edu/courses/spring02/V22.0480-002/projects/aldrich/emotionengine.ppt

[Qemu-devel] [PATCH v5 2/8] target/mips: Support R5900 specific three-operand MULT and MULTU

2018-09-19 Thread Fredrik Noring
Signed-off-by: Fredrik Noring --- target/mips/translate.c | 53 + 1 file changed, 53 insertions(+) diff --git a/target/mips/translate.c b/target/mips/translate.c index ab16cdb911..fb571e278e 100644 --- a/target/mips/translate.c +++ b/target/mips/tr

[Qemu-devel] [PATCH v5 4/8] target/mips: Add function to signal RI exception unless user only

2018-09-19 Thread Fredrik Noring
The Linux kernel traps and emulates certain instructions. For user only, QEMU is the kernel, so we emulate those traps by simply emulating the instructions directly. Signed-off-by: Fredrik Noring Reviewed-by: Philippe Mathieu-Daudé --- target/mips/translate.c | 12 1 file changed,

[Qemu-devel] [PATCH v5 5/8] target/mips: R5900 DMULT[U], DDIV[U], LL[D] and SC[D] are user only

2018-09-19 Thread Fredrik Noring
These MIPS III instructions are unavailable and therefore trapped and emulated by the Linux kernel. Signed-off-by: Fredrik Noring Reviewed-by: Philippe Mathieu-Daudé --- target/mips/translate.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/target/mips/translate.c b/

[Qemu-devel] [PATCH v5 1/8] target/mips: Define R5900 instructions and CPU preprocessor constants

2018-09-19 Thread Fredrik Noring
The R5900 implements the 64-bit MIPS III instruction set except DMULT, DMULTU, DDIV, DDIVU, LL, SC, LLD and SCD. The MIPS IV instructions MOVN, MOVZ and PREF are implemented. It has the R5900 specific three-operand instructions MADD, MADDU, MULT and MULTU as well as pipeline 1 versions MULT1, MULTU

[Qemu-devel] [PATCH v5 6/8] target/mips: Define the R5900 CPU

2018-09-19 Thread Fredrik Noring
The primary purpose of this change is to support programs compiled by GCC for the R5900 target and thereby run R5900 Linux distributions, for example Gentoo. In particular, this avoids issues with cross compilation. This change has been tested with Gentoo compiled for R5900, including native compi

[Qemu-devel] [PATCH v5 0/8] target/mips: Support R5900 GCC programs in user mode

2018-09-19 Thread Fredrik Noring
The primary purpose of this change is to support programs compiled by GCC for the R5900 target and thereby run R5900 Linux distributions, for example Gentoo. In particular, this avoids issues with cross compilation. This change has been tested with Gentoo compiled for R5900, including native compi

[Qemu-devel] ideas for improving TLB performance (help with TCG backend wanted)

2018-09-19 Thread Emilio G. Cota
I've been thinking about ways to increase softmmu performance by speeding up TLB accesses. Last year, Pranith proposed to increase the size of the TLBs: https://patchwork.kernel.org/patch/9927793/ The problem with that approach is that it slows down flushes significantly, since they have to mems

[Qemu-devel] [PATCH 2/5] scsi: move lsi53c8xx_create() callers to lsi53c8xx_handle_legacy_cmdline()

2018-09-19 Thread Mark Cave-Ayland
As part of commits a64aa5785d "hw: Deprecate -drive if=scsi with non-onboard HBAs" and b891538e81 "hw/ppc/prep: Fix implicit creation of "-drive if=scsi" devices" the lsi53c895a_create() and lsi53c810_create() functions were added to wrap pci_create_simple() and scsi_bus_legacy_handle_cmdline(). U

[Qemu-devel] [PATCH 5/5] 40p: add fixed IRQ routing for LSI SCSI device

2018-09-19 Thread Mark Cave-Ayland
Whilst the PReP specification describes how all PCI IRQs are routed via IRQ 15 on the interrupt controller, the real 40p machine has a routing quirk in that the LSI SCSI device is routed directly to IRQ 13. Enable the external IRQ for the LSI SCSI device by wiring up the IRQ with qdev to the relev

Re: [Qemu-devel] [PATCH] qapi/misc.json: Clarify about usage of QMP 'cpu-add'

2018-09-19 Thread Markus Armbruster
Eduardo Habkost writes: > On Wed, Sep 19, 2018 at 12:22:19PM +0200, Kashyap Chamarthy wrote: >> On Tue, Sep 18, 2018 at 11:19:38AM -0300, Eduardo Habkost wrote: >> > On Tue, Sep 18, 2018 at 03:23:03PM +0200, Kashyap Chamarthy wrote: >> > > Eduardo Habkost mentioned on IRC that the intended functi

[Qemu-devel] [PATCH 4/5] lsi53c895a: add optional external IRQ via qdev

2018-09-19 Thread Mark Cave-Ayland
On some early machines the on-board PCI devices IRQs are wired directly to the interrupt controller instead of via the PCI host bridge. Add an optional external IRQ that if wired up via qdev will replace the in-built PCI IRQ. Signed-off-by: Mark Cave-Ayland Reviewed-by: David Gibson Reviewed-by

Re: [Qemu-devel] [PATCH 16/35] target/m68k: access cpu->interrupt_request with atomics

2018-09-19 Thread Laurent Vivier
Le 17/09/2018 à 18:30, Emilio G. Cota a écrit : > From: Paolo Bonzini > > Cc: Laurent Vivier > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cota > --- > target/m68k/cpu.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c

[Qemu-devel] [PATCH 1/5] scsi: add lsi53c8xx_handle_legacy_cmdline() function

2018-09-19 Thread Mark Cave-Ayland
This is the function that will soon be used to replace lsi53c895a_create() and lsi53c810_create(). Signed-off-by: Mark Cave-Ayland Reviewed-by: Thomas Huth --- hw/scsi/lsi53c895a.c | 7 +++ include/hw/pci/pci.h | 1 + 2 files changed, 8 insertions(+) diff --git a/hw/scsi/lsi53c895a.c b/hw/

Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 0/2] 40p: fix PCI interrupt routing

2018-09-19 Thread Mark Cave-Ayland
On 19/09/2018 16:33, Peter Maydell wrote: > On 19 September 2018 at 07:47, Roman Kapl wrote: >> It seems that the `dcbz` instruction is not emulated correctly (which may >> lead to some garbage in inittab?). However, if I manualy inline the >> `helper_dcbz_common` code into `helper dcbz`, it star

[Qemu-devel] [PATCH 3/5] scsi: remove unused lsi53c895a_create() and lsi53c810_create() functions

2018-09-19 Thread Mark Cave-Ayland
Now that these functions are no longer required they can be removed. Signed-off-by: Mark Cave-Ayland Reviewed-by: Thomas Huth --- hw/scsi/lsi53c895a.c | 14 -- include/hw/pci/pci.h | 2 -- 2 files changed, 16 deletions(-) diff --git a/hw/scsi/lsi53c895a.c b/hw/scsi/lsi53c895a.c in

[Qemu-devel] [PATCH 0/5] 40p: LSI SCSI IRQ routing patch roll-up

2018-09-19 Thread Mark Cave-Ayland
Here is the final set of 40p LSI SCSI routing patches with reviewer tags rebased upon ppc-for-3.1 as requested by David. Signed-off-by: Mark Cave-Ayland Mark Cave-Ayland (5): scsi: add lsi53c8xx_handle_legacy_cmdline() function scsi: move lsi53c8xx_create() callers to lsi53c8xx_handle_l

Re: [Qemu-devel] Dropped CPU feature names and backward compatibility

2018-09-19 Thread Eduardo Habkost
On Wed, Sep 19, 2018 at 07:09:24PM +0200, Paolo Bonzini wrote: > On 19/09/2018 18:36, Eduardo Habkost wrote: > > On Tue, Sep 18, 2018 at 05:35:20PM +0200, Paolo Bonzini wrote: > >> On 18/09/2018 16:22, Eduardo Habkost wrote: > >>> On Tue, Sep 18, 2018 at 04:02:54PM +0200, Paolo Bonzini wrote: > >>>

Re: [Qemu-devel] [PATCH 28/35] exec: access cpu->interrupt_request with atomics

2018-09-19 Thread Paolo Bonzini
On 18/09/2018 23:07, Richard Henderson wrote: > On 9/17/18 9:30 AM, Emilio G. Cota wrote: >> From: Paolo Bonzini >> >> Cc: Peter Crosthwaite >> Cc: Richard Henderson >> Signed-off-by: Paolo Bonzini >> Signed-off-by: Emilio G. Cota >> --- >> accel/tcg/cpu-exec.c | 6 +++--- >> accel/tcg/t

Re: [Qemu-devel] Dropped CPU feature names and backward compatibility

2018-09-19 Thread Paolo Bonzini
On 19/09/2018 18:36, Eduardo Habkost wrote: > On Tue, Sep 18, 2018 at 05:35:20PM +0200, Paolo Bonzini wrote: >> On 18/09/2018 16:22, Eduardo Habkost wrote: >>> On Tue, Sep 18, 2018 at 04:02:54PM +0200, Paolo Bonzini wrote: On 18/09/2018 15:14, Eduardo Habkost wrote: > If it broke something

Re: [Qemu-devel] [Qemu-block] [PATCH v2 11/17] block-backend: Decrease in_flight only after callback

2018-09-19 Thread Paolo Bonzini
On 18/09/2018 16:56, Kevin Wolf wrote: > Am 18.09.2018 um 16:12 hat Paolo Bonzini geschrieben: >> On 18/09/2018 13:34, Kevin Wolf wrote: But then basically the main issue is mirror.c's call to bdrv_drained_begin/end. There are no other calls to bdrv_drained_begin/end inside coroutin

Re: [Qemu-devel] [Qemu-ppc] [PATCH v3 0/2] 40p: fix PCI interrupt routing

2018-09-19 Thread Mark Cave-Ayland
On 19/09/2018 15:47, Roman Kapl wrote: >>> Roman, can you reproduce this locally at all? My setup is nothing >>> special, just Debian Stretch on amd64. > > Ok, so I am able to reproduce it with your image and --enable-debug, but I > was not > able to find the root cause, just narrow it. > > It

Re: [Qemu-devel] [PATCH 1/5] Fix segmentation fault when qemu_signal_init fails

2018-09-19 Thread Markus Armbruster
Fam Zheng writes: > On Wed, 09/05 19:20, Fei Li wrote: >> >> >> On 09/05/2018 04:36 PM, Daniel P. Berrangé wrote: >> > On Wed, Sep 05, 2018 at 12:17:24PM +0800, Fei Li wrote: >> > > Thanks for the review! :) >> > > >> > > >> > > On 09/04/2018 07:26 PM, Daniel P. Berrangé wrote: >> > > > On Tu

Re: [Qemu-devel] [PATCH] qapi/misc.json: Clarify about usage of QMP 'cpu-add'

2018-09-19 Thread Eduardo Habkost
On Wed, Sep 19, 2018 at 12:22:19PM +0200, Kashyap Chamarthy wrote: > On Tue, Sep 18, 2018 at 11:19:38AM -0300, Eduardo Habkost wrote: > > On Tue, Sep 18, 2018 at 03:23:03PM +0200, Kashyap Chamarthy wrote: > > > Eduardo Habkost mentioned on IRC that the intended functionality of QMP > > > 'cpu-add'

Re: [Qemu-devel] [PATCH] sm501: Adjust endianness of pixel value in rectangle fill

2018-09-19 Thread Marcus Comstedt
Hi, BALATON Zoltan writes: > Thanks for testing on big endian host and fixing this bug. Have you > also tried KVM? That would be interesting but I think it may have > problems currently and maybe only PR KVM would work as it need to > emulate PPC440 on server CPU but I don't know much about KV

Re: [Qemu-devel] [PATCH 34/35] exec: push BQL down to cpu->do_interrupt

2018-09-19 Thread Cornelia Huck
On Mon, 17 Sep 2018 12:31:02 -0400 "Emilio G. Cota" wrote: > From: Paolo Bonzini > > cpu->do_interrupt can now be called with BQL held (from > cpu->cpu_exec_interrupt) or without (from cpu_handle_exception). > > Only a few targets rely on global device state in cc->do_interrupt; > add checks t

Re: [Qemu-devel] [PATCH 23/35] target/s390x: access cpu->interrupt_request with atomics

2018-09-19 Thread Cornelia Huck
On Mon, 17 Sep 2018 12:30:51 -0400 "Emilio G. Cota" wrote: > From: Paolo Bonzini > > Cc: Cornelia Huck > Cc: Christian Borntraeger > Cc: Alexander Graf > Cc: Richard Henderson > Cc: David Hildenbrand > Cc: qemu-s3...@nongnu.org > Signed-off-by: Paolo Bonzini > Signed-off-by: Emilio G. Cot

Re: [Qemu-devel] [PATCH 05/35] target/s390x: use cpu_reset_interrupt

2018-09-19 Thread Cornelia Huck
On Mon, 17 Sep 2018 12:30:33 -0400 "Emilio G. Cota" wrote: > From: Paolo Bonzini > > It will be changed to an atomic operation soon. > > Cc: Cornelia Huck > Cc: Richard Henderson > Cc: Alexander Graf > Cc: David Hildenbrand > Cc: qemu-s3...@nongnu.org > Signed-off-by: Paolo Bonzini > Sign

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