[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1364501
Title:
Gdb hangs
- request bflt support in configure;
- implement custom linux-user/xtensa/target_flat.h that doesn't put envp
on stack;
- fix #include "target_flat.h" in flatload.c so that it first search for
arch-customized version of the header.
Signed-off-by: Max Filippov
---
configure
On 10/19/18 3:15 PM, Max Reitz wrote:
> This series prepares the iotests to work with both Python 2 and 3. In
> some places, it adds version-specific code and decides what to do based
> on the version (for instance, whether to import the StringIO or the
> BytesIO class from 'io' for use with
On 10/19/18 3:15 PM, Max Reitz wrote:
> When dumping an object into the log, there are differences between
> Python 2 and 3. First, unicode strings are prefixed by 'u' in Python 2
> (they are no longer in 3, because unicode strings are the default
> there). Second, the order of keys in dicts
On 10/19/18 3:15 PM, Max Reitz wrote:
> There are two imports that need to be modified when running the iotests
> under Python 3: One is StringIO, which no longer exists; instead, the
> StringIO class comes from the io module, so import it from there (and
> use the BytesIO class for Python 2).
On 10/19/18 3:15 PM, Max Reitz wrote:
> Python 3.4 introduced the inheritable attribute for FDs. At the same
> time, it changed the default so that all FDs are not inheritable by
> default, that only inheritable FDs are inherited to subprocesses, and
> only if close_fds is explicitly set to
On 10/19/18 3:15 PM, Max Reitz wrote:
> iotest 169 uses the 'new' module to add methods to a class. This module
> no longer exists in Python 3. Instead, we can use a lambda. Best of
> all, this works in 2.7 just as well.
>
> Signed-off-by: Max Reitz
> Reviewed-by: Eduardo Habkost
On 10/19/18 3:15 PM, Max Reitz wrote:
> In Python 3, several functions now return iterators instead of lists.
> This includes range(), items(), map(), and filter(). This means that if
> we really want a list, we have to wrap those instances with list(). But
> then again, the two instances
On 10/19/18 3:15 PM, Max Reitz wrote:
> In Python 3, / is always a floating-point division. We usually do not
> want this, and as Python 2.7 understands // as well, change all integer
> divisions to use that.
>
> Signed-off-by: Max Reitz
Reviewed-by: Cleber Rosa
On 10/13/18 11:15 AM, Philippe Mathieu-Daudé wrote:
> Similar to the test_x86_64_pc test, this boots a Linux kernel on a
> R2D board (SH4 little-endian) and verify the usb is working by looking
> at the usb trace events. Thus this test requires the QEMU binary to be
> compiled with:
>
> $
On Fri, Oct 19, 2018 at 15:29:32 -0400, Emilio G. Cota wrote:
> On Fri, Oct 19, 2018 at 18:01:18 +0200, Paolo Bonzini wrote:
> > > Given that we need a per-CPU lock anyway to remove the BQL from the
> > > CPU loop, extending this lock to protect cpu->interrupt_request is
> > > a simple solution
On 10/19/18 5:17 PM, Cleber Rosa wrote:
>
>
> On 10/19/18 2:41 PM, Philippe Mathieu-Daudé wrote:
>> On 19/10/2018 19:42, Cleber Rosa wrote:
>>>
>>>
>>> On 10/13/18 11:15 AM, Philippe Mathieu-Daudé wrote:
Similar to the test_x86_64_pc test, this boots a Linux kernel on a
Malta board
On 10/19/18 2:41 PM, Philippe Mathieu-Daudé wrote:
> On 19/10/2018 19:42, Cleber Rosa wrote:
>>
>>
>> On 10/13/18 11:15 AM, Philippe Mathieu-Daudé wrote:
>>> Similar to the test_x86_64_pc test, this boots a Linux kernel on a
>>> Malta board (MIPS 4Kc big-endian) and verify the serial is
The calls to find_mapping_for_cluster() may return NULL but it
isn't always checked for before dereferencing the value returned.
Additionally, add some asserts to cover cases where NULL can't
be returned but which might not be obvious at first glance.
Signed-off-by: Liam Merwick
---
In kvm_arch_init_vcpu() a call to cpuid_find_entry() can return
NULL so the pointer returned should be checked before dereferencing it.
Signed-off-by: Liam Merwick
---
target/i386/kvm.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
The configure script detects if the compiler has AVX2 support and
automatically sets avx2_opt="yes" which in turn defines CONFIG_AVX2_OPT.
There is no way of explicitly overriding this setting so this commit adds
two command-line options: --enable-avx2 and --disable-avx2.
The default behaviour,
The commit for 0e4e4318eaa5 increments QCOW2_OL_MAX_BITNR but does not
add an array entry for QCOW2_OL_BITMAP_DIRECTORY_BITNR to metadata_ol_names[].
As a result, an array dereference of metadata_ol_names[8] in
qcow2_pre_write_overlap_check() could result in a read outside of the array
bounds.
Although the function block_job_get() can return NULL, it would be a
serious bug if it did so (because the job yields before executing anything
(if it started successfully); but otherwise, commit_active_start() would
have returned an error). However, as a precaution, before dereferencing
the
A NULL 'list' passed into function dump_qlist() isn't correctly
validated and can be passed to qlist_first() where it is dereferenced.
Given that dump_qlist() is static, and callers already do the right
thing, just add an assert to catch future potential bugs (plus the
added benefit of
In the assert checking the array dereference of JobVerbTable[verb]
in job_apply_verb() the check of the index, verb, allows an overrun
because an index equal to the array size is permitted.
Similarly, in the assert check of JobSTT[s0][s1] with index s1
in job_state_transition(), an off-by-one
The dev_id returned by the call to blk_get_attached_dev_id() in
blk_root_get_parent_desc() can be NULL (an internal call to
object_get_canonical_path may have returned NULL).
Instead of just checking this case before before dereferencing,
adjust blk_get_attached_dev_id() to return the empty
Below are a number of fixes to some off-by-one, read outside array bounds, and
NULL pointer accesses detected by an internal Oracle static analysis tool
(Parfait).
https://labs.oracle.com/pls/apex/f?p=labs:49:P49_PROJECT_ID:13
I have also included a patch to add a command-line option to
On 12/10/18 16:22, Max Reitz wrote:
On 31.08.18 20:16, Liam Merwick wrote:
A NULL 'list' passed into function dump_qlist() isn't correctly
validated and can be passed to qlist_first() where it is dereferenced.
Given that dump_qlist() is static, and callers already do the right
thing, just
On 12/10/18 15:51, Max Reitz wrote:
On 31.08.18 20:16, Liam Merwick wrote:
The function block_job_get() may return NULL so before dereferencing
the 'job' pointer in img_commit() it should be checked.
It may not because the job yields before executing anything (if it
started successfully;
On 12/10/18 16:14, Max Reitz wrote:
On 31.08.18 20:16, Liam Merwick wrote:
The calls to bdrv_new_open_driver(), find_mapping_for_cluster(),
and array_get_next() may return NULL but it isn't always checked for
before dereferencing the value returned.
Signed-off-by: Liam Merwick
Reviewed-by:
On 12/10/18 15:48, Max Reitz wrote:
Hi,
On 31.08.18 20:16, Liam Merwick wrote:
The dev_id returned by the call to blk_get_attached_dev_id() in
blk_root_get_parent_desc() can be NULL (an internal call to
object_get_canonical_path may have returned NULL) so it should
be checked before
On Fri, Oct 19, 2018 at 09:53:45PM +0200, Igor Mammedov wrote:
> On Fri, 19 Oct 2018 15:44:08 -0300
> Eduardo Habkost wrote:
>
> > On Fri, Oct 19, 2018 at 03:12:31PM +0100, Peter Maydell wrote:
> > > On 18 October 2018 at 21:03, Eduardo Habkost wrote:
> > > > The following changes since commit
On Fri, Oct 19, 2018 at 09:15:22PM +0200, Max Reitz wrote:
> There are two imports that need to be modified when running the iotests
> under Python 3: One is StringIO, which no longer exists; instead, the
> StringIO class comes from the io module, so import it from there (and
> use the BytesIO
On Fri, Oct 19, 2018 at 09:15:20PM +0200, Max Reitz wrote:
> Python 3.4 introduced the inheritable attribute for FDs. At the same
> time, it changed the default so that all FDs are not inheritable by
> default, that only inheritable FDs are inherited to subprocesses, and
> only if close_fds is
On Fri, Oct 19, 2018 at 09:15:18PM +0200, Max Reitz wrote:
> In Python 3, / is always a floating-point division. We usually do not
> want this, and as Python 2.7 understands // as well, change all integer
> divisions to use that.
>
> Signed-off-by: Max Reitz
Reviewed-by: Eduardo Habkost
--
On Fri, Oct 19, 2018 at 09:15:19PM +0200, Max Reitz wrote:
> In Python 3, several functions now return iterators instead of lists.
> This includes range(), items(), map(), and filter(). This means that if
> we really want a list, we have to wrap those instances with list(). But
> then again, the
On Fri, 19 Oct 2018 15:44:08 -0300
Eduardo Habkost wrote:
> On Fri, Oct 19, 2018 at 03:12:31PM +0100, Peter Maydell wrote:
> > On 18 October 2018 at 21:03, Eduardo Habkost wrote:
> > > The following changes since commit
> > > 09558375a634e17cea6cfbfec883ac2376d2dc7f:
> > >
> > > Merge
On Fri, Oct 19, 2018 at 18:01:18 +0200, Paolo Bonzini wrote:
> On 19/10/2018 16:50, Emilio G. Cota wrote:
> > On Fri, Oct 19, 2018 at 08:59:24 +0200, Paolo Bonzini wrote:
> >> On 19/10/2018 03:05, Emilio G. Cota wrote:
> >>> I'm calling this series a v3 because it supersedes the two series
> >>> I
In Python 3, several functions now return iterators instead of lists.
This includes range(), items(), map(), and filter(). This means that if
we really want a list, we have to wrap those instances with list(). But
then again, the two instances where this is the case for map() and
filter(), there
There are two imports that need to be modified when running the iotests
under Python 3: One is StringIO, which no longer exists; instead, the
StringIO class comes from the io module, so import it from there (and
use the BytesIO class for Python 2). The other is the ConfigParser,
which has just
In Python 3, / is always a floating-point division. We usually do not
want this, and as Python 2.7 understands // as well, change all integer
divisions to use that.
Signed-off-by: Max Reitz
---
tests/qemu-iotests/030| 2 +-
tests/qemu-iotests/040| 4 ++--
This series prepares the iotests to work with both Python 2 and 3. In
some places, it adds version-specific code and decides what to do based
on the version (for instance, whether to import the StringIO or the
BytesIO class from 'io' for use with the test runner), but most of the
time, it just
Python 3.4 introduced the inheritable attribute for FDs. At the same
time, it changed the default so that all FDs are not inheritable by
default, that only inheritable FDs are inherited to subprocesses, and
only if close_fds is explicitly set to False.
Adhere to this by setting close_fds to
When closing a connection, make the nbd-fault-injector flush the socket.
Without this, the output is a bit unreliable with Python 3.
Signed-off-by: Max Reitz
Reviewed-by: Eduardo Habkost
Reviewed-by: Cleber Rosa
Reviewed-by: Eric Blake
---
tests/qemu-iotests/083.out | 9
When dumping an object into the log, there are differences between
Python 2 and 3. First, unicode strings are prefixed by 'u' in Python 2
(they are no longer in 3, because unicode strings are the default
there). Second, the order of keys in dicts may differ. Third,
especially long numbers are
After issuing a command, flush the pipe. This does not change anything
in Python 2, but it makes a difference in Python 3.
Signed-off-by: Max Reitz
Reviewed-by: Eduardo Habkost
Reviewed-by: Cleber Rosa
---
tests/qemu-iotests/iotests.py | 1 +
1 file changed, 1 insertion(+)
diff --git
Since byte strings are no longer the default in Python 3, we have to
explicitly use them where we need to, which is mostly when working with
structures. It also means that we need to open a file in binary mode
when we want to use structures.
On the other hand, we have to accomodate for the fact
iotest 169 uses the 'new' module to add methods to a class. This module
no longer exists in Python 3. Instead, we can use a lambda. Best of
all, this works in 2.7 just as well.
Signed-off-by: Max Reitz
Reviewed-by: Eduardo Habkost
---
tests/qemu-iotests/169 | 3 +--
1 file changed, 1
On Fri, 19 Oct 2018 08:28:38 PDT (-0700), kbast...@mail.uni-paderborn.de wrote:
On 10/13/18 8:53 PM, Richard Henderson wrote:
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
+static bool trans_c_addi(DisasContext *ctx, arg_c_addi *a, uint16_t insn)
+{
+if (a->imm == 0) {
+return
On Fri, Oct 19, 2018 at 03:12:31PM +0100, Peter Maydell wrote:
> On 18 October 2018 at 21:03, Eduardo Habkost wrote:
> > The following changes since commit 09558375a634e17cea6cfbfec883ac2376d2dc7f:
> >
> > Merge remote-tracking branch
> > 'remotes/pmaydell/tags/pull-target-arm-20181016-1' into
On 19/10/2018 19:42, Cleber Rosa wrote:
>
>
> On 10/13/18 11:15 AM, Philippe Mathieu-Daudé wrote:
>> Similar to the test_x86_64_pc test, this boots a Linux kernel on a
>> Malta board (MIPS 4Kc big-endian) and verify the serial is working.
>>
>> This test requires the dpkg-deb tool (apt/dnf
19.10.2018 16:17, Laurent Vivier wrote:
> Hi Michael,
>
> some people asked me if there will be any qemu-trivial pull request in
> the near future.
>
> So you plan to do one?
> Do you need help?
Hello!
I haven't done anything qemu-related in about 3 months in a row.
That's due to some..
On Fri, 19 Oct 2018 04:00:33 PDT (-0700), kbast...@mail.uni-paderborn.de wrote:
Hi Richard,
On 10/12/18 8:46 PM, Richard Henderson wrote:
On 10/12/18 10:30 AM, Bastian Koppelmann wrote:
+static bool trans_andi(DisasContext *ctx, arg_andi *a, uint32_t insn)
+{
+gen_arith_imm(ctx,
On 10/13/18 11:15 AM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> tests/acceptance/boot_linux_console.py | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/tests/acceptance/boot_linux_console.py
>
On 10/19/18 11:30 AM, Kevin Wolf wrote:
Commit e2b8247a322 introduced an error path in qemu_rbd_open() after
calling rbd_open(), but neglected to close the image again in this error
path. The error path should contain everything that the regular close
function qemu_rbd_close() contains.
This
> Perhaps a better alternative is to define the MMI registers as 128-bit,
> similar to
>
> static TCGv_u128 mmi_gpr[32];
>
> and then copy cpu_gpr to/from mmi_gpr as needed when running the MMIs?
Fredrik, hi.
I think this is fine. In any case, this could be changed, if we hit any
obstacle
On 19 October 2018 at 07:06, Richard Henderson
wrote:
> Changes since v1:
> * Added QEMU_ERROR to wrap __attribute__((error)) -- patch 12.
>
>
> r~
>
>
> The following changes since commit 77f7c747193662edfadeeb3118d63eed0eac51a6:
>
> Merge remote-tracking branch
>
This patchset fixes a minor bug in our handling of SIGTRAP
in linux-user.
The CPU main-loop routines for linux-user generally call
gdb_handlesig() when they're about to queue a SIGTRAP signal. This
is wrong, because queue_signal() will cause us to pend a signal, and
process_pending_signals()
The nios2 main loop code's code does some odd
things with gdb_handlesig() that no other target
CPU does: it has some signals that are delivered
to gdb and only to gdb. Stop doing this, and instead
behave like all the other targets:
* a trap instruction becomes a SIGTRAP
* an unhandled exception
On Fri, Oct 19, 2018 at 7:00 PM Philippe Mathieu-Daudé
wrote:
> On 19/10/2018 16:12, Peter Maydell wrote:
...
> >>
> >>
> >
> > Hi. This had some problems in merge testing, I'm afraid:
> >
> > On aarch64 host, warnings running
> From: Laurent Vivier
> Sent: Friday, October 19, 2018 3:28 PM
> Subject: Re: [Qemu-devel] [PATCH v7 0/7] target/mips: Limited support for the
> R5900
>
> Le 15/10/2018 à 14:16, Aleksandar Markovic a écrit :
> >> From: Fredrik Noring
> >> Sent: Saturday, October 13, 2018 1:09 PM
> >> To:
On Thu, 18 Oct 2018 18:06:20 PDT (-0700), c...@braap.org wrote:
Soon we will call cpu_has_work without the BQL.
Cc: Michael Clark
Cc: Palmer Dabbelt
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Signed-off-by: Emilio G. Cota
---
target/riscv/cpu.c | 21 -
1 file changed,
On 19/10/2018 19:37, Cleber Rosa wrote:
> On 10/13/18 11:15 AM, Philippe Mathieu-Daudé wrote:
>> The board already instantiate the proper devices, we don't want to
>> add extra devices but connect the chardev to one of the serial already
>> available.
>>
>> Signed-off-by: Philippe Mathieu-Daudé
The HCR.DC virtualization configuration register bit has the
following effects:
* SCTLR.M behaves as if it is 0 for all purposes except
direct reads of the bit
* HCR.VM behaves as if it is 1 for all purposes except
direct reads of the bit
* the memory type produced by the first stage of
On 10/13/18 11:15 AM, Philippe Mathieu-Daudé wrote:
> Similar to the test_x86_64_pc test, this boots a Linux kernel on a
> Malta board (MIPS 4Kc big-endian) and verify the serial is working.
>
> This test requires the dpkg-deb tool (apt/dnf install dpkg) to
> extract the kernel from the Debian
The CPU main-loop routines for linux-user generally
call gdb_handlesig() when they're about to queue a
SIGTRAP signal. This is wrong, because queue_signal()
will cause us to pend a signal, and process_pending_signals()
will then call gdb_handlesig() itself. So the effect is that
we notify gdb of
If the HCR_EL2 PTW virtualizaiton configuration register bit
is set, then this means that a stage 2 Permission fault must
be generated if a stage 1 translation table access is made
to an address that is mapped as Device memory in stage 2.
Implement this.
Signed-off-by: Peter Maydell
Reviewed-by:
> From: Aleksandar Markovic
> Sent: Friday, October 19, 2018 6:33 PM
> Subject: [PATCH v5 10/14] target/mips: Add emulation of MXU instruction S8LDD
>
> From: Craig Janeczek
>
> Add support for emulating the S8LDD MXU instruction.
>
> Signed-off-by: Craig Janeczek
> Signed-off-by:
For the v7 version of the Arm architecture, the IL bit in
syndrome register values where the field is not valid was
defined to be UNK/SBZP. In v8 this is RES1, which is what
QEMU currently implements. Handle the desired v7 behaviour
by squashing the IL bit for the affected cases:
* EC ==
The HCR.FB virtualization configuration register bit requests that
TLB maintenance, branch predictor invalidate-all and icache
invalidate-all operations performed in NS EL1 should be upgraded
from "local CPU only to "broadcast within Inner Shareable domain".
For QEMU we NOP the branch predictor
From: Richard Henderson
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20181011205206.3552-6-richard.hender...@linaro.org
[PMM: drop change to now-deleted cpu_mode_names array]
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
The HCR_EL2 VI and VF bits are supposed to track whether there is
a pending virtual IRQ or virtual FIQ. For QEMU we store the
pending VIRQ/VFIQ status in cs->interrupt_request, so this means:
* if the register is read we must get these bit values from
cs->interrupt_request
* if the register
From: Richard Henderson
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-11-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/translate.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git
On 19/10/2018 16:12, Peter Maydell wrote:
> On 18 October 2018 at 21:03, Eduardo Habkost wrote:
>> The following changes since commit 09558375a634e17cea6cfbfec883ac2376d2dc7f:
>>
>> Merge remote-tracking branch
>> 'remotes/pmaydell/tags/pull-target-arm-20181016-1' into staging (2018-10-16
>>
From: Richard Henderson
Move cmtst_op expanders from translate-a64.c.
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-17-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/translate.h | 2 +
target/arm/translate-a64.c |
Create and use a utility function to extract the EC field
from a syndrome, rather than open-coding the shift.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20181012144235.19646-9-peter.mayd...@linaro.org
---
target/arm/internals.h | 5 +
target/arm/helper.c| 4
From: Richard Henderson
This can reduce the number of opcodes required for certain
complex forms of load-multiple (e.g. ld4.16b).
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-2-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
On 10/13/18 11:15 AM, Philippe Mathieu-Daudé wrote:
> The board already instantiate the proper devices, we don't want to
> add extra devices but connect the chardev to one of the serial already
> available.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> scripts/qemu.py | 6 --
> 1
From: Richard Henderson
This is done generically in translator_loop.
Reported-by: Laurent Desnogues
Signed-off-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20181011205206.3552-3-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
From: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
Message-id: 20181016223115.24100-9-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/cpu.h | 17 +++-
linux-user/elfload.c
> From: Aleksandar Markovic <> aleksandar.marko...@rt-rk.com>
> Sent: Friday, October 19, 2018 6:33 PM
> Subject: [PATCH v5 05/14] target/mips: > Add bit encoding for MXU
> add/subtract > patterns 'aptn2'
>
> From: Craig Janeczek <> jancr...@amazon.com>
>
> Add bit encoding for MXU
From: Richard Henderson
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-4-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/translate-a64.c | 28 +++-
1 file changed, 3 insertions(+), 25 deletions(-)
From: Richard Henderson
Both arm and thumb2 division are controlled by the same ISAR field,
which takes care of the arm implies thumb case. Having M imply
thumb2 division was wrong for cortex-m0, which is v6m and does not
have thumb2 at all, much less thumb2 division.
Reviewed-by: Philippe
The A/I/F bits in ISR_EL1 should track the virtual interrupt
status, not the physical interrupt status, if the associated
HCR_EL2.AMO/IMO/FMO bit is set. Implement this, rather than
always showing the physical interrupt status.
We don't currently implement anything to do with external
aborts, so
From: Richard Henderson
For a sequence of loads or stores from a single register,
little-endian operations can be promoted to an 8-byte op.
This can reduce the number of operations by a factor of 8.
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-5-richard.hender...@linaro.org
From: Richard Henderson
Create struct ARMISARegisters, to be accessed during translation.
Signed-off-by: Richard Henderson
Message-id: 20181016223115.24100-2-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/cpu.h | 32
From: Richard Henderson
Move expanders for VBSL, VBIT, and VBIF from translate-a64.c.
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-9-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/translate.h | 6 ++
From: Richard Henderson
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-8-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/translate.c | 67 --
1 file changed, 39 insertions(+), 28
From: Markus Armbruster
Device models aren't supposed to go on fishing expeditions for
backends. They should expose suitable properties for the user to set.
For onboard devices, board code sets them.
Device ssi-sd picks up its block backend in its init() method with
drive_get_next() instead.
From: Richard Henderson
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-10-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/translate.c | 29 ++---
1 file changed, 10 insertions(+), 19 deletions(-)
From: Richard Henderson
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-12-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/translate.c | 31 +++
1 file changed, 15 insertions(+), 16 deletions(-)
From: Richard Henderson
Move ssra_op and usra_op expanders from translate-a64.c.
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-14-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/translate.h | 2 +
On Thu, 18 Oct 2018 18:05:45 PDT (-0700), c...@braap.org wrote:
Cc: Michael Clark
Cc: Palmer Dabbelt
Cc: Sagar Karandikar
Cc: Bastian Koppelmann
Cc: Alistair Francis
Signed-off-by: Emilio G. Cota
---
target/riscv/op_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Just like in qemu_opts_print_help(), print the device name as a caption
instead of on every single line, indent all options, add angle brackets
around types, and align the descriptions after 24 characters. Also,
separate the descriptions with " - " instead of putting them in
parentheses, because
From: Richard Henderson
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-13-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/translate.c | 70 +-
1 file changed, 48 insertions(+), 22
I noticed that with the (more or less) recent series from Marc-André the
output of qemu-img amend -f qcow2 -o help changed to this:
$ ./qemu-img amend -f qcow2 -o help
Creation options for 'qcow2':
qcow2-create-opts.backing_file=str - File name of a base image
qcow2-create-opts.backing_fmt=str -
From: Richard Henderson
Instead of shifts and masks, use direct loads and stores from
the neon register file.
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-21-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/translate.c |
From: Richard Henderson
Instead of shifts and masks, use direct loads and stores from the neon
register file. Mirror the iteration structure of the ARM pseudocode
more closely. Correct the parameters of the VLD2 A2 insn.
Note that this includes a bugfix for handling of the insn
"VLD2
The switch_mode() function is defined in target/arm/helper.c and used
only in that file and nowhere else, so we can make it file-local
rather than global.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Message-id: 20181012144235.19646-3-peter.mayd...@linaro.org
---
From: "Edgar E. Iglesias"
Announce the availability of the various priority queues.
This fixes an issue where guest kernels would miss to
configure secondary queues due to inproper feature bits.
Signed-off-by: Edgar E. Iglesias
Message-id: 20181017213932.19973-2-edgar.igles...@gmail.com
From: Richard Henderson
For a sequence of loads or stores from a single register,
little-endian operations can be promoted to an 8-byte op.
This can reduce the number of operations by a factor of 8.
Signed-off-by: Richard Henderson
Message-id:
From: Richard Henderson
Also introduces neon_element_offset to find the env offset
of a specific element within a neon register.
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-7-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
From: "Edgar E. Iglesias"
Announce 64bit addressing support.
Reviewed-by: Alistair Francis
Signed-off-by: Edgar E. Iglesias
Message-id: 20181017213932.19973-3-edgar.igles...@gmail.com
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/net/cadence_gem.c | 3 ++-
1 file changed,
From: Richard Henderson
The EL3 version of this register does not include an ASID,
and so the tlb_flush performed by vmsa_ttbr_write is not needed.
Reviewed-by: Aaron Lindsay
Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
Message-id:
From: Richard Henderson
Move shi_op and sli_op expanders from translate-a64.c.
Signed-off-by: Richard Henderson
Message-id: 20181011205206.3552-15-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/translate.h | 2 +
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