On Sat, Jul 06, 2019 at 09:39:40AM +0530, Sukrit Bhatnagar wrote:
> Use VMStateDescription for migrating device state. Currently,
What do you mean by 'Currently'?
> 'vmstate_pvrdma' describes the PCI and MSIX state for pvrdma and
> 'vmstate_pvrdma_dsr_dma' describes a temporary state containing
>
Am 08.07.19 um 06:40 schrieb Markus Armbruster:
Stefan Weil writes:
- Some code is correct, but has no indication that the fallthrough is
intentional.
I'd treat that as a bug.
Sure.
- There is also fallthrough code which is obviously not correct (even
in target/mips/translate.c).
Bu
Hi
On Sat, Jul 6, 2019 at 10:09 AM Markus Armbruster wrote:
>
> Cc: Marc-André, who has patches that might be useful here.
>
> Alex Bennée writes:
>
> > Markus Armbruster writes:
> >
> >> vandersonmr writes:
> >>
> >
> >
> > I'll leave Vanderson to address your other comments.
> >
> >>
> >> D
Stefan Weil writes:
> Am 13.08.18 um 19:52 schrieb Aleksandar Markovic:
>
>> From: Aleksandar Markovic
>>
>> Mark switch fallthroughs with comments, in cases fallthroughs
>> are intentional.
>
>
> This is a general problem all over the QEMU code. I usually compile
> with nearly all warnings enab
Public bug reported:
Hi all,
I hope you're all doing well.
As i was looking for a solution for a particular problem in Qemu/KVM
virtualization.
My issue is that I have a virtual machine that runs well in VMware and when
I migrated that to Qemu/KVM-enabled environment, it didn't work! I figured
Public bug reported:
Hello World appears to segfault with qemu s390x, on a Debian 10.0.0
Buster amd64 host.
$ cat hello.cpp
#include
using std::cout;
int main() {
cout << "Hello World!\n";
return 0;
}
$ s390x-linux-gnu-g++ -o hello hello.cpp
$ qemu-s390x-static hello
Segmentation fau
Markus,
Thank you for your comments! Based on your questions and suggestions of
writing a more complete explanation in my commits, I decided to start to
describe our whole work on the wiki:
https://wiki.qemu.org/Internships/ProjectIdeas/TCGCodeQuality
I will update and expand it weekly, so I can l
Am 13.08.18 um 19:52 schrieb Aleksandar Markovic:
From: Aleksandar Markovic
Mark switch fallthroughs with comments, in cases fallthroughs
are intentional.
This is a general problem all over the QEMU code. I usually compile with
nearly all warnings enabled and get now lots of errors with th
On Fri, Jul 05, 2019 at 07:33:27PM +0530, Pankaj Gupta wrote:
> Dont support 'MAP_SYNC' with non-DAX files and DAX files
> with asynchronous dax_device. Virtio pmem provides
> asynchronous host page cache flush mechanism. We don't
> support 'MAP_SYNC' with virtio pmem and ext4.
>
> Signed-off-by:
Move the _FIT method buff Aml-build codes into
aml_build_runtime_buf(), and then NFIT and HMAT can both use it.
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
Changes in v6:
- Add more commit message and change the function name
---
hw/acpi/nvdimm.c| 49 +
From: Liu Jingqi
Add -numa hmat-lb option to provide System Locality Latency and
Bandwidth Information. These memory attributes help to build
System Locality Latency and Bandwidth Information Structure(s)
in ACPI Heterogeneous Memory Attribute Table (HMAT).
Signed-off-by: Liu Jingqi
Signed-off-
ACPI table HMAT has been introduced, QEMU now builds HMAT tables for
Heterogeneous Memory with boot option '-numa node'.
Add test cases on PC and Q35 machines with 2 numa nodes.
Because HMAT is generated when system enable numa, the
following tables need to be added for this test:
tests/acpi-tes
In ACPI 6.3 chapter 5.2.27 Heterogeneous Memory Attribute Table (HMAT),
The initiator represents processor which access to memory. And in 5.2.27.3
Memory Proximity Domain Attributes Structure, the attached initiator is
defined as where the memory controller responsible for a memory proximity
domain
From: Liu Jingqi
This structure describes memory side cache information for memory
proximity domains if the memory side cache is present and the
physical device forms the memory side cache.
The software could use this information to effectively place
the data in memory to maximize the performance
From: Liu Jingqi
OSPM evaluates HMAT only during system initialization.
Any changes to the HMAT state at runtime or information
regarding HMAT for hot plug are communicated using _HMA method.
_HMA is an optional object that enables the platform to provide
the OS with updated Heterogeneous Memory
From: Liu Jingqi
HMAT is defined in ACPI 6.3: 5.2.27 Heterogeneous Memory Attribute Table
(HMAT). The specification references below link:
http://www.uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdf
It describes the memory attributes, such as memory side cache
attributes and bandw
Move existing numa global numa_info (renamed as "nodes") into NumaState.
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
Changes in v6:
- Rebase to upstream, move globals in arm/sbsa-ref
- Correct some mistake(Igor)
- Use ms->numa_state->nodes di
From: Liu Jingqi
Add -numa hmat-cache option to provide Memory Side Cache Information.
These memory attributes help to build Memory Side Cache Information
Structure(s) in ACPI Heterogeneous Memory Attribute Table (HMAT).
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v6:
-
Add struct NumaState in MachineState and move existing numa global
nb_numa_nodes(renamed as "num_nodes") into NumaState. And add variable
numa_support into MachineClass to decide which submachines support NUMA.
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
Add QMP interface to introduce new HMAT data (including System Locality
Latency and Bandwidth Information Structure, Memory Side Cache
Information Structure) at runtime. The interface can
also replace existing HMAT data.
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
hw/acpi/acpi-stub.c
From: Liu Jingqi
This structure describes the memory access latency and bandwidth
information from various memory access initiator proximity domains.
The latency and bandwidth numbers represented in this structure
correspond to rated latency and bandwidth for the platform.
The software could use
Move existing numa global have_numa_distance into NumaState.
Reviewed-by: Igor Mammedov
Reviewed-by: Liu Jingqi
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
Changes in v6:
- rebase to upstream, move globals in arm/sbsa-ref
---
hw/arm/sbsa-ref.c
In struct arm_boot_info, kernel_filename, initrd_filename and
kernel_cmdline are copied from from MachineState. This patch add
MachineState as a parameter into arm_load_dtb() and move the copy chunk
of kernel_filename, initrd_filename and kernel_cmdline into
arm_load_kernel().
Reviewed-by: Igor Ma
This series of patches will build Heterogeneous Memory Attribute Table (HMAT)
according to the command line. The ACPI HMAT describes the memory attributes,
such as memory side cache attributes and bandwidth and latency details,
related to the Memory Proximity Domain.
The software is expected to use
On Fri, 2019-07-05 at 15:50 +0200, Max Reitz wrote:
> On 03.07.19 18:07, Maxim Levitsky wrote:
> > Signed-off-by: Maxim Levitsky
> > ---
> > block/nvme.c | 81 ++
> > block/trace-events | 2 ++
> > 2 files changed, 83 insertions(+)
> >
> > diff
On Fri, 2019-07-05 at 15:33 +0200, Max Reitz wrote:
> On 03.07.19 17:59, Maxim Levitsky wrote:
> > Signed-off-by: Maxim Levitsky
> > ---
> > block/nvme.c | 69 +++-
> > block/trace-events | 1 +
> > include/block/nvme.h | 19 +++-
> > 3 f
On Fri, 2019-07-05 at 14:09 +0200, Max Reitz wrote:
> On 03.07.19 17:59, Maxim Levitsky wrote:
> > Tesed on a nvme device like that:
> >
> > # create preallocated qcow2 image
> > $ qemu-img create -f qcow2 nvme://:06:00.0/1 10G -o
> > preallocation=metadata
> > Formatting 'nvme://:06:00.0
On Fri, 2019-07-05 at 13:58 +0200, Max Reitz wrote:
> On 03.07.19 17:59, Maxim Levitsky wrote:
> > Currently the driver hardcodes the sector size to 512,
> > and doesn't check the underlying device. Fix that.
> >
> > Also fail if underlying nvme device is formatted with metadata
> > as this needs
On Fri, 2019-07-05 at 13:10 +0200, Max Reitz wrote:
> On 05.07.19 13:09, Max Reitz wrote:
> > On 03.07.19 17:59, Maxim Levitsky wrote:
> > > Fix the math involving non standard doorbell stride
> > >
> > > Signed-off-by: Maxim Levitsky
> > > ---
> > > block/nvme.c | 2 +-
> > > 1 file changed, 1
On Fri, 2019-07-05 at 13:03 +0200, Max Reitz wrote:
> On 03.07.19 17:59, Maxim Levitsky wrote:
> > Completion entries are meant to be only read by the host and written by the
> > device.
> > The driver is supposed to scan the completions from the last point where it
> > left,
> > and until it see
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