Re: [PATCH v1 2/4] virtio: increase virtuqueue size for virtio-scsi and virtio-blk

On Fri, Feb 07, 2020 at 11:48:05AM +0300, Denis Plotnikov wrote: > > > On 05.02.2020 14:19, Stefan Hajnoczi wrote: > > On Tue, Feb 04, 2020 at 12:59:04PM +0300, Denis Plotnikov wrote: > > > > > > On 30.01.2020 17:58, Stefan Hajnoczi wrote: > > > > On Wed, Jan 29, 2020 at 05:07:00PM +0300, Denis

RE: [PATCH] Add support for a helper with 7 arguments

> On 2/7/20 12:43 PM, Taylor Simpson wrote: > > > >> -Original Message- > >> From: Richard Henderson > >> > >> But I encourage you to re-think your purely mechanical approach to the > >> hexagon port. It seems to me that you should be doing much more > during > >> the translation phase

Re: [PATCH v3 0/7] ui: rework -show-cursor option

On Fri, Feb 07, 2020 at 11:17:46AM +0100, Gerd Hoffmann wrote: Add -display {sdl,gtk,cocoa},show-cursor=on as replacement for -show-cursor. sdl + cocoa are switched over (no change in behavior), gtk support is added. Gerd Hoffmann (7): ui: add show-cursor option ui: wire up legacy

Re: [PATCH v2 0/2] ui/gtk: Fix gd_refresh_rate_millihz() when widget window is not realized

On 08.02.20 17:10, Philippe Mathieu-Daudé wrote: Fix bug report from Jan Kiszka: https://www.mail-archive.com/qemu-devel@nongnu.org/msg678130.html https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg02260.html Supersedes: <20200208143008.6157-1-f4...@amsat.org> Philippe Mathieu-Daudé (2):

[PATCH v3 07/13] hw/arm/raspi: Make machines children of abstract RaspiMachineClass

QOM'ify RaspiMachineState. Now machines inherit of RaspiMachineClass. Cc: Igor Mammedov Signed-off-by: Philippe Mathieu-Daudé --- v3: Fixed typo in description (Zoltán) --- hw/arm/raspi.c | 56 +++--- 1 file changed, 49 insertions(+), 7 deletions(-)

[PATCH v3 06/13] hw/arm/raspi: Trivial code movement

There is no point in creating the SoC object before allocating the RAM. Move the call to keep all the SoC-related calls together. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/raspi.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c

[PATCH v3 05/13] hw/arm/raspi: Extract the processor type from the board revision

The board revision encode the processor type. Add a helper to extract the type, and use it. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/raspi.c | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index

[PATCH v3 13/13] hw/arm/raspi: Extract the cores count from the board revision

The board revision encode the count of ARM cores. Add a helper to extract the number of cores, and use it. This will be helpful when we add the Raspi0/1 that have a single core. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/raspi.c | 19 --- 1 file changed, 16 insertions(+),

[PATCH v3 12/13] hw/arm/raspi: Use a unique raspi_machine_class_init() method

With the exception of the ignore_memory_transaction_failures flag set for the raspi2, both machine_class_init() methods are now identical. Merge them to keep a unique method. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/raspi.c | 31 ++- 1 file changed, 6

[PATCH v3 03/13] hw/arm/raspi: Extract the version from the board revision

The board revision encode the board version. Add a helper to extract the version, and use it. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/raspi.c | 31 +++ 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index

[PATCH v3 11/13] hw/arm/raspi: Extract the board model from the board revision

The board revision encode the model type. Add a helper to extract the model, and use it. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/raspi.c | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index f0dcffbc2e..0537fc0a2d

[PATCH v3 08/13] hw/arm/raspi: Make board_rev a field of RaspiMachineClass

We want to have a common class_init(). The only value that matters (and changes) is the board revision. Pass the board_rev as class_data to class_init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/raspi.c | 17 ++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git

[PATCH v3 10/13] hw/arm/raspi: Set default RAM size to size encoded in board revision

We added a helper to extract the RAM size from the board revision, and made board_rev a field of RaspiMachineClass. The class_init() can now use the helper to extract from the board revision the board-specific amount of RAM. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/raspi.c | 4 ++-- 1

[PATCH v3 01/13] hw/arm/raspi: Use BCM2708 machine type with pre Device Tree kernels

When booting without device tree, the Linux kernels uses the $R1 register to determine the machine type. The list of values is registered at [1]. There are two entries for the Raspberry Pi: - https://www.arm.linux.org.uk/developer/machines/list.php?mid=3138 name: MACH_TYPE_BCM2708 value:

[PATCH v3 09/13] hw/arm/raspi: Let class_init() directly call raspi_machine_init()

raspi_machine_init() access to board_rev via RaspiMachineClass. raspi2_init() and raspi3_init() do nothing. Call raspi_machine_init directly. Signed-off-by: Philippe Mathieu-Daudé --- Squash with previous? --- hw/arm/raspi.c | 16 +++- 1 file changed, 3 insertions(+), 13

[PATCH v3 04/13] hw/arm/raspi: Extract the RAM size from the board revision

The board revision encode the amount of RAM. Add a helper to extract the RAM size, and use it. Since the amount of RAM is fixed (it is impossible to physically modify to have more or less RAM), do not allow sizes different than the one anounced by the manufacturer. Acked-by: Igor Mammedov

[PATCH v3 00/13] hw/arm/raspi: Dynamically create machines based on the board revision

Hi, This series is a preparatory to easily add the raspi0/raspi1/raspi4 boards (see [1]). Igor has been working in his "refactor main RAM allocation to use hostmem backend" series, and now v4 [2] is almost reviewed. His raspi patch [3] clashes with my work, Since it is easier for him to apply

[PATCH v3 02/13] hw/arm/raspi: Correct the board descriptions

We hardcode the board revision as 0xa21041 for the raspi2, and 0xa02082 for the raspi3: 166 static void raspi_init(MachineState *machine, int version) 167 { ... 194 int board_rev = version == 3 ? 0xa02082 : 0xa21041; These revision codes are for the 2B and 3B models, see:

[PATCH v2 0/2] ui/gtk: Fix gd_refresh_rate_millihz() when widget window is not realized

Fix bug report from Jan Kiszka: https://www.mail-archive.com/qemu-devel@nongnu.org/msg678130.html https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg02260.html Supersedes: <20200208143008.6157-1-f4...@amsat.org> Philippe Mathieu-Daudé (2): ui/gtk: Update gd_refresh_rate_millihz() to

[PATCH v2 1/2] ui/gtk: Update gd_refresh_rate_millihz() to handle VirtualConsole

Signed-off-by: Philippe Mathieu-Daudé --- ui/gtk.c | 9 + 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/ui/gtk.c b/ui/gtk.c index d18892d1de..c59297ff4d 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -1965,11 +1965,11 @@ static GtkWidget *gd_create_menu_machine(GtkDisplayState

[PATCH v2 2/2] ui/gtk: Fix gd_refresh_rate_millihz() when widget window is not realized

gtk_widget_get_window() returns NULL if the widget's window is not realized, and QEMU crashes. Example under gtk 3.22.30 (mate 1.20.1): qemu-system-x86_64: Gdk: gdk_window_get_origin: assertion 'GDK_IS_WINDOW (window)' failed (gdb) bt #0 0x7496cf70 in gdk_window_get_origin () from

Re: [PATCH] !fixup "target/avr: Add defintions of AVR core types"

On Sat, Feb 8, 2020 at 3:06 PM Philippe Mathieu-Daudé wrote: > > Hi Aleksandar, > > On 2/8/20 8:10 AM, Aleksandar Markovic wrote: > > On Friday, February 7, 2020, Philippe Mathieu-Daudé > > wrote: > > > > These cores have unresolved review comment: > >

Re: [PATCH] ui/gtk: Fix gd_refresh_rate_millihz() when using VirtualConsole

On 08.02.20 16:20, Jan Kiszka wrote: > On 08.02.20 15:30, Philippe Mathieu-Daudé wrote: >> Fix using virtual console under gtk 3.22.30 (mate 1.20.1): >> >>    qemu-system-x86_64: Gdk: gdk_window_get_origin: assertion >> 'GDK_IS_WINDOW (window)' failed >> >> Fixes: c4c00922cc and 28b58f19d2

Re: [PATCH] ui/gtk: Fix gd_refresh_rate_millihz() when using VirtualConsole

On 08.02.20 15:30, Philippe Mathieu-Daudé wrote: Fix using virtual console under gtk 3.22.30 (mate 1.20.1): qemu-system-x86_64: Gdk: gdk_window_get_origin: assertion 'GDK_IS_WINDOW (window)' failed Fixes: c4c00922cc and 28b58f19d2 (display/gtk: get proper refreshrate) Reported-by: Jan

Re: [PATCH 00/29] Convert QAPI doc comments to generate rST instead of texinfo

On Sat, 8 Feb 2020 at 14:16, Markus Armbruster wrote: > I understand the difficulty of parsing rST (Paolo called it "the Perl of > markup languages" for a reason). What I don't yet understand is (1) why > we need to recognize the document structure of doc comments, and (2) why > we can do that

Re: [PATCH 19/29] qapi/qapi-schema.json: Put headers in their own doc-comment blocks

On Sat, 8 Feb 2020 at 14:10, Markus Armbruster wrote: > A couple of remarks. > > Silently passing a "# == something" line to rST for literal > (mis-)interpretation is not nice. It's the kind of indifference that > led to the messes you cleaned up in PATCH 04 and 08. If the '=' markup > is only

[PATCH] ui/gtk: Fix gd_refresh_rate_millihz() when using VirtualConsole

Fix using virtual console under gtk 3.22.30 (mate 1.20.1): qemu-system-x86_64: Gdk: gdk_window_get_origin: assertion 'GDK_IS_WINDOW (window)' failed Fixes: c4c00922cc and 28b58f19d2 (display/gtk: get proper refreshrate) Reported-by: Jan Kiszka Signed-off-by: Philippe Mathieu-Daudé --- Cc:

Re: [PATCH 18/29] qapi/migration.json: Replace _this_ with *this*

Peter Maydell writes: > On Fri, 7 Feb 2020 at 16:54, Markus Armbruster wrote: >> >> Peter Maydell writes: >> >> > The MigrationInfo::setup-time documentation is the only place where >> > we use _this_ inline markup to mean italics. >> >> Nitpick: _this_ does not mean italics, it means

Re: [PATCH 00/29] Convert QAPI doc comments to generate rST instead of texinfo

Peter Maydell writes: > On Fri, 7 Feb 2020 at 17:00, Markus Armbruster wrote: >> >> Peter Maydell writes: >> >> > This series switches all our QAPI doc comments over from >> > texinfo format to rST. >> > >> > The basic approach is somewhat similar to how we deal with kerneldoc >> > and hxtool:

Re: [PATCH 19/29] qapi/qapi-schema.json: Put headers in their own doc-comment blocks

Peter Maydell writes: > On Fri, 7 Feb 2020 at 15:35, Markus Armbruster wrote: >> >> Peter Maydell writes: >> >> > Our current QAPI doc-comment markup allows section headers >> > (introduced with a leading '=' or '==') anywhere in any documentation >> > comment. This works for texinfo because

Re: [PATCH] !fixup "target/avr: Add defintions of AVR core types"

Hi Aleksandar, On 2/8/20 8:10 AM, Aleksandar Markovic wrote: > On Friday, February 7, 2020, Philippe Mathieu-Daudé > wrote: > > These cores have unresolved review comment: > https://www.mail-archive.com/qemu-devel@nongnu.org/msg674105.html >

Re: [PATCH v15 3/9] virtio-iommu: Implement attach/detach command

Hi Peter, On 2/8/20 2:41 PM, Peter Xu wrote: > On Sat, Feb 08, 2020 at 01:00:16PM +0100, Eric Auger wrote: >> This patch implements the endpoint attach/detach to/from >> a domain. >> >> Domain and endpoint internal datatypes are introduced. >> Both are stored in RB trees. The domain owns a list

Re: [PATCH v15 3/9] virtio-iommu: Implement attach/detach command

On Sat, Feb 08, 2020 at 01:00:16PM +0100, Eric Auger wrote: > This patch implements the endpoint attach/detach to/from > a domain. > > Domain and endpoint internal datatypes are introduced. > Both are stored in RB trees. The domain owns a list of > endpoints attached to it. Also helpers to

Re: [PATCH 08/29] qapi: Use ':' after @argument in doc comments

On Sat, 8 Feb 2020 at 07:54, Markus Armbruster wrote: > Peter Maydell writes: > > Conveniently this patchset already supports this format :-) > > You can write either > > > > # @foo: bar > > # baz > > # indented > > > > or > > # @foo: > > # bar > > # baz > > # indented > > > >

Re: [PATCH 02/29] configure: Check that sphinx-build is using Python 3

On Sat, 8 Feb 2020 at 07:51, Markus Armbruster wrote: > Peter Maydell writes: > > It might be sphinx-build-3 on RH, but on Debian/Ubuntu it's > > just 'sphinx-build' assuming you installed the python3-sphinx > > and not the python2-sphinx, or you can run it directly out of > >

[PATCH v4 20/20] target/arm: Enable ARMv8.2-UAO in -cpu max

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu64.c | 4 1 file changed, 4 insertions(+) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 57fbc5eade..1359564c55 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -676,6 +676,10 @@ static

Re: [RFC] QEMU Gating CI

On Fri, 7 Feb 2020 at 20:39, Cleber Rosa wrote: > On Fri, Feb 07, 2020 at 04:42:10PM +, Peter Maydell wrote: > > This all sounds like the right thing and great progress. So yes, > > I agree that the next step would be to get to a point where you > > can give me some instructions on how to say

[PATCH v4 18/20] target/arm: Update MSR access to UAO

Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v2: Move reginfo to file scope; avoid setting uao from spsr when the feature is not enabled (pmm). v3: Update for aarch64_pstate_valid_mask --- target/arm/cpu.h | 6 ++ target/arm/internals.h | 3 +++

[PATCH v4 15/20] target/arm: Implement ATS1E1 system registers

This is a minor enhancement over ARMv8.1-PAN. The *_PAN mmu_idx are used with the existing do_ats_write. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v2: Move regdefs to file scope (pmm). --- target/arm/helper.c | 56 - 1 file

Re: [RFC PATCH 2/2] GitLab CI: crude mapping of PMM's scripts to jobs

On Fri, 7 Feb 2020 at 19:34, Cleber Rosa wrote: > Also, the build and make steps worked fine without `--disable-gnutls`. > I was trying to not carry over any "exception" type of arguments, > unless they proved to be necessary. Maybe Peter can give some more > info about this (should it be kept

[PATCH v4 12/20] target/arm: Update arm_mmu_idx_el for PAN

Examine the PAN bit for EL1, EL2, and Secure EL1 to determine if it applies. Reviewed-by: Alex Bennée Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 9 + 1 file changed, 9 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c

[PATCH v4 19/20] target/arm: Implement UAO semantics

We need only override the current condition under which TBFLAG_A64.UNPRIV is set. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper.c | 41 + 1 file changed, 21 insertions(+), 20 deletions(-) diff --git

[PATCH v4 16/20] target/arm: Enable ARMv8.2-ATS1E1 in -cpu max

This includes enablement of ARMv8.1-PAN. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.c | 4 target/arm/cpu64.c | 5 + 2 files changed, 9 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index b0762a76c4..de733aceeb 100644 ---

[PATCH v4 10/20] target/arm: Introduce aarch64_pstate_valid_mask

Use this along the exception return path, where we previously accepted any values. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/internals.h | 12 target/arm/helper-a64.c | 1 + 2 files changed, 13 insertions(+) diff --git a/target/arm/internals.h

[PATCH v4 14/20] target/arm: Set PAN bit as required on exception entry

The PAN bit is preserved, or set as per SCTLR_ELx.SPAN, plus several other conditions listed in the ARM ARM. Signed-off-by: Richard Henderson --- v2: Tidy preservation of CPSR_PAN in take_aarch32_exception (pmm). v4: Fix exception entry to EL3. --- target/arm/helper.c | 53

[PATCH v4 09/20] target/arm: Remove CPSR_RESERVED

The only remaining use was in op_helper.c. Use PSTATE_SS directly, and move the commentary so that it is more obvious what is going on. Signed-off-by: Richard Henderson --- target/arm/cpu.h | 6 -- target/arm/op_helper.c | 9 - 2 files changed, 8 insertions(+), 7 deletions(-)

[PATCH v4 08/20] target/arm: Use aarch32_cpsr_valid_mask in helper_exception_return

Using ~0 as the mask on the aarch64->aarch32 exception return was not even as correct as the CPSR_ERET_MASK that we had used on the aarch32->aarch32 exception return. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/helper-a64.c | 5 +++-- 1 file changed, 3

[PATCH v4 17/20] target/arm: Add ID_AA64MMFR2_EL1

Add definitions for all of the fields, up to ARMv8.5. Convert the existing RESERVED register to a full register. Query KVM for the value of the register for the host. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.h| 17 + target/arm/helper.c

[PATCH v4 13/20] target/arm: Enforce PAN semantics in get_S1prot

If we have a PAN-enforcing mmu_idx, set prot == 0 if user_rw != 0. Reviewed-by: Alex Bennée Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/internals.h | 13 + target/arm/helper.c| 3 +++ 2 files changed, 16 insertions(+) diff --git

[PATCH v4 04/20] target/arm: Move LOR regdefs to file scope

For static const regdefs, file scope is preferred. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/helper.c | 57 +++-- 1 file changed, 29 insertions(+), 28 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c

[PATCH v4 01/20] target/arm: Add arm_mmu_idx_is_stage1_of_2

Use a common predicate for querying stage1-ness. Reviewed-by: Alex Bennée Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- v2: Rename from arm_mmu_idx_is_stage1 to arm_mmu_idx_is_stage1_of_2 --- target/arm/internals.h | 18 ++ target/arm/helper.c|

[PATCH v4 11/20] target/arm: Update MSR access for PAN

For aarch64, there's a dedicated msr (imm, reg) insn. For aarch32, this is done via msr to cpsr. Writes from el0 are ignored, which is already handled by the CPSR_USER mask. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v2: Move regdef to file scope; merge patch for

[PATCH v4 07/20] target/arm: Replace CPSR_ERET_MASK with aarch32_cpsr_valid_mask

CPSR_ERET_MASK was a useless renaming of CPSR_RESERVED. The function also takes into account bits that the cpu does not support. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.h | 2 -- target/arm/op_helper.c | 5 - 2 files changed, 4 insertions(+), 3

[PATCH v4 05/20] target/arm: Split out aarch32_cpsr_valid_mask

Split this helper out of msr_mask in translate.c. At the same time, transform the negative reductive logic to positive accumulative logic. It will be usable along the exception paths. While touching msr_mask, fix up formatting. Signed-off-by: Richard Henderson --- v4: Keep CPSR_J

[PATCH v4 06/20] target/arm: Mask CPSR_J when Jazelle is not enabled

The J bit signals Jazelle mode, and so of course is RES0 when the feature is not enabled. Signed-off-by: Richard Henderson --- v4: Split out from aarch32_cpsr_valid_mask creation in previous patch. --- target/arm/internals.h | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git

[PATCH v4 03/20] target/arm: Add isar_feature tests for PAN + ATS1E1

Include definitions for all of the bits in ID_MMFR3. We already have a definition for ID_AA64MMFR1.PAN. Reviewed-by: Alex Bennée Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/cpu.h | 29 + 1 file changed, 29 insertions(+) diff --git

[PATCH v4 00/20] target/arm: Implement PAN, ATS1E1, UAO

Based-on: https://git.linaro.org/people/peter.maydell/qemu-arm.git/log/?h=target-arm.next Version 4 incorporates the feedback on v3. In particular: * Split out CPSR_J masking to its own patch. * Merge trivial braces formatting fixes into patch 5. * Drop "Tidy msr_mask" patch, leaving

[PATCH v4 02/20] target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled

To implement PAN, we will want to swap, for short periods of time, to a different privileged mmu_idx. In addition, we cannot do this with flushing alone, because the AT* instructions have both PAN and PAN-less versions. Add the ARMMMUIdx*_PAN constants where necessary next to the corresponding

Re: [PATCH v2 4/7] block/block-copy: refactor interfaces to use bytes instead of end

07.02.2020 21:01, Max Reitz wrote: On 27.11.19 19:08, Vladimir Sementsov-Ogievskiy wrote: We have a lot of "chunk_end - start" invocations, let's switch to bytes/cur_bytes scheme instead. Signed-off-by: Vladimir Sementsov-Ogievskiy --- include/block/block-copy.h | 4 +--

Re: [RFC PATCH 2/2] GitLab CI: crude mapping of PMM's scripts to jobs

On Fri, 7 Feb 2020 at 19:27, Cleber Rosa wrote: > > On Fri, Feb 07, 2020 at 04:26:53PM +, Peter Maydell wrote: > > If we have a CI setup where KVM reliably works then we should > > ideally test a --disable-tcg setup somehow. Right now my pullreq > > tests don't test that because I run them on

Re: [PATCH v2 1/7] block/block-copy: specialcase first copy_range request

07.02.2020 20:28, Max Reitz wrote: On 27.11.19 19:08, Vladimir Sementsov-Ogievskiy wrote: In block_copy_do_copy we fallback to read+write if copy_range failed. In this case copy_size is larger than defined for buffered IO, and there is corresponding commit. Still, backup copies data cluster by

Re: [PATCH v2 2/7] block/block-copy: use block_status

07.02.2020 20:46, Max Reitz wrote: On 27.11.19 19:08, Vladimir Sementsov-Ogievskiy wrote: Use bdrv_block_status_above to chose effective chunk size and to handle zeroes effectively. This substitutes checking for just being allocated or not, and drops old code path for it. Assistance by backup

[Bug 1823790] Re: QEMU mishandling of SO_PEERSEC forces systemd into tight loop

Well, it's kind of irrelevant but I am trying that on archlinux and this does not work for me. Using systemd-244.2-1 and qemu-user-static-4.2 that I built with Laurent's patch. May be I have done something wrong ? I still get that error that leads me here: Failed to enqueue loopback interface

[PATCH v15 9/9] virtio-iommu: Support migration

Add Migration support. We rely on recently added gtree and qlist migration. We only migrate the domain gtree. The endpoint gtree is re-constructed in a post-load operation. Signed-off-by: Eric Auger Acked-by: Peter Xu --- v11 -> v12: - do not migrate the endpoint gtree but reconstruct it from

[PATCH v15 8/9] hw/arm/virt: Add the virtio-iommu device tree mappings

Adds the "virtio,pci-iommu" node in the host bridge node and the RID mapping, excluding the IOMMU RID. This is done in the virtio-iommu-pci hotplug handler which gets called only if no firmware is loaded or if -no-acpi is passed on the command line. As non DT integration is not yet supported by

[PATCH v15 6/9] virtio-iommu: Implement fault reporting

The event queue allows to report asynchronous errors. The translate function now injects faults when relevant. Signed-off-by: Eric Auger Reviewed-by: Peter Xu --- v13 -> v14: - remove loop - add Peter's R-b v12 -> v13: - return on virtio_error() v11 -> v12: - reporting the addr associated

[PATCH v15 5/9] virtio-iommu: Implement translate

This patch implements the translate callback Signed-off-by: Eric Auger Reviewed-by: Jean-Philippe Brucker --- v11 -> v12: - Added Jean's R-b - s/qemu_log_mask/error_report_once v10 -> v11: - take into account the new value struct and use g_tree_lookup_extended - switched to

[PATCH v15 2/9] virtio-iommu: Decode the command payload

This patch adds the command payload decoding and introduces the functions that will do the actual command handling. Those functions are not yet implemented. Signed-off-by: Eric Auger Reviewed-by: Jean-Philippe Brucker Reviewed-by: Peter Xu --- v11 -> v12: - ADded Jean and Peter's R-b v10 ->

[PATCH v15 4/9] virtio-iommu: Implement map/unmap

This patch implements virtio_iommu_map/unmap. Signed-off-by: Eric Auger Reviewed-by: Peter Xu --- v11 -> v12: - check unmanaged managed flags on map - removed 2 qemu_log_mask in unmap() - fix leak v10 -> v11: - revisit the implementation of unmap according to Peter's suggestion - removed

[PATCH v15 7/9] virtio-iommu-pci: Add virtio iommu pci support

This patch adds virtio-iommu-pci, which is the pci proxy for the virtio-iommu device. Currently non DT integration is not yet supported by the kernel. So the machine must implement a hotplug handler for the virtio-iommu-pci device that creates the device tree iommu-map bindings as documented in

[PATCH v15 3/9] virtio-iommu: Implement attach/detach command

This patch implements the endpoint attach/detach to/from a domain. Domain and endpoint internal datatypes are introduced. Both are stored in RB trees. The domain owns a list of endpoints attached to it. Also helpers to get/put end points and domains are introduced. As for the IOMMU memory

[PATCH v15 1/9] virtio-iommu: Add skeleton

This patchs adds the skeleton for the virtio-iommu device. Signed-off-by: Eric Auger Reviewed-by: Peter Xu --- v13 -> v14: - use device_class_set_props - updated copyright's year v12 -> v13 - removed IOMMU_PCI_BUS_MAX and IOMMU_PCI_DEVFN_MAX v11 -> v12: - remove s_by_bus_num - drop

[PATCH v15 0/9] VIRTIO-IOMMU device

This series implements the QEMU virtio-iommu device. This matches the v0.12 spec (voted) and the corresponding virtio-iommu driver upstreamed in 5.3. All kernel dependencies are resolved for DT integration. The virtio-iommu can be instantiated in ARM virt using: "-device virtio-iommu-pci". Non

Re: [PATCH v14 03/11] virtio-iommu: Implement attach/detach command

Hi Peter, On 2/7/20 9:26 PM, Peter Xu wrote: > On Fri, Feb 07, 2020 at 10:31:55AM +0100, Eric Auger wrote: > > [...] > >> v13 -> v14: >> - in virtio_iommu_put_endpoint, if the EP is attached to a >> domain, call virtio_iommu_detach_endpoint_from_domain() >> - remove domain ref counting and

Re: [PATCH] ppc: function to setup latest class options

On Fri, Feb 07, 2020 at 01:46:37AM -0500, Michael S. Tsirkin wrote: > We are going to add more init for the latest machine, so move the setup > to a function so we don't have to change the DEFINE_SPAPR_MACHINE macro > each time. > > Signed-off-by: Michael S. Tsirkin Applied to ppc-for-5.0. >

Re: [PATCH] ui/gtk: Get display refresh rate with GDK version 3.22 or later

On 16.01.20 02:12, Philippe Mathieu-Daudé wrote: > The GdkMonitor was introduced in GTK+ 3.22: > https://developer.gnome.org/gdk3/stable/api-index-3-22.html#api-index-3.22 > > If we build with older GTK+, the build fails: > > CC ui/gtk.o >qemu/ui/gtk.c: In function ‘gd_vc_gfx_init’:

[PULL 5/6] tests/virtio-9p: added readdir test

From: Christian Schoenebeck The first readdir test simply checks the amount of directory entries returned by 9pfs server, according to the created amount of virtual files on 9pfs synth driver side. Then the subsequent readdir test also checks whether all directory entries have the expected file

[PULL 6/6] MAINTAINERS: 9pfs: Add myself as reviewer

From: Christian Schoenebeck Currently 9pfs is only taken care of by Greg. Since I am actively working on 9pfs and already became quite used to the code base, it makes sense to volunteer as reviewer for 9pfs related patches. Signed-off-by: Christian Schoenebeck Cc: Greg Kurz Message-Id:

[PULL 4/6] hw/9pfs/9p-synth: added directory for readdir test

From: Christian Schoenebeck This will provide the following virtual files by the 9pfs synth driver: - /ReadDirDir/ReadDirFile99 - /ReadDirDir/ReadDirFile98 ... - /ReadDirDir/ReadDirFile1 - /ReadDirDir/ReadDirFile0 This virtual directory and its virtual 100 files will be used by the

[PULL 0/6] 9p patches 2020-02-08

The following changes since commit 42ccca1bd9456568f996d5646b2001faac96944b: Merge remote-tracking branch 'remotes/berrange/tags/misc-fixes-pull-request' into staging (2020-02-07 15:01:23 +) are available in the Git repository at: https://github.com/gkurz/qemu.git

[PULL 2/6] 9pfs: require msize >= 4096

From: Christian Schoenebeck A client establishes a session by sending a Tversion request along with a 'msize' parameter which client uses to suggest server a maximum message size ever to be used for communication (for both requests and replies) between client and server during that session. If

[PULL 3/6] 9pfs: validate count sent by client with T_readdir

From: Christian Schoenebeck A good 9p client sends T_readdir with "count" parameter that's sufficiently smaller than client's initially negotiated msize (maximum message size). We perform a check for that though to avoid the server to be interrupted with a "Failed to encode VirtFS reply type 41"

[PULL 1/6] tests/virtio-9p: add terminating null in v9fs_string_read()

From: Christian Schoenebeck The 9p protocol sends strings in general without null termination over the wire. However for future use of this functions it is beneficial for the delivered string to be null terminated though for being able to use the string with standard C functions which often rely

Re: ping Re: [PATCH for-5.0 v2 0/3] benchmark util

pingg.. Hi! Could it be merged at all? 20.01.2020 12:10, Vladimir Sementsov-Ogievskiy wrote: ping 26.11.2019 18:48, Vladimir Sementsov-Ogievskiy wrote: Hi all! Here is simple benchmarking utility, to generate performance comparison tables, like the following: --  - 

Re: [PATCH v2 for-5.0 0/7] block-copy improvements: part I

07.02.2020 21:05, Max Reitz wrote: On 20.01.20 10:09, Vladimir Sementsov-Ogievskiy wrote: ping Sorry, I only got to patch 5 so far (without major complaints). I’ll have to pack things up for the weekend now and I’ll be on PTO next week, so I won’t get to review the final two patches before

Re: [PATCH v3 14/20] target/arm: Set PAN bit as required on exception entry

On 2/8/20 8:45 AM, Richard Henderson wrote: > On 2/7/20 6:01 PM, Peter Maydell wrote: >>> +/* CPSR.PAN is preserved unless target is EL1 and SCTLR.SPAN == 0. >>> */ >>> +if (cpu_isar_feature(aa64_pan, env_archcpu(env)) >>> +&& new_el == 1 >>> +&&

Re: [PATCH v4 3/3] vl: Abort if multiple machines are registered as default

On Fri, Feb 07, 2020 at 05:19:48PM +0100, Philippe Mathieu-Daudé wrote: > It would be confusing to have multiple default machines. > Abort if this ever occurs. > > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: David Gibson > --- > v2: Use assert() instead of human friendly message

Re: [PATCH v4 2/3] hw: Make MachineClass::is_default a boolean type

On Fri, Feb 07, 2020 at 05:19:47PM +0100, Philippe Mathieu-Daudé wrote: > There's no good reason for it to be type int, change it to bool. > > Suggested-by: Richard Henderson > Reviewed-by: Michael S. Tsirkin > Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: David Gibson and ppc parts

Re: [PATCH v4 1/3] hw: Do not initialize MachineClass::is_default to 0

On Fri, Feb 07, 2020 at 05:19:46PM +0100, Philippe Mathieu-Daudé wrote: > The MachineClass is already zeroed on creation. > > Note: The code setting is_default=0 in hw/i386/pc_piix.c is > different (related to compat options). When adding a > new versioned machine, we want it to be

Re: [PATCH v3 14/20] target/arm: Set PAN bit as required on exception entry

On 2/7/20 6:01 PM, Peter Maydell wrote: >> +/* CPSR.PAN is preserved unless target is EL1 and SCTLR.SPAN == 0. >> */ >> +if (cpu_isar_feature(aa64_pan, env_archcpu(env)) >> +&& new_el == 1 >> +&& !(env->cp15.sctlr_el[1] & SCTLR_SPAN)) { >> +

Re: [PATCH] MAINTAINERS: 9pfs: Add myself as reviewer

On Fri, 7 Feb 2020 14:32:43 +0100 Christian Schoenebeck wrote: > Currently 9pfs is only taken care of by Greg. Since I am actively working > on 9pfs and already became quite used to the code base, it makes sense to > volunteer as reviewer for 9pfs related patches. > > Signed-off-by: Christian

Re: [PATCH v3 09/20] target/arm: Tidy msr_mask

On 2/7/20 5:40 PM, Peter Maydell wrote: > On Mon, 3 Feb 2020 at 14:47, Richard Henderson > wrote: >> >> The CPSR_USER mask for IS_USER already avoids all of the RES0 >> bits as per aarch32_cpsr_valid_mask. Fix up the formatting. > > CPSR_USER includes CPSR_Q and CPSR_GE, which might be RES0 >

Re: [PATCH v3 08/20] target/arm: Remove CPSR_RESERVED

On 2/7/20 5:36 PM, Peter Maydell wrote: >> -return cpsr_read(env) & ~(CPSR_EXEC | CPSR_RESERVED); >> +/* >> + * We store the ARMv8 PSTATE.SS bit in env->uncached_cpsr. >> + * This is convenient for populating SPSR_ELx, but must be >> + * hidden from aarch32 mode, where it is