RE: [EXT] Re: [PATCH v9 1/9] hw/vfio/common: Remove error print on mmio region translation by viommu

Hi Alex, Eric, > -Original Message- > From: Alex Williamson > Sent: Thursday, March 26, 2020 11:23 PM > To: Auger Eric > Cc: Bharat Bhushan ; peter.mayd...@linaro.org; > pet...@redhat.com; eric.auger@gmail.com; kevin.t...@intel.com; > m...@redhat.com; Tomasz Nowicki [C] ; >

RE: [EXT] Re: [PATCH v9 8/9] virtio-iommu: Implement probe request

Hi Eric, > -Original Message- > From: Auger Eric > Sent: Thursday, March 26, 2020 9:18 PM > To: Bharat Bhushan ; peter.mayd...@linaro.org; > pet...@redhat.com; eric.auger@gmail.com; alex.william...@redhat.com; > kevin.t...@intel.com; m...@redhat.com; Tomasz Nowicki [C] > ;

RE: [EXT] Re: [PATCH v9 2/9] memory: Add interface to set iommu page size mask

Hi Eric, > -Original Message- > From: Auger Eric > Sent: Thursday, March 26, 2020 9:36 PM > To: Bharat Bhushan ; peter.mayd...@linaro.org; > pet...@redhat.com; eric.auger@gmail.com; alex.william...@redhat.com; > kevin.t...@intel.com; m...@redhat.com; Tomasz Nowicki [C] > ;

Re: [PATCH v16 Kernel 4/7] vfio iommu: Implementation of ioctl for dirty pages tracking.

Hit send button little early. > > I checked v12, it's not like what I said. > In v12, bitmaps are generated per vfio_dma, and combination of the > bitmaps are required in order to generate a big bitmap suiting for dirty > query. It can cause problem when offset not aligning. > But what I propose

Re: [PATCH v8 00/74] per-CPU locks

(Apologies if I missed some Cc's; I was not Cc'ed in patch 0 so I'm blindly crafting a reply.) On Thu, Mar 26, 2020 at 15:30:43 -0400, Robert Foley wrote: > This is a continuation of the series created by Emilio Cota. > We are picking up this patch set with the goal to apply > any fixes or

RE: [EXT] Re: [PATCH v9 4/9] virtio-iommu: set supported page size mask

Hi Eric, > -Original Message- > From: Auger Eric > Sent: Thursday, March 26, 2020 9:22 PM > To: Bharat Bhushan ; peter.mayd...@linaro.org; > pet...@redhat.com; eric.auger@gmail.com; alex.william...@redhat.com; > kevin.t...@intel.com; m...@redhat.com; Tomasz Nowicki [C] > ;

Re: [PATCH v16 Kernel 4/7] vfio iommu: Implementation of ioctl for dirty pages tracking.

On 3/27/2020 6:00 AM, Yan Zhao wrote: On Fri, Mar 27, 2020 at 05:39:01AM +0800, Kirti Wankhede wrote: On 3/25/2020 7:41 AM, Yan Zhao wrote: On Wed, Mar 25, 2020 at 05:18:52AM +0800, Kirti Wankhede wrote: VFIO_IOMMU_DIRTY_PAGES ioctl performs three operations: - Start dirty pages tracking

Re: [PATCH v16 Kernel 5/7] vfio iommu: Update UNMAP_DMA ioctl to get dirty bitmap before unmap

On 3/27/2020 5:34 AM, Yan Zhao wrote: On Fri, Mar 27, 2020 at 05:39:44AM +0800, Kirti Wankhede wrote: On 3/25/2020 7:48 AM, Yan Zhao wrote: On Wed, Mar 25, 2020 at 03:32:37AM +0800, Kirti Wankhede wrote: DMA mapped pages, including those pinned by mdev vendor drivers, might get unpinned

[PATCH v2 1/2] virtio-blk: delete vqs on the error path in realize()

virtio_vqs forgot to free on the error path in realize(). Fix that. The asan stack: Direct leak of 14336 byte(s) in 1 object(s) allocated from: #0 0x7f58b93fd970 in __interceptor_calloc (/lib64/libasan.so.5+0xef970) #1 0x7f58b858249d in g_malloc0 (/lib64/libglib-2.0.so.0+0x5249d) #2

[PATCH v2 0/2] fix two virtio queues memleak

This series fix two vqs leak: 1. Do delete vqs on the error path in virtio_blk_device_realize(). 2. Do delete vqs in virtio_iommu_device_unrealize() to fix another leaks. v2->v1: - Fix incorrect free in v1, it will cause a uaf. Pan Nengyuan (2): virtio-blk: delete vqs on the error path in

[PATCH v2 2/2] virtio-iommu: delete vqs in unrealize to fix memleak

req_vq/event_vq forgot to free in unrealize. Fix that. Signed-off-by: Pan Nengyuan --- Cc: Eric Auger --- hw/virtio/virtio-iommu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index 4cee8083bc..9d2ff0693c 100644 ---

Re: [PATCH 0/2] fix two virtio queues memleak

Patchew URL: https://patchew.org/QEMU/20200327035650.2085-1-pannengy...@huawei.com/ Hi, This series failed the asan build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN === #!/bin/bash

Re: [PATCH 0/2] fix two virtio queues memleak

Patchew URL: https://patchew.org/QEMU/20200327035650.2085-1-pannengy...@huawei.com/ Hi, This series failed the docker-quick@centos7 build test. Please find the testing commands and their output below. If you have Docker installed, you can probably reproduce it locally. === TEST SCRIPT BEGIN

[Bug 1868527] Re: alignment may overlap the TLB flags

** Changed in: qemu Status: Incomplete => Invalid -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1868527 Title: alignment may overlap the TLB flags Status in QEMU: Invalid Bug

Re: [PATCH v6 1/2] net: tulip: check frame size and r/w data length

Jason Wang 于2020年3月27日周五 上午10:53写道： > > On 2020/3/27 上午10:35, Li Qiang wrote: > > > > > > Jason Wang mailto:jasow...@redhat.com>> > > 于2020年3月27日周五 上午10:09写道： > > > > > > On 2020/3/24 下午10:54, Li Qiang wrote: > > > > > > > > > Jason Wang mailto:jasow...@redhat.com> > >

[PATCH 1/2] virtio-blk: delete vqs on the error path in realize()

virtio_vqs forgot to free on the error path in realize(). Fix that. The asan stack: Direct leak of 14336 byte(s) in 1 object(s) allocated from: #0 0x7f58b93fd970 in __interceptor_calloc (/lib64/libasan.so.5+0xef970) #1 0x7f58b858249d in g_malloc0 (/lib64/libglib-2.0.so.0+0x5249d) #2

[PATCH 2/2] virtio-iommu: delete vqs in unrealize to fix memleaks

req_vq/event_vq forgot to free in unrealize(). Fix that. Signed-off-by: Pan Nengyuan --- Cc: Eric Auger --- hw/virtio/virtio-iommu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index 4cee8083bc..9d2ff0693c 100644 ---

[PATCH 0/2] fix two virtio queues memleak

This series fix two vqs leak: 1. Do delete vqs on the error path in virtio_blk_device_realize(). 2. Do delete vqs in virtio_iommu_device_unrealize() to fix another leaks. Pan Nengyuan (2): virtio-blk: delete vqs on the error path in realize() virtio-iommu: delete vqs in unrealize to fix

[PULL SUBSYSTEM qemu-pseries] pseries: Update SLOF firmware image

The following changes since commit 736cf607e40674776d752acc201f565723e86045: Update version for v5.0.0-rc0 release (2020-03-24 17:50:00 +) are available in the Git repository at: g...@github.com:aik/qemu.git tags/qemu-slof-20200327 for you to fetch changes up to

Re: [PATCH v6 1/2] net: tulip: check frame size and r/w data length

On 2020/3/27 上午10:35, Li Qiang wrote: Jason Wang mailto:jasow...@redhat.com>> 于2020年3月27日周五 上午10:09写道： On 2020/3/24 下午10:54, Li Qiang wrote: > > > Jason Wang mailto:jasow...@redhat.com> >> > 于2020年3月24日周二

Re: [PATCH v6 1/2] net: tulip: check frame size and r/w data length

Jason Wang 于2020年3月27日周五 上午10:09写道： > > On 2020/3/24 下午10:54, Li Qiang wrote: > > > > > > Jason Wang mailto:jasow...@redhat.com>> > > 于2020年3月24日周二 下午1:45写道： > > > > > > On 2020/3/24 上午9:29, Li Qiang wrote: > > > > > > > > > P J P mailto:ppan...@redhat.com> > >

[PATCH] hw/vfio: let readonly flag take effect for mmaped regions

From: Yan Zhao currently, vfio regions without VFIO_REGION_INFO_FLAG_WRITE are only read-only when VFIO_REGION_INFO_FLAG_MMAP is not set. regions with flag VFIO_REGION_INFO_FLAG_READ | VFIO_REGION_INFO_FLAG_MMAP are only read-only in host page table for qemu. This patch sets corresponding ept

Re: [PATCH v6 0/7] reference implementation of RSS and hash report

On 2020/3/26 下午9:32, Michael S. Tsirkin wrote: On Fri, Mar 20, 2020 at 01:57:44PM +0200, Yuri Benditovich wrote: Support for VIRTIO_NET_F_RSS and VIRTIO_NET_F_HASH_REPORT features in QEMU for reference purpose. Implements Toeplitz hash calculation for incoming packets according to

Re: [PATCH] hw/net/i82596.c: Avoid reading off end of buffer in i82596_receive()

On 2020/3/27 上午5:11, Peter Maydell wrote: On Tue, 17 Mar 2020 at 06:13, Jason Wang wrote: On 2020/3/13 上午4:16, Peter Maydell wrote: The i82596_receive() function attempts to pass the guest a buffer which is effectively the concatenation of the data it is passed and a 4 byte CRC value.

Re: [PATCH v6 1/2] net: tulip: check frame size and r/w data length

On 2020/3/24 下午10:54, Li Qiang wrote: Jason Wang mailto:jasow...@redhat.com>> 于2020年3月24日周二 下午1:45写道： On 2020/3/24 上午9:29, Li Qiang wrote: > > > P J P mailto:ppan...@redhat.com> >> 于2020年3月23日周一 > 下午8:24写道：

Re: [PATCH] hw/net/allwinner-sun8i-emac.c: Fix REG_ADDR_HIGH/LOW reads

On 2020/3/25 上午5:21, Peter Maydell wrote: Coverity points out (CID 1421926) that the read code for REG_ADDR_HIGH reads off the end of the buffer, because it does a 32-bit read from byte 4 of a 6-byte buffer. The code also has an endianness issue for both REG_ADDR_HIGH and REG_ADDR_LOW,

Re: [PATCH v7] net: tulip: check frame size and r/w data length

On 2020/3/26 下午7:11, Li Qiang wrote: P J P mailto:ppan...@redhat.com>> 于2020年3月25日周三 上午1:31写道： From: Prasad J Pandit mailto:p...@fedoraproject.org>> Tulip network driver while copying tx/rx buffers does not check frame size against r/w data length. This may lead to OOB buffer

RE: [PATCH v1 12/22] intel_iommu: add PASID cache management infrastructure

> From: Peter Xu > Sent: Thursday, March 26, 2020 11:54 PM > To: Liu, Yi L > Subject: Re: [PATCH v1 12/22] intel_iommu: add PASID cache management > infrastructure > > On Thu, Mar 26, 2020 at 01:57:10PM +, Liu, Yi L wrote: > > > From: Liu, Yi L > > > Sent: Thursday, March 26, 2020 2:15 PM >

Re: [RFC for-5.1 4/4] spapr: Don't allow unplug of NVLink2 devices

On Thu, Mar 26, 2020 at 01:27:40PM +0100, Greg Kurz wrote: > On Thu, 26 Mar 2020 16:40:09 +1100 > David Gibson wrote: > > > Currently, we can't properly handle unplug of NVLink2 devices, because we > > don't have code to tear down their special memory resources. There's not > > a lot of impetus

Re: [RFC for-5.1 3/4] spapr: Fix failure path for attempting to hot unplug PCI bridges

On Thu, Mar 26, 2020 at 01:18:24PM +0100, Greg Kurz wrote: > On Thu, 26 Mar 2020 16:40:08 +1100 > David Gibson wrote: > > > For various technical reasons we can't currently allow unplug a PCI to PCI > > bridge on the pseries machine. spapr_pci_unplug_request() correctly > > generates an error

Re: [RFC for-5.1 1/4] spapr: Refactor locating NVLink2 devices for device tree creation

On Thu, Mar 26, 2020 at 12:57:38PM +0100, Greg Kurz wrote: 65;5803;1c> On Thu, 26 Mar 2020 16:40:06 +1100 > David Gibson wrote: > > > Currently spapr_phb_nvgpu_populate_pcidev_dt() works a little cryptically. > > It steps through all the NVLink2 GPUs and NPUs and if they match the device > >

Re: [PATCH v16 Kernel 4/7] vfio iommu: Implementation of ioctl for dirty pages tracking.

On Fri, Mar 27, 2020 at 05:39:01AM +0800, Kirti Wankhede wrote: > > > On 3/25/2020 7:41 AM, Yan Zhao wrote: > > On Wed, Mar 25, 2020 at 05:18:52AM +0800, Kirti Wankhede wrote: > >> VFIO_IOMMU_DIRTY_PAGES ioctl performs three operations: > >> - Start dirty pages tracking while migration is active

Re: [PATCH v16 Kernel 5/7] vfio iommu: Update UNMAP_DMA ioctl to get dirty bitmap before unmap

On Fri, Mar 27, 2020 at 05:39:44AM +0800, Kirti Wankhede wrote: > > > On 3/25/2020 7:48 AM, Yan Zhao wrote: > > On Wed, Mar 25, 2020 at 03:32:37AM +0800, Kirti Wankhede wrote: > >> DMA mapped pages, including those pinned by mdev vendor drivers, might > >> get unpinned and unmapped while

Re: [PATCH for 5.0 v1 0/2] RISC-V: Fix Hypervisor guest user space

On Thu, 26 Mar 2020 15:44:04 PDT (-0700), Alistair Francis wrote: This series fixes two bugs in the RISC-V two stage lookup implementation. This fixes the Hypervisor userspace failing to start. Alistair Francis (2): riscv: Don't use stage-2 PTE lookup protection flags riscv: AND stage-1 and

Re: [PATCH] i386/cpu: Expand MAX_FIXED_COUNTERS from 3 to 4 to for Icelake

On 2020/3/27 2:48, Paolo Bonzini wrote: On 17/03/20 06:54, Like Xu wrote: In the Intel SDM, "Table 18-2. Association of Fixed-Function Performance Counters with Architectural Performance Events", we may have a new fixed counter 'TOPDOWN.SLOTS' (since Icelake), which counts the number of

Re: [PATCH for 5.0 v1 2/2] riscv: AND stage-1 and stage-2 protection flags

On Thu, Mar 26, 2020 at 4:32 PM Richard Henderson wrote: > > On 3/26/20 3:44 PM, Alistair Francis wrote: > > Take the result of stage-1 and stage-2 page table walks and AND the two > > protection flags together. This way we require both to set permissions > > instead of just stage-2. > > > >

Re: [PATCH for 5.0 v1 1/2] riscv: Don't use stage-2 PTE lookup protection flags

On 3/26/20 3:44 PM, Alistair Francis wrote: > When doing the fist of a two stage lookup (Hypervisor extensions) don't > set the current protection flags from the second stage lookup of the > base address PTE. > > Signed-off-by: Alistair Francis > --- > target/riscv/cpu_helper.c | 3 ++- > 1

Re: [PATCH for 5.0 v1 2/2] riscv: AND stage-1 and stage-2 protection flags

On 3/26/20 3:44 PM, Alistair Francis wrote: > Take the result of stage-1 and stage-2 page table walks and AND the two > protection flags together. This way we require both to set permissions > instead of just stage-2. > > Signed-off-by: Alistair Francis > --- > target/riscv/cpu_helper.c | 8

[PATCH 29/31] target/arm: Vectorize SABD/UABD

Include 64-bit element size in preparation for SVE. Signed-off-by: Richard Henderson --- target/arm/helper.h| 10 +++ target/arm/translate.h | 5 ++ target/arm/translate-a64.c | 8 ++- target/arm/translate.c | 133 -

[PATCH 30/31] target/arm: Vectorize SABA/UABA

Include 64-bit element size in preparation for SVE. Signed-off-by: Richard Henderson --- target/arm/helper.h| 17 +++-- target/arm/translate.h | 5 ++ target/arm/neon_helper.c | 10 --- target/arm/translate-a64.c | 17 ++--- target/arm/translate.c | 134

[PATCH 18/31] target/arm: Implement SVE2 bitwise exclusive-or interleaved

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 5 + target/arm/sve.decode | 5 + target/arm/sve_helper.c| 20 target/arm/translate-sve.c | 19 +++ 4 files changed, 49 insertions(+) diff --git a/target/arm/helper-sve.h

[PATCH 25/31] target/arm: Implement SVE2 bitwise shift right and accumulate

Signed-off-by: Richard Henderson --- target/arm/sve.decode | 8 target/arm/translate-sve.c | 34 ++ 2 files changed, 42 insertions(+) diff --git a/target/arm/sve.decode b/target/arm/sve.decode index 5d46e3ab45..756f939df1 100644 ---

[PATCH 26/31] target/arm: Create arm_gen_gvec_{sri,sli}

The functions eliminate duplication of the special cases for this operation. They match up with the GVecGen2iFn typedef. Add out-of-line helpers. We got away with only having inline expanders because the neon vector size is only 16 bytes, and we know that the inline expansion will always

[PATCH 31/31] target/arm: Implement SVE2 integer absolute difference and accumulate

Signed-off-by: Richard Henderson --- target/arm/sve.decode | 6 ++ target/arm/translate-sve.c | 25 + 2 files changed, 31 insertions(+) diff --git a/target/arm/sve.decode b/target/arm/sve.decode index 9bf66e8ad4..6d565912e3 100644 --- a/target/arm/sve.decode

[PATCH 16/31] target/arm: Tidy SVE tszimm shift formats

Rather than require the user to fill in the immediate (shl or shr), create full formats that include the immediate. Signed-off-by: Richard Henderson --- target/arm/sve.decode | 35 --- 1 file changed, 16 insertions(+), 19 deletions(-) diff --git

[PATCH 21/31] target/arm: Implement SVE2 integer absolute difference and accumulate long

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 14 ++ target/arm/sve.decode | 12 + target/arm/sve_helper.c| 24 + target/arm/translate-sve.c | 54 ++ 4 files changed, 104 insertions(+) diff --git

[PATCH 27/31] target/arm: Tidy handle_vec_simd_shri

Now that we've converted all cases to gvec, there is quite a bit of dead code at the end of the function. Remove it. Sink the call to gen_gvec_fn2i to the end, loading a function pointer within the switch statement. Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 56

[PATCH 28/31] target/arm: Implement SVE2 bitwise shift and insert

Signed-off-by: Richard Henderson --- target/arm/sve.decode | 5 + target/arm/translate-sve.c | 10 ++ 2 files changed, 15 insertions(+) diff --git a/target/arm/sve.decode b/target/arm/sve.decode index 756f939df1..9bf66e8ad4 100644 --- a/target/arm/sve.decode +++

[PATCH 15/31] target/arm: Implement PMULLB and PMULLT

Signed-off-by: Richard Henderson --- target/arm/cpu.h | 10 ++ target/arm/helper-sve.h| 1 + target/arm/sve.decode | 2 ++ target/arm/translate-sve.c | 22 ++ target/arm/vec_helper.c| 26 ++ 5 files changed, 61

[PATCH 20/31] target/arm: Implement SVE2 complex integer add

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 10 + target/arm/sve.decode | 9 target/arm/sve_helper.c| 42 ++ target/arm/translate-sve.c | 31 4 files changed, 92 insertions(+) diff

[PATCH 23/31] target/arm: Create arm_gen_gvec_[us]sra

The functions eliminate duplication of the special cases for this operation. They match up with the GVecGen2iFn typedef. Add out-of-line helpers. We got away with only having inline expanders because the neon vector size is only 16 bytes, and we know that the inline expansion will always

[PATCH 24/31] target/arm: Create arm_gen_gvec_{u,s}{rshr,rsra}

Create vectorized versions of handle_shri_with_rndacc for shift+round and shift+round+accumulate. Add out-of-line helpers in preparation for longer vector lengths from SVE. Signed-off-by: Richard Henderson --- target/arm/helper.h| 20 ++ target/arm/translate-a64.h | 9 +

[PATCH 19/31] target/arm: Implement SVE2 bitwise permute

Signed-off-by: Richard Henderson --- target/arm/cpu.h | 5 +++ target/arm/helper-sve.h| 15 target/arm/sve.decode | 6 target/arm/sve_helper.c| 73 ++ target/arm/translate-sve.c | 36 +++ 5 files changed,

[PATCH 14/31] target/arm: Implement SVE2 integer multiply long

Exclude PMULL from this category for the moment. Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 15 +++ target/arm/sve.decode | 9 + target/arm/sve_helper.c| 31 +++ target/arm/translate-sve.c | 9 + 4 files

[PATCH 10/31] target/arm: Implement SVE2 saturating add/subtract (predicated)

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 54 +++ target/arm/sve.decode | 11 +++ target/arm/sve_helper.c| 182 + target/arm/translate-sve.c | 7 ++ 4 files changed, 198 insertions(+), 56 deletions(-) diff --git

[PATCH 09/31] target/arm: Implement SVE2 integer pairwise arithmetic

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 45 + target/arm/sve.decode | 8 + target/arm/sve_helper.c| 67 ++ target/arm/translate-sve.c | 6 4 files changed, 126 insertions(+) diff --git

[PATCH 22/31] target/arm: Implement SVE2 integer add/subtract long with carry

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 3 +++ target/arm/sve.decode | 6 ++ target/arm/sve_helper.c| 33 + target/arm/translate-sve.c | 23 +++ 4 files changed, 65 insertions(+) diff --git

[PATCH 13/31] target/arm: Implement SVE2 integer add/subtract wide

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 16 target/arm/sve.decode | 12 target/arm/sve_helper.c| 30 ++ target/arm/translate-sve.c | 20 4 files changed, 78 insertions(+) diff --git

[PATCH 06/31] target/arm: Split out saturating/rounding shifts from neon

Split these operations out into a header that can be shared between neon and sve. The "sat" pointer acts both as a boolean for control of saturating behavior and controls the difference in behavior between neon and sve -- QC bit or no QC bit. Implement right-shift rounding as tmp = src >>

[PATCH 17/31] target/arm: Implement SVE2 bitwise shift left long

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 8 +++ target/arm/sve.decode | 8 +++ target/arm/sve_helper.c| 34 ++ target/arm/translate-sve.c | 49 ++ 4 files changed, 99 insertions(+) diff --git

[PATCH 08/31] target/arm: Implement SVE2 integer halving add/subtract (predicated)

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 54 ++ target/arm/sve.decode | 11 target/arm/sve_helper.c| 39 +++ target/arm/translate-sve.c | 8 ++ 4 files changed, 112 insertions(+) diff

[PATCH 05/31] target/arm: Implement SVE2 integer unary operations (predicated)

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 13 +++ target/arm/sve.decode | 7 ++ target/arm/sve_helper.c| 25 target/arm/translate-sve.c | 47 ++ 4 files changed, 88 insertions(+), 4

[PATCH 07/31] target/arm: Implement SVE2 saturating/rounding bitwise shift left (predicated)

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 54 ++ target/arm/sve.decode | 17 + target/arm/sve_helper.c| 78 ++ target/arm/translate-sve.c | 18 + 4 files changed, 167 insertions(+) diff

[PATCH 12/31] target/arm: Implement SVE2 integer add/subtract interleaved long

Signed-off-by: Richard Henderson --- target/arm/sve.decode | 7 +++ target/arm/translate-sve.c | 3 +++ 2 files changed, 10 insertions(+) diff --git a/target/arm/sve.decode b/target/arm/sve.decode index a239fd3479..8d5f31bcc4 100644 --- a/target/arm/sve.decode +++

[PATCH 04/31] target/arm: Remove fp_status from helper_{recpe, rsqrte}_u32

These operations do not touch fp_status. Signed-off-by: Richard Henderson --- target/arm/helper.h| 4 ++-- target/arm/translate-a64.c | 5 ++--- target/arm/translate.c | 12 ++-- target/arm/vfp_helper.c| 4 ++-- 4 files changed, 8 insertions(+), 17 deletions(-) diff

[PATCH 03/31] target/arm: Implement SVE2 integer pairwise add and accumulate long

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 14 target/arm/sve.decode | 5 + target/arm/sve_helper.c| 44 ++ target/arm/translate-sve.c | 39 + 4 files changed, 102 insertions(+)

[PATCH 11/31] target/arm: Implement SVE2 integer add/subtract long

Signed-off-by: Richard Henderson --- target/arm/helper-sve.h| 24 target/arm/sve.decode | 19 target/arm/sve_helper.c| 43 +++ target/arm/translate-sve.c | 46 ++ 4 files

[PATCH for-5.1 00/31] target/arm: SVE2, part 1

Posting this for early review. It's based on some other patch sets that I have posted recently that also touch SVE, listed below. But it might just be easier to clone the devel tree [2]. While the branch itself will rebase frequently for development, I've also created a tag, post-sve2-20200326

[PATCH 01/31] target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2

Will be used for SVE2 isa subset enablement. Signed-off-by: Richard Henderson --- target/arm/cpu.h| 16 target/arm/helper.c | 3 +-- target/arm/kvm64.c | 2 ++ 3 files changed, 19 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index

[PATCH 02/31] target/arm: Implement SVE2 Integer Multiply - Unpredicated

For MUL, we can rely on generic support. For SMULH and UMULH, create some trivial helpers. For PMUL, back in a21bb78e5817, we organized helper_gvec_pmul_b in preparation for this use. Signed-off-by: Richard Henderson --- target/arm/helper.h| 10 target/arm/sve.decode | 9

Re: [PATCH 0/3] target/mips: Add loongson gs464 core

12:05 Sre, 25.03.2020. Jiaxun Yang је написао/ла: > > Loongson gs464 core can be found in Loongson-3A1000 processor. > This patchset add minimal support for that core. > There are still some instructions missing, I'm going to work on > them later. > > The corresponding hw board is also missing.

Re: [PATCH v8 00/74] per-CPU locks

21:37 Čet, 26.03.2020. Robert Foley је написао/ла: > > V7: https://lists.gnu.org/archive/html/qemu-devel/2019-03/msg00786.html > > This is a continuation of the series created by Emilio Cota. > We are picking up this patch set with the goal to apply > any fixes or updates needed to get this

[PATCH for 5.0 v1 2/2] riscv: AND stage-1 and stage-2 protection flags

Take the result of stage-1 and stage-2 page table walks and AND the two protection flags together. This way we require both to set permissions instead of just stage-2. Signed-off-by: Alistair Francis --- target/riscv/cpu_helper.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-)

[PATCH for 5.0 v1 0/2] RISC-V: Fix Hypervisor guest user space

This series fixes two bugs in the RISC-V two stage lookup implementation. This fixes the Hypervisor userspace failing to start. Alistair Francis (2): riscv: Don't use stage-2 PTE lookup protection flags riscv: AND stage-1 and stage-2 protection flags target/riscv/cpu_helper.c | 11

[PATCH for 5.0 v1 1/2] riscv: Don't use stage-2 PTE lookup protection flags

When doing the fist of a two stage lookup (Hypervisor extensions) don't set the current protection flags from the second stage lookup of the base address PTE. Signed-off-by: Alistair Francis --- target/riscv/cpu_helper.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git

Re: [PATCH-for-5.0 08/12] hw/mips/boston: Add missing error-propagation code

21:18 Sre, 25.03.2020. Philippe Mathieu-Daudé је написао/ла: > > Running the coccinelle script produced: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments

Re: [PATCH-for-5.0 09/12] hw/mips/mips_malta: Add missing error-propagation code

21:19 Sre, 25.03.2020. Philippe Mathieu-Daudé је написао/ла: > > Running the coccinelle script produced: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments

Re: [PATCH-for-5.0 07/12] hw/mips/cps: Add missing error-propagation code

21:18 Sre, 25.03.2020. Philippe Mathieu-Daudé је написао/ла: > > Patch created mechanically by running: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments

[PATCH v5 3/6] 9pfs: make v9fs_readdir_response_size() public

Rename function v9fs_readdir_data_size() -> v9fs_readdir_response_size() and make it callable from other units. So far this function is only used by 9p.c, however subsequent patch requires the function to be callable from another 9pfs unit. And as we're at it; also make it clear for what this

[PATCH v5 5/6] 9pfs: T_readdir latency optimization

Make top half really top half and bottom half really bottom half: Each T_readdir request handling is hopping between threads (main I/O thread and background I/O driver threads) several times for every individual directory entry, which sums up to huge latencies for handling just a single T_readdir

[PATCH v5 0/6] 9pfs: readdir optimization

As previously mentioned, I was investigating performance issues with 9pfs. Raw file read/write of 9pfs is actually quite good, provided that client picked a reasonable high msize (maximum message size). I would recommend to log a warning on 9p server side if a client attached with a small msize

[PATCH v5 2/6] 9pfs readdir: rename max_count -> maxsize

Although the 9p protocol specs use the term 'max_count' as argument for Treaddir, let's rename our variables for that to 'maxsize' instead, because 'max_count' is semantically completely wrong. This variable does not count integral entries, it is rather a maximum size (in bytes) of the destination

[PATCH v5 1/6] tests/virtio-9p: added split readdir tests

The previous, already existing 'basic' readdir test simply used a 'count' parameter big enough to retrieve all directory entries with a single Treaddir request. In the 3 new 'split' readdir tests added by this patch, directory entries are retrieved, split over several Treaddir requests by picking

[PATCH v5 6/6] 9pfs: clarify latency of v9fs_co_run_in_worker()

As we just fixed a severe performance issue with Treaddir request handling, clarify this overall issue as a comment on v9fs_co_run_in_worker() with the intention to hopefully prevent such performance mistakes in future (and fixing other yet outstanding ones). Signed-off-by: Christian Schoenebeck

[PATCH v5 4/6] 9pfs: add new function v9fs_co_readdir_many()

The newly added function v9fs_co_readdir_many() retrieves multiple directory entries with a single fs driver request. It is intended to replace uses of v9fs_co_readdir(), the latter only retrives a single directory entry per fs driver request instead. The reason for this planned replacement is

Re: [PULL 0/6] Linux user for 5.0 patches

On Thu, 26 Mar 2020 at 16:43, Laurent Vivier wrote: > > Le 26/03/2020 à 16:42, Peter Maydell a écrit : > > On Thu, 26 Mar 2020 at 07:24, Laurent Vivier wrote: > >> > >> The following changes since commit > >> 736cf607e40674776d752acc201f565723e86045: > >> > >> Update version for v5.0.0-rc0

Re: [PATCH-for-5.0 12/12] hw/riscv/sifive_u: Add missing error-propagation code

On Wed, 25 Mar 2020 at 19:19, Philippe Mathieu-Daudé wrote: > > Running the coccinelle script produced: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file > scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments

Re: [PATCH v2] hw/arm/collie: Put StrongARMState* into a CollieMachineState struct

On 3/26/20 1:49 PM, Peter Maydell wrote: > Coverity complains that the collie_init() function leaks the memory > allocated in sa1110_init(). This is true but not significant since > the function is called only once on machine init and the memory must > remain in existence until QEMU exits anyway.

Re: [PATCH-for-5.0 11/12] hw/net/xilinx_axienet: Add missing error-propagation code

On Wed, 25 Mar 2020 at 19:19, Philippe Mathieu-Daudé wrote: > > Running the coccinelle script produced: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file > scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments

Re: [PATCH-for-5.0 10/12] hw/misc/macio/macio: Add missing error-propagation code

On Wed, 25 Mar 2020 at 19:19, Philippe Mathieu-Daudé wrote: > > Running the coccinelle script produced: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file > scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments

Re: [PATCH-for-5.0 09/12] hw/mips/mips_malta: Add missing error-propagation code

On Wed, 25 Mar 2020 at 19:19, Philippe Mathieu-Daudé wrote: > > Running the coccinelle script produced: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file > scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments

Re: [PATCH-for-5.0 08/12] hw/mips/boston: Add missing error-propagation code

On Wed, 25 Mar 2020 at 19:18, Philippe Mathieu-Daudé wrote: > > Running the coccinelle script produced: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file > scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments

Re: [PATCH-for-5.0 06/12] hw/dma/xilinx_axidma: Add missing error-propagation code

On Wed, 25 Mar 2020 at 19:18, Philippe Mathieu-Daudé wrote: > > Running the coccinelle script produced: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file > scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments

Re: [PATCH v16 Kernel 2/7] vfio iommu: Remove atomicity of ref_count of pinned pages

On 3/26/2020 4:19 PM, Cornelia Huck wrote: On Wed, 25 Mar 2020 01:02:34 +0530 Kirti Wankhede wrote: vfio_pfn.ref_count is always updated by holding iommu->lock, using atomic s/by/while/ Ok. variable is overkill. Signed-off-by: Kirti Wankhede Reviewed-by: Neo Jia Reviewed-by: Eric

Re: [PATCH-for-5.0 04/12] hw/arm/stm32fx05_soc: Add missing error-propagation code

On Wed, 25 Mar 2020 at 19:18, Philippe Mathieu-Daudé wrote: > > Patch created mechanically by running: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file > scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments

Re: [PATCH-for-5.0 07/12] hw/mips/cps: Add missing error-propagation code

On Wed, 25 Mar 2020 at 19:18, Philippe Mathieu-Daudé wrote: > > Patch created mechanically by running: > > $ spatch \ > --macro-file scripts/cocci-macro-file.h --include-headers \ > --sp-file > scripts/coccinelle/object_property_missing_error_propagate.cocci \ > --keep-comments

Re: [PATCH v16 Kernel 1/7] vfio: KABI for migration interface for device state

On 3/26/2020 4:11 PM, Cornelia Huck wrote: On Wed, 25 Mar 2020 01:02:33 +0530 Kirti Wankhede wrote: - Defined MIGRATION region type and sub-type. - Defined vfio_device_migration_info structure which will be placed at the 0th offset of migration region to get/set VFIO device related

Re: [PATCH v16 Kernel 5/7] vfio iommu: Update UNMAP_DMA ioctl to get dirty bitmap before unmap

On 3/25/2020 7:48 AM, Yan Zhao wrote: On Wed, Mar 25, 2020 at 03:32:37AM +0800, Kirti Wankhede wrote: DMA mapped pages, including those pinned by mdev vendor drivers, might get unpinned and unmapped while migration is active and device is still running. For example, in pre-copy phase while

Re: [PATCH v15 Kernel 1/7] vfio: KABI for migration interface for device state

On 3/26/2020 3:03 PM, Christoph Hellwig wrote: s/KABI/UAPI/ in the subject and anywhere else in the series. Ok. Please avoid __packed__ structures and just properly pad them, they have a major performance impact on some platforms and will cause compiler warnings when taking addresses of

Re: [PATCH v16 Kernel 4/7] vfio iommu: Implementation of ioctl for dirty pages tracking.

On 3/25/2020 7:41 AM, Yan Zhao wrote: On Wed, Mar 25, 2020 at 05:18:52AM +0800, Kirti Wankhede wrote: VFIO_IOMMU_DIRTY_PAGES ioctl performs three operations: - Start dirty pages tracking while migration is active - Stop dirty pages tracking. - Get dirty pages bitmap. Its user space

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