On Mon, Mar 30, 2020 at 09:35:27AM +0800, Yan Zhao wrote:
> On Sat, Mar 28, 2020 at 01:25:37AM +0800, Alex Williamson wrote:
> > On Fri, 27 Mar 2020 11:19:34 +
> > yan.y.z...@intel.com wrote:
> >
> > > From: Yan Zhao
> > >
> > > currently, vfio regions without VFIO_REGION_INFO_FLAG_WRITE are
On Sat, Mar 28, 2020 at 9:12 AM Richard Henderson
wrote:
>
> On 3/27/20 11:38 PM, Daniel Brodsky wrote:
> > On Thu, Mar 26, 2020 at 11:01 AM Richard Henderson
> > wrote:
> >>
> >> My preference is to add -Wno-tautological-type-limit-compare in
> >> configure, so we don't have to work around this
Patchew URL:
https://patchew.org/QEMU/1585542301-84087-1-git-send-email-yi.l@intel.com/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT
Thanks Ken!
I verified it and the new version indeed fixes the issue in focal.
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https://bugs.launchpad.net/bugs/1868116
Title:
QEMU monitor no longer works
Status in QEMU:
New
Statu
Hi Palmer,
On Fri, Mar 27, 2020 at 5:30 AM Palmer Dabbelt wrote:
>
> On Thu, 26 Mar 2020 15:44:04 PDT (-0700), Alistair Francis wrote:
> > This series fixes two bugs in the RISC-V two stage lookup
> > implementation. This fixes the Hypervisor userspace failing to start.
> >
> > Alistair Francis (
This patch adds an empty handling for PASID-based Device-TLB
invalidation. For now it is enough as it is not necessary to
propagate it to host for passthru device and also there is no
emulated device has device tlb.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Yi Sun
Cc: Paolo Bonzini
Cc: Ri
This patch adds a PASID cache management infrastructure based on
new added structure VTDPASIDAddressSpace, which is used to track
the PASID usage and future PASID tagged DMA address translation
support in vIOMMU.
struct VTDPASIDAddressSpace {
VTDBus *vtd_bus;
uint8_t devfn;
The kernel uapi/linux/iommu.h header file includes the
extensions for vSVA support. e.g. bind gpasid, iommu
fault report related user structures and etc.
Note: this should be replaced with a full header files update when
the vSVA uPAPI is stable.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Y
This patch propagates PASID-based iotlb invalidation to host.
Intel VT-d 3.0 supports nested translation in PASID granular.
Guest SVA support could be implemented by configuring nested
translation on specific PASID. This is also known as dual stage
DMA translation.
Under such configuration, guest
This patch defines vfio_host_iommu_context_info, implements the PASID
alloc/free hooks defined in HostIOMMUContextClass.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Eric Auger
Cc: Yi Sun
Cc: David Gibson
Cc: Alex Williamson
Signed-off-by: Liu Yi L
---
hw/vfio/common.c
This patch adds the basic PASID-based iotlb (piotlb) invalidation
support. piotlb is used during walking Intel VT-d 1st level page
table. This patch only adds the basic processing. Detailed handling
will be added in next patch.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Yi Sun
Cc: Paolo Bon
For vfio-pci devices, it could use pci_device_set/unset_iommu() to
expose host iommu context to vIOMMU emulators. vIOMMU emulators
could make use the methods provided by host iommu context. e.g.
propagate requests to host iommu.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Eric Auger
Cc: Yi S
This patch adds bind_stage1_pgtbl() definition in HostIOMMUContextClass,
also adds corresponding implementation in VFIO. This is to expose a way
for vIOMMU to setup dual stage DMA translation for passthru devices on
hardware.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Eric Auger
Cc: Yi Sun
RID_PASID field was introduced in VT-d 3.0 spec, it is used
for DMA requests w/o PASID in scalable mode VT-d. It is also
known as IOVA. And in VT-d 3.1 spec, there is definition on it:
"Implementations not supporting RID_PASID capability
(ECAP_REG.RPS is 0b), use a PASID value of 0 to perform
addr
This patch replays guest pasid bindings after context cache
invalidation. This is a behavior to ensure safety. Actually,
programmer should issue pasid cache invalidation with proper
granularity after issuing a context cache invalidation.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Yi Sun
Cc:
Currently, many platform vendors provide the capability of dual stage
DMA address translation in hardware. For example, nested translation
on Intel VT-d scalable mode, nested stage translation on ARM SMMUv3,
and etc. In dual stage DMA address translation, there are two stages
address translation, s
This patch adds flush_stage1_cache() definition in HostIOMUContextClass.
And adds corresponding implementation in VFIO. This is to expose a way
for vIOMMU to flush stage-1 cache in host side since guest owns stage-1
translation structures in dual stage DMA translation configuration.
Cc: Kevin Tian
This patch adds virtual command support to Intel vIOMMU per
Intel VT-d 3.1 spec. And adds two virtual commands: allocate
pasid and free pasid.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Yi Sun
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
Reviewed-by: Peter Xu
Signed-off-b
This patch adds PASID cache invalidation handling. When guest enabled
PASID usages (e.g. SVA), guest software should issue a proper PASID
cache invalidation when caching-mode is exposed. This patch only adds
the draft handling of pasid cache invalidation. Detailed handling will
be added in subseque
This patch adds pci_device_set/unset_iommu_context() to set/unset
host_iommu_context for a given device. New callback is added in
PCIIOMMUOps. As such, vIOMMU could make use of host IOMMU capability.
e.g setup nested translation.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Eric Auger
Cc: Yi
This patch captures the guest PASID table entry modifications and
propagates the changes to host to setup dual stage DMA translation.
The guest page table is configured as 1st level page table (GVA->GPA)
whose translation result would further go through host VT-d 2nd
level page table(GPA->HPA) unde
This patch modifies pci_setup_iommu() to set PCIIOMMUOps
instead of setting PCIIOMMUFunc. PCIIOMMUFunc is used to
get an address space for a PCI device in vendor specific
way. The PCIIOMMUOps still offers this functionality. But
using PCIIOMMUOps leaves space to add more iommu related
vendor specif
In this patch, QEMU firstly gets iommu info from kernel to check the
supported capabilities by a VFIO_IOMMU_TYPE1_NESTING iommu. And inits
HostIOMMUContet instance.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Eric Auger
Cc: Yi Sun
Cc: David Gibson
Cc: Alex Williamson
Signed-off-by: Liu Yi
Intel VT-d 3.0 introduces scalable mode, and it has a bunch of capabilities
related to scalable mode translation, thus there are multiple combinations.
While this vIOMMU implementation wants simplify it for user by providing
typical combinations. User could config it by "x-scalable-mode" option. Th
This patch adds set/unset_iommu_context() impelementation in Intel
vIOMMU. For Intel platform, pass-through modules (e.g. VFIO) could
set HostIOMMUContext to Intel vIOMMU emulator.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Yi Sun
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkos
Shared Virtual Addressing (SVA), a.k.a, Shared Virtual Memory (SVM) on
Intel platforms allows address space sharing between device DMA and
applications. SVA can reduce programming complexity and enhance security.
This QEMU series is intended to expose SVA usage to VMs. i.e. Sharing
guest applicati
From: Eric Auger
Update the script to import the new iommu.h uapi header.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Yi Sun
Cc: Michael S. Tsirkin
Cc: Cornelia Huck
Cc: Paolo Bonzini
Acked-by: Cornelia Huck
Signed-off-by: Eric Auger
---
scripts/update-linux-headers.sh | 2 +-
1 file
VFIO needs to check VFIO_TYPE1_NESTING_IOMMU support with Kernel before
further using it. e.g. requires to check IOMMU UAPI version.
Cc: Kevin Tian
Cc: Jacob Pan
Cc: Peter Xu
Cc: Eric Auger
Cc: Yi Sun
Cc: David Gibson
Cc: Alex Williamson
Signed-off-by: Liu Yi L
Signed-off-by: Yi Sun
---
Looks good to me.
Reviewed-by: Colin Xu
On 2020-03-30 11:25, hang.y...@linux.intel.com wrote:
From: Hang Yuan
Add ROM and ROM device memory region support in HAX. Their memory region is
read only and write access will generate EPT violation. The violation will be
handled in the HAX kernel wi
From: Hang Yuan
Add ROM and ROM device memory region support in HAX. Their memory region is
read only and write access will generate EPT violation. The violation will be
handled in the HAX kernel with the following patch.
https://github.com/intel/haxm/commit/33ceea09a1655fca12c47f1e112b1d269357f
On Fri, Mar 27, 2020 at 01:28:13PM +0800, Kirti Wankhede wrote:
> Hit send button little early.
>
> >
> > I checked v12, it's not like what I said.
> > In v12, bitmaps are generated per vfio_dma, and combination of the
> > bitmaps are required in order to generate a big bitmap suiting for dirt
On Mon, Mar 23, 2020 at 01:29:24PM +0800, Li Feng wrote:
>
> the G_IO_HUP is watched in tcp_chr_connect, and the callback
> vhost_user_blk_watch is not needed, because tcp_chr_hup is registered as
> callback. And it will close the tcp link.
>
> Signed-off-by: Li Feng
Reviewed-by: Raphael Norwit
On Fri, Mar 27, 2020 at 12:42:43PM +0800, Kirti Wankhede wrote:
>
>
> On 3/27/2020 5:34 AM, Yan Zhao wrote:
> > On Fri, Mar 27, 2020 at 05:39:44AM +0800, Kirti Wankhede wrote:
> >>
> >>
> >> On 3/25/2020 7:48 AM, Yan Zhao wrote:
> >>> On Wed, Mar 25, 2020 at 03:32:37AM +0800, Kirti Wankhede wrote
On Fri, Mar 27, 2020 at 01:07:38PM +0800, Kirti Wankhede wrote:
>
>
> On 3/27/2020 6:00 AM, Yan Zhao wrote:
> > On Fri, Mar 27, 2020 at 05:39:01AM +0800, Kirti Wankhede wrote:
> >>
> >>
> >> On 3/25/2020 7:41 AM, Yan Zhao wrote:
> >>> On Wed, Mar 25, 2020 at 05:18:52AM +0800, Kirti Wankhede wrote
On Sun, Mar 29, 2020 at 09:30:24AM -0400, Michael S. Tsirkin wrote:
>
> On Mon, Mar 23, 2020 at 01:29:24PM +0800, Li Feng wrote:
> > the G_IO_HUP is watched in tcp_chr_connect, and the callback
> > vhost_user_blk_watch is not needed, because tcp_chr_hup is registered as
> > callback. And it will c
On Sat, Mar 28, 2020 at 01:25:37AM +0800, Alex Williamson wrote:
> On Fri, 27 Mar 2020 11:19:34 +
> yan.y.z...@intel.com wrote:
>
> > From: Yan Zhao
> >
> > currently, vfio regions without VFIO_REGION_INFO_FLAG_WRITE are only
> > read-only when VFIO_REGION_INFO_FLAG_MMAP is not set.
> >
> >
Thanks for tracking down the source of the bug. Our 'submitting patches'
policy is at https://wiki.qemu.org/Contribute/SubmitAPatch in case you
haven't already found it. (It's quite long but for a simple one-shot
bugfix patch the important stuff is just the summarized bits at the
top.)
--
You rec
** Changed in: qemu
Assignee: (unassigned) => Matt Wilbur (mattwilbur)
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https://bugs.launchpad.net/bugs/1869497
Title:
x86_cpu_gdb_read_register segfaults when gdb requests regist
On 28/03/2020 16:31, Chad Kennedy wrote:
> I'm getting started with building QEMU on Windows and, following the
> instructions
> at https://wiki.qemu.org/Hosts/W32#Native_builds_with_MSYS2, I ran into some
> small
> issues. I'd like to be able to tweak the wiki a bit to help save others who
>
I just noticed I forgot to Cc Eduardo when posting this :S
Eduardo, do you want me to prepare a pullreq for rc1 with this patch and
Oksana other fix?
On 2/12/20 9:36 PM, Philippe Mathieu-Daudé wrote:
The www.helenos.org server is slow and downloading the Leon3 binary
takes too long [*]. Do no
Hi
On Mon, Feb 24, 2020 at 9:56 PM Jagannathan Raman wrote:
>
> Relocate machine_int and exit notifiers into common code
utils/notify.c is not a good place to relocate those.
eventually, add a new softmmu/notifiers.c ?
And that patch broke make check test-char /char/mux, because it
overrides m
Hi Yi,
On 3/22/20 1:35 PM, Liu Yi L wrote:
> The kernel uapi/linux/iommu.h header file includes the
> extensions for vSVA support. e.g. bind gpasid, iommu
> fault report related user structures and etc.
>
> Note: this should be replaced with a full header files update when
> the vSVA uPAPI is sta
Suggest VIRTIO_NET_F_HASH_REPORT if specified in device
parameters.
If the VIRTIO_NET_F_HASH_REPORT is set,
the device extends configuration space. If the feature
is negotiated, the packet layout is extended to
accomodate the hash information. In this case deliver
packet's hash value and report typ
Similar to VMSTATE_VARRAY_UINT32_ALLOC, but the size is
16-bit field.
Signed-off-by: Michael S. Tsirkin
Signed-off-by: Yuri Benditovich
---
include/migration/vmstate.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/migration/vmstate.h b/include/migration/vmstate.h
index
Save and restore RSS/hash report configuration.
Signed-off-by: Yuri Benditovich
---
hw/net/virtio-net.c | 37 +
1 file changed, 37 insertions(+)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index 61c956d0ff..8e09aa0b99 100644
--- a/hw/net/virtio-net
Signed-off-by: Yuri Benditovich
---
net/tap.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/net/tap.c b/net/tap.c
index 6207f61f84..47de7fdeb6 100644
--- a/net/tap.c
+++ b/net/tap.c
@@ -63,6 +63,14 @@ typedef struct TAPState {
Notifier exit;
} TAPState;
+
If VIRTIO_NET_F_RSS negotiated and RSS is enabled, process
incoming packets, calculate packet's hash and place the
packet into respective RX virtqueue.
Signed-off-by: Yuri Benditovich
---
hw/net/virtio-net.c| 88 +-
include/hw/virtio/virtio-net.h | 1
Signed-off-by: Yuri Benditovich
---
hw/net/virtio-net.c | 65 +
1 file changed, 65 insertions(+)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index 3627bb1717..90b01221e9 100644
--- a/hw/net/virtio-net.c
+++ b/hw/net/virtio-net.c
@@ -71,6 +71
Optionally report RSS feature.
Handle RSS configuration command and keep RSS parameters
in virtio-net device context.
Signed-off-by: Yuri Benditovich
---
hw/net/trace-events| 3 +
hw/net/virtio-net.c| 189 +
include/hw/virtio/virtio-net.h
Support for VIRTIO_NET_F_RSS and VIRTIO_NET_F_HASH_REPORT
features in QEMU for reference purpose.
Implements Toeplitz hash calculation for incoming
packets according to configuration provided by driver.
Uses calculated hash for decision on receive virtqueue
and/or reports the hash in the virtio hea
On Fri, Mar 20, 2020 at 10:36:53AM +0100, David Hildenbrand wrote:
> On 19.03.20 18:45, Michael S. Tsirkin wrote:
> > On Thu, Mar 19, 2020 at 02:54:11PM +0100, David Hildenbrand wrote:
> >> Why does the balloon driver not support VIRTIO_F_IOMMU_PLATFORM? It is
> >> absolutely not clear to me. The i
On Fri, Mar 20, 2020 at 10:30:37AM +, Stefan Hajnoczi wrote:
> v3:
> * Add new performance results that demonstrate the scalability
> * Mention that this is PCI-specific [Cornelia]
> v2:
> * Let the virtio-DEVICE-pci device select num-queues because the optimal
>multi-queue configuration
On Wed, Mar 25, 2020 at 06:35:06AM -0400, Raphael Norwitz wrote:
> vhost_user_set_mem_table() and vhost_user_set_mem_table_postcopy() have
> gotten convoluted, and have some identical code.
>
> This change moves the logic populating the VhostUserMemory struct and
> fds array from vhost_user_set_me
On Mon, Mar 23, 2020 at 01:29:24PM +0800, Li Feng wrote:
> the G_IO_HUP is watched in tcp_chr_connect, and the callback
> vhost_user_blk_watch is not needed, because tcp_chr_hup is registered as
> callback. And it will close the tcp link.
>
> Signed-off-by: Li Feng
Raphael would you like to revi
On Fri, Mar 27, 2020 at 01:11:05PM +0100, Gerd Hoffmann wrote:
> First batch of microvm patches, some generic acpi stuff.
> Split the acpi-build.c monster, specifically split the
> pc and q35 and pci bits into a separate file which we
> can skip building at some point in the future.
>
> Also so
On Fri, Mar 27, 2020 at 06:14:26PM +0300, Liran Alon wrote:
> As almost two weeks have passed since this Reviewed-By comment, can I assume
> this series is done from my perspective and ready to be merged?
> As I haven't seen a Reviewed-By for the rest of the patches of this series.
>
> Thanks,
>
> From: Peter Xu
> Sent: Wednesday, March 25, 2020 11:16 PM
> To: Liu, Yi L
> Subject: Re: [PATCH v1 19/22] intel_iommu: process PASID-based iotlb
> invalidation
>
> On Wed, Mar 25, 2020 at 01:36:03PM +, Liu, Yi L wrote:
> > > From: Peter Xu
> > > Sent: Wednesday, March 25, 2020 2:26 AM
>
On Wed, Mar 11, 2020 at 05:20:04PM +, Shameer Kolothum wrote:
> This series adds NVDIMM support to arm/virt platform.
So I'm still confused about whether there's a bugfix here
that we need for 5.0. If yes pls post just that part
with acks included and for-5.0 in the subject.
> The series reu
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