Re: ui: fix potential compile error.

[kra...@redhat.com]

  Hi,

> 1. CentOS7 with Python 2.7.5

> Root cause is my argparse and python version. But change the invoking order 
> can adapt both new and old argparse.

python2 is EOL and not supported any more.
please "yum install python3" (yes, centos7 has it, was added in 7.8).

take care,
  Gerd

Re: [RFC v3 1/1] memory: Skip bad range assertion if notifier supports arbitrary masks

[Jason Wang]

On 2020/9/2 上午3:35, Peter Xu wrote:

On Tue, Sep 01, 2020 at 11:05:18AM +0800, Jason Wang wrote:

On 2020/8/21 下午10:12, Peter Xu wrote:

On Thu, Aug 20, 2020 at 10:28:00AM +0800, Jason Wang wrote:

On 2020/8/19 下午11:50, Peter Xu wrote:

On Wed, Aug 19, 2020 at 03:15:26PM +0800, Jason Wang wrote:

Yes, actually, I feel confused after reading the codes. Is notifier->start
IOVA or GPA?

In vfio.c, we did:

       iommu_notifier_init(>n, vfio_iommu_map_notify,
       IOMMU_NOTIFIER_ALL,
       section->offset_within_region,
       int128_get64(llend),
       iommu_idx);

So it looks to me the start and end are GPA, but the assertion above check
it against IOVA which seems to be wrong 

It should be iova; both section->offset_within_region and llend are for the
device's iova address space.  Thanks,


Interesting, how can memory region know which IOVA is used by guest?

Does it need to know? :)

AFAICT what we do here is only register with the whole possible IOVA address
space (e.g., across the whole 64bit address space).  Then vfio will get
notifications when there're new iova ranges mapped into it.


Right, but the whole IOVA address space should be something vIOMMU specific,
e.g for Intel it should be calculated by GAW, but I found:

     memory_region_init_iommu(_dev_as->iommu,
sizeof(vtd_dev_as->iommu),
  TYPE_INTEL_IOMMU_MEMORY_REGION, OBJECT(s),
  name, UINT64_MAX);

which assumes UINT64_MAX.

Right.  AFAICT it can be reduced to gaw width, but I don't see a problem either
even with UINT64_MAX (as long as it covers the range specified by gaw).  Or did
I miss something?



Dunno :)

Just notice this difference, for safety, maybe its better to cap it with 
GAW.


Btw, the naming of "vtd-ir" is kind of confusing, it should work without ir.

Thanks



Thanks,

ui: fix potential compile error.

[潘睿]

We compiled the upstream qemu and result in this GEN code error:

‘’’
GEN ui/input-keymap-atset1-to-qcode.c
usage: keymap-gen [-h]
  {code-map,code-table,name-map,name-table,code-docs,name-docs}
  ...
keymap-gen: error: invalid choice: 'glib2' (choose from 'code-map', 
'code-table', 'name-map', 'name-table', 'code-docs', 'name-docs')
‘’’

My environment:

1. CentOS7 with Python 2.7.5

2. upstream's keycodemapdb

3. argparse 1.1

Root cause is my argparse and python version. But change the invoking order can 
adapt both new and old argparse.

Thanks.


0001-ui-fix-potential-compile-error.patch
Description: 0001-ui-fix-potential-compile-error.patch

Re: [PATCH] vhost-user: add separate memslot counter for vhost-user

[Raphael Norwitz]

I see how this fixes vhost_has_free_slot() to correctly determine
whether or not regions can be added, but why are the
used_memslots_exceeded variable and the used_memslots_is_exceeded()
API needed?

On Mon, Aug 10, 2020 at 9:44 PM Jiajun Chen  wrote:
>
> Used_memslots is equal to dev->mem->nregions now, it is true for
> vhost kernel, but not for vhost user, which uses the memory regions
> that have file descriptor. In fact, not all of the memory regions
> have file descriptor.
> It is usefully in some scenarios, e.g. used_memslots is 8, and only
> 5 memory slots can be used by vhost user, it is failed to hot plug
> a new memory RAM because vhost_has_free_slot just returned false,
> but we can hot plug it safely in fact.
>
> Signed-off-by: Jiajun Chen 
> Signed-off-by: Jianjay Zhou 
> ---
>  hw/virtio/vhost-backend.c | 14 
>  hw/virtio/vhost-user.c| 28 
>  hw/virtio/vhost.c | 54 +--
>  include/hw/virtio/vhost-backend.h |  5 +++
>  include/hw/virtio/vhost.h |  1 +
>  net/vhost-user.c  |  7 
>  6 files changed, 100 insertions(+), 9 deletions(-)
>
> diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
> index 31231218dc..04d20fc3ee 100644
> --- a/hw/virtio/vhost-user.c
> +++ b/hw/virtio/vhost-user.c
> @@ -2354,6 +2355,31 @@ void vhost_user_cleanup(VhostUserState *user)
>  user->chr = NULL;
>  }
>
> +static void vhost_user_set_used_memslots(struct vhost_dev *dev)
> +{
> +unsigned int counter = 0;
> +int i;
> +
> +for (i = 0; i < dev->mem->nregions; ++i) {
> +struct vhost_memory_region *reg = dev->mem->regions + i;
> +ram_addr_t offset;
> +MemoryRegion *mr;
> +
> +assert((uintptr_t)reg->userspace_addr == reg->userspace_addr);
> +mr = memory_region_from_host((void *)(uintptr_t)reg->userspace_addr,
> +);

Why not use the  vhost_user_get_mr_data helper? It would simplify the
code a bit.

> +if (mr && memory_region_get_fd(mr) > 0) {
> +counter++;
> +}
> +}
> +vhost_user_used_memslots = counter;
> +}
> +
> +static unsigned int vhost_user_get_used_memslots(void)
> +{
> +return vhost_user_used_memslots;
> +}
> +
>  const VhostOps user_ops = {
>  .backend_type = VHOST_BACKEND_TYPE_USER,
>  .vhost_backend_init = vhost_user_backend_init,
> @@ -2387,4 +2413,6 @@ const VhostOps user_ops = {
> diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c
> index 1a1384e7a6..7f36d7af25 100644
> --- a/hw/virtio/vhost.c
> +++ b/hw/virtio/vhost.c
> @@ -1346,9 +1373,13 @@ int vhost_dev_init(struct vhost_dev *hdev, void 
> *opaque,
>  memory_listener_register(>memory_listener, _space_memory);
>  QLIST_INSERT_HEAD(_devices, hdev, entry);
>
> -if (used_memslots > hdev->vhost_ops->vhost_backend_memslots_limit(hdev)) 
> {
> -error_report("vhost backend memory slots limit is less"
> -" than current number of present memory slots");
> +/*
> + * If we started a VM without any vhost device,
> + * vhost_dev_used_memslots_is_exceeded will always return false for the
> + * first time vhost device hot-plug(vhost_get_used_memslots is always 0),
> + * so it needs to double check here
> + */
> +if (vhost_dev_used_memslots_is_exceeded(hdev)) {

Why can't we just check if hdev->vhost_ops->vhost_get_used_memslots()
> hdev->vhost_ops->vhost_backend_memslots_limit(hdev)?

>  r = -1;
>  if (busyloop_timeout) {
>  goto fail_busyloop;
> @@ -1773,3 +1804,8 @@ int vhost_net_set_backend(struct vhost_dev *hdev,
>
>  return -1;
>  }
> +
> +bool used_memslots_is_exceeded(void)
> +{
> +return used_memslots_exceeded;
> +}
> diff --git a/net/vhost-user.c b/net/vhost-user.c
> index 17532daaf3..2f0216b518 100644
> --- a/net/vhost-user.c
> +++ b/net/vhost-user.c
> @@ -347,6 +348,12 @@ static int net_vhost_user_init(NetClientState *peer, 
> const char *device,
>  qemu_chr_fe_set_handlers(>chr, NULL, NULL,
>   net_vhost_user_event, NULL, nc0->name, NULL,
>   true);
> +
> +if (used_memslots_is_exceeded()) {

Why can't you use vhost_has_free_slot() instead here?

> +error_report("used memslots exceeded the backend limit, quit "
> +"loop");
> +goto err;
> +}
>  } while (!s->started);
>
>  assert(s->vhost_net);
> --
> 2.27.0.dirty
>
>

Re: [PATCH] linux-user: fix implicit conversion from enumeration type error

[no-reply]

Patchew URL: https://patchew.org/QEMU/20200901153321.920490-1-laur...@vivier.eu/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20200901153321.920490-1-laur...@vivier.eu
Subject: [PATCH] linux-user: fix implicit conversion from enumeration type error

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
30ae5fc linux-user: fix implicit conversion from enumeration type error

=== OUTPUT BEGIN ===
ERROR: Macros with complex values should be enclosed in parenthesis
#26: FILE: include/exec/user/thunk.h:45:
+#define MK_ARRAY(type, size) TYPE_ARRAY, (int)size, type

total: 1 errors, 0 warnings, 8 lines checked

Commit 30ae5fc07c8d (linux-user: fix implicit conversion from enumeration type 
error) has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20200901153321.920490-1-laur...@vivier.eu/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-de...@redhat.com

Re: [PATCH 3/5] hw/ppc/ppc4xx_pci: Use ARRAY_SIZE() instead of magic value

[David Gibson]

On Tue, Sep 01, 2020 at 12:40:41PM +0200, Philippe Mathieu-Daudé wrote:
> Replace the magic '4' by ARRAY_SIZE(s->irq) which is more explicit.
> 
> Signed-off-by: Philippe Mathieu-Daudé 

Acked-by: David Gibson 

> ---
>  hw/ppc/ppc4xx_pci.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c
> index 3ea47df71fe..cd3f192a138 100644
> --- a/hw/ppc/ppc4xx_pci.c
> +++ b/hw/ppc/ppc4xx_pci.c
> @@ -320,7 +320,8 @@ static void ppc4xx_pcihost_realize(DeviceState *dev, 
> Error **errp)
>  
>  b = pci_register_root_bus(dev, NULL, ppc4xx_pci_set_irq,
>ppc4xx_pci_map_irq, s->irq, 
> get_system_memory(),
> -  get_system_io(), 0, 4, TYPE_PCI_BUS);
> +  get_system_io(), 0, ARRAY_SIZE(s->irq),
> +  TYPE_PCI_BUS);
>  h->bus = b;
>  
>  pci_create_simple(b, 0, "ppc4xx-host-bridge");

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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Re: [PATCH 4/5] hw/ppc/ppc4xx_pci: Replace pointless warning by assert()

[David Gibson]

On Tue, Sep 01, 2020 at 12:40:42PM +0200, Philippe Mathieu-Daudé wrote:
> We call pci_register_root_bus() to register 4 IRQs with the
> ppc4xx_pci_set_irq() handler. As it can only be called with
> values in the [0-4[ range, replace the pointless warning by
> an assert().
> 
> Signed-off-by: Philippe Mathieu-Daudé 

Acked-by: David Gibson 

> ---
>  hw/ppc/ppc4xx_pci.c | 5 +
>  1 file changed, 1 insertion(+), 4 deletions(-)
> 
> diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c
> index cd3f192a138..503ef46b39a 100644
> --- a/hw/ppc/ppc4xx_pci.c
> +++ b/hw/ppc/ppc4xx_pci.c
> @@ -256,10 +256,7 @@ static void ppc4xx_pci_set_irq(void *opaque, int 
> irq_num, int level)
>  qemu_irq *pci_irqs = opaque;
>  
>  trace_ppc4xx_pci_set_irq(irq_num);
> -if (irq_num < 0) {
> -fprintf(stderr, "%s: PCI irq %d\n", __func__, irq_num);
> -return;
> -}
> +assert(irq_num >= 0);
>  qemu_set_irq(pci_irqs[irq_num], level);
>  }
>  

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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Re: [RFC v8 1/5] memory: Rename memory_region_notify_one to memory_region_notify_iommu_one

[David Gibson]

On Tue, Sep 01, 2020 at 04:26:04PM +0200, Eugenio Pérez wrote:
> Previous name didn't reflect the iommu operation.
> 
> Signed-off-by: Eugenio Pérez 

Reviewed-by: David Gibson 

> ---
>  hw/arm/smmu-common.c  | 2 +-
>  hw/arm/smmuv3.c   | 2 +-
>  hw/i386/intel_iommu.c | 4 ++--
>  include/exec/memory.h | 6 +++---
>  softmmu/memory.c  | 6 +++---
>  5 files changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
> index 3838db1395..88d2c454f0 100644
> --- a/hw/arm/smmu-common.c
> +++ b/hw/arm/smmu-common.c
> @@ -472,7 +472,7 @@ static void smmu_unmap_notifier_range(IOMMUNotifier *n)
>  entry.perm = IOMMU_NONE;
>  entry.addr_mask = n->end - n->start;
>  
> -memory_region_notify_one(n, );
> +memory_region_notify_iommu_one(n, );
>  }
>  
>  /* Unmap all notifiers attached to @mr */
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index 0122700e72..0a893ae918 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -827,7 +827,7 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
>  entry.addr_mask = num_pages * (1 << granule) - 1;
>  entry.perm = IOMMU_NONE;
>  
> -memory_region_notify_one(n, );
> +memory_region_notify_iommu_one(n, );
>  }
>  
>  /* invalidate an asid/iova range tuple in all mr's */
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 5284bb68b6..2ad6b9d796 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -3498,7 +3498,7 @@ static void vtd_address_space_unmap(VTDAddressSpace 
> *as, IOMMUNotifier *n)
>  /* This field is meaningless for unmap */
>  entry.translated_addr = 0;
>  
> -memory_region_notify_one(n, );
> +memory_region_notify_iommu_one(n, );
>  
>  start += mask;
>  remain -= mask;
> @@ -3536,7 +3536,7 @@ static void 
> vtd_address_space_refresh_all(IntelIOMMUState *s)
>  
>  static int vtd_replay_hook(IOMMUTLBEntry *entry, void *private)
>  {
> -memory_region_notify_one((IOMMUNotifier *)private, entry);
> +memory_region_notify_iommu_one((IOMMUNotifier *)private, entry);
>  return 0;
>  }
>  
> diff --git a/include/exec/memory.h b/include/exec/memory.h
> index 0cfe987ab4..22c5f564d1 100644
> --- a/include/exec/memory.h
> +++ b/include/exec/memory.h
> @@ -226,7 +226,7 @@ enum IOMMUMemoryRegionAttr {
>   * The IOMMU implementation must use the IOMMU notifier infrastructure
>   * to report whenever mappings are changed, by calling
>   * memory_region_notify_iommu() (or, if necessary, by calling
> - * memory_region_notify_one() for each registered notifier).
> + * memory_region_notify_iommu_one() for each registered notifier).
>   *
>   * Conceptually an IOMMU provides a mapping from input address
>   * to an output TLB entry. If the IOMMU is aware of memory transaction
> @@ -1274,7 +1274,7 @@ void memory_region_notify_iommu(IOMMUMemoryRegion 
> *iommu_mr,
>  IOMMUTLBEntry entry);
>  
>  /**
> - * memory_region_notify_one: notify a change in an IOMMU translation
> + * memory_region_notify_iommu_one: notify a change in an IOMMU translation
>   *   entry to a single notifier
>   *
>   * This works just like memory_region_notify_iommu(), but it only
> @@ -1285,7 +1285,7 @@ void memory_region_notify_iommu(IOMMUMemoryRegion 
> *iommu_mr,
>   * replaces all old entries for the same virtual I/O address range.
>   * Deleted entries have .@perm == 0.
>   */
> -void memory_region_notify_one(IOMMUNotifier *notifier,
> +void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
>IOMMUTLBEntry *entry);
>  
>  /**
> diff --git a/softmmu/memory.c b/softmmu/memory.c
> index 70b93104e8..961c25b42f 100644
> --- a/softmmu/memory.c
> +++ b/softmmu/memory.c
> @@ -1890,8 +1890,8 @@ void 
> memory_region_unregister_iommu_notifier(MemoryRegion *mr,
>  memory_region_update_iommu_notify_flags(iommu_mr, NULL);
>  }
>  
> -void memory_region_notify_one(IOMMUNotifier *notifier,
> -  IOMMUTLBEntry *entry)
> +void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
> +IOMMUTLBEntry *entry)
>  {
>  IOMMUNotifierFlag request_flags;
>  hwaddr entry_end = entry->iova + entry->addr_mask;
> @@ -1927,7 +1927,7 @@ void memory_region_notify_iommu(IOMMUMemoryRegion 
> *iommu_mr,
>  
>  IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
>  if (iommu_notifier->iommu_idx == iommu_idx) {
> -memory_region_notify_one(iommu_notifier, );
> +memory_region_notify_iommu_one(iommu_notifier, );
>  }
>  }
>  }

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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Re: [PATCH v2 06/10] target/i386/cpu: Fix memleak in x86_cpu_class_check_missing_features

[Pan Nengyuan]

On 2020/9/1 20:03, Markus Armbruster wrote:
> Pan Nengyuan  writes:
> 
>> 'err' forgot to free in x86_cpu_class_check_missing_features error path.
>> Fix that.
>>
>> Reported-by: Euler Robot 
>> Signed-off-by: Pan Nengyuan 
>> Reviewed-by: Li Qiang 
>> ---
>> Cc: Paolo Bonzini 
>> Cc: Richard Henderson 
>> Cc: Eduardo Habkost 
>> ---
>> - V2: no changes in v2.
>> ---
>>  target/i386/cpu.c | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>> index 588f32e136..4678aac0b4 100644
>> --- a/target/i386/cpu.c
>> +++ b/target/i386/cpu.c
>> @@ -4872,6 +4872,7 @@ static void 
>> x86_cpu_class_check_missing_features(X86CPUClass *xcc,
>x86_cpu_expand_features(xc, );
>if (err) {
>/* Errors at x86_cpu_expand_features should never happen,
> * but in case it does, just report the model as not
> * runnable at all using the "type" property.
> */
>strList *new = g_new0(strList, 1);
>>  new->value = g_strdup("type");
>>  *next = new;
>>  next = >next;
>> +error_free(err);
>>  }
>>  
>>  x86_cpu_filter_features(xc, false);
> 
> Reviewed-by: Markus Armbruster 
> 
> Recommended cleanup: change x86_cpu_filter_features() to return true on
> success, false on failure, then pass NULL here and check the return
> value.  Can be done on top.
>
Agree with you, 'err' is not used, we can pass NULL here.
BTW, I think the func you mentioned shoule be x86_cpu_expand_features(), not 
x86_cpu_filter_features()?

Thanks.

> .
> 

Re: [PATCH v3 12/16] hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23

[Alistair Francis]

On Mon, Aug 31, 2020 at 6:50 PM Bin Meng  wrote:
>
> From: Bin Meng 
>
> When cadence_gem model was created for Xilinx boards, the PHY address
> was hard-coded to 23 in the GEM model. Now that we have introduced a
> property we can use that to tell GEM model what our PHY address is.
> Change all boards' GEM 'phy-addr' property value to 23, and set the
> PHY address default value to 0 in the GEM model.
>
> Signed-off-by: Bin Meng 

Reviewed-by: Alistair Francis 

Alistair

>
> ---
>
> Changes in v3:
> - use the correct (Object *) to set the 'phy-addr' in xlnx-zynqmp.c
>
>  hw/arm/xilinx_zynq.c | 1 +
>  hw/arm/xlnx-versal.c | 1 +
>  hw/arm/xlnx-zynqmp.c | 2 ++
>  hw/net/cadence_gem.c | 6 +++---
>  4 files changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
> index 969ef07..9ffcc56 100644
> --- a/hw/arm/xilinx_zynq.c
> +++ b/hw/arm/xilinx_zynq.c
> @@ -119,6 +119,7 @@ static void gem_init(NICInfo *nd, uint32_t base, qemu_irq 
> irq)
>  qemu_check_nic_model(nd, TYPE_CADENCE_GEM);
>  qdev_set_nic_properties(dev, nd);
>  }
> +object_property_set_int(OBJECT(dev), "phy-addr", 23, _abort);
>  s = SYS_BUS_DEVICE(dev);
>  sysbus_realize_and_unref(s, _fatal);
>  sysbus_mmio_map(s, 0, base);
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index e3aa4bd..12ba6c4 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -165,6 +165,7 @@ static void versal_create_gems(Versal *s, qemu_irq *pic)
>  qemu_check_nic_model(nd, "cadence_gem");
>  qdev_set_nic_properties(dev, nd);
>  }
> +object_property_set_int(OBJECT(dev), "phy-addr", 23, _abort);
>  object_property_set_int(OBJECT(dev), "num-priority-queues", 2,
>  _abort);
>  object_property_set_link(OBJECT(dev), "dma", OBJECT(>mr_ps),
> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
> index c435b9d..7885bb1 100644
> --- a/hw/arm/xlnx-zynqmp.c
> +++ b/hw/arm/xlnx-zynqmp.c
> @@ -460,6 +460,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error 
> **errp)
>  }
>  object_property_set_int(OBJECT(>gem[i]), "revision", GEM_REVISION,
>  _abort);
> +object_property_set_int(OBJECT(>gem[i]), "phy-addr", 23,
> +_abort);
>  object_property_set_int(OBJECT(>gem[i]), "num-priority-queues", 2,
>  _abort);
>  if (!sysbus_realize(SYS_BUS_DEVICE(>gem[i]), errp)) {
> diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> index d80096b..7a53469 100644
> --- a/hw/net/cadence_gem.c
> +++ b/hw/net/cadence_gem.c
> @@ -250,7 +250,7 @@
>  #define GEM_PHYMNTNC_REG_SHIFT 18
>
>  /* Marvell PHY definitions */
> -#define BOARD_PHY_ADDRESS23 /* PHY address we will emulate a device at */
> +#define BOARD_PHY_ADDRESS0 /* PHY address we will emulate a device at */
>
>  #define PHY_REG_CONTROL  0
>  #define PHY_REG_STATUS   1
> @@ -1446,7 +1446,7 @@ static uint64_t gem_read(void *opaque, hwaddr offset, 
> unsigned size)
>  uint32_t phy_addr, reg_num;
>
>  phy_addr = (retval & GEM_PHYMNTNC_ADDR) >> 
> GEM_PHYMNTNC_ADDR_SHFT;
> -if (phy_addr == s->phy_addr || phy_addr == 0) {
> +if (phy_addr == s->phy_addr) {
>  reg_num = (retval & GEM_PHYMNTNC_REG) >> 
> GEM_PHYMNTNC_REG_SHIFT;
>  retval &= 0x;
>  retval |= gem_phy_read(s, reg_num);
> @@ -1569,7 +1569,7 @@ static void gem_write(void *opaque, hwaddr offset, 
> uint64_t val,
>  uint32_t phy_addr, reg_num;
>
>  phy_addr = (val & GEM_PHYMNTNC_ADDR) >> GEM_PHYMNTNC_ADDR_SHFT;
> -if (phy_addr == s->phy_addr || phy_addr == 0) {
> +if (phy_addr == s->phy_addr) {
>  reg_num = (val & GEM_PHYMNTNC_REG) >> GEM_PHYMNTNC_REG_SHIFT;
>  gem_phy_write(s, reg_num, val);
>  }
> --
> 2.7.4
>
>

Re: [PATCH] riscv: sifive_test: Allow 16-bit writes to memory region

[Alistair Francis]

On Mon, Aug 31, 2020 at 10:59 PM Nathan Chancellor
 wrote:
>
> When shutting down the machine running a mainline Linux kernel, the
> following error happens:
>
> $ build/riscv64-softmmu/qemu-system-riscv64 -bios default -M virt \
> -display none -initrd rootfs.cpio -kernel Image -m 512m \
> -nodefaults -serial mon:stdio
> ...
> Requesting system poweroff
> [4.999630] reboot: Power down
> sbi_trap_error: hart0: trap handler failed (error -2)
> sbi_trap_error: hart0: mcause=0x0007 mtval=0x0010
> sbi_trap_error: hart0: mepc=0x8000d4cc mstatus=0x1822
> sbi_trap_error: hart0: ra=0x8000999e sp=0x80015c78
> sbi_trap_error: hart0: gp=0xffe000e76610 tp=0xffe0081b89c0
> sbi_trap_error: hart0: s0=0x80015c88 s1=0x0040
> sbi_trap_error: hart0: a0=0x a1=0x80004024
> sbi_trap_error: hart0: a2=0x80004024 a3=0x80004024
> sbi_trap_error: hart0: a4=0x0010 a5=0x
> sbi_trap_error: hart0: a6=0x4024 a7=0x80011158
> sbi_trap_error: hart0: s2=0x s3=0x80016000
> sbi_trap_error: hart0: s4=0x s5=0x
> sbi_trap_error: hart0: s6=0x0001 s7=0x
> sbi_trap_error: hart0: s8=0x s9=0x
> sbi_trap_error: hart0: s10=0x s11=0x0008
> sbi_trap_error: hart0: t0=0x t1=0x
> sbi_trap_error: hart0: t2=0x t3=0x
> sbi_trap_error: hart0: t4=0x t5=0x
> sbi_trap_error: hart0: t6=0x
>
> The kernel does a 16-bit write when powering off the machine, which
> was allowed before commit 5d971f9e67 ("memory: Revert "memory: accept
> mismatching sizes in memory_region_access_valid""). Make min_access_size
> match reality so that the machine can shut down properly now.
>
> Cc: qemu-sta...@nongnu.org
> Fixes: 88a07990fa ("SiFive RISC-V Test Finisher")
> Fixes: 5d971f9e67 ("memory: Revert "memory: accept mismatching sizes in 
> memory_region_access_valid"")
> Signed-off-by: Nathan Chancellor 

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>
> Please let me know if the tags are wrong or inappropriate, this is my
> first QEMU patch.
>
>  hw/riscv/sifive_test.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/sifive_test.c b/hw/riscv/sifive_test.c
> index 0c78fb2c93..8c70dd69df 100644
> --- a/hw/riscv/sifive_test.c
> +++ b/hw/riscv/sifive_test.c
> @@ -59,7 +59,7 @@ static const MemoryRegionOps sifive_test_ops = {
>  .write = sifive_test_write,
>  .endianness = DEVICE_NATIVE_ENDIAN,
>  .valid = {
> -.min_access_size = 4,
> +.min_access_size = 2,
>  .max_access_size = 4
>  }
>  };
>
> base-commit: 2f4c51c0f384d7888a04b4815861e6d5fd244d75
> --
> 2.28.0
>
>

Re: [PATCH] riscv: sifive_test: Allow 16-bit writes to memory region

[Alistair Francis]

On Mon, Aug 31, 2020 at 10:59 PM Nathan Chancellor
 wrote:
>
> When shutting down the machine running a mainline Linux kernel, the
> following error happens:
>
> $ build/riscv64-softmmu/qemu-system-riscv64 -bios default -M virt \
> -display none -initrd rootfs.cpio -kernel Image -m 512m \
> -nodefaults -serial mon:stdio
> ...
> Requesting system poweroff
> [4.999630] reboot: Power down
> sbi_trap_error: hart0: trap handler failed (error -2)
> sbi_trap_error: hart0: mcause=0x0007 mtval=0x0010
> sbi_trap_error: hart0: mepc=0x8000d4cc mstatus=0x1822
> sbi_trap_error: hart0: ra=0x8000999e sp=0x80015c78
> sbi_trap_error: hart0: gp=0xffe000e76610 tp=0xffe0081b89c0
> sbi_trap_error: hart0: s0=0x80015c88 s1=0x0040
> sbi_trap_error: hart0: a0=0x a1=0x80004024
> sbi_trap_error: hart0: a2=0x80004024 a3=0x80004024
> sbi_trap_error: hart0: a4=0x0010 a5=0x
> sbi_trap_error: hart0: a6=0x4024 a7=0x80011158
> sbi_trap_error: hart0: s2=0x s3=0x80016000
> sbi_trap_error: hart0: s4=0x s5=0x
> sbi_trap_error: hart0: s6=0x0001 s7=0x
> sbi_trap_error: hart0: s8=0x s9=0x
> sbi_trap_error: hart0: s10=0x s11=0x0008
> sbi_trap_error: hart0: t0=0x t1=0x
> sbi_trap_error: hart0: t2=0x t3=0x
> sbi_trap_error: hart0: t4=0x t5=0x
> sbi_trap_error: hart0: t6=0x
>
> The kernel does a 16-bit write when powering off the machine, which
> was allowed before commit 5d971f9e67 ("memory: Revert "memory: accept
> mismatching sizes in memory_region_access_valid""). Make min_access_size
> match reality so that the machine can shut down properly now.
>
> Cc: qemu-sta...@nongnu.org
> Fixes: 88a07990fa ("SiFive RISC-V Test Finisher")
> Fixes: 5d971f9e67 ("memory: Revert "memory: accept mismatching sizes in 
> memory_region_access_valid"")
> Signed-off-by: Nathan Chancellor 

Reviewed-by: Alistair Francis 

Alistair

> ---
>
> Please let me know if the tags are wrong or inappropriate, this is my
> first QEMU patch.
>
>  hw/riscv/sifive_test.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/riscv/sifive_test.c b/hw/riscv/sifive_test.c
> index 0c78fb2c93..8c70dd69df 100644
> --- a/hw/riscv/sifive_test.c
> +++ b/hw/riscv/sifive_test.c
> @@ -59,7 +59,7 @@ static const MemoryRegionOps sifive_test_ops = {
>  .write = sifive_test_write,
>  .endianness = DEVICE_NATIVE_ENDIAN,
>  .valid = {
> -.min_access_size = 4,
> +.min_access_size = 2,
>  .max_access_size = 4
>  }
>  };
>
> base-commit: 2f4c51c0f384d7888a04b4815861e6d5fd244d75
> --
> 2.28.0
>
>

[REPORT] Nightly Performance Tests - Tuesday, September 1, 2020

[Ahmed Karaman]

Host CPU : Intel(R) Core(TM) i7-8750H CPU @ 2.20GHz
Host Memory  : 15.49 GB

Start Time (UTC) : 2020-09-01 22:30:02
End Time (UTC)   : 2020-09-01 23:02:51
Execution Time   : 0:32:49.638129

Status   : SUCCESS

Note:
Changes denoted by '-' are less than 0.01%.


SUMMARY REPORT - COMMIT 8d90bfc5

AVERAGE RESULTS

Target  Instructions  Latest  v5.1.0
--    --  --
aarch642 158 350 999   - +1.693%
alpha  1 914 981 010   - +3.525%
arm8 076 531 001   - +2.308%
hppa   4 261 662 287   - +3.163%
m68k   2 690 302 840   - +7.135%
mips   1 862 054 380   - +2.495%
mipsel 2 008 241 001   - +2.676%
mips64 1 918 633 852   - +2.818%
mips64el   2 051 567 365   - +3.026%
ppc2 480 164 517   - +3.109%
ppc64  2 576 708 166   - +3.142%
ppc64le2 558 867 362   - +3.174%
riscv641 406 721 465   - +2.651%
s390x  3 158 148 058   - +3.119%
sh42 364 478 840   - +3.333%
sparc643 318 819 982   - +3.861%
x86_64 1 775 817 408   - +2.157%


   DETAILED RESULTS

Test Program: dijkstra_double

Target  Instructions  Latest  v5.1.0
--    --  --
aarch643 062 583 254   - +1.424%
alpha  3 191 875 753   - +3.696%
arm   16 357 301 960   - +2.348%
hppa   7 228 378 025   - +3.086%
m68k   4 294 068 499   - +9.693%
mips   3 051 468 311   - +2.428%
mipsel 3 231 549 756   -  +2.87%
mips64 3 245 827 156   - +2.596%
mips64el   3 414 230 354   - +3.022%
ppc4 914 550 074   -  +4.74%
ppc64  5 098 147 947   - +4.565%
ppc64le5 082 418 836   -  +4.58%
riscv642 192 306 931   - +1.956%
s390x  4 584 596 667   - +2.898%
sh43 949 069 729   - +3.465%
sparc644 586 225 467   - +4.238%
x86_64 2 484 124 345   - +1.752%


Test Program: dijkstra_int32

Target  Instructions  Latest  v5.1.0
--    --  --
aarch642 210 199 232   - +1.494%
alpha  1 494 147 129   - +2.151%
arm8 263 046 429   - +2.667%
hppa   5 207 295 544   - +3.046%
m68k   1 725 886 990   - +2.528%
mips   1 495 261 093   - +1.494%
mipsel 1 497 168 507   -  +1.48%
mips64 1 715 429 703   - +1.894%
mips64el   1 695 229 035   -  +1.91%
ppc2 014 590 358   - +1.821%
ppc64  2 206 264 813   - +2.138%
ppc64le2 198 017 266   - +2.147%
riscv641 354 917 032   - +2.396%
s390x  2 916 104 780   - +1.236%
sh41 990 565 824   - +2.671%
sparc642 874 261 717   - +3.831%
x86_64 1 554 014 845   - +2.122%


Test Program: matmult_double

Target  Instructions  Latest  v5.1.0
--    --  --
aarch641 412 256 280   -   +0.3%
alpha  3 234 002 720   - +7.474%
arm8 545 305 325   -  +1.09%
hppa   3 483 506 497   - +4.466%
m68k   3 919 120 341   -+18.433%
mips   2 344 798 117   - +4.092%
mipsel 3 329 921 914   - +5.178%
mips64 2 359 037 334   - +4.075%

QEMU | Pipeline #184542228 has failed for master | 8d90bfc5

[GitLab via]

Your pipeline has failed.

Project: QEMU ( https://gitlab.com/qemu-project/qemu )
Branch: master ( https://gitlab.com/qemu-project/qemu/-/commits/master )

Commit: 8d90bfc5 ( 
https://gitlab.com/qemu-project/qemu/-/commit/8d90bfc5c31ad60f6049dd39be636b06bc00b652
 )
Commit Message: Merge remote-tracking branch 'remotes/pmaydell/...
Commit Author: Peter Maydell ( https://gitlab.com/pm215 )

Pipeline #184542228 ( 
https://gitlab.com/qemu-project/qemu/-/pipelines/184542228 ) triggered by Alex 
Bennée ( https://gitlab.com/stsquad )
had 1 failed build.

Job #714694543 ( https://gitlab.com/qemu-project/qemu/-/jobs/714694543/raw )

Stage: test
Name: acceptance-system-centos
Trace: 22:36:11 ERROR|   File 
"/builds/qemu-project/qemu/python/qemu/machine.py", line 342, in launch
self._launch()

22:36:11 ERROR|   File "/builds/qemu-project/qemu/python/qemu/machine.py", line 
369, in _launch
self._post_launch()

22:36:11 ERROR|   File "/builds/qemu-project/qemu/python/qemu/machine.py", line 
288, in _post_launch
self._qmp.accept()

22:36:11 ERROR|   File "/builds/qemu-project/qemu/python/qemu/qmp.py", line 
236, in accept
return self.__negotiate_capabilities()

22:36:11 ERROR|   File "/builds/qemu-project/qemu/python/qemu/qmp.py", line 
129, in __negotiate_capabilities
resp = self.cmd('qmp_capabilities')

22:36:11 ERROR|   File "/builds/qemu-project/qemu/python/qemu/qmp.py", line 
266, in cmd
return self.cmd_obj(qmp_cmd)

22:36:11 ERROR|   File "/builds/qemu-project/qemu/python/qemu/qmp.py", line 
249, in cmd_obj
raise QMPConnectError("Unexpected empty reply from server")

22:36:11 ERROR| qemu.qmp.QMPConnectError: Unexpected empty reply from server

22:36:11 ERROR| ERROR 34-tests/acceptance/vnc.py:Vnc.test_change_password -> 
QMPConnectError: Unexpected empty reply from server
22:36:11 INFO | 
$ du -chs ${CI_PROJECT_DIR}/avocado-cache
1.2G/builds/qemu-project/qemu/avocado-cache
1.2Gtotal
section_end:1598999776:after_script
ERROR: Job failed: exit code 1



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Re: [PATCH 6/7] hw/display/artist: Fix artist screen resolution

[Richard Henderson]

On 9/1/20 11:34 AM, Helge Deller wrote:
> Artist screen size is limited to 2048 x 2048 pixels and x/y coordination
> addressing needs to be done by OS via an uint32 value which is based on
> a 2048 byte line length, independend of the real screen size.
> 
> Since HP-UX seems to ideally need at least 640 pixels in width, this
> patch ensures that the screen size stays between 640x480 and 2048x2048
> pixels and fixes some pixel glitches were visible before on STI text
> consoles due to the 2048 line length limitation.
> 
> Cc: Sven Schnelle 
> Signed-off-by: Helge Deller 
> ---
>  hw/display/artist.c | 37 +++--
>  1 file changed, 23 insertions(+), 14 deletions(-)
> 
> diff --git a/hw/display/artist.c b/hw/display/artist.c
> index 71982559c6..98bee6d61c 100644
> --- a/hw/display/artist.c
> +++ b/hw/display/artist.c
> @@ -192,6 +192,10 @@ static const char *artist_reg_name(uint64_t addr)
>  }
>  #undef REG_NAME
> 
> +/* artist has a fixed line length of 2048 bytes. */
> +#define ADDR_TO_Y(addr) (((addr) >> 11) & 0x7ff)
> +#define ADDR_TO_X(addr) ((addr) & 0x7ff)

extract32()

> +
>  static int16_t artist_get_x(uint32_t reg)
>  {
>  return reg >> 16;
> @@ -348,13 +352,13 @@ static void artist_invalidate_cursor(ARTISTState *s)
>  y, s->cursor_height);
>  }
> 
> -static void vram_bit_write(ARTISTState *s, int posx, int posy, bool incr_x,
> +static void vram_bit_write(ARTISTState *s, int posy, bool incr_x,
> int size, uint32_t data)
>  {
>  struct vram_buffer *buf;
>  uint32_t vram_bitmask = s->vram_bitmask;
>  int mask, i, pix_count, pix_length;
> -unsigned int offset, width;
> +unsigned int posx, offset, width;
>  uint8_t *data8, *p;
> 
>  pix_count = vram_write_pix_per_transfer(s);
> @@ -366,6 +370,8 @@ static void vram_bit_write(ARTISTState *s, int posx, int 
> posy, bool incr_x,
>  if (s->cmap_bm_access) {
>  offset = s->vram_pos;
>  } else {
> +posx = ADDR_TO_X(s->vram_pos >> 2);
> +posy += ADDR_TO_Y(s->vram_pos >> 2);

Do you in fact want to fold the >> 2 into the ADDR_TO_X/Y, like

#define ADDR_TO_X(POS)  extract32(POS, 2, 11)

?

> @@ -881,16 +886,12 @@ static void artist_reg_write(void *opaque, hwaddr addr, 
> uint64_t val,
>  break;
> 
>  case VRAM_WRITE_INCR_Y:
> -posx = (s->vram_pos >> 2) & 0x7ff;
> -posy = (s->vram_pos >> 13) & 0x3ff;
...
>  case VRAM_WRITE_INCR_X:
>  case VRAM_WRITE_INCR_X2:
> -posx = (s->vram_pos >> 2) & 0x7ff;
> -posy = (s->vram_pos >> 13) & 0x3ff;
...
> -int posy = (addr >> 11) & 0x3ff;

Is it a bug that these Y were using 0x3ff and not 0x7ff?
Because it's pretty consistent...

You should make that a separate change, for sure.

> @@ -1374,6 +1377,12 @@ static void artist_realizefn(DeviceState *dev, Error 
> **errp)
>  struct vram_buffer *buf;
>  hwaddr offset = 0;
> 
> +/* Screen on artist can not be greater than 2048x2048 pixels. */
> +s->width = MAX(s->width, 640);
> +s->width = MIN(s->width, 2048);
> +s->height = MAX(s->height, 480);
> +s->height = MIN(s->height, 2048);

Was the original values chosen by the user?  Should we be giving some sort of
error for out-of-range values?


r~

Re: [PULL 00/47] target-arm queue

[Peter Maydell]

On Tue, 1 Sep 2020 at 16:18, Peter Maydell  wrote:
>
> Just my fp16 work, plus some small stuff for the sbsa-ref board;
> but my rule of thumb is to send a pullreq once I get over about
> 30 patches...
>
> -- PMM
>
> The following changes since commit 2f4c51c0f384d7888a04b4815861e6d5fd244d75:
>
>   Merge remote-tracking branch 
> 'remotes/kraxel/tags/usb-20200831-pull-request' into staging (2020-08-31 
> 19:39:13 +0100)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git 
> tags/pull-target-arm-20200901
>
> for you to fetch changes up to 3f462bf0f6ea6382dd1502d4eb1fcd33c8e774f5:
>
>   hw/arm/sbsa-ref : Add embedded controller in secure memory (2020-09-01 
> 14:01:34 +0100)
>
> 
> target-arm queue:
>  * Implement fp16 support for AArch32 VFP and Neon
>  * hw/arm/sbsa-ref: add "reg" property to DT cpu nodes
>  * hw/arm/sbsa-ref : Add embedded controller in secure memory
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/5.2
for any user-visible changes.

-- PMM

Re: [PATCH 5/7] hw/hppa: Add power button emulation

[Richard Henderson]

On 9/1/20 11:34 AM, Helge Deller wrote:
> Emulate a power button switch, tell SeaBIOS the address via fw_cfg and
> bind the power button to the qemu UI.
> 
> Signed-off-by: Helge Deller 
> ---
>  hw/hppa/machine.c | 32 
>  1 file changed, 32 insertions(+)

Reviewed-by: Richard Henderson 


r~

Re: [PATCH 4/7] hw/hppa: Inform SeaBIOS about fw_cfg port address

[Richard Henderson]

On 9/1/20 11:34 AM, Helge Deller wrote:
> -/* QEMU fw_cfg interface port */
> -#define QEMU_FW_CFG_IO_BASE (MEMORY_HPA + 0x80)
> +#define FW_CFG_IO_BASE  0xfffa

Why is this value changing?


r~

Re: [PATCH 3/7] hw/hppa: Store boot device in fw_cfg section

[Richard Henderson]

On 9/1/20 11:34 AM, Helge Deller wrote:
> Signed-off-by: Helge Deller 
> ---
>  hw/hppa/machine.c | 9 +
>  1 file changed, 9 insertions(+)

Reviewed-by: Richard Henderson 

r~

Re: [PATCH 2/7] hw/hppa: Make number of TLB and BTLB entries configurable

[Richard Henderson]

On 9/1/20 11:34 AM, Helge Deller wrote:
> diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
> index 90aeefe2a4..e9d84d0f03 100644
> --- a/hw/hppa/machine.c
> +++ b/hw/hppa/machine.c
> @@ -72,6 +72,14 @@ static FWCfgState *create_fw_cfg(MachineState *ms)
>  fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
>  g_memdup(, sizeof(val)), sizeof(val));
> 
> +val = cpu_to_le64(HPPA_TLB_ENTRIES);

I guess you don't have a cpu structure here against which you could apply
ARRAY_SIZE?

>  /* ??? The number of entries isn't specified by the architecture.  */
> +#define HPPA_TLB_ENTRIES256
> +#define HPPA_BTLB_ENTRIES   0

What's a btlb entry?
The indented defines are weird.


r~

Re: [PATCH 0/4] hw/misc/a9scu: Verify CPU count is valid and simplify a bit

[Richard Henderson]

On 9/1/20 7:40 AM, Philippe Mathieu-Daudé wrote:
> Trivial patches:
> - verify the A9 CPU count is in range,
> - simplify using MemoryRegionOps valid/impl,
> - log unimplemented registers.
> 
> Philippe Mathieu-Daudé (4):
>   hw/misc/a9scu: Do not allow invalid CPU count
>   hw/misc/a9scu: Simplify setting MemoryRegionOps::valid fields
>   hw/misc/a9scu: Simplify setting MemoryRegionOps::impl fields
>   hw/misc/a9scu: Report unimplemented accesses with qemu_log_mask(UNIMP)

Reviewed-by: Richard Henderson 

r~

Re: [PATCH 00/13] Make QEMU installation relocatable

[Paolo Bonzini]

Il mar 1 set 2020, 23:15 Mark Cave-Ayland 
ha scritto:

> I think this means that it's missing something from Yonggang Luo's patch
> here:
> https://lists.gnu.org/archive/html/qemu-devel/2020-08/msg07668.html.


Yes, I am a bit afraid of that patch. I don't understand exactly why it's
needed and I need to look more closely.

Paolo

I haven't looked
> at patch 1 in that series for converting undefsym.sh to undefsym.py yet,
> although
> last time I was able to get a working build without it.
>
> Also patch 13 wouldn't apply for me to git master: I ended up having to
> make the
> changes by hand, so looks like something requiring a rebase has recently
> snuck in.
>
>
> ATB,
>
> Mark.
>
>

Re: [PATCH 00/13] Make QEMU installation relocatable

[Mark Cave-Ayland]

On 01/09/2020 07:20, Paolo Bonzini wrote:

> Right now, the installation of QEMU is not relocatable; there is
> a local hack in os_find_datadir() so that Windows binaries look
> for ROMs in the executable directory, but that has several limitations:
> 
> - it does not extend to configuration files, icons, etc.
> 
> - it does not allow changing the data directory in any way
> 
> - it does not apply to POSIX platforms
> 
> This series fixes that by making all paths within the installation
> prefix relative to the executable.  This in practice means all paths
> will be relocatable, except for /etc and /var if they're moved
> outside the prefix.
> 
> Here is an example of relocatability; before:
> 
>   $ make DESTDIR=$PWD/test install
>   $ cd test/usr/local/bin
>   $ ./qemu-system-ppc -L help
>   /usr/local/share/qemu-firmware
>   /usr/local/share/qemu
> 
> After:
> 
>   $ make DESTDIR=$PWD/test install
>   $ cd test/usr/local/bin
>   $ ./qemu-system-ppc -L help
>   
> /home/pbonzini/work/upstream/qemu/+build/test/usr/local/bin/../share/qemu-firmware
>   /home/pbonzini/work/upstream/qemu/+build/test/usr/local/bin/../share/qemu
> 
> The main benefit of this is on Windows, as mentioned above; but it also
> makes behavior more consistent across platforms and allows the removal
> of the hack that hides the "c:/Program Files/QEMU" prefix from Meson
> during cross compilation.
> 
> Paolo

Hi Paolo,

I've managed to give this a quick go this evening and I see the same link error
reported by Yonggang Luo at
https://lists.gnu.org/archive/html/qemu-devel/2020-09/msg00586.html, i.e.:

"cc"  -o storage-daemon/qemu-storage-daemon.exe version.rc_version.o
storage-daemon/qemu-storage-daemon.exe.p/meson-generated_.._qapi_qapi-introspect.c.obj
 
storage-daemon/qemu-storage-daemon.exe.p/meson-generated_.._qapi_qapi-commands.c.obj
storage-daemon/qemu-storage-daemon.exe.p/meson-generated_.._qapi_qapi-emit-events.c.obj
storage-daemon/qemu-storage-daemon.exe.p/meson-generated_.._qapi_qapi-events.c.obj
storage-daemon/qemu-storage-daemon.exe.p/meson-generated_.._qapi_qapi-visit.c.obj
storage-daemon/qemu-storage-daemon.exe.p/meson-generated_.._qapi_qapi-init-commands.c.obj
storage-daemon/qemu-storage-daemon.exe.p/meson-generated_.._qapi_qapi-types.c.obj
storage-daemon/qemu-storage-daemon.exe.p/qemu-storage-daemon.c.obj
storage-daemon/qemu-storage-daemon.exe.p/.._iothread.c.obj
storage-daemon/qemu-storage-daemon.exe.p/.._blockdev-nbd.c.obj
storage-daemon/qemu-storage-daemon.exe.p/.._blockdev.c.obj
storage-daemon/qemu-storage-daemon.exe.p/.._job-qmp.c.obj
"-L/home/Mark/qemu/build/dtc/libfdt" "-Wl,--allow-shlib-undefined"
"-Wl,--whole-archive" "libqmp.fa" "libblock.fa" "crypto/libcrypto.fa"
"authz/libauthz.fa" "qom/libqom.fa" "io/libio.fa" "chardev/libchardev.fa"
"-Wl,--no-whole-archive" "-Wl,--nxcompat" "-Wl,--no-seh" "-Wl,--dynamicbase"
"-Wl,--warn-common" "-m64" "-fstack-protector-strong" "-Wl,--start-group"
"libqemuutil.a" "libqmp.fa" "libblock.fa" "crypto/libcrypto.fa" 
"authz/libauthz.fa"
"qom/libqom.fa" "io/libio.fa" "chardev/libchardev.fa" "@block.syms" "-lwinmm"
"-LC:/msys64/mingw64/lib" "-lgio-2.0" "-lgobject-2.0" "-lglib-2.0" "-lintl"
"-pthread" "-lm" "-LC:/msys64/mingw64/lib" "-lgthread-2.0" "-lglib-2.0" "-lintl"
"-lws2_32" "-LC:/msys64/mingw64/lib" "-lzstd" "-LC:/msys64/mingw64/lib" "-lxml2"
"-LC:/msys64/mingw64/lib" "-lz" "-lbz2" "-LC:/msys64/mingw64/lib" 
"-lgthread-2.0"
"-lglib-2.0" "-lintl" "-mconsole" "-lkernel32" "-luser32" "-lgdi32" "-lwinspool"
"-lshell32" "-lole32" "-loleaut32" "-luuid" "-lcomdlg32" "-ladvapi32" 
"-Wl,--end-group"
C:/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lfdt
C:/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lcapstone
C:/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lfdt
C:/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lcapstone
C:/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lslirp
C:/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lslirp
collect2.exe: error: ld returned 1 exit status
make[1]: *** [Makefile.ninja:1405: qemu-system-ppc.exe] Error 1
make[1]: *** Waiting for unfinished jobs
collect2.exe: error: ld returned 1 exit status
make[1]: *** [Makefile.ninja:1407: qemu-system-ppcw.exe] Error 1
make[1]: Leaving directory '/home/Mark/qemu/build'
make: *** [GNUmakefile:11: install] Error 2

I think this means that it's missing something from Yonggang Luo's patch here:
https://lists.gnu.org/archive/html/qemu-devel/2020-08/msg07668.html. I haven't 
looked
at patch 1 in that series for converting undefsym.sh to undefsym.py yet, 
although
last time I was able to get a working build without it.

Also 

Re: [RFC v8 0/5] memory: Delete assertion in memory_region_unregister_iommu_notifier

[Peter Xu]

On Tue, Sep 01, 2020 at 04:26:03PM +0200, Eugenio Pérez wrote:
> I am able to hit this assertion when a Red Hat 7 guest virtio_net device
> raises an "Invalidation" of all the TLB entries. This happens in the
> guest's startup if 'intel_iommu=on' argument is passed to the guest
> kernel and right IOMMU/ATS devices are declared in qemu's command line.

Thanks for working on this, Eugenio!  Sorry to let the original one-liner patch
grow into a patchset... :)

I think it at least looks very good to me in general, besides another trivial
comment on patch 4.

-- 
Peter Xu

Re: [RFC v8 5/5] memory: Skip bad range assertion if notifier is DEVIOTLB type

[Peter Xu]

On Tue, Sep 01, 2020 at 04:26:08PM +0200, Eugenio Pérez wrote:
> Signed-off-by: Eugenio Pérez 

Reviewed-by: Peter Xu 

-- 
Peter Xu

Re: [RFC v8 1/5] memory: Rename memory_region_notify_one to memory_region_notify_iommu_one

[Peter Xu]

On Tue, Sep 01, 2020 at 04:26:04PM +0200, Eugenio Pérez wrote:
> Previous name didn't reflect the iommu operation.
> 
> Signed-off-by: Eugenio Pérez 

Reviewed-by: Peter Xu 

-- 
Peter Xu

Re: [RFC v8 4/5] intel_iommu: Do not notify regular iotlb to device-iotlb notifiers

[Peter Xu]

On Tue, Sep 01, 2020 at 04:26:07PM +0200, Eugenio Pérez wrote:
> This improves performance in case of netperf with vhost-net:
> * TCP_STREAM: From 1923.6Mbit/s to 2175.13Mbit/s (13%)
> * TCP_RR: From 8464.73 trans/s to 8932.70 trans/s (5.5%)
> * UDP_RR: From 8562.08 trans/s to 9005.62/s (5.1%)
> * UDP_STREAM: No change observed (insignificant 0.1% improvement)

Just to confirm: are these numbers about applying this patch before/after, or
applying the whole series before/after?

Asked since we actually optimized two parts:

Firstly we avoid sending two invalidations for vhost.  That's done by the
previous patch, afaict.

Secondly, this patch avoids the page walk for vhost since not needed.

Am I right?

> 
> Signed-off-by: Eugenio Pérez 
> ---
>  hw/i386/intel_iommu.c | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index cdddb089e7..fe82391b73 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -1964,6 +1964,12 @@ static void 
> vtd_iotlb_domain_invalidate(IntelIOMMUState *s, uint16_t domain_id)
>  vtd_iommu_unlock(s);
>  
>  QLIST_FOREACH(vtd_as, >vtd_as_with_notifiers, next) {
> +if (vtd_as->iommu.iommu_notify_flags & IOMMU_NOTIFIER_DEVIOTLB) {
> +/* If IOMMU memory region is DEVICE IOTLB type, it does not make
> + * sense to send regular IOMMU notifications. */
> +continue;
> +}
> +

We want to avoid vtd_sync_shadow_page_table() for vhost, however IMHO a better
expression would be:

if (!(vtd_as->iommu.iommu_notify_flags &
(IOMMU_NOTIFIER_MAP | IOMMU_NOTIFIER_UNMAP))) {
continue;
}

The thing is we can't avoid the page sync if e.g. we're registered with
MAP|UNMAP|DEVIOTLB.  The important thing here, imho, is MAP|UNMAP because these
two messages are used for shadow page synchronizations, so we can skip that if
neither of the message is registered.

Besides, we can add this at the entry of vtd_sync_shadow_page_table() so that
all callers of vtd_sync_shadow_page_table() can benefit.

>  if (!vtd_dev_to_context_entry(s, pci_bus_num(vtd_as->bus),
>vtd_as->devfn, ) &&
>  domain_id == vtd_get_domain_id(s, )) {
> -- 
> 2.18.1
> 

-- 
Peter Xu

Re: [RFC v8 3/5] memory: Add IOMMU_DEVIOTLB_UNMAP IOMMUTLBNotificationType

[Peter Xu]

On Tue, Sep 01, 2020 at 04:26:06PM +0200, Eugenio Pérez wrote:
> Adapt intel and vhost to use this new notification type
> 
> Signed-off-by: Eugenio Pérez 

Reviewed-by: Peter Xu 

-- 
Peter Xu

Re: [RFC v8 2/5] memory: Add IOMMUTLBEvent

[Peter Xu]

On Tue, Sep 01, 2020 at 04:26:05PM +0200, Eugenio Pérez wrote:
> This way we can tell between regulars IOMMURLBEntries (entry of IOMMU
> hardware) and notifications.

s/regulars IOMMURLBEntries/regular IOMMUTLBEntry/

> 
> In the notifications, we set explicitly if it is a MAPs or an UNMAP,
> instead of trusting in entry permissions to differenciate them.
> 
> Signed-off-by: Eugenio Pérez 

[...]

>  struct IOMMUTLBEntry {
> -AddressSpace*target_as;
> -hwaddr   iova;
> -hwaddr   translated_addr;
> -hwaddr   addr_mask;  /* 0xfff = 4k translation */
> -IOMMUAccessFlags perm;
> +AddressSpace*target_as;
> +hwaddr   iova;
> +hwaddr   translated_addr;
> +hwaddr   addr_mask;  /* 0xfff = 4k translation */
> +IOMMUAccessFlags perm;
>  };

If these lines are identical, then we can avoid touching the spaces.

With above changes, please feel free to add:

Reviewed-by: Peter Xu 

-- 
Peter Xu

Cirrus CI for msys2 are working now, but still buiding failed

[Yonggang Luo]

https://cirrus-ci.com/task/6375504892657664


failed with:
```

Compiling C object
libqemu-s390x-softmmu.fa.p/meson-generated_.._trace_generated-helpers.c.obj
Compiling C object
libqemu-s390x-softmmu.fa.p/meson-generated_.._qapi_qapi-events.c.obj
Compiling C object
libqemu-s390x-softmmu.fa.p/meson-generated_.._qapi_qapi-emit-events.c.obj
Linking static target libblock.fa
Linking target qemu-system-aarch64.exe
Linking target qemu-system-aarch64w.exe
Linking target qemu-system-alpha.exe
Linking target qemu-system-alphaw.exe
Linking target qemu-system-arm.exe
Linking target qemu-system-armw.exe
Linking target qemu-system-avr.exe
Linking target qemu-system-avrw.exe
C:/tools/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lfdt
C:/tools/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lfdt
C:/tools/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lfdt
C:/tools/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lfdt
collect2.exe: error: ld returned 1 exit status
collect2.exe: error: ld returned 1 exit status
collect2.exe: error: ld returned 1 exit status
collect2.exe: error: ld returned 1 exit status
make: *** [Makefile.ninja:2258: qemu-system-avr.exe] Error 1
make: *** Waiting for unfinished jobs
make: *** [Makefile.ninja:1970: qemu-system-alpha.exe] Error 1
make: *** [Makefile.ninja:2260: qemu-system-avrw.exe] Error 1
make: *** [Makefile.ninja:1972: qemu-system-alphaw.exe] Error 1
C:/tools/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lfdt
C:/tools/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lfdt
C:/tools/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lfdt
C:/tools/msys64/mingw64/bin/../lib/gcc/x86_64-w64-mingw32/10.2.0/../../../../x86_64-w64-mingw32/bin/ld.exe:
cannot find -lfdt
collect2.exe: error: ld returned 1 exit status
collect2.exe: error: ld returned 1 exit status
make: *** [Makefile.ninja:2184: qemu-system-armw.exe] Error 1
make: *** [Makefile.ninja:2182: qemu-system-arm.exe] Error 1
collect2.exe: error: ld returned 1 exit status
make: *** [Makefile.ninja:1875: qemu-system-aarch64.exe] Error 1
collect2.exe: error: ld returned 1 exit status
make: *** [Makefile.ninja:1877: qemu-system-aarch64w.exe] Error 1

C:\Users\ContainerAdministrator\AppData\Local\Temp\cirrus-ci-build>if
2 NEQ 0 exit /b 2

Exit status: 2

```



-- 
 此致
礼
罗勇刚
Yours
sincerely,
Yonggang Luo

Re: [PATCH v1 1/6] net/can: Initial host SocketCan support for CAN FD.

[Vikram Garhwal]

Hi Jan,
A couple of comments on this patch.
On Tue, Jul 14, 2020 at 02:20:14PM +0200, p...@cmp.felk.cvut.cz wrote:
> From: Jan Charvat 
>
> Signed-off-by: Jan Charvat 
> Signed-off-by: Pavel Pisa 
> ---
>  hw/net/can/can_sja1000.c |  2 ++
>  include/net/can_emu.h|  8 ++-
>  net/can/can_socketcan.c  | 47 +---
>  3 files changed, 53 insertions(+), 4 deletions(-)
>
> diff --git a/hw/net/can/can_sja1000.c b/hw/net/can/can_sja1000.c
> index ea915a023a..d83c550edc 100644
> --- a/hw/net/can/can_sja1000.c
> +++ b/hw/net/can/can_sja1000.c
> @@ -268,6 +268,7 @@ static void buff2frame_pel(const uint8_t *buff, 
> qemu_can_frame *frame)
>  {
>  uint8_t i;
>
> +frame->flags = 0;
>  frame->can_id = 0;
>  if (buff[0] & 0x40) { /* RTR */
>  frame->can_id = QEMU_CAN_RTR_FLAG;
> @@ -303,6 +304,7 @@ static void buff2frame_bas(const uint8_t *buff, 
> qemu_can_frame *frame)
>  {
>  uint8_t i;
>
> +frame->flags = 0;
>  frame->can_id = ((buff[0] << 3) & (0xff << 3)) + ((buff[1] >> 5) & 0x07);
>  if (buff[1] & 0x10) { /* RTR */
>  frame->can_id = QEMU_CAN_RTR_FLAG;
> diff --git a/include/net/can_emu.h b/include/net/can_emu.h
> index fce9770928..c6164dcfb4 100644
> --- a/include/net/can_emu.h
> +++ b/include/net/can_emu.h
> @@ -46,7 +46,8 @@ typedef uint32_t qemu_canid_t;
>  typedef struct qemu_can_frame {
>  qemu_canid_tcan_id;  /* 32 bit CAN_ID + EFF/RTR/ERR flags */
>  uint8_t can_dlc; /* data length code: 0 .. 8 */
> -uint8_t data[8] QEMU_ALIGNED(8);
> +uint8_t flags;
> +uint8_t data[64] QEMU_ALIGNED(8);
>  } qemu_can_frame;
>
>  /* Keep defines for QEMU separate from Linux ones for now */
> @@ -58,6 +59,10 @@ typedef struct qemu_can_frame {
>  #define QEMU_CAN_SFF_MASK 0x07FFU /* standard frame format (SFF) */
>  #define QEMU_CAN_EFF_MASK 0x1FFFU /* extended frame format (EFF) */
>
> +#define QEMU_CAN_FRMF_BRS 0x01 /* bit rate switch (2nd bitrate for data) 
> */
> +#define QEMU_CAN_FRMF_ESI 0x02 /* error state ind. of transmitting node 
> */
> +#define QEMU_CAN_FRMF_TYPE_FD 0x10 /* internal bit ind. of CAN FD frame */
> +
>  /**
>   * struct qemu_can_filter - CAN ID based filter in can_register().
>   * @can_id:   relevant bits of CAN ID which are not masked out.
> @@ -97,6 +102,7 @@ struct CanBusClientState {
>  char *model;
>  char *name;
>  void (*destructor)(CanBusClientState *);
> +bool fd_mode;
>  };
>
>  #define TYPE_CAN_BUS "can-bus"
> diff --git a/net/can/can_socketcan.c b/net/can/can_socketcan.c
> index b7ef63ec0e..fbc0b62ea4 100644
> --- a/net/can/can_socketcan.c
> +++ b/net/can/can_socketcan.c
> @@ -103,6 +103,14 @@ static void can_host_socketcan_read(void *opaque)
>  return;
>  }
>
> +if (!ch->bus_client.fd_mode) {
> +c->buf[0].flags = 0;
> +} else {
> +if (c->bufcnt > CAN_MTU) {
> +c->buf[0].flags |= QEMU_CAN_FRMF_TYPE_FD;
> +}
> +}
> +
>  can_bus_client_send(>bus_client, c->buf, 1);
>
>  if (DEBUG_CAN) {
> @@ -121,12 +129,21 @@ static ssize_t 
> can_host_socketcan_receive(CanBusClientState *client,
>  CanHostState *ch = container_of(client, CanHostState, bus_client);
>  CanHostSocketCAN *c = CAN_HOST_SOCKETCAN(ch);
>
> -size_t len = sizeof(qemu_can_frame);
> +size_t len;
>  int res;
>
>  if (c->fd < 0) {
>  return -1;
>  }
> +if (frames->flags & QEMU_CAN_FRMF_TYPE_FD) {
> +if (!ch->bus_client.fd_mode) {
> +return 0;
> +}
> +len = CANFD_MTU;
> +} else {
> +len = CAN_MTU;
> +
> +}
>
>  res = write(c->fd, frames, len);
>
> @@ -172,6 +189,8 @@ static void can_host_socketcan_connect(CanHostState *ch, 
> Error **errp)
>  {
>  CanHostSocketCAN *c = CAN_HOST_SOCKETCAN(ch);
>  int s; /* can raw socket */
> +int mtu;
> +int enable_canfd = 1;
>  struct sockaddr_can addr;
>  struct ifreq ifr;
>
> @@ -185,13 +204,34 @@ static void can_host_socketcan_connect(CanHostState 
> *ch, Error **errp)
>  addr.can_family = AF_CAN;
>  memset(_name, 0, sizeof(ifr.ifr_name));
>  strcpy(ifr.ifr_name, c->ifname);
> +/* check if the frame fits into the CAN netdevice */
>  if (ioctl(s, SIOCGIFINDEX, ) < 0) {
>  error_setg_errno(errp, errno,
> - "SocketCAN host interface %s not available", 
> c->ifname);
> + "SocketCAN host interface %s not available",
> + c->ifname);
May be this formatting change in a different patch? As this is not related to
CANFD.
>  goto fail;
>  }
>  addr.can_ifindex = ifr.ifr_ifindex;
>
> +if (ioctl(s, SIOCGIFMTU, ) < 0) {
> +error_setg_errno(errp, errno,
> + "SocketCAN host interface %s SIOCGIFMTU failed",
> + c->ifname);
> +goto fail;
> +}
> +mtu = ifr.ifr_mtu;
> +
> 

Re: [PATCH 0/7] hppa power button support, graphics updates and firmware fixes

[Helge Deller]

Hi Philippe,

On 01.09.20 21:37, Philippe Mathieu-Daudé wrote:
> On 9/1/20 8:34 PM, Helge Deller wrote:
>> Add emulation for a power button on hppa,
>> fix quite some bugs in seabios-hppa firmware for artist graphics card
>> fix boot with old Linux installation CDs.
>
> I started to review the version you sent last week and took few notes,

Thanks!

> are there big changes in this version (is it a REPOST or a v2)?
> (I think you just appended 2 extra patches posted separately).

Yes, it's a v2 version with the two patches appended.
Otherwise no real changes to qemu, but some more fixes in the included Seabios.

Helge

>
> Thanks,
>
> Phil.
>
>>
>> Helge Deller (7):
>>   seabios-hppa: Update SeaBIOS to hppa-qemu-5.2-2 tag
>>   hw/hppa: Make number of TLB and BTLB entries configurable
>>   hw/hppa: Store boot device in fw_cfg section
>>   hw/hppa: Inform SeaBIOS about fw_cfg port address
>>   hw/hppa: Add power button emulation
>>   hw/display/artist: Fix artist screen resolution
>>   target/hppa: Fix boot with old Linux installation CDs
>>
>>  hw/display/artist.c   |  37 +++--
>>  hw/hppa/hppa_hardware.h   |   3 +-
>>  hw/hppa/machine.c |  56 +-
>>  pc-bios/hppa-firmware.img | Bin 783192 -> 785696 bytes
>>  roms/seabios-hppa |   2 +-
>>  target/hppa/cpu.h |   5 +++-
>>  target/hppa/insns.decode  |  10 +++
>>  7 files changed, 89 insertions(+), 24 deletions(-)
>>
>> --
>> 2.21.3
>>
>>
>

Re: [RFC v3 1/1] memory: Skip bad range assertion if notifier supports arbitrary masks

[Peter Xu]

On Tue, Sep 01, 2020 at 11:05:18AM +0800, Jason Wang wrote:
> 
> On 2020/8/21 下午10:12, Peter Xu wrote:
> > On Thu, Aug 20, 2020 at 10:28:00AM +0800, Jason Wang wrote:
> > > On 2020/8/19 下午11:50, Peter Xu wrote:
> > > > On Wed, Aug 19, 2020 at 03:15:26PM +0800, Jason Wang wrote:
> > > > > Yes, actually, I feel confused after reading the codes. Is 
> > > > > notifier->start
> > > > > IOVA or GPA?
> > > > > 
> > > > > In vfio.c, we did:
> > > > > 
> > > > >       iommu_notifier_init(>n, vfio_iommu_map_notify,
> > > > >       IOMMU_NOTIFIER_ALL,
> > > > >       section->offset_within_region,
> > > > >       int128_get64(llend),
> > > > >       iommu_idx);
> > > > > 
> > > > > So it looks to me the start and end are GPA, but the assertion above 
> > > > > check
> > > > > it against IOVA which seems to be wrong 
> > > > It should be iova; both section->offset_within_region and llend are for 
> > > > the
> > > > device's iova address space.  Thanks,
> > > > 
> > > Interesting, how can memory region know which IOVA is used by guest?
> > Does it need to know? :)
> > 
> > AFAICT what we do here is only register with the whole possible IOVA address
> > space (e.g., across the whole 64bit address space).  Then vfio will get
> > notifications when there're new iova ranges mapped into it.
> 
> 
> Right, but the whole IOVA address space should be something vIOMMU specific,
> e.g for Intel it should be calculated by GAW, but I found:
> 
>     memory_region_init_iommu(_dev_as->iommu,
> sizeof(vtd_dev_as->iommu),
>  TYPE_INTEL_IOMMU_MEMORY_REGION, OBJECT(s),
>  name, UINT64_MAX);
> 
> which assumes UINT64_MAX.

Right.  AFAICT it can be reduced to gaw width, but I don't see a problem either
even with UINT64_MAX (as long as it covers the range specified by gaw).  Or did
I miss something?  Thanks,

-- 
Peter Xu

Re: [PATCH 0/7] hppa power button support, graphics updates and firmware fixes

[Philippe Mathieu-Daudé]

Hi Helge,

On 9/1/20 8:34 PM, Helge Deller wrote:
> Add emulation for a power button on hppa,
> fix quite some bugs in seabios-hppa firmware for artist graphics card
> fix boot with old Linux installation CDs.

I started to review the version you sent last week and took few notes,
are there big changes in this version (is it a REPOST or a v2)?
(I think you just appended 2 extra patches posted separately).

Thanks,

Phil.

> 
> Helge Deller (7):
>   seabios-hppa: Update SeaBIOS to hppa-qemu-5.2-2 tag
>   hw/hppa: Make number of TLB and BTLB entries configurable
>   hw/hppa: Store boot device in fw_cfg section
>   hw/hppa: Inform SeaBIOS about fw_cfg port address
>   hw/hppa: Add power button emulation
>   hw/display/artist: Fix artist screen resolution
>   target/hppa: Fix boot with old Linux installation CDs
> 
>  hw/display/artist.c   |  37 +++--
>  hw/hppa/hppa_hardware.h   |   3 +-
>  hw/hppa/machine.c |  56 +-
>  pc-bios/hppa-firmware.img | Bin 783192 -> 785696 bytes
>  roms/seabios-hppa |   2 +-
>  target/hppa/cpu.h |   5 +++-
>  target/hppa/insns.decode  |  10 +++
>  7 files changed, 89 insertions(+), 24 deletions(-)
> 
> --
> 2.21.3
> 
> 

Re: [PATCH] fuzz: Add support for custom fuzzing library

[Paolo Bonzini]

On 01/09/20 20:18, Alexander Bulekov wrote:
> ---
>  configure| 12 ++--
>  meson.build  |  6 +-
>  tests/qtest/fuzz/meson.build |  5 ++---
>  3 files changed, 17 insertions(+), 6 deletions(-)
> 
> 
> Hi Paolo,
> Here I'm trying to specify the linker-script with
> add_project_link_arguments. How I'm testing this:
> 
> $ CC=clang-10 CXX=clang++-10 ../configure --enable-fuzzing
> $ make V=1 "-j$(nproc)" qemu-fuzz-i386
> 
> clang++-10  -o qemu-fuzz-i386 
> qemu-fuzz-i386.p/tests_qtest_fuzz_qtest_wrappers.c.o \
> ... libblock.fa chardev/libchardev.fa \
> -Wl,--start-group tests/qtest/libqos/libqos.a -Wl,--no-whole-archive \
> -Wl,-T,/home/alxndr/Development/qemu/tests/qtest/fuzz/fork_fuzz.ld \
> ... \
> -Wl,-rpath-link,/home/alxndr/Development/qemu/build/ -lstdc++ -Wl,--end-group
> 
> Maybe if I can get the oss-fuzz LIB_FUZZING_ENGINE
> (/usr/lib/libFuzzingEngine.a) into the --start-group, that could also
> solve the issue... I'll take another look at exactly what the oss-fuzz
> build container does.

Actually your patch is pretty close, just by hacking

diff --git a/tests/qtest/libqos/meson.build b/tests/qtest/libqos/meson.build
index 19931b9248..2bc46c5a84 100644
--- a/tests/qtest/libqos/meson.build
+++ b/tests/qtest/libqos/meson.build
@@ -52,6 +52,6 @@ libqos = static_library('qos',
 'arm-xilinx-zynq-a9-machine.c',
 'ppc64_pseries-machine.c',
 'x86_64_pc-machine.c',
-), build_by_default: false)
+), name_suffix: 'fa', build_by_default: false)

 qos = declare_dependency(link_whole: libqos)

I can get it to work.  Better find a way to fix it in Meson though,
because relying on the ".a" suffix is very brittle.

Paolo

Re: [PATCH 03/13] oslib-posix: default exec_dir to bindir

[Paolo Bonzini]

On 01/09/20 20:04, Richard Henderson wrote:
> On 8/31/20 11:20 PM, Paolo Bonzini wrote:
>> +exec_dir = g_strdup(CONFIG_BINDIR);
> 
> Why the strdup?  The string constant should be fine, IIUC.

Of course it is.

Paolo

Re: [PATCH v7 4/8] ppc/e500: Use start-powered-off CPUState property

[Thiago Jung Bauermann]

Philippe Mathieu-Daudé  writes:

> On 8/26/20 7:55 AM, Thiago Jung Bauermann wrote:
>> Instead of setting CPUState::halted to 1 in ppce500_cpu_reset_sec(), use
>> the start-powered-off property which makes cpu_common_reset() initialize it
>> to 1 in common code.
>> 
>> Also change creation of CPU object from cpu_create() to object_new() and
>> qdev_realize_and_unref() because cpu_create() realizes the CPU and it's not
>> possible to set a property after the object is realized.
>> 
>> Signed-off-by: Thiago Jung Bauermann 
>> ---
>>  hw/ppc/e500.c | 13 +
>>  1 file changed, 9 insertions(+), 4 deletions(-)
>
> Reviewed-by: Philippe Mathieu-Daudé 

Thanks!

-- 
Thiago Jung Bauermann
IBM Linux Technology Center

Re: [PATCH] fuzz: Add support for custom fuzzing library

[Paolo Bonzini]

On 01/09/20 20:18, Alexander Bulekov wrote:
> Maybe if I can get the oss-fuzz LIB_FUZZING_ENGINE
> (/usr/lib/libFuzzingEngine.a) into the --start-group, that could also
> solve the issue... I'll take another look at exactly what the oss-fuzz
> build container does.

Yeah, that might do it.  You can try adding it to the fork_fuzz dependency.

Paolo

[PATCH 7/7] target/hppa: Fix boot with old Linux installation CDs

[Helge Deller]

The current qemu hppa emulation emulates a PA1.1 CPU, which can only execute
the 32-bit instruction set. For unknown 64-bit instructions, a instruction trap
is sent to the virtual CPU.
This behaviour is correct in the sense that we emulate what the PA1.1
specification says.

But when trying to boot older Linux installation images, e.g.
ftp://parisc.parisc-linux.org/debian-cd/debian-5.0/lenny-5.0.10-hppa-iso-cd/cdimage.debian.org/debian-5010-hppa-netinst.iso
one finds that qemu fails to boot those images.
The problem is, that in the Linux kernel (e.g. 2.6.26) of those old images
64-bit instructions were used by mistake in the fault handlers. The relevant
instructions (the ",*" indicates that it's a 64-bit instruction) I see are:
   0:   09 3e 04 29 sub,* sp,r9,r9
   0:   08 3d 06 3d add,* ret1,r1,ret1
   0:   0a 09 02 61 or,* r9,r16,r1
   0:   0a ba 00 3a andcm,* r26,r21,r26
   0:   08 33 02 33 and,* r19,r1,r19

The interesting part is, that real physical 32-bit machines (like the 700/64
and B160L - which is the one we emulate) do boot those images and thus seem to
simply ignore the 64-bit flag on those instructions.

The patch below modifies the qemu instruction decoder to ignore the 64-bit flag
too - which is what real 32-bit hardware seems to do.  With this modification
qemu now successfully boots those older images too.

I suggest to apply the patch below - even if it does not reflect what the SPEC
says.  Instead it increases the compatibility to really existing hardware and
seem to not create problems if we add real PA2.0 support anytime later.

Signed-off-by: Helge Deller 
Reviewed-by: Richard Henderson 
---
 target/hppa/insns.decode | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode
index f0dd71dd08..dceaad65e9 100644
--- a/target/hppa/insns.decode
+++ b/target/hppa/insns.decode
@@ -149,9 +149,9 @@ lci 01 - - -- 01001100 0 t:5
 # Arith/Log
 

-andcm   10 . .  00 0 .  @rrr_cf
-and 10 . .  001000 0 .  @rrr_cf
-or  10 . .  001001 0 .  @rrr_cf
+andcm   10 . .  00 - .  @rrr_cf
+and 10 . .  001000 - .  @rrr_cf
+or  10 . .  001001 - .  @rrr_cf
 xor 10 . .  001010 0 .  @rrr_cf
 uxor10 . .  001110 0 .  @rrr_cf
 ds  10 . .  010001 0 .  @rrr_cf
@@ -161,13 +161,13 @@ uaddcm_tc   10 . .  100111 0 .  
@rrr_cf
 dcor10 . 0  101110 0 .  @rr_cf
 dcor_i  10 . 0  10 0 .  @rr_cf

-add 10 . .  0110.. 0 .  @rrr_cf_sh
+add 10 . .  0110.. - .  @rrr_cf_sh
 add_l   10 . .  1010.. 0 .  @rrr_cf_sh
 add_tsv 10 . .  1110.. 0 .  @rrr_cf_sh
 add_c   10 . .  011100 0 .  @rrr_cf_sh0
 add_c_tsv   10 . .  00 0 .  @rrr_cf_sh0

-sub 10 . .  01 0 .  @rrr_cf
+sub 10 . .  01 - .  @rrr_cf
 sub_tsv 10 . .  11 0 .  @rrr_cf
 sub_tc  10 . .  010011 0 .  @rrr_cf
 sub_tsv_tc  10 . .  110011 0 .  @rrr_cf
--
2.21.3

[PATCH 2/7] hw/hppa: Make number of TLB and BTLB entries configurable

[Helge Deller]

Until now the TLB size was fixed at 256 entries. To allow operating
systems to utilize more TLB entries in the future, we need to tell
firmware how many TLB entries we actually support in the emulation.
Firmware then reports this to the operating system via the
PDC_CACHE_INFO call.

This patch simply does the preparation to allow more TLB entries.

Signed-off-by: Helge Deller 
---
 hw/hppa/machine.c | 8 
 target/hppa/cpu.h | 5 -
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 90aeefe2a4..e9d84d0f03 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -72,6 +72,14 @@ static FWCfgState *create_fw_cfg(MachineState *ms)
 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
 g_memdup(, sizeof(val)), sizeof(val));

+val = cpu_to_le64(HPPA_TLB_ENTRIES);
+fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
+g_memdup(, sizeof(val)), sizeof(val));
+
+val = cpu_to_le64(HPPA_BTLB_ENTRIES);
+fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
+g_memdup(, sizeof(val)), sizeof(val));
+
 return fw_cfg;
 }

diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 801a4fb1ba..440104dc3c 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -196,9 +196,12 @@ struct CPUHPPAState {
 target_ureg shadow[7];   /* shadow registers */

 /* ??? The number of entries isn't specified by the architecture.  */
+#define HPPA_TLB_ENTRIES256
+#define HPPA_BTLB_ENTRIES   0
+
 /* ??? Implement a unified itlb/dtlb for the moment.  */
 /* ??? We should use a more intelligent data structure.  */
-hppa_tlb_entry tlb[256];
+hppa_tlb_entry tlb[HPPA_TLB_ENTRIES];
 uint32_t tlb_last;
 };

--
2.21.3

[PATCH 3/7] hw/hppa: Store boot device in fw_cfg section

[Helge Deller]

Signed-off-by: Helge Deller 
---
 hw/hppa/machine.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index e9d84d0f03..4b35afc9d5 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -58,6 +58,12 @@ static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr)
 static HPPACPU *cpu[HPPA_MAX_CPUS];
 static uint64_t firmware_entry;

+static void fw_cfg_boot_set(void *opaque, const char *boot_device,
+Error **errp)
+{
+fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
+}
+
 static FWCfgState *create_fw_cfg(MachineState *ms)
 {
 FWCfgState *fw_cfg;
@@ -80,6 +86,9 @@ static FWCfgState *create_fw_cfg(MachineState *ms)
 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
 g_memdup(, sizeof(val)), sizeof(val));

+fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_order[0]);
+qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
+
 return fw_cfg;
 }

--
2.21.3

[PATCH 5/7] hw/hppa: Add power button emulation

[Helge Deller]

Emulate a power button switch, tell SeaBIOS the address via fw_cfg and
bind the power button to the qemu UI.

Signed-off-by: Helge Deller 
---
 hw/hppa/machine.c | 32 
 1 file changed, 32 insertions(+)

diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 2bed49807b..d5164457ee 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -12,6 +12,7 @@
 #include "qemu/error-report.h"
 #include "sysemu/reset.h"
 #include "sysemu/sysemu.h"
+#include "sysemu/runstate.h"
 #include "hw/rtc/mc146818rtc.h"
 #include "hw/timer/i8254.h"
 #include "hw/char/serial.h"
@@ -27,6 +28,30 @@

 #define MIN_SEABIOS_HPPA_VERSION 1 /* require at least this fw version */

+#define HPA_POWER_BUTTON (FIRMWARE_END - 0x10)
+
+static void hppa_powerdown_req(Notifier *n, void *opaque)
+{
+hwaddr soft_power_reg = HPA_POWER_BUTTON;
+uint32_t val;
+
+val = ldl_be_phys(_space_memory, soft_power_reg);
+if ((val >> 8) == 0) {
+/* immediately shut down when under hardware control */
+qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
+return;
+}
+
+/* clear bit 31 to indicate that the power switch was pressed. */
+val &= ~1;
+stl_be_phys(_space_memory, soft_power_reg, val);
+}
+
+static Notifier hppa_system_powerdown_notifier = {
+.notify = hppa_powerdown_req
+};
+
+
 static ISABus *hppa_isa_bus(void)
 {
 ISABus *isa_bus;
@@ -86,6 +111,10 @@ static FWCfgState *create_fw_cfg(MachineState *ms)
 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
 g_memdup(, sizeof(val)), sizeof(val));

+val = cpu_to_le64(HPA_POWER_BUTTON);
+fw_cfg_add_file(fw_cfg, "/etc/power-button-addr",
+g_memdup(, sizeof(val)), sizeof(val));
+
 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_order[0]);
 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);

@@ -177,6 +206,9 @@ static void machine_hppa_init(MachineState *machine)
 }
 }

+/* register power switch emulation */
+qemu_register_powerdown_notifier(_system_powerdown_notifier);
+
 /* Load firmware.  Given that this is not "real" firmware,
but one explicitly written for the emulation, we might as
well load it directly from an ELF image.  */
--
2.21.3

[PATCH 0/7] hppa power button support, graphics updates and firmware fixes

[Helge Deller]

Add emulation for a power button on hppa,
fix quite some bugs in seabios-hppa firmware for artist graphics card
fix boot with old Linux installation CDs.

Helge Deller (7):
  seabios-hppa: Update SeaBIOS to hppa-qemu-5.2-2 tag
  hw/hppa: Make number of TLB and BTLB entries configurable
  hw/hppa: Store boot device in fw_cfg section
  hw/hppa: Inform SeaBIOS about fw_cfg port address
  hw/hppa: Add power button emulation
  hw/display/artist: Fix artist screen resolution
  target/hppa: Fix boot with old Linux installation CDs

 hw/display/artist.c   |  37 +++--
 hw/hppa/hppa_hardware.h   |   3 +-
 hw/hppa/machine.c |  56 +-
 pc-bios/hppa-firmware.img | Bin 783192 -> 785696 bytes
 roms/seabios-hppa |   2 +-
 target/hppa/cpu.h |   5 +++-
 target/hppa/insns.decode  |  10 +++
 7 files changed, 89 insertions(+), 24 deletions(-)

--
2.21.3

[PATCH 6/7] hw/display/artist: Fix artist screen resolution

[Helge Deller]

Artist screen size is limited to 2048 x 2048 pixels and x/y coordination
addressing needs to be done by OS via an uint32 value which is based on
a 2048 byte line length, independend of the real screen size.

Since HP-UX seems to ideally need at least 640 pixels in width, this
patch ensures that the screen size stays between 640x480 and 2048x2048
pixels and fixes some pixel glitches were visible before on STI text
consoles due to the 2048 line length limitation.

Cc: Sven Schnelle 
Signed-off-by: Helge Deller 
---
 hw/display/artist.c | 37 +++--
 1 file changed, 23 insertions(+), 14 deletions(-)

diff --git a/hw/display/artist.c b/hw/display/artist.c
index 71982559c6..98bee6d61c 100644
--- a/hw/display/artist.c
+++ b/hw/display/artist.c
@@ -192,6 +192,10 @@ static const char *artist_reg_name(uint64_t addr)
 }
 #undef REG_NAME

+/* artist has a fixed line length of 2048 bytes. */
+#define ADDR_TO_Y(addr) (((addr) >> 11) & 0x7ff)
+#define ADDR_TO_X(addr) ((addr) & 0x7ff)
+
 static int16_t artist_get_x(uint32_t reg)
 {
 return reg >> 16;
@@ -348,13 +352,13 @@ static void artist_invalidate_cursor(ARTISTState *s)
 y, s->cursor_height);
 }

-static void vram_bit_write(ARTISTState *s, int posx, int posy, bool incr_x,
+static void vram_bit_write(ARTISTState *s, int posy, bool incr_x,
int size, uint32_t data)
 {
 struct vram_buffer *buf;
 uint32_t vram_bitmask = s->vram_bitmask;
 int mask, i, pix_count, pix_length;
-unsigned int offset, width;
+unsigned int posx, offset, width;
 uint8_t *data8, *p;

 pix_count = vram_write_pix_per_transfer(s);
@@ -366,6 +370,8 @@ static void vram_bit_write(ARTISTState *s, int posx, int 
posy, bool incr_x,
 if (s->cmap_bm_access) {
 offset = s->vram_pos;
 } else {
+posx = ADDR_TO_X(s->vram_pos >> 2);
+posy += ADDR_TO_Y(s->vram_pos >> 2);
 offset = posy * width + posx;
 }

@@ -858,7 +864,6 @@ static void artist_reg_write(void *opaque, hwaddr addr, 
uint64_t val,
  unsigned size)
 {
 ARTISTState *s = opaque;
-int posx, posy;
 int width, height;

 trace_artist_reg_write(size, addr, artist_reg_name(addr & ~3ULL), val);
@@ -881,16 +886,12 @@ static void artist_reg_write(void *opaque, hwaddr addr, 
uint64_t val,
 break;

 case VRAM_WRITE_INCR_Y:
-posx = (s->vram_pos >> 2) & 0x7ff;
-posy = (s->vram_pos >> 13) & 0x3ff;
-vram_bit_write(s, posx, posy + s->vram_char_y++, false, size, val);
+vram_bit_write(s, s->vram_char_y++, false, size, val);
 break;

 case VRAM_WRITE_INCR_X:
 case VRAM_WRITE_INCR_X2:
-posx = (s->vram_pos >> 2) & 0x7ff;
-posy = (s->vram_pos >> 13) & 0x3ff;
-vram_bit_write(s, posx, posy + s->vram_char_y, true, size, val);
+vram_bit_write(s, s->vram_char_y, true, size, val);
 break;

 case VRAM_IDX:
@@ -1156,8 +1157,7 @@ static void artist_vram_write(void *opaque, hwaddr addr, 
uint64_t val,
 {
 ARTISTState *s = opaque;
 struct vram_buffer *buf;
-int posy = (addr >> 11) & 0x3ff;
-int posx = addr & 0x7ff;
+unsigned int posy, posx;
 unsigned int offset;
 trace_artist_vram_write(size, addr, val);

@@ -1170,6 +1170,9 @@ static void artist_vram_write(void *opaque, hwaddr addr, 
uint64_t val,
 }

 buf = vram_write_buffer(s);
+posy = ADDR_TO_Y(addr);
+posx = ADDR_TO_X(addr);
+
 if (!buf->size) {
 return;
 }
@@ -1212,7 +1215,7 @@ static uint64_t artist_vram_read(void *opaque, hwaddr 
addr, unsigned size)
 ARTISTState *s = opaque;
 struct vram_buffer *buf;
 uint64_t val;
-int posy, posx;
+unsigned int posy, posx;

 if (s->cmap_bm_access) {
 buf = >vram_buffer[ARTIST_BUFFER_CMAP];
@@ -1229,8 +1232,8 @@ static uint64_t artist_vram_read(void *opaque, hwaddr 
addr, unsigned size)
 return 0;
 }

-posy = (addr >> 13) & 0x3ff;
-posx = (addr >> 2) & 0x7ff;
+posy = ADDR_TO_Y(addr);
+posx = ADDR_TO_X(addr);

 if (posy > buf->height || posx > buf->width) {
 return 0;
@@ -1374,6 +1377,12 @@ static void artist_realizefn(DeviceState *dev, Error 
**errp)
 struct vram_buffer *buf;
 hwaddr offset = 0;

+/* Screen on artist can not be greater than 2048x2048 pixels. */
+s->width = MAX(s->width, 640);
+s->width = MIN(s->width, 2048);
+s->height = MAX(s->height, 480);
+s->height = MIN(s->height, 2048);
+
 memory_region_init(>mem_as_root, OBJECT(dev), "artist", ~0ull);
 address_space_init(>as, >mem_as_root, "artist");

--
2.21.3

[PATCH 4/7] hw/hppa: Inform SeaBIOS about fw_cfg port address

[Helge Deller]

Signed-off-by: Helge Deller 
---
 hw/hppa/hppa_hardware.h | 3 +--
 hw/hppa/machine.c   | 7 ++-
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h
index cdb7fa6240..bc258895c9 100644
--- a/hw/hppa/hppa_hardware.h
+++ b/hw/hppa/hppa_hardware.h
@@ -38,8 +38,7 @@
 #define PORT_PCI_CMD(PCI_HPA + DINO_PCI_ADDR)
 #define PORT_PCI_DATA   (PCI_HPA + DINO_CONFIG_DATA)

-/* QEMU fw_cfg interface port */
-#define QEMU_FW_CFG_IO_BASE (MEMORY_HPA + 0x80)
+#define FW_CFG_IO_BASE  0xfffa

 #define PORT_SERIAL1(DINO_UART_HPA + 0x800)
 #define PORT_SERIAL2(LASI_UART_HPA + 0x800)
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 4b35afc9d5..2bed49807b 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -69,7 +69,7 @@ static FWCfgState *create_fw_cfg(MachineState *ms)
 FWCfgState *fw_cfg;
 uint64_t val;

-fw_cfg = fw_cfg_init_mem(QEMU_FW_CFG_IO_BASE, QEMU_FW_CFG_IO_BASE + 4);
+fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4);
 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus);
 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS);
 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ram_size);
@@ -290,6 +290,9 @@ static void machine_hppa_init(MachineState *machine)

 /* tell firmware how many SMP CPUs to present in inventory table */
 cpu[0]->env.gr[21] = smp_cpus;
+
+/* tell firmware fw_cfg port */
+cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
 }

 static void hppa_machine_reset(MachineState *ms)
@@ -317,6 +320,8 @@ static void hppa_machine_reset(MachineState *ms)
 cpu[0]->env.gr[24] = 'c';
 /* gr22/gr23 unused, no initrd while reboot. */
 cpu[0]->env.gr[21] = smp_cpus;
+/* tell firmware fw_cfg port */
+cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
 }


--
2.21.3

[PATCH] fuzz: Add support for custom fuzzing library

[Alexander Bulekov]

---
 configure| 12 ++--
 meson.build  |  6 +-
 tests/qtest/fuzz/meson.build |  5 ++---
 3 files changed, 17 insertions(+), 6 deletions(-)


Hi Paolo,
Here I'm trying to specify the linker-script with
add_project_link_arguments. How I'm testing this:

$ CC=clang-10 CXX=clang++-10 ../configure --enable-fuzzing
$ make V=1 "-j$(nproc)" qemu-fuzz-i386

clang++-10  -o qemu-fuzz-i386 
qemu-fuzz-i386.p/tests_qtest_fuzz_qtest_wrappers.c.o \
... libblock.fa chardev/libchardev.fa \
-Wl,--start-group tests/qtest/libqos/libqos.a -Wl,--no-whole-archive \
-Wl,-T,/home/alxndr/Development/qemu/tests/qtest/fuzz/fork_fuzz.ld \
... \
-Wl,-rpath-link,/home/alxndr/Development/qemu/build/ -lstdc++ -Wl,--end-group

Maybe if I can get the oss-fuzz LIB_FUZZING_ENGINE
(/usr/lib/libFuzzingEngine.a) into the --start-group, that could also
solve the issue... I'll take another look at exactly what the oss-fuzz
build container does.

-Alex

diff --git a/configure b/configure
index 6ecaff429b..d31b91850c 100755
--- a/configure
+++ b/configure
@@ -6165,7 +6165,7 @@ fi
 
 ##
 # checks for fuzzer
-if test "$fuzzing" = "yes" ; then
+if test "$fuzzing" = "yes" && test -z "${LIB_FUZZING_ENGINE+xxx}"; then
   write_c_fuzzer_skeleton
   if compile_prog "$CPU_CFLAGS -Werror -fsanitize=fuzzer" ""; then
 have_fuzzer=yes
@@ -7505,7 +7505,14 @@ if test "$have_mlockall" = "yes" ; then
   echo "HAVE_MLOCKALL=y" >> $config_host_mak
 fi
 if test "$fuzzing" = "yes" ; then
-  QEMU_CFLAGS="$QEMU_CFLAGS -fsanitize=fuzzer-no-link"
+  # If LIB_FUZZING_ENGINE is set, assume we are running on OSS-Fuzz, and the
+  # needed CFLAGS have already been provided
+  if test -z "${LIB_FUZZING_ENGINE+xxx}" ; then
+QEMU_CFLAGS="$QEMU_CFLAGS -fsanitize=fuzzer-no-link"
+FUZZ_LINK_COMMAND="-fsanitize=fuzzer"
+  else
+FUZZ_LINK_COMMAND="$LIB_FUZZING_ENGINE"
+  fi
 fi
 
 if test "$plugins" = "yes" ; then
@@ -7619,6 +7626,7 @@ if test "$libudev" != "no"; then
 fi
 if test "$fuzzing" != "no"; then
 echo "CONFIG_FUZZ=y" >> $config_host_mak
+echo "FUZZ_LINK_COMMAND=$FUZZ_LINK_COMMAND" >> $config_host_mak
 fi
 
 if test "$edk2_blobs" = "yes" ; then
diff --git a/meson.build b/meson.build
index 74f8ea0c2e..3a5205040f 100644
--- a/meson.build
+++ b/meson.build
@@ -35,11 +35,16 @@ add_project_arguments(config_host['QEMU_CFLAGS'].split(),
   native: false, language: ['c', 'objc'])
 add_project_arguments(config_host['QEMU_CXXFLAGS'].split(),
   native: false, language: 'cpp')
+if 'CONFIG_FUZZ' in config_host
+   add_project_link_arguments(['-Wl,-T,' + (meson.current_source_dir() / 
'tests/qtest/fuzz/fork_fuzz.ld')],
+   native: false, language: ['c', 'cpp', 'objc'])
+endif
 add_project_link_arguments(config_host['QEMU_LDFLAGS'].split(),
native: false, language: ['c', 'cpp', 'objc'])
 add_project_arguments(config_host['QEMU_INCLUDES'].split(),
   language: ['c', 'cpp', 'objc'])
 
+
 python = import('python').find_installation()
 
 link_language = meson.get_external_property('link_language', 'cpp')
@@ -1019,7 +1024,6 @@ foreach target : target_dirs
 'gui': false,
 'sources': specific_fuzz.sources(),
 'dependencies': specific_fuzz.dependencies(),
-'link_depends': [files('tests/qtest/fuzz/fork_fuzz.ld')],
   }]
 endif
   else
diff --git a/tests/qtest/fuzz/meson.build b/tests/qtest/fuzz/meson.build
index bb0a3f271d..c0accc8af9 100644
--- a/tests/qtest/fuzz/meson.build
+++ b/tests/qtest/fuzz/meson.build
@@ -9,9 +9,8 @@ specific_fuzz_ss.add(when: 'CONFIG_VIRTIO_SCSI', if_true: 
files('virtio_scsi_fuz
 # unfortunately declare_dependency does not support link_depends, so
 # this will be duplicated in meson.build
 fork_fuzz = declare_dependency(
-  link_args: ['-fsanitize=fuzzer',
-  '-Wl,-T,' + (meson.current_source_dir() / 'fork_fuzz.ld'),
-  '-Wl,-wrap,qtest_inb',
+  link_args: config_host['FUZZ_LINK_COMMAND'].split() +
+  ['-Wl,-wrap,qtest_inb',
   '-Wl,-wrap,qtest_inw',
   '-Wl,-wrap,qtest_inl',
   '-Wl,-wrap,qtest_outb',
-- 
2.28.0

[PATCH v3 0/4] Introducing QMP query-netdevs command

[Alexey Kirillov]

This patch series introduces a new QMP command "query-netdevs" to get
information about currently attached backend network devices (netdevs).
Also, since the "info_str" field of "NetClientState" is now deprecated,
we no longer use it for netdevs, only for NIC/hubports.
The HMP command "info network" now also uses the new QMP command inside.

Usage example:

-> { "execute": "query-netdevs" }
<- { "return": [
 {
 "listen": "127.0.0.1:90",
 "type": "socket",
 "peer-id": "hub0port1",
 "id": "__org.qemu.net1"
 },
 {
 "script": "/etc/qemu-ifup",
 "downscript": "/etc/qemu-ifdown",
 "ifname": "tap0",
 "type": "tap",
 "peer-id": "net5",
 "vnet_hdr": true,
 "id": "tap0"
 },
 {
 "ipv6": true,
 "ipv4": true,
 "host": "10.0.2.2",
 "ipv6-dns": "fec0::3",
 "ipv6-prefix": "fec0::",
 "net": "10.0.2.0/255.255.255.0",
 "ipv6-host": "fec0::2",
 "type": "user",
 "peer-id": "net0",
 "dns": "10.0.2.3",
 "hostfwd": [
 {
 "str": "tcp::20004-:22"
 }
 ],
 "ipv6-prefixlen": 64,
 "id": "netdev0",
 "restrict": false
 }
 ]
   }

v2->v3:
- Remove NIC and hubports from query-netdevs.
- Remove several fields from NetdevInfo since they are unnecessary.
- Rename field @peer to @peer-id.
- Add support of vhost-vdpa.
- Keep "info_str" for NIC/hubports, but remove it for netdevs.

v1->v2:
- Rewrite HMP "info network" to get information from results of QMP command.
- Remove obsolete field "info_str" from "NetClientState".

Alexey Kirillov (4):
  qapi: net: Add query-netdevs command
  tests: Add tests for query-netdevs command
  hmp: Use QMP query-netdevs in hmp_info_network
  net: Do not use legacy info_str for backends

 include/net/net.h|   4 +-
 net/clients.h|   1 +
 net/hub.c|   4 +-
 net/hub.h|   2 +-
 net/l2tpv3.c |  21 ++-
 net/net.c| 213 ++-
 net/netmap.c |  13 ++
 net/slirp.c  | 128 ++-
 net/socket.c |  91 ++---
 net/tap-win32.c  |  10 +-
 net/tap.c| 107 ++--
 net/vde.c|  39 +-
 net/vhost-user.c |  20 ++-
 net/vhost-vdpa.c |  15 ++-
 qapi/net.json|  68 ++
 tests/qtest/meson.build  |   3 +
 tests/qtest/test-query-netdevs.c | 117 +
 17 files changed, 797 insertions(+), 59 deletions(-)
 create mode 100644 tests/qtest/test-query-netdevs.c

-- 
2.25.1

[PATCH v3 3/4] hmp: Use QMP query-netdevs in hmp_info_network

[Alexey Kirillov]

Replace usage of legacy field info_str of NetClientState for
backend network devices with result of QMP command query-netdevs.
NIC and hubports still use legacy info_str field.

Signed-off-by: Alexey Kirillov 
---
 include/net/net.h |   3 +-
 net/clients.h |   1 +
 net/hub.c |   4 +-
 net/hub.h |   2 +-
 net/net.c | 181 --
 net/vde.c |  10 +++
 6 files changed, 192 insertions(+), 9 deletions(-)

diff --git a/include/net/net.h b/include/net/net.h
index 04d51ac215..d6d3168a0d 100644
--- a/include/net/net.h
+++ b/include/net/net.h
@@ -172,7 +172,8 @@ void qemu_check_nic_model(NICInfo *nd, const char *model);
 int qemu_find_nic_model(NICInfo *nd, const char * const *models,
 const char *default_model);
 
-void print_net_client(Monitor *mon, NetClientState *nc);
+void print_net_client(Monitor *mon, NetClientState *nc,
+  NetdevInfoList *ni_list);
 void hmp_info_network(Monitor *mon, const QDict *qdict);
 void net_socket_rs_init(SocketReadState *rs,
 SocketReadStateFinalize *finalize,
diff --git a/net/clients.h b/net/clients.h
index 92f9b59aed..fdf257f641 100644
--- a/net/clients.h
+++ b/net/clients.h
@@ -51,6 +51,7 @@ int net_init_l2tpv3(const Netdev *netdev, const char *name,
 #ifdef CONFIG_VDE
 int net_init_vde(const Netdev *netdev, const char *name,
  NetClientState *peer, Error **errp);
+int net_vde_get_fd(const NetClientState *nc);
 #endif
 
 #ifdef CONFIG_NETMAP
diff --git a/net/hub.c b/net/hub.c
index 1375738bf1..7815248650 100644
--- a/net/hub.c
+++ b/net/hub.c
@@ -221,7 +221,7 @@ NetClientState *net_hub_port_find(int hub_id)
 /**
  * Print hub configuration
  */
-void net_hub_info(Monitor *mon)
+void net_hub_info(Monitor *mon, NetdevInfoList *ni_list)
 {
 NetHub *hub;
 NetHubPort *port;
@@ -232,7 +232,7 @@ void net_hub_info(Monitor *mon)
 monitor_printf(mon, " \\ %s", port->nc.name);
 if (port->nc.peer) {
 monitor_printf(mon, ": ");
-print_net_client(mon, port->nc.peer);
+print_net_client(mon, port->nc.peer, ni_list);
 } else {
 monitor_printf(mon, "\n");
 }
diff --git a/net/hub.h b/net/hub.h
index ce45f7b399..2c9a384077 100644
--- a/net/hub.h
+++ b/net/hub.h
@@ -17,7 +17,7 @@
 
 NetClientState *net_hub_add_port(int hub_id, const char *name,
  NetClientState *hubpeer);
-void net_hub_info(Monitor *mon);
+void net_hub_info(Monitor *mon, NetdevInfoList *ninfo);
 void net_hub_check_clients(void);
 bool net_hub_flush(NetClientState *nc);
 
diff --git a/net/net.c b/net/net.c
index 923e3d0bc6..384b57da3b 100644
--- a/net/net.c
+++ b/net/net.c
@@ -1175,14 +1175,182 @@ static void netfilter_print_info(Monitor *mon, 
NetFilterState *nf)
 monitor_printf(mon, "\n");
 }
 
-void print_net_client(Monitor *mon, NetClientState *nc)
+static NetdevInfo *get_netdev_info(NetdevInfoList *ni_list, char *name)
+{
+NetdevInfo *ni;
+
+while (ni_list) {
+ni = ni_list->value;
+if (g_str_equal(ni->id, name)) {
+return ni;
+}
+ni_list = ni_list->next;
+}
+
+return NULL;
+}
+
+static char *generate_info_str(NetdevInfo *ni, NetClientState *nc)
+{
+char *info_str;
+
+/* Use legacy field info_str for NIC and hubports */
+if ((nc->info->type == NET_CLIENT_DRIVER_NIC) ||
+(nc->info->type == NET_CLIENT_DRIVER_HUBPORT)) {
+return g_strdup(nc->info_str);
+}
+
+if (!ni) {
+return g_malloc0(1);
+}
+
+switch (ni->type) {
+#ifdef CONFIG_SLIRP
+case NET_CLIENT_DRIVER_USER: {
+size_t len = strchr(ni->u.user.net, '/') - ni->u.user.net;
+char *net = g_strndup(ni->u.user.net, len);
+
+info_str = g_strdup_printf("net=%s,restrict=%s",
+   net,
+   ni->u.user.q_restrict ? "on" : "off");
+g_free(net);
+break;
+}
+#endif /* CONFIG_SLIRP */
+case NET_CLIENT_DRIVER_TAP: {
+#ifndef _WIN32
+if (ni->u.tap.has_fds) {
+char **fds = g_strsplit(ni->u.tap.fds, ":", -1);
+
+info_str = g_strdup_printf("fd=%s", fds[nc->queue_index]);
+g_strfreev(fds);
+} else if (ni->u.tap.has_helper) {
+info_str = g_strdup_printf("helper=%s", ni->u.tap.helper);
+} else {
+info_str = g_strdup_printf("ifname=%s,script=%s,downscript=%s",
+ni->u.tap.ifname,
+nc->queue_index == 0 ? ni->u.tap.script : "no",
+nc->queue_index == 0 ? ni->u.tap.downscript : "no");
+}
+#else
+info_str = g_strdup_printf("tap: ifname=%s", ni->u.tap.ifname);
+#endif /* _WIN32 */
+break;
+}
+#ifdef CONFIG_L2TPV3
+

[PATCH v3 4/4] net: Do not use legacy info_str for backends

[Alexey Kirillov]

As we use QMP query-netdevs to store and get information about
backend network devices, we can drop usage legacy field info_str
for them.
We still use this field for NIC and hubports, so we can not
completely remove it.

Signed-off-by: Alexey Kirillov 
---
 net/l2tpv3.c |  2 --
 net/slirp.c  |  4 
 net/socket.c | 22 --
 net/tap-win32.c  |  3 ---
 net/tap.c| 12 
 net/vde.c|  3 ---
 net/vhost-user.c |  2 --
 net/vhost-vdpa.c |  1 -
 8 files changed, 49 deletions(-)

diff --git a/net/l2tpv3.c b/net/l2tpv3.c
index f4e45e7b28..7473619712 100644
--- a/net/l2tpv3.c
+++ b/net/l2tpv3.c
@@ -745,8 +745,6 @@ int net_init_l2tpv3(const Netdev *netdev,
 stored->dstport = g_strdup(l2tpv3->dstport);
 }
 
-snprintf(s->nc.info_str, sizeof(s->nc.info_str),
- "l2tpv3: connected");
 return 0;
 outerr:
 qemu_del_net_client(nc);
diff --git a/net/slirp.c b/net/slirp.c
index 54c33d1173..4032829a1e 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -670,10 +670,6 @@ static int net_slirp_init(NetClientState *peer, const char 
*model,
 stored->tftp_server_name = g_strdup(tftp_server_name);
 }
 
-snprintf(nc->info_str, sizeof(nc->info_str),
- "net=%s,restrict=%s", inet_ntoa(net),
- restricted ? "on" : "off");
-
 s = DO_UPCAST(SlirpState, nc, nc);
 
 s->slirp = slirp_init(restricted, ipv4, net, mask, host,
diff --git a/net/socket.c b/net/socket.c
index 4a60de08e3..118b96b3e1 100644
--- a/net/socket.c
+++ b/net/socket.c
@@ -180,7 +180,6 @@ static void net_socket_send(void *opaque)
 s->fd = -1;
 net_socket_rs_init(>rs, net_socket_rs_finalize, false);
 s->nc.link_down = true;
-memset(s->nc.info_str, 0, sizeof(s->nc.info_str));
 
 return;
 }
@@ -400,16 +399,10 @@ static NetSocketState 
*net_socket_fd_init_dgram(NetClientState *peer,
 stored->mcast = g_strdup(mcast);
 
 s->dgram_dst = saddr;
-snprintf(nc->info_str, sizeof(nc->info_str),
- "socket: fd=%d (cloned mcast=%s:%d)",
- fd, inet_ntoa(saddr.sin_addr), ntohs(saddr.sin_port));
 } else {
 if (sa_type == SOCKET_ADDRESS_TYPE_UNIX) {
 s->dgram_dst.sin_family = AF_UNIX;
 }
-
-snprintf(nc->info_str, sizeof(nc->info_str),
- "socket: fd=%d %s", fd, SocketAddressType_str(sa_type));
 }
 
 return s;
@@ -444,8 +437,6 @@ static NetSocketState 
*net_socket_fd_init_stream(NetClientState *peer,
 
 nc = qemu_new_net_client(_socket_info, peer, model, name);
 
-snprintf(nc->info_str, sizeof(nc->info_str), "socket: fd=%d", fd);
-
 s = DO_UPCAST(NetSocketState, nc, nc);
 
 s->fd = fd;
@@ -527,10 +518,6 @@ static void net_socket_accept(void *opaque)
 
 stored->has_fd = true;
 stored->fd = g_strdup_printf("%d", fd);
-
-snprintf(s->nc.info_str, sizeof(s->nc.info_str),
- "socket: connection from %s:%d",
- inet_ntoa(saddr.sin_addr), ntohs(saddr.sin_port));
 }
 
 static int net_socket_listen_init(NetClientState *peer,
@@ -645,9 +632,6 @@ static int net_socket_connect_init(NetClientState *peer,
 stored->has_connect = true;
 stored->connect = g_strdup(host_str);
 
-snprintf(s->nc.info_str, sizeof(s->nc.info_str),
- "socket: connect to %s:%d",
- inet_ntoa(saddr.sin_addr), ntohs(saddr.sin_port));
 return 0;
 }
 
@@ -704,9 +688,6 @@ static int net_socket_mcast_init(NetClientState *peer,
 stored->localaddr = g_strdup(localaddr_str);
 }
 
-snprintf(s->nc.info_str, sizeof(s->nc.info_str),
- "socket: mcast=%s:%d",
- inet_ntoa(saddr.sin_addr), ntohs(saddr.sin_port));
 return 0;
 
 }
@@ -769,9 +750,6 @@ static int net_socket_udp_init(NetClientState *peer,
 stored->has_udp = true;
 stored->udp = g_strdup(rhost);
 
-snprintf(s->nc.info_str, sizeof(s->nc.info_str),
- "socket: udp=%s:%d",
- inet_ntoa(raddr.sin_addr), ntohs(raddr.sin_port));
 return 0;
 }
 
diff --git a/net/tap-win32.c b/net/tap-win32.c
index 20ba0b1dc8..54d4b1e25e 100644
--- a/net/tap-win32.c
+++ b/net/tap-win32.c
@@ -787,9 +787,6 @@ static int tap_win32_init(NetClientState *peer, const char 
*model,
 stored->has_ifname = true;
 stored->ifname = g_strdup(ifname);
 
-snprintf(s->nc.info_str, sizeof(s->nc.info_str),
- "tap: ifname=%s", ifname);
-
 s->handle = handle;
 
 qemu_add_wait_object(s->handle->tap_semaphore, tap_win32_send, s);
diff --git a/net/tap.c b/net/tap.c
index 7a7cf4caea..e59d85cba9 100644
--- a/net/tap.c
+++ b/net/tap.c
@@ -621,9 +621,6 @@ int net_init_bridge(const Netdev *netdev, const char *name,
 stored->helper = g_strdup(helper);
 }
 
-snprintf(s->nc.info_str, sizeof(s->nc.info_str), "helper=%s,br=%s", helper,
- br);
-
 return 0;
 }
 
@@ -709,8 +706,6 @@ static void net_init_tap_one(const NetdevTapOptions 

[PATCH v3 2/4] tests: Add tests for query-netdevs command

[Alexey Kirillov]

Signed-off-by: Alexey Kirillov 
---
 tests/qtest/meson.build  |   3 +
 tests/qtest/test-query-netdevs.c | 117 +++
 2 files changed, 120 insertions(+)
 create mode 100644 tests/qtest/test-query-netdevs.c

diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
index 8f8fdb1336..a6c4ffe886 100644
--- a/tests/qtest/meson.build
+++ b/tests/qtest/meson.build
@@ -17,6 +17,9 @@ qtests_generic = [
 if config_host.has_key('CONFIG_MODULES')
   qtests_generic += [ 'modules-test' ]
 endif
+if config_host.has_key('CONFIG_SLIRP')
+  qtests_generic += [ 'test-query-netdevs' ]
+endif
 
 qtests_pci = \
   (config_all_devices.has_key('CONFIG_VGA') ? ['display-vga-test'] : []) + 
 \
diff --git a/tests/qtest/test-query-netdevs.c b/tests/qtest/test-query-netdevs.c
new file mode 100644
index 00..e711136111
--- /dev/null
+++ b/tests/qtest/test-query-netdevs.c
@@ -0,0 +1,117 @@
+/*
+ * QTest testcase for the query-netdevs
+ *
+ * Copyright Yandex N.V., 2019
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
+
+#include "qemu/osdep.h"
+
+#include "libqos/libqtest.h"
+#include "qapi/qmp/qdict.h"
+#include "qapi/qmp/qlist.h"
+
+/*
+ * Events can get in the way of responses we are actually waiting for.
+ */
+GCC_FMT_ATTR(2, 3)
+static QObject *wait_command(QTestState *who, const char *command, ...)
+{
+va_list ap;
+QDict *response;
+QObject *result;
+
+va_start(ap, command);
+qtest_qmp_vsend(who, command, ap);
+va_end(ap);
+
+response = qtest_qmp_receive(who);
+
+result = qdict_get(response, "return");
+g_assert(result);
+qobject_ref(result);
+qobject_unref(response);
+
+return result;
+}
+
+static void qmp_query_netdevs_no_error(QTestState *qts,
+   size_t netdevs_count)
+{
+QObject *resp;
+QList *netdevs;
+
+resp = wait_command(qts, "{'execute': 'query-netdevs'}");
+
+netdevs = qobject_to(QList, resp);
+g_assert(netdevs);
+g_assert(qlist_size(netdevs) == netdevs_count);
+
+qobject_unref(resp);
+}
+
+static void test_query_netdevs(void)
+{
+const char *arch = qtest_get_arch();
+QObject *resp;
+QTestState *state;
+
+/* Skip test for some MCU */
+if (g_str_equal(arch, "avr") ||
+g_str_equal(arch, "rx")) {
+return;
+}
+
+if (g_str_equal(arch, "arm") ||
+g_str_equal(arch, "aarch64")) {
+state = qtest_init(
+"-nodefaults "
+"-M virt "
+"-netdev user,id=slirp0");
+} else if (g_str_equal(arch, "tricore")) {
+state = qtest_init(
+"-nodefaults "
+"-M tricore_testboard "
+"-netdev user,id=slirp0");
+} else {
+state = qtest_init(
+"-nodefaults "
+"-netdev user,id=slirp0");
+}
+g_assert(state);
+
+qmp_query_netdevs_no_error(state, 1);
+
+resp = wait_command(state,
+"{'execute': 'netdev_add', 'arguments': {"
+" 'id': 'slirp1',"
+" 'type': 'user'}}");
+qobject_unref(resp);
+
+qmp_query_netdevs_no_error(state, 2);
+
+resp = wait_command(state,
+"{'execute': 'netdev_del', 'arguments': {"
+" 'id': 'slirp1'}}");
+qobject_unref(resp);
+
+qmp_query_netdevs_no_error(state, 1);
+
+qtest_quit(state);
+}
+
+int main(int argc, char **argv)
+{
+int ret = 0;
+g_test_init(, , NULL);
+
+qtest_add_func("/net/qapi/query_netdevs",
+test_query_netdevs);
+
+ret = g_test_run();
+
+return ret;
+}
-- 
2.25.1

[PATCH v3 1/4] qapi: net: Add query-netdevs command

[Alexey Kirillov]

Add a qmp command that provides information about currently attached
backend network devices and their configuration.

Signed-off-by: Alexey Kirillov 
---
 include/net/net.h |   1 +
 net/l2tpv3.c  |  19 +++
 net/net.c |  32 
 net/netmap.c  |  13 +
 net/slirp.c   | 126 ++
 net/socket.c  |  71 ++
 net/tap-win32.c   |   9 
 net/tap.c | 103 +++--
 net/vde.c |  26 ++
 net/vhost-user.c  |  18 +--
 net/vhost-vdpa.c  |  14 ++
 qapi/net.json |  68 +
 12 files changed, 492 insertions(+), 8 deletions(-)

diff --git a/include/net/net.h b/include/net/net.h
index e7ef42d62b..04d51ac215 100644
--- a/include/net/net.h
+++ b/include/net/net.h
@@ -92,6 +92,7 @@ struct NetClientState {
 char *model;
 char *name;
 char info_str[256];
+NetdevInfo *stored_config;
 unsigned receive_disabled : 1;
 NetClientDestructor *destructor;
 unsigned int queue_index;
diff --git a/net/l2tpv3.c b/net/l2tpv3.c
index 55fea17c0f..f4e45e7b28 100644
--- a/net/l2tpv3.c
+++ b/net/l2tpv3.c
@@ -535,6 +535,7 @@ int net_init_l2tpv3(const Netdev *netdev,
 struct addrinfo hints;
 struct addrinfo *result = NULL;
 char *srcport, *dstport;
+NetdevL2TPv3Options *stored;
 
 nc = qemu_new_net_client(_l2tpv3_info, peer, "l2tpv3", name);
 
@@ -726,6 +727,24 @@ int net_init_l2tpv3(const Netdev *netdev,
 
 l2tpv3_read_poll(s, true);
 
+/* Store startup parameters */
+nc->stored_config = g_new0(NetdevInfo, 1);
+nc->stored_config->type = NET_CLIENT_DRIVER_L2TPV3;
+stored = >stored_config->u.l2tpv3;
+
+memcpy(stored, l2tpv3, sizeof(NetdevL2TPv3Options));
+
+stored->src = g_strdup(l2tpv3->src);
+stored->dst = g_strdup(l2tpv3->dst);
+
+if (l2tpv3->has_srcport) {
+stored->srcport = g_strdup(l2tpv3->srcport);
+}
+
+if (l2tpv3->has_dstport) {
+stored->dstport = g_strdup(l2tpv3->dstport);
+}
+
 snprintf(s->nc.info_str, sizeof(s->nc.info_str),
  "l2tpv3: connected");
 return 0;
diff --git a/net/net.c b/net/net.c
index bbaedb3c7a..923e3d0bc6 100644
--- a/net/net.c
+++ b/net/net.c
@@ -54,6 +54,7 @@
 #include "sysemu/sysemu.h"
 #include "net/filter.h"
 #include "qapi/string-output-visitor.h"
+#include "qapi/clone-visitor.h"
 
 /* Net bridge is currently not supported for W32. */
 #if !defined(_WIN32)
@@ -351,6 +352,7 @@ static void qemu_free_net_client(NetClientState *nc)
 }
 g_free(nc->name);
 g_free(nc->model);
+qapi_free_NetdevInfo(nc->stored_config);
 if (nc->destructor) {
 nc->destructor(nc);
 }
@@ -1250,6 +1252,36 @@ RxFilterInfoList *qmp_query_rx_filter(bool has_name, 
const char *name,
 return filter_list;
 }
 
+NetdevInfoList *qmp_query_netdevs(Error **errp)
+{
+NetdevInfoList *list = NULL;
+NetClientState *nc;
+
+QTAILQ_FOREACH(nc, _clients, next) {
+/*
+ * Only look at netdevs (backend network devices), not for each queue
+ * or NIC / hubport
+ */
+if (nc->stored_config) {
+NetdevInfoList *node = g_new0(NetdevInfoList, 1);
+
+node->value = QAPI_CLONE(NetdevInfo, nc->stored_config);
+g_free(node->value->id); /* Need to dealloc default empty id */
+node->value->id = g_strdup(nc->name);
+
+node->value->has_peer_id = nc->peer != NULL;
+if (node->value->has_peer_id) {
+node->value->peer_id = g_strdup(nc->peer->name);
+}
+
+node->next = list;
+list = node;
+}
+}
+
+return list;
+}
+
 void hmp_info_network(Monitor *mon, const QDict *qdict)
 {
 NetClientState *nc, *peer;
diff --git a/net/netmap.c b/net/netmap.c
index 350f097f91..71feacb92c 100644
--- a/net/netmap.c
+++ b/net/netmap.c
@@ -411,6 +411,7 @@ int net_init_netmap(const Netdev *netdev,
 NetClientState *nc;
 Error *err = NULL;
 NetmapState *s;
+NetdevNetmapOptions *stored;
 
 nmd = netmap_open(netmap_opts, );
 if (err) {
@@ -427,6 +428,18 @@ int net_init_netmap(const Netdev *netdev,
 pstrcpy(s->ifname, sizeof(s->ifname), netmap_opts->ifname);
 netmap_read_poll(s, true); /* Initially only poll for reads. */
 
+/* Store startup parameters */
+nc->stored_config = g_new0(NetdevInfo, 1);
+nc->stored_config->type = NET_CLIENT_DRIVER_NETMAP;
+stored = >stored_config->u.netmap;
+
+stored->ifname = g_strdup(netmap_opts->ifname);
+
+if (netmap_opts->has_devname) {
+stored->has_devname = true;
+stored->devname = g_strdup(netmap_opts->devname);
+}
+
 return 0;
 }
 
diff --git a/net/slirp.c b/net/slirp.c
index 77042e6df7..54c33d1173 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -346,6 +346,14 @@ static SaveVMHandlers savevm_slirp_state = {
 .load_state = net_slirp_state_load,
 };
 

Re: [PATCH 03/13] oslib-posix: default exec_dir to bindir

[Richard Henderson]

On 8/31/20 11:20 PM, Paolo Bonzini wrote:
> +exec_dir = g_strdup(CONFIG_BINDIR);

Why the strdup?  The string constant should be fine, IIUC.


r~

Re: [PATCH v3 08/16] hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card

[Philippe Mathieu-Daudé]

On 9/1/20 12:27 PM, Bin Meng wrote:
> Hi Philippe,
> 
> On Tue, Sep 1, 2020 at 5:42 PM Philippe Mathieu-Daudé  wrote:
>>
>> On 9/1/20 3:39 AM, Bin Meng wrote:
>>> From: Bin Meng 
>>>
>>> Microchip PolarFire SoC integrates one Cadence SDHCI controller.
>>> On the Icicle Kit board, one eMMC chip and an external SD card
>>> connect to this controller depending on different configuration.
>>>
>>> As QEMU does not support eMMC yet, we just emulate the SD card
>>> configuration. To test this, the Hart Software Services (HSS)
>>> should choose the SD card configuration:
>>>
>>> $ cp boards/icicle-kit-es/def_config.sdcard .config
>>> $ make BOARD=icicle-kit-es
>>>
>>> The SD card image can be built from the Yocto BSP at:
>>> https://github.com/polarfire-soc/meta-polarfire-soc-yocto-bsp
>>>
>>> Note the generated SD card image should be resized before use:
>>> $ qemu-img resize /path/to/sdcard.img 4G
>>>
>>> Launch QEMU with the following command:
>>> $ qemu-system-riscv64 -nographic -M microchip-icicle-kit -sd sdcard.img
>>>
>>> Signed-off-by: Bin Meng 
>>>
>>> ---
>>>
>>> (no changes since v2)
>>>
>>> Changes in v2:
>>> - do not initialize TYPE_SYSBUS_SDHCI in the SoC instance_init(),
>>>   instead move that to the cadence_sdhci model
>>> - do not access generic-sdhci's state directly,
>>>   instead move that to the cadence_sdhci model
>>>
>>>  include/hw/riscv/microchip_pfsoc.h |  4 
>>>  hw/riscv/microchip_pfsoc.c | 23 +++
>>>  hw/riscv/Kconfig   |  1 +
>>>  3 files changed, 28 insertions(+)
>>>
>>> diff --git a/include/hw/riscv/microchip_pfsoc.h 
>>> b/include/hw/riscv/microchip_pfsoc.h
>>> index a5efa1d..d810ee8 100644
>>> --- a/include/hw/riscv/microchip_pfsoc.h
>>> +++ b/include/hw/riscv/microchip_pfsoc.h
>>> @@ -23,6 +23,7 @@
>>>  #define HW_MICROCHIP_PFSOC_H
>>>
>>>  #include "hw/char/mchp_pfsoc_mmuart.h"
>>> +#include "hw/sd/cadence_sdhci.h"
>>>
>>>  typedef struct MicrochipPFSoCState {
>>>  /*< private >*/
>>> @@ -39,6 +40,7 @@ typedef struct MicrochipPFSoCState {
>>>  MchpPfSoCMMUartState *serial2;
>>>  MchpPfSoCMMUartState *serial3;
>>>  MchpPfSoCMMUartState *serial4;
>>> +CadenceSDHCIState sdhci;
>>>  } MicrochipPFSoCState;
>>>
>>>  #define TYPE_MICROCHIP_PFSOC"microchip.pfsoc"
>>> @@ -74,6 +76,7 @@ enum {
>>>  MICROCHIP_PFSOC_MMUART0,
>>>  MICROCHIP_PFSOC_SYSREG,
>>>  MICROCHIP_PFSOC_MPUCFG,
>>> +MICROCHIP_PFSOC_EMMC_SD,
>>>  MICROCHIP_PFSOC_MMUART1,
>>>  MICROCHIP_PFSOC_MMUART2,
>>>  MICROCHIP_PFSOC_MMUART3,
>>> @@ -85,6 +88,7 @@ enum {
>>>  };
>>>
>>>  enum {
>>> +MICROCHIP_PFSOC_EMMC_SD_IRQ = 88,
>>>  MICROCHIP_PFSOC_MMUART0_IRQ = 90,
>>>  MICROCHIP_PFSOC_MMUART1_IRQ = 91,
>>>  MICROCHIP_PFSOC_MMUART2_IRQ = 92,
>>> diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
>>> index cee959a..0b2e9ca 100644
>>> --- a/hw/riscv/microchip_pfsoc.c
>>> +++ b/hw/riscv/microchip_pfsoc.c
>>> @@ -12,6 +12,7 @@
>>>   * 1) PLIC (Platform Level Interrupt Controller)
>>>   * 2) eNVM (Embedded Non-Volatile Memory)
>>>   * 3) MMUARTs (Multi-Mode UART)
>>> + * 4) Cadence eMMC/SDHC controller and an SD card connected to it
>>>   *
>>>   * This board currently generates devicetree dynamically that indicates at 
>>> least
>>>   * two harts and up to five harts.
>>> @@ -75,6 +76,7 @@ static const struct MemmapEntry {
>>>  [MICROCHIP_PFSOC_MMUART0] = { 0x2000, 0x1000 },
>>>  [MICROCHIP_PFSOC_SYSREG] =  { 0x20002000, 0x2000 },
>>>  [MICROCHIP_PFSOC_MPUCFG] =  { 0x20005000, 0x1000 },
>>> +[MICROCHIP_PFSOC_EMMC_SD] = { 0x20008000, 0x1000 },
>>>  [MICROCHIP_PFSOC_MMUART1] = { 0x2010, 0x1000 },
>>>  [MICROCHIP_PFSOC_MMUART2] = { 0x20102000, 0x1000 },
>>>  [MICROCHIP_PFSOC_MMUART3] = { 0x20104000, 0x1000 },
>>> @@ -111,6 +113,9 @@ static void microchip_pfsoc_soc_instance_init(Object 
>>> *obj)
>>>  qdev_prop_set_string(DEVICE(>u_cpus), "cpu-type",
>>>   TYPE_RISCV_CPU_SIFIVE_U54);
>>>  qdev_prop_set_uint64(DEVICE(>u_cpus), "resetvec", RESET_VECTOR);
>>> +
>>> +object_initialize_child(obj, "sd-controller", >sdhci,
>>> +TYPE_CADENCE_SDHCI);
>>>  }
>>>
>>>  static void microchip_pfsoc_soc_realize(DeviceState *dev, Error **errp)
>>> @@ -223,6 +228,13 @@ static void microchip_pfsoc_soc_realize(DeviceState 
>>> *dev, Error **errp)
>>>  memmap[MICROCHIP_PFSOC_MPUCFG].base,
>>>  memmap[MICROCHIP_PFSOC_MPUCFG].size);
>>>
>>> +/* SDHCI */
>>> +sysbus_realize(SYS_BUS_DEVICE(>sdhci), errp);
>>> +sysbus_mmio_map(SYS_BUS_DEVICE(>sdhci), 0,
>>> +memmap[MICROCHIP_PFSOC_EMMC_SD].base);
>>> +sysbus_connect_irq(SYS_BUS_DEVICE(>sdhci), 0,
>>> +qdev_get_gpio_in(DEVICE(s->plic), MICROCHIP_PFSOC_EMMC_SD_IRQ));
>>> +
>>>  /* MMUARTs */
>>>  s->serial0 = 

Re: [PATCH v2 2/3] hw/sd/sdhci: Document the datasheet used

[Richard Henderson]

On 9/1/20 7:04 AM, Philippe Mathieu-Daudé wrote:
> Add datasheet name in the file header.
> 
> We can not add the direct download link since there is a disclaimers
> to agree first on the SD Association website (www.sdcard.org).
> 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/sd/sdhci.c | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Richard Henderson 

r~

Re: [PATCH v2 1/3] hw/sd/sdhci: Fix qemu_log_mask() format string

[Richard Henderson]

On 9/1/20 7:04 AM, Philippe Mathieu-Daudé wrote:
> Add missing newline character in qemu_log_mask() format.
> 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/sd/sdhci.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Richard Henderson 

r~

Re: [PATCH 5/5] hw/isa/isa-bus: Replace hw_error() by assert()

[Richard Henderson]

On 9/1/20 3:40 AM, Philippe Mathieu-Daudé wrote:
> As we can never have more than ISA_NUM_IRQS (16) ISA IRQs,
> replace the not very interesting hw_error() call by an
> assert() which is more useful to debug condition that can
> not happen.
> 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/isa/isa-bus.c | 9 ++---
>  1 file changed, 2 insertions(+), 7 deletions(-)

Reviewed-by: Richard Henderson 

r~

Re: [PATCH 4/5] hw/ppc/ppc4xx_pci: Replace pointless warning by assert()

[Richard Henderson]

On 9/1/20 3:40 AM, Philippe Mathieu-Daudé wrote:
> We call pci_register_root_bus() to register 4 IRQs with the
> ppc4xx_pci_set_irq() handler. As it can only be called with
> values in the [0-4[ range, replace the pointless warning by
> an assert().
> 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/ppc/ppc4xx_pci.c | 5 +
>  1 file changed, 1 insertion(+), 4 deletions(-)

Reviewed-by: Richard Henderson 

r~

Re: [PATCH 3/5] hw/ppc/ppc4xx_pci: Use ARRAY_SIZE() instead of magic value

[Richard Henderson]

On 9/1/20 3:40 AM, Philippe Mathieu-Daudé wrote:
> Replace the magic '4' by ARRAY_SIZE(s->irq) which is more explicit.
> 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/ppc/ppc4xx_pci.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)

Reviewed-by: Richard Henderson 

r~

Re: [PATCH 2/5] hw/mips/fuloong2e: Convert pointless error message to an assert()

[Richard Henderson]

On 9/1/20 3:40 AM, Philippe Mathieu-Daudé wrote:
> Displaying "vt82c686b_init error" doesn't give any hint about why
> this call failed. As this message targets developers and not users,
> replace the pointless error message by a call to assert() which
> will provide more useful information.
> 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/mips/fuloong2e.c | 5 +
>  1 file changed, 1 insertion(+), 4 deletions(-)

Reviewed-by: Richard Henderson 

r~

Re: [PATCH v6 11/16] cpus: remove checks for non-NULL cpus_accel

[Richard Henderson]

On 9/1/20 12:21 AM, Claudio Fontana wrote:
> now that all accelerators support the CpusAccel interface,
> we can remove most checks for non-NULL cpus_accel,
> we just add a sanity check/assert at vcpu creation.
> 
> Signed-off-by: Claudio Fontana 
> ---
>  softmmu/cpus.c | 33 +
>  1 file changed, 21 insertions(+), 12 deletions(-)

Reviewed-by: Richard Henderson 

r~

Re: [PATCH v6 12/16] cpus: add handle_interrupt to the CpusAccel interface

[Richard Henderson]

On 9/1/20 12:21 AM, Claudio Fontana wrote:
> kvm: uses the generic handler
> qtest: uses the generic handler
> whpx: changed to use the generic handler (identical implementation)
> hax: changed to use the generic handler (identical implementation)
> hvf: changed to use the generic handler (identical implementation)
> tcg: adapt tcg-cpus to point to the tcg-specific handler
> 
> Signed-off-by: Claudio Fontana 
> ---
>  accel/tcg/tcg-all.c| 26 --
>  accel/tcg/tcg-cpus.c   | 28 
>  hw/core/cpu.c  | 13 -
>  include/hw/core/cpu.h  | 14 --
>  include/sysemu/cpus.h  |  2 ++
>  softmmu/cpus.c | 18 ++
>  target/i386/hax-all.c  | 10 --
>  target/i386/hvf/hvf.c  |  9 -
>  target/i386/whpx-all.c | 10 --
>  9 files changed, 48 insertions(+), 82 deletions(-)

Reviewed-by: Richard Henderson 

r~

[PULL 24/26] meson: add description to options

[Paolo Bonzini]

This will be useful in the future to generate configure
command line parsing from meson_options.txt.

Signed-off-by: Paolo Bonzini 
---
 meson_options.txt | 29 -
 1 file changed, 20 insertions(+), 9 deletions(-)

diff --git a/meson_options.txt b/meson_options.txt
index c3120fa359..543cf70043 100644
--- a/meson_options.txt
+++ b/meson_options.txt
@@ -2,12 +2,23 @@ option('qemu_suffix', type : 'string', value: 'qemu',
description: 'Suffix for QEMU data/modules/config directories (can be 
empty)')
 option('docdir', type : 'string', value : 'doc',
description: 'Base directory for documentation installation (can be 
empty)')
-option('gettext', type : 'boolean', value : true)
-option('sdl', type : 'feature', value : 'auto')
-option('sdl_image', type : 'feature', value : 'auto')
-option('u2f', type : 'feature', value : 'auto')
-option('vnc', type : 'feature', value : 'enabled')
-option('vnc_jpeg', type : 'feature', value : 'auto')
-option('vnc_png', type : 'feature', value : 'auto')
-option('vnc_sasl', type : 'feature', value : 'auto')
-option('xkbcommon', type : 'feature', value : 'auto')
+
+option('gettext', type : 'boolean', value : true,
+   description: 'Localization of the GTK+ user interface')
+
+option('sdl', type : 'feature', value : 'auto',
+   description: 'SDL user interface')
+option('sdl_image', type : 'feature', value : 'auto',
+   description: 'SDL Image support for icons')
+option('u2f', type : 'feature', value : 'auto',
+   description: 'U2F emulation support')
+option('vnc', type : 'feature', value : 'enabled',
+   description: 'VNC server')
+option('vnc_jpeg', type : 'feature', value : 'auto',
+   description: 'JPEG lossy compression for VNC server')
+option('vnc_png', type : 'feature', value : 'auto',
+   description: 'PNG compression for VNC server')
+option('vnc_sasl', type : 'feature', value : 'auto',
+   description: 'SASL authentication for VNC server')
+option('xkbcommon', type : 'feature', value : 'auto',
+   description: 'xkbcommon support')
-- 
2.26.2

[PULL 26/26] Makefile: Fix in-tree clean/distclean

[Paolo Bonzini]

From: Greg Kurz 

Doing 'make clean' or 'make distclean' in a freshly cloned tree results in:

make: *** No rule to make target 'ninja-clean', needed by 'clean'.  Stop.

Make the fallback rules global. While here, change the ninjatool recipe to
always have a zero exit status and thus prevent make to emit a warning.

Fixes: a56650518f5b ("configure: integrate Meson in the build system")
Signed-off-by: Greg Kurz 
Message-Id: <159897001659.442705.15538955005543395950.st...@bahia.lan>
Signed-off-by: Paolo Bonzini 
---
 Makefile | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/Makefile b/Makefile
index 049e2ffa03..ed354c43b0 100644
--- a/Makefile
+++ b/Makefile
@@ -54,13 +54,6 @@ export NINJA=./ninjatool
 # enough to prime the rest of the build.
 ninjatool: build.ninja
 
-# Only needed in case Makefile.ninja does not exist.
-.PHONY: ninja-clean ninja-distclean clean-ctlist
-clean-ctlist:
-ninja-clean::
-ninja-distclean::
-build.ninja: config-host.mak
-
 Makefile.ninja: build.ninja ninjatool
./ninjatool -t ninja2make --omit clean dist uninstall cscope TAGS ctags 
< $< > $@
 -include Makefile.ninja
@@ -115,6 +108,13 @@ ifneq ($(filter-out 
$(UNCHECKED_GOALS),$(MAKECMDGOALS)),$(if $(MAKECMDGOALS),,fa
 endif
 endif
 
+# Only needed in case Makefile.ninja does not exist.
+.PHONY: ninja-clean ninja-distclean clean-ctlist
+clean-ctlist:
+ninja-clean::
+ninja-distclean::
+build.ninja: config-host.mak
+
 include $(SRC_PATH)/rules.mak
 
 # lor is defined in rules.mak
@@ -195,7 +195,7 @@ recurse-clean: $(addsuffix /clean, $(ROM_DIRS))
 ##
 
 clean: recurse-clean ninja-clean clean-ctlist
-   -test -f ninjatool && ./ninjatool $(if $(V),-v,) -t clean
+   if test -f ninjatool; then ./ninjatool $(if $(V),-v,) -t clean; fi
 # avoid old build problems by removing potentially incorrect old files
rm -f config.mak op-i386.h opc-i386.h gen-op-i386.h op-arm.h opc-arm.h 
gen-op-arm.h
find . \( -name '*.so' -o -name '*.dll' -o -name '*.[oda]' \) -type f \
-- 
2.26.2

[PULL v2 00/26] Meson changes for 2020-09-01

[Paolo Bonzini]

The following changes since commit 2f4c51c0f384d7888a04b4815861e6d5fd244d75:

  Merge remote-tracking branch 'remotes/kraxel/tags/usb-20200831-pull-request' 
into staging (2020-08-31 19:39:13 +0100)

are available in the Git repository at:

  https://gitlab.com/bonzini/qemu.git tags/for-upstream

for you to fetch changes up to 9f5d95976895132976d9d6c14e7a35781d6f1e15:

  Makefile: Fix in-tree clean/distclean (2020-09-01 12:11:00 -0400)

v1->v2: add Greg's cscope patches, fix static build, fix option typo


meson fixes:
* bump submodule to 0.55.1
* SDL, pixman and zlib fixes
* firmwarepath fix
* fix firmware builds

meson related:
* move install to Meson
* move NSIS to Meson
* do not make meson use cmake
* add description to options


Greg Kurz (2):
  Makefile: Add back TAGS/ctags/cscope rules
  Makefile: Fix in-tree clean/distclean

Marc-André Lureau (14):
  meson: install pc-bios blobs
  meson: install scripts/qemu-trace-stap
  meson: install icons
  meson: install desktop file
  meson: install $localstatedir/run for qga
  build-sys: remove install target from Makefile
  configure: rename confsuffix option
  configure: always /-seperate directory from qemu_suffix
  configure: build docdir like other suffixed directories
  meson: pass qemu_suffix option
  meson: use meson datadir instead of qemu_datadir
  meson: pass docdir option
  meson: use meson mandir instead of qemu_mandir
  meson: add NSIS building

Paolo Bonzini (8):
  meson: bump submodule to 0.55.1
  block: always link with zlib
  meson: move zlib detection to meson
  meson: add pixman dependency to UI modules
  configure: do not include ${prefix} in firmwarepath
  meson: use pkg-config method to find dependencies
  build: fix recurse-all target
  meson: add description to options

Stefan Weil (1):
  meson: add pixman dependency to chardev/baum module

Volker Rümelin (1):
  meson: fix SDL2_image detection

 Makefile   | 150 ++---
 block/meson.build  |   4 +-
 chardev/meson.build|   2 +-
 configure  |  65 +---
 contrib/vhost-user-gpu/meson.build |   2 +-
 docs/devel/build-system.rst|  27 +++
 docs/meson.build   |   4 +-
 meson  |   2 +-
 meson.build|  53 +
 meson_options.txt  |  33 +---
 pc-bios/descriptors/meson.build|   2 +-
 pc-bios/keymaps/meson.build|   6 +-
 pc-bios/meson.build|  65 +++-
 pc-bios/optionrom/Makefile |  10 +--
 pc-bios/s390-ccw/Makefile  |   3 +-
 qga/meson.build|   2 +
 scripts/meson.build|   3 +
 scripts/nsis.py|  78 +++
 tools/virtiofsd/meson.build|   2 +-
 trace/meson.build  |   2 +-
 ui/icons/meson.build   |  13 
 ui/meson.build |   9 ++-
 22 files changed, 303 insertions(+), 234 deletions(-)
 create mode 100644 scripts/meson.build
 create mode 100644 scripts/nsis.py
 create mode 100644 ui/icons/meson.build
-- 
2.26.2

[PULL 25/26] Makefile: Add back TAGS/ctags/cscope rules

[Paolo Bonzini]

From: Greg Kurz 

It is a bit of a pain to be forced to run configure before being able
to use cscope and friends. Add back the rules to build them in-tree
as before commit a56650518f5b.

Fixes: a56650518f5b ("configure: integrate Meson in the build system")
Signed-off-by: Greg Kurz 
Message-Id: <159897001005.442705.16516671603870288336.st...@bahia.lan>
Signed-off-by: Paolo Bonzini 
---
 Makefile | 18 +-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index c1a93c66a0..049e2ffa03 100644
--- a/Makefile
+++ b/Makefile
@@ -62,7 +62,7 @@ ninja-distclean::
 build.ninja: config-host.mak
 
 Makefile.ninja: build.ninja ninjatool
-   ./ninjatool -t ninja2make --omit clean dist uninstall < $< > $@
+   ./ninjatool -t ninja2make --omit clean dist uninstall cscope TAGS ctags 
< $< > $@
 -include Makefile.ninja
 
 ${ninja-targets-c_COMPILER} ${ninja-targets-cpp_COMPILER}: .var.command += -MP
@@ -229,6 +229,22 @@ distclean: clean ninja-distclean
rm -f linux-headers/asm
rm -Rf .sdk
 
+.PHONY: ctags
+ctags:
+   rm -f tags
+   find "$(SRC_PATH)" -name '*.[hc]' -exec ctags --append {} +
+
+.PHONY: TAGS
+TAGS:
+   rm -f TAGS
+   find "$(SRC_PATH)" -name '*.[hc]' -exec etags --append {} +
+
+.PHONY: cscope
+cscope:
+   rm -f "$(SRC_PATH)"/cscope.*
+   find "$(SRC_PATH)/" -name "*.[chsS]" -print | sed -e 's,^\./,,' > 
"$(SRC_PATH)/cscope.files"
+   cscope -b -i"$(SRC_PATH)/cscope.files"
+
 # Needed by "meson install"
 export DESTDIR
 
-- 
2.26.2

[PULL 10/26] meson: move zlib detection to meson

[Paolo Bonzini]

Meson includes the same logic that tries to look for -lz if
pkg-config (and cmake) cannot find zlib.  The undocumented
--disable-zlib-test option becomes a no-op.

There is still an instance of "-lz" in the LIBS directory.
It will go away as soon as tests are converted to meson,
because the zlib dependency does not propagate from libblock.fa
to the Makefile-build unit tests.

Reviewed-by: Marc-André Lureau 
Signed-off-by: Paolo Bonzini 
---
 configure   | 32 +---
 meson.build |  6 +-
 2 files changed, 2 insertions(+), 36 deletions(-)

diff --git a/configure b/configure
index f81900880a..e8946aeefb 100755
--- a/configure
+++ b/configure
@@ -502,7 +502,6 @@ opengl=""
 opengl_dmabuf="no"
 cpuid_h="no"
 avx2_opt=""
-zlib="yes"
 capstone=""
 lzo=""
 snappy=""
@@ -1428,7 +1427,7 @@ for opt do
   ;;
   --enable-usb-redir) usb_redir="yes"
   ;;
-  --disable-zlib-test) zlib="no"
+  --disable-zlib-test)
   ;;
   --disable-lzo) lzo="no"
   ;;
@@ -3904,30 +3903,6 @@ if ! compile_prog "$glib_cflags -Werror" "$glib_libs" ; 
then
 fi
 fi
 
-#
-# zlib check
-
-if test "$zlib" != "no" ; then
-if $pkg_config --exists zlib; then
-zlib_cflags=$($pkg_config --cflags zlib)
-zlib_libs=$($pkg_config --libs zlib)
-QEMU_CFLAGS="$zlib_cflags $QEMU_CFLAGS"
-LIBS="$zlib_libs $LIBS"
-else
-cat > $TMPC << EOF
-#include 
-int main(void) { zlibVersion(); return 0; }
-EOF
-if compile_prog "" "-lz" ; then
-zlib_libs=-lz
-LIBS="$LIBS $zlib_libs"
-else
-error_exit "zlib check failed" \
-"Make sure to have the zlib libs and headers installed."
-fi
-fi
-fi
-
 ##
 # SHA command probe for modules
 if test "$modules" = yes; then
@@ -7135,11 +7110,6 @@ fi
 if test "$posix_memalign" = "yes" ; then
   echo "CONFIG_POSIX_MEMALIGN=y" >> $config_host_mak
 fi
-if test "$zlib" != "no" ; then
-echo "CONFIG_ZLIB=y" >> $config_host_mak
-echo "ZLIB_CFLAGS=$zlib_cflags" >> $config_host_mak
-echo "ZLIB_LIBS=$zlib_libs" >> $config_host_mak
-fi
 if test "$spice" = "yes" ; then
   echo "CONFIG_SPICE=y" >> $config_host_mak
   echo "SPICE_CFLAGS=$spice_cflags" >> $config_host_mak
diff --git a/meson.build b/meson.build
index 6b2fc76933..b68e1bdfc7 100644
--- a/meson.build
+++ b/meson.build
@@ -134,11 +134,7 @@ if 'CONFIG_AUTH_PAM' in config_host
   pam = cc.find_library('pam')
 endif
 libaio = cc.find_library('aio', required: false)
-zlib = not_found
-if 'CONFIG_ZLIB' in config_host
-  zlib = declare_dependency(compile_args: config_host['ZLIB_CFLAGS'].split(),
-link_args: config_host['ZLIB_LIBS'].split())
-endif
+zlib = dependency('zlib', required: true, static: enable_static)
 linux_io_uring = not_found
 if 'CONFIG_LINUX_IO_URING' in config_host
   linux_io_uring = declare_dependency(compile_args: 
config_host['LINUX_IO_URING_CFLAGS'].split(),
-- 
2.26.2

Re: [PATCH v6 05/16] cpus: extract out qtest-specific code to accel/qtest

[Richard Henderson]

On 9/1/20 12:21 AM, Claudio Fontana wrote:
> register a "CpusAccel" interface for qtest as well.
> 
> Signed-off-by: Claudio Fontana 
> ---
>  MAINTAINERS   |  2 +-
>  accel/meson.build |  2 +-
>  accel/qtest/meson.build   |  7 +++
>  accel/qtest/qtest-cpus.c  | 91 +++
>  accel/qtest/qtest-cpus.h  | 17 
>  accel/{ => qtest}/qtest.c |  7 +++
>  softmmu/cpus.c| 64 +--
>  7 files changed, 125 insertions(+), 65 deletions(-)
>  create mode 100644 accel/qtest/meson.build
>  create mode 100644 accel/qtest/qtest-cpus.c
>  create mode 100644 accel/qtest/qtest-cpus.h
>  rename accel/{ => qtest}/qtest.c (86%)

Reviewed-by: Richard Henderson 

r~

Re: [PATCH v6 04/16] cpus: extract out TCG-specific code to accel/tcg

[Richard Henderson]

On 9/1/20 12:21 AM, Claudio Fontana wrote:
> TCG is the first accelerator to register a "CpusAccel" interface
> on initialization, providing functions for starting a vcpu,
> kicking a vcpu, sychronizing state and getting virtual clock
> and ticks.
> 
> Signed-off-by: Claudio Fontana 
> Reviewed-by: Philippe Mathieu-Daudé 
> Tested-by: Philippe Mathieu-Daudé 
> [added const]
> Signed-off-by: Claudio Fontana 
> ---

Reviewed-by: Richard Henderson 

r~

Re: [PATCH v6 03/16] cpus: prepare new CpusAccel cpu accelerator interface

[Richard Henderson]

On 9/1/20 12:21 AM, Claudio Fontana wrote:
> The new interface starts unused, will start being used by the
> next patches.
> 
> It provides methods for each accelerator to start a vcpu, kick a vcpu,
> synchronize state, get cpu virtual clock and elapsed ticks.
> 
> In qemu_wait_io_event, make it clear that APC is used only for HAX
> on Windows.
> 
> Signed-off-by: Claudio Fontana 
> ---

Reviewed-by: Richard Henderson 

r~

Re: [PATCH v6 01/16] cpu-timers, icount: new modules

[Richard Henderson]

On 9/1/20 12:21 AM, Claudio Fontana wrote:
> refactoring of cpus.c continues with cpu timer state extraction.
> 
> cpu-timers: responsible for the softmmu cpu timers state,
> including cpu clocks and ticks.
> 
> icount: counts the TCG instructions executed. As such it is specific to
> the TCG accelerator. Therefore, it is built only under CONFIG_TCG.
> 
> One complication is due to qtest, which uses an icount field to warp time
> as part of qtest (qtest_clock_warp).
> 
> In order to solve this problem, provide a separate counter for qtest.
> 
> This requires fixing assumptions scattered in the code that
> qtest_enabled() implies icount_enabled(), checking each specific case.
> 
> Signed-off-by: Claudio Fontana 
> ---

Reviewed-by: Richard Henderson 

r~

Re: [PATCH v3 5/5] pc-bios: s390x: Go into disabled wait when encountering a PGM exception

[Thomas Huth]

On 31/08/2020 17.09, Janosch Frank wrote:
> Let's setup a PGM PSW, so we won't load 0s when a program exception
> happens. Instead we'll load a disabled wait PSW.
> 
> Signed-off-by: Janosch Frank 
> Reviewed-by: Christian Borntraeger 
> ---
>  pc-bios/s390-ccw/start.S | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/pc-bios/s390-ccw/start.S b/pc-bios/s390-ccw/start.S
> index 939aac3a7c..775b45baeb 100644
> --- a/pc-bios/s390-ccw/start.S
> +++ b/pc-bios/s390-ccw/start.S
> @@ -44,6 +44,9 @@ done:
>  larl  %r2, external_new_psw
>  stg   %r1, 8(%r2)
>  mvc   0x1b0(16),0(%r2)
> +/* set up a pgm exception disabled wait psw */
> +larl  %r2, disabled_wait_psw
> +mvc   0x01d0(16), 0(%r2)
>  j  main  /* And call C */
>  
>  memsetxc:
> 

Sounds like a good idea.

Reviewed-by: Thomas Huth 

Re: [PATCH v1 2/6] hw/net/can: sja1000 ignore CAN FD frames

[Vikram Garhwal]

On Tue, Jul 14, 2020 at 02:20:15PM +0200, p...@cmp.felk.cvut.cz wrote:
> From: Jan Charvat 
>
> Signed-off-by: Jan Charvat 
> Signed-off-by: Pavel Pisa 

Reviewed-by: Vikram Garhwal 

> ---
>  hw/net/can/can_sja1000.c | 29 +++--
>  1 file changed, 23 insertions(+), 6 deletions(-)
>
> diff --git a/hw/net/can/can_sja1000.c b/hw/net/can/can_sja1000.c
> index d83c550edc..382911560c 100644
> --- a/hw/net/can/can_sja1000.c
> +++ b/hw/net/can/can_sja1000.c
> @@ -323,11 +323,16 @@ static void buff2frame_bas(const uint8_t *buff, 
> qemu_can_frame *frame)
>  static int frame2buff_pel(const qemu_can_frame *frame, uint8_t *buff)
>  {
>  int i;
> +int dlen = frame->can_dlc;
>
>  if (frame->can_id & QEMU_CAN_ERR_FLAG) { /* error frame, NOT support 
> now. */
>  return -1;
>  }
>
> +if (dlen > 8) {
> +return -1;
> +}
> +
>  buff[0] = 0x0f & frame->can_dlc; /* DLC */
>  if (frame->can_id & QEMU_CAN_RTR_FLAG) { /* RTR */
>  buff[0] |= (1 << 6);
> @@ -338,18 +343,18 @@ static int frame2buff_pel(const qemu_can_frame *frame, 
> uint8_t *buff)
>  buff[2] = extract32(frame->can_id, 13, 8); /* ID.20~ID.13 */
>  buff[3] = extract32(frame->can_id, 5, 8);  /* ID.12~ID.05 */
>  buff[4] = extract32(frame->can_id, 0, 5) << 3; /* ID.04~ID.00,xxx */
> -for (i = 0; i < frame->can_dlc; i++) {
> +for (i = 0; i < dlen; i++) {
>  buff[5 + i] = frame->data[i];
>  }
> -return frame->can_dlc + 5;
> +return dlen + 5;
>  } else { /* SFF */
>  buff[1] = extract32(frame->can_id, 3, 8); /* ID.10~ID.03 */
>  buff[2] = extract32(frame->can_id, 0, 3) << 5; /* ID.02~ID.00,x 
> */
> -for (i = 0; i < frame->can_dlc; i++) {
> +for (i = 0; i < dlen; i++) {
>  buff[3 + i] = frame->data[i];
>  }
>
> -return frame->can_dlc + 3;
> +return dlen + 3;
>  }
>
>  return -1;
> @@ -358,6 +363,7 @@ static int frame2buff_pel(const qemu_can_frame *frame, 
> uint8_t *buff)
>  static int frame2buff_bas(const qemu_can_frame *frame, uint8_t *buff)
>  {
>  int i;
> +int dlen = frame->can_dlc;
>
>   /*
>* EFF, no support for BasicMode
> @@ -369,17 +375,21 @@ static int frame2buff_bas(const qemu_can_frame *frame, 
> uint8_t *buff)
>  return -1;
>  }
>
> +if (dlen > 8) {
> +return -1;
> +}
> +
>  buff[0] = extract32(frame->can_id, 3, 8); /* ID.10~ID.03 */
>  buff[1] = extract32(frame->can_id, 0, 3) << 5; /* ID.02~ID.00,x */
>  if (frame->can_id & QEMU_CAN_RTR_FLAG) { /* RTR */
>  buff[1] |= (1 << 4);
>  }
>  buff[1] |= frame->can_dlc & 0x0f;
> -for (i = 0; i < frame->can_dlc; i++) {
> +for (i = 0; i < dlen; i++) {
>  buff[2 + i] = frame->data[i];
>  }
>
> -return frame->can_dlc + 2;
> +return dlen + 2;
>  }
>
>  static void can_sja_update_pel_irq(CanSJA1000State *s)
> @@ -764,6 +774,13 @@ ssize_t can_sja_receive(CanBusClientState *client, const 
> qemu_can_frame *frames,
>  if (frames_cnt <= 0) {
>  return 0;
>  }
> +if (frame->flags && QEMU_CAN_FRMF_TYPE_FD) {
> +if (DEBUG_FILTER) {
> +can_display_msg("[cansja]: ignor fd frame ", frame);
> +}
> +return 1;
> +}
> +
>  if (DEBUG_FILTER) {
>  can_display_msg("[cansja]: receive ", frame);
>  }

Re: [PATCH v3 4/5] pc-bios: s390x: Save io and external new PSWs before overwriting them

[Thomas Huth]

On 31/08/2020 17.09, Janosch Frank wrote:
> Currently we always overwrite the mentioned exception new PSWs before
> loading the enabled wait PSW. Let's save the PSW before overwriting
> and restore it right before starting the loaded kernel.
> 
> Signed-off-by: Janosch Frank 
> ---
>  pc-bios/s390-ccw/jump2ipl.c |  4 +++
>  pc-bios/s390-ccw/netmain.c  |  3 ++
>  pc-bios/s390-ccw/start.S| 62 +++--
>  3 files changed, 52 insertions(+), 17 deletions(-)

Patch looks basically fine to me, I just got some questions for my
understanding below...

> diff --git a/pc-bios/s390-ccw/jump2ipl.c b/pc-bios/s390-ccw/jump2ipl.c
> index 5b8352d257..bb94ba7550 100644
> --- a/pc-bios/s390-ccw/jump2ipl.c
> +++ b/pc-bios/s390-ccw/jump2ipl.c
> @@ -14,6 +14,7 @@
>  #define RESET_PSW_MASK (PSW_MASK_SHORTPSW | PSW_MASK_64)
>  #define RESET_PSW ((uint64_t)_to_IPL_addr | RESET_PSW_MASK)
>  
> +extern uint64_t psw_save_io[], psw_save_ext[];
>  static uint64_t *reset_psw = 0, save_psw, ipl_continue;
>  
>  void write_reset_psw(uint64_t psw)
> @@ -59,6 +60,9 @@ void jump_to_IPL_code(uint64_t address)
>  /* Ensure the guest output starts fresh */
>  sclp_print("\n");
>  
> +memcpy(>io_new_psw, psw_save_io, 16);
> +memcpy(>external_new_psw, psw_save_ext, 16);
> +
>  /*
>   * HACK ALERT.
>   * We use the load normal reset to keep r15 unchanged. jump_to_IPL_2
> diff --git a/pc-bios/s390-ccw/netmain.c b/pc-bios/s390-ccw/netmain.c
> index 056e93a818..74ef28fbc6 100644
> --- a/pc-bios/s390-ccw/netmain.c
> +++ b/pc-bios/s390-ccw/netmain.c
> @@ -32,6 +32,7 @@
>  #include 
>  #include 
>  
> +#include "s390-arch.h"
>  #include "s390-ccw.h"
>  #include "cio.h"
>  #include "virtio.h"
> @@ -43,6 +44,8 @@
>  extern char _start[];
>  void write_iplb_location(void) {}
>  
> +LowCore *lowcore; /* Yes, this *is* a pointer to address 0 */
> +
>  #define KERNEL_ADDR ((void *)0L)
>  #define KERNEL_MAX_SIZE ((long)_start)
>  #define ARCH_COMMAND_LINE_SIZE  896  /* Taken from Linux kernel 
> */
> diff --git a/pc-bios/s390-ccw/start.S b/pc-bios/s390-ccw/start.S
> index ce519300a1..939aac3a7c 100644
> --- a/pc-bios/s390-ccw/start.S
> +++ b/pc-bios/s390-ccw/start.S
> @@ -34,7 +34,17 @@ remainder:
>   larl%r2,memsetxc
>   ex  %r3,0(%r2)
>  done:
> - j  main /* And call C */
> +/* prepare i/o call handler */
> +larl  %r1, io_new_code
> +larl  %r2, io_new_psw
> +stg   %r1, 8(%r2)
> +mvc   0x1f0(16),0(%r2)
> +/* prepare external call handler */
> +larl  %r1, external_new_code
> +larl  %r2, external_new_psw
> +stg   %r1, 8(%r2)

Can't you specify the external_new_code and io_new_code in the
external_new_psw / io_new_psw directly? Or is our relocation code not
good enough for this?

> +mvc   0x1b0(16),0(%r2)
> +j  main  /* And call C */
>  
>  memsetxc:
>   xc  0(1,%r1),0(%r1)
> @@ -64,13 +74,16 @@ consume_sclp_int:
>  oi  6(%r15),0x2
>  lctlg   %c0,%c0,0(%r15)
>  /* prepare external call handler */
> -larl %r1, external_new_code
> -stg %r1, 0x1b8
> -larl %r1, external_new_mask
> -mvc 0x1b0(8),0(%r1)
> -/* load enabled wait PSW */
> -larl %r1, enabled_wait_psw
> -lpswe 0(%r1)
> +larl  %r1, external_new_psw
> +lghi  %r2, 0x1b0
> +/* Is the BIOS' external new PSW already set? */
> +clc   0(16, %r1), 0(%r2)
> +jeload_ewait
> +/* No, save old PSW and write BIOS PSW */
> +larl  %r3, psw_save_ext
> +mvc   0(16, %r3), 0x1b0
> +mvc   0x1b0(16),0(%r1)
> +j load_ewait
>  
>  /*
>   * void consume_io_int(void)
> @@ -84,11 +97,20 @@ consume_io_int:
>  oi4(%r15), 0xff
>  lctlg %c6,%c6,0(%r15)
>  /* prepare i/o call handler */
> -larl  %r1, io_new_code
> -stg   %r1, 0x1f8
> -larl  %r1, io_new_mask
> -mvc   0x1f0(8),0(%r1)
> -/* load enabled wait PSW */
> +larl  %r1, io_new_psw
> +lghi  %r2, 0x1f0
> +/* Is the BIOS' PSW already set? */
> +larl  %r3, load_ewait
> +clc   0(16, %r1), 0(%r2)
> +bcr   8, %r3

Why not a "je load_ewait" again, like in the consume_sclp_int handler?

> +/* No, save old PSW and write BIOS PSW */
> +larl  %r3, psw_save_io
> +mvc   0(16, %r3), 0x1f0
> +mvc   0x1f0(16),0(%r1)
> +j load_ewait
> +
> +load_ewait:
> +/* PSW is the correct one, time to load the enabled wait PSW */
>  larl  %r1, enabled_wait_psw
>  lpswe 0(%r1)
>  
> @@ -107,11 +129,17 @@ io_new_code:
>  br%r14
>  
>  .align  8
> +.globl psw_save_io
> +.globl psw_save_ext
>  disabled_wait_psw:
>  .quad   0x000200018000,0x
>  enabled_wait_psw:
>  

Re: [PATCH-for-5.2 1/2] hw/mips/mipssim: Use MMIO serial device on fake ISA I/O

[Marc-André Lureau]

Hi

On Thu, Jul 30, 2020 at 9:04 PM Philippe Mathieu-Daudé 
wrote:

> The 'mipssim' is not a real hardware, it is a simulator.
>
> There is an ISA MMIO space mapped at 0x1fd0, however
> this is not a real ISA bus (no ISA IRQ). So can not use
> the TYPE_ISA_SERIAL device...
> Instead we have been using a plain MMIO device, but named
> it IO.
>
> TYPE_SERIAL_IO is a superset of TYPE_SERIAL_MM, using
> regshift=0 and endianness=DEVICE_LITTLE_ENDIAN.
>
> Directly use the TYPE_SERIAL_MM device, enforcing the
> regshift/endianness values. 'regshift' default is already
> '0'. 'endianness' is meaningless for 8-bit accesses.
>
> Note, there is no migration problem, because TYPE_SERIAL_IO
> was not migrated.
>

I am not so sure about that. It has:
/* No dc->vmsd: class has no migratable state */

but that doesn't mean it's not migratable I think.


> Suggested-by: Peter Maydell 
> Signed-off-by: Philippe Mathieu-Daudé 
> ---
>  hw/mips/mipssim.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c
> index 1b3b762203..853bbaca58 100644
> --- a/hw/mips/mipssim.c
> +++ b/hw/mips/mipssim.c
> @@ -216,9 +216,11 @@ mips_mipssim_init(MachineState *machine)
>   * MIPS CPU INT2, which is interrupt 4.
>   */
>  if (serial_hd(0)) {
> -DeviceState *dev = qdev_new(TYPE_SERIAL_IO);
> +DeviceState *dev = qdev_new(TYPE_SERIAL_MM);
>
>  qdev_prop_set_chr(dev, "chardev", serial_hd(0));
> +qdev_prop_set_uint8(dev, "regshift", 0);
> +qdev_prop_set_uint8(dev, "endianness", DEVICE_LITTLE_ENDIAN);
>  qdev_set_legacy_instance_id(dev, 0x3f8, 2);
>  sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), _fatal);
>  sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]);
> --
> 2.21.3
>
>
>

-- 
Marc-André Lureau

Re: [PATCH v6 02/16] icount: rename functions to be consistent with the module name

[Richard Henderson]

On 9/1/20 12:21 AM, Claudio Fontana wrote:
> Signed-off-by: Claudio Fontana 
> ---
>  accel/tcg/cpu-exec.c|  4 ++--
>  docs/replay.txt |  6 +++---
>  include/sysemu/cpu-timers.h | 16 +++---
>  include/sysemu/replay.h |  4 ++--
>  replay/replay.c |  2 +-
>  softmmu/cpu-timers.c|  4 ++--
>  softmmu/cpus.c  |  6 +++---
>  softmmu/icount.c| 42 ++---
>  softmmu/vl.c|  2 +-
>  stubs/icount.c  | 16 +++---
>  target/arm/helper.c |  4 ++--
>  target/riscv/csr.c  |  4 ++--
>  util/main-loop.c|  2 +-
>  util/qemu-timer.c   |  4 ++--
>  14 files changed, 58 insertions(+), 58 deletions(-)

Reviewed-by: Richard Henderson 

r~

QEMU | Pipeline #184436315 has failed for master | 071a6dba

[GitLab via]

Your pipeline has failed.

Project: QEMU ( https://gitlab.com/qemu-project/qemu )
Branch: master ( https://gitlab.com/qemu-project/qemu/-/commits/master )

Commit: 071a6dba ( 
https://gitlab.com/qemu-project/qemu/-/commit/071a6dba7d4db57e28f659b30829b1c22b945f4e
 )
Commit Message: Merge remote-tracking branch 'remotes/vivier2/t...
Commit Author: Peter Maydell ( https://gitlab.com/pm215 )

Pipeline #184436315 ( 
https://gitlab.com/qemu-project/qemu/-/pipelines/184436315 ) triggered by Alex 
Bennée ( https://gitlab.com/stsquad )
had 1 failed build.

Job #714160114 ( https://gitlab.com/qemu-project/qemu/-/jobs/714160114/raw )

Stage: test
Name: acceptance-system-centos
Trace: 16:58:20 ERROR|   File 
"/builds/qemu-project/qemu/python/qemu/machine.py", line 342, in launch
self._launch()

16:58:20 ERROR|   File "/builds/qemu-project/qemu/python/qemu/machine.py", line 
369, in _launch
self._post_launch()

16:58:20 ERROR|   File "/builds/qemu-project/qemu/python/qemu/machine.py", line 
288, in _post_launch
self._qmp.accept()

16:58:20 ERROR|   File "/builds/qemu-project/qemu/python/qemu/qmp.py", line 
236, in accept
return self.__negotiate_capabilities()

16:58:20 ERROR|   File "/builds/qemu-project/qemu/python/qemu/qmp.py", line 
129, in __negotiate_capabilities
resp = self.cmd('qmp_capabilities')

16:58:20 ERROR|   File "/builds/qemu-project/qemu/python/qemu/qmp.py", line 
266, in cmd
return self.cmd_obj(qmp_cmd)

16:58:20 ERROR|   File "/builds/qemu-project/qemu/python/qemu/qmp.py", line 
249, in cmd_obj
raise QMPConnectError("Unexpected empty reply from server")

16:58:20 ERROR| qemu.qmp.QMPConnectError: Unexpected empty reply from server

16:58:20 ERROR| ERROR 34-tests/acceptance/vnc.py:Vnc.test_change_password -> 
QMPConnectError: Unexpected empty reply from server
16:58:20 INFO | 
$ du -chs ${CI_PROJECT_DIR}/avocado-cache
1.2G/builds/qemu-project/qemu/avocado-cache
1.2Gtotal
section_end:1598979505:after_script
ERROR: Job failed: exit code 1



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You're receiving this email because of your account on gitlab.com.

Re: [PATCH-for-5.2 0/4] hw/char/serial: Use the Clock API to feed the UART reference clock

[Paolo Bonzini]

On 06/08/20 15:03, Philippe Mathieu-Daudé wrote:
> This series improve tracing of multiple UART device in the same
> chipset, and allow to use the Clock API to feed each device with
> an (updatable) input clock.
> 
> Based-on: <20200730165900.7030-1-phi...@redhat.com>
> "hw/char: Remove TYPE_SERIAL_IO"
> 
> Philippe Mathieu-Daudé (4):
>   hw/char/serial: Replace commented DPRINTF() by trace event
>   hw/char/serial: Remove old DEBUG_SERIAL commented code
>   hw/char/serial: Let SerialState have an 'id' field
>   hw/char/serial: Use the Clock API to feed the UART reference clock
> 
>  include/hw/char/serial.h |  4 +++
>  hw/char/serial.c | 55 +++-
>  hw/char/trace-events |  5 ++--
>  3 files changed, 39 insertions(+), 25 deletions(-)
> 

Acked-by: Paolo Bonzini 

Are you planning to deprecate the baudbase property, and instead setting
up the clock already in serial_mm_init?

Thanks,

Paolo

Re: [PATCH v3 3/5] pc-bios: s390x: Use reset PSW if avaliable

[Thomas Huth]

On 31/08/2020 17.09, Janosch Frank wrote:
> If a blob provides a reset PSW then we should use it instead of
> branching to the PSW address and using our own mask.
> 
> Signed-off-by: Janosch Frank 
> ---
>  pc-bios/s390-ccw/bootmap.c  |  3 ++-
>  pc-bios/s390-ccw/jump2ipl.c | 22 +-
>  pc-bios/s390-ccw/s390-ccw.h |  1 +
>  3 files changed, 20 insertions(+), 6 deletions(-)
> 
> diff --git a/pc-bios/s390-ccw/bootmap.c b/pc-bios/s390-ccw/bootmap.c
> index 8747c4ea26..5a03b1eb8b 100644
> --- a/pc-bios/s390-ccw/bootmap.c
> +++ b/pc-bios/s390-ccw/bootmap.c
> @@ -515,7 +515,8 @@ static void zipl_run(ScsiBlockPtr *pte)
>  IPL_assert(entry->component_type == ZIPL_COMP_ENTRY_EXEC, "No EXEC 
> entry");
>  
>  /* should not return */
> -jump_to_IPL_code(entry->compdat.load_psw & PSW_MASK_SHORT_ADDR);
> +write_reset_psw(entry->compdat.load_psw);
> +jump_to_IPL_code(0);
>  }
>  
>  static void ipl_scsi(void)
> diff --git a/pc-bios/s390-ccw/jump2ipl.c b/pc-bios/s390-ccw/jump2ipl.c
> index b6aad32def..5b8352d257 100644
> --- a/pc-bios/s390-ccw/jump2ipl.c
> +++ b/pc-bios/s390-ccw/jump2ipl.c
> @@ -12,15 +12,21 @@
>  
>  #define KERN_IMAGE_START 0x01UL
>  #define RESET_PSW_MASK (PSW_MASK_SHORTPSW | PSW_MASK_64)
> +#define RESET_PSW ((uint64_t)_to_IPL_addr | RESET_PSW_MASK)
>  
>  static uint64_t *reset_psw = 0, save_psw, ipl_continue;
>  
> +void write_reset_psw(uint64_t psw)
> +{
> +*reset_psw = psw;
> +}
> +
>  static void jump_to_IPL_addr(void)
>  {
>  __attribute__((noreturn)) void (*ipl)(void) = (void *)ipl_continue;
>  
>  /* Restore reset PSW */
> -*reset_psw = save_psw;
> +write_reset_psw(save_psw);
>  
>  ipl();
>  /* should not return */
> @@ -43,9 +49,10 @@ void jump_to_IPL_code(uint64_t address)
>   * content of non-BIOS memory after we loaded the guest, so we
>   * save the original content and restore it in jump_to_IPL_2.
>   */
> -save_psw = *reset_psw;
> -*reset_psw = (uint64_t) _to_IPL_addr;
> -*reset_psw |= RESET_PSW_MASK;
> +if (address) {
> +save_psw = *reset_psw;
> +write_reset_psw(RESET_PSW);
> +}
>  ipl_continue = address;
>  debug_print_int("set IPL addr to", ipl_continue);

In case you respin this series, I think I'd move the "ipl_continue =
address" into the if-statement, too, and change the debug_print_int line
to use address instead of ipl_continue.

> @@ -77,7 +84,12 @@ void jump_to_low_kernel(void)
>  
>  /* Trying to get PSW at zero address */
>  if (*((uint64_t *)0) & RESET_PSW_MASK) {
> -jump_to_IPL_code((*((uint64_t *)0)) & PSW_MASK_SHORT_ADDR);
> +/*
> + * Surely nobody will try running directly from lowcore, so
> + * let's use 0 as an indication that we want to load the reset
> + * psw at 0x0 and not jump to the entry.
> + */
> +jump_to_IPL_code(0);
>  }
>  
>  /* No other option left, so use the Linux kernel start address */
> diff --git a/pc-bios/s390-ccw/s390-ccw.h b/pc-bios/s390-ccw/s390-ccw.h
> index 36b884cced..7090720422 100644
> --- a/pc-bios/s390-ccw/s390-ccw.h
> +++ b/pc-bios/s390-ccw/s390-ccw.h
> @@ -78,6 +78,7 @@ int virtio_read(ulong sector, void *load_addr);
>  void zipl_load(void);
>  
>  /* jump2ipl.c */
> +void write_reset_psw(uint64_t psw);
>  void jump_to_IPL_code(uint64_t address);
>  void jump_to_low_kernel(void);

Looks sane to me:

Reviewed-by: Thomas Huth 

Re: [PATCH-for-5.2 0/4] hw/char/serial: Use the Clock API to feed the UART reference clock

[Marc-André Lureau]

Hi

On Wed, Aug 26, 2020 at 1:52 PM Philippe Mathieu-Daudé 
wrote:

> Hi Peter,
>
> Le lun. 24 août 2020 17:20, Peter Maydell  a
> écrit :
>
>> On Sat, 22 Aug 2020 at 21:00, Philippe Mathieu-Daudé 
>> wrote:
>> >
>> > On 8/6/20 3:03 PM, Philippe Mathieu-Daudé wrote:
>> > > This series improve tracing of multiple UART device in the same
>> > > chipset, and allow to use the Clock API to feed each device with
>> > > an (updatable) input clock.
>> > >
>> > > Based-on: <20200730165900.7030-1-phi...@redhat.com>
>> > > "hw/char: Remove TYPE_SERIAL_IO"
>> > >
>> > > Philippe Mathieu-Daudé (4):
>> > >   hw/char/serial: Replace commented DPRINTF() by trace event
>> > >   hw/char/serial: Remove old DEBUG_SERIAL commented code
>> > >   hw/char/serial: Let SerialState have an 'id' field
>> > >   hw/char/serial: Use the Clock API to feed the UART reference clock
>> > >
>> > >  include/hw/char/serial.h |  4 +++
>> > >  hw/char/serial.c | 55
>> +++-
>> > >  hw/char/trace-events |  5 ++--
>> > >  3 files changed, 39 insertions(+), 25 deletions(-)
>> > >
>> >
>> > ping? Should I resend with the typo from patch 4 fixed?
>>
>> Which tree are you expecting the patches to go in via ?
>>
>
> I cc'ed you because having reviewed the Clock API series you are familiar
> with it.
> However I expect this series to be merged by the chardev maintainers.
> In particular to verify the default values (when no input clock provided).
>

Sorry, I am not of much help here. (other than it looks reasonable to me)


-- 
Marc-André Lureau

Re: [PATCH v3 7/7] migration: introduce snapshot-{save, load, delete} QMP commands

[Daniel P . Berrangé]

On Tue, Sep 01, 2020 at 04:20:47PM +0200, Markus Armbruster wrote:
> Daniel P. Berrangé  writes:
> 
> > savevm, loadvm and delvm are some of the few HMP commands that have never
> > been converted to use QMP. The primary reason for this lack of conversion
> > is that they block execution of the thread for as long as they run.
> 
> Nope.  The primary reason is that the HMP interface is bonkers.

I don't think that's very helpful description. The HMP interface has
some limitations, but it isn't bonkers - it just doesn't cope with
all the use cases we want. Many people use it succesfully without
issue

> > Despite this downside, however, libvirt and applications using libvirt
> > have used these commands for as long as QMP has existed, via the
> > "human-monitor-command" passthrough command. IOW, while it is clearly
> > desirable to be able to fix the blocking problem, this is not an
> > immediate obstacle to real world usage.
> >
> > Meanwhile there is a need for other features which involve adding new
> > parameters to the commands. This is possible with HMP passthrough, but
> > it provides no reliable way for apps to introspect features, so using
> > QAPI modelling is highly desirable.
> >
> > This patch thus introduces new snapshot-{load,save,delete} commands to
> > QMP that are intended to replace the old HMP counterparts. The new
> > commands are given different names, because they will be using the new
> > QEMU job framework and thus will have diverging behaviour from the HMP
> > originals. It would thus be misleading to keep the same name.
> >
> > While this design uses the generic job framework, the current impl is
> > still blocking. The intention that the blocking problem is fixed later.
> > None the less applications using these new commands should assume that
> > they are asynchronous and thus wait for the job status change event to
> > indicate completion.
> >
> > Signed-off-by: Daniel P. Berrangé 
> [...]
> > diff --git a/qapi/job.json b/qapi/job.json
> > index 280c2f76f1..51bee470f0 100644
> > --- a/qapi/job.json
> > +++ b/qapi/job.json
> > @@ -22,10 +22,17 @@
> >  #
> >  # @amend: image options amend job type, see "x-blockdev-amend" (since 5.1)
> >  #
> > +# @snapshot-load: snapshot load job type, see "loadvm" (since 5.2)
> 
> Do you mean 'see command @snapshot-load?

Yes, I guess so.

> 
> > +#
> > +# @snapshot-save: snapshot save job type, see "savevm" (since 5.2)
> 
> @snapshot-save?
> 
> > +#
> > +# @snapshot-delete: snapshot delete job type, see "delvm" (since 5.2)
> 
> @snapshot-delete?
> 
> > +#
> >  # Since: 1.7
> >  ##
> >  { 'enum': 'JobType',
> > -  'data': ['commit', 'stream', 'mirror', 'backup', 'create', 'amend'] }
> > +  'data': ['commit', 'stream', 'mirror', 'backup', 'create', 'amend',
> > +   'snapshot-load', 'snapshot-save', 'snapshot-delete'] }
> >  
> >  ##
> >  # @JobStatus:
> > diff --git a/qapi/migration.json b/qapi/migration.json
> > index 5f6b06172c..d70f627b77 100644
> > --- a/qapi/migration.json
> > +++ b/qapi/migration.json
> > @@ -1720,3 +1720,138 @@
> >  ##
> >  { 'event': 'UNPLUG_PRIMARY',
> >'data': { 'device-id': 'str' } }
> > +
> > +##
> > +# @snapshot-save:
> > +#
> > +# Save a VM snapshot
> > +#
> > +# @job-id: identifier for the newly created job
> > +# @tag: name of the snapshot to create. If it already
> > +# exists it will be replaced.
> 
> Sounds a bit dangerous.  Require a force flag for such an overwrite?
> Not sure.

Yes, replacing is quite likely to be a mistake.

"@force" could mean many things, so "replace-existing: bool" is
probably a clearer name.

> 
> > +# @devices: list of block device node names to save a snapshot to
> > +# @vmstate: block device node name to save vmstate to
> 
> Worth mentioning that omitting writable block devices is probably a bad
> idea?

Sure

> > +#
> > +# Applications should not assume that the snapshot save is complete
> > +# when this command returns.
> 
> Is it complete then with the current code?  I'm asking because such
> properties have a way to sneakily become de facto ABI.  We may not be
> able to do anything about that now, other than documenting "don't do
> that" like you did, but I'd like to understand the state of affairs all
> the same.

Yes, the actual snapshot is synchronous with return of the command.

> 
> > +#Completion is indicated by the job
> > +# status. Clients can wait for the JOB_STATUS_CHANGE event. If the
> > +# job aborts, errors can be obtained via the 'query-jobs' command,
> > +# though.
> 
> Sure we want to these job basics here?

This ties in with the previous point. If feel if we don't document
the use of events here, then people are likely to blindly assume
synchronous completion. By explicitly telling them to wait for the
JOB_STATUS_CHANGE they are nudged towards a correct solution that
won't break if it becomes async later.

> 
> > +# Note that at this time most vmstate procssing errors only
> 
> Typo: processing
> 
> Whatever a 

Re: [PATCH 0/2] hw/core: Move hw_error() out of cpus.c

[Richard Henderson]

On 9/1/20 4:23 AM, Philippe Mathieu-Daudé wrote:
> Move hw_error() out of cpus.c because we already have cpu_abort()
> there.
> 
> Philippe Mathieu-Daudé (2):
>   cpus: Do not dump CPU state when calling hw_error()
>   hw/core: Move hw_error() out of cpus.c

Reviewed-by: Richard Henderson 

r~

Re: [PATCH v4 4/7] usb: hcd-xhci-sysbus: Attach xhci to sysbus device

[Philippe Mathieu-Daudé]

On 8/28/20 9:19 PM, Sai Pavan Boddu wrote:
> Use XHCI as sysbus device, add memory region property to get the
> address space instance for dma read/write.
> 
> Signed-off-by: Sai Pavan Boddu 
> ---
>  hw/usb/Kconfig   |  5 +++
>  hw/usb/Makefile.objs |  1 +
>  hw/usb/hcd-xhci-sysbus.c | 99 
> 
>  hw/usb/hcd-xhci-sysbus.h | 32 

Please consider using scripts/git.orderfile to ease review
(less scrolling required by reviewer).

>  hw/usb/hcd-xhci.h|  1 +
>  5 files changed, 138 insertions(+)
...

> diff --git a/hw/usb/hcd-xhci-sysbus.c b/hw/usb/hcd-xhci-sysbus.c
> new file mode 100644
> index 000..d5b4656
> --- /dev/null
> +++ b/hw/usb/hcd-xhci-sysbus.c
> @@ -0,0 +1,99 @@
> +/*
> + * USB xHCI controller for system-bus interface
> + * Based on hcd-echi-sysbus.c
> +
> + * SPDX-FileCopyrightText: 2020 Xilinx
> + * SPDX-FileContributor: Author: Sai Pavan Boddu 
> + *
> + * SPDX-License-Identifier: GPL-2.0-or-later
> + */
> +#include "qemu/osdep.h"
> +#include "hw/qdev-properties.h"
> +#include "migration/vmstate.h"
> +#include "trace.h"
> +#include "qapi/error.h"
> +#include "hcd-xhci-sysbus.h"
> +#include "hw/irq.h"
> +
> +static void xhci_sysbus_intr_raise(XHCIState *xhci, int n, bool level)
> +{
> +XHCISysbusState *s = container_of(xhci, XHCISysbusState, xhci);
> +
> +qemu_set_irq(s->irq[n], level);
> +}
> +
> +void xhci_sysbus_reset(DeviceState *dev)
> +{
> +XHCISysbusState *s = XHCI_SYSBUS(dev);
> +
> +device_legacy_reset(DEVICE(>xhci));

Documentation comment:

"This function is deprecated and will be removed when it becomes unused.
 Please use device_cold_reset() now."

> +}
> +

Re: [PATCH v2 0/7] Run cross-compilation build tests in the gitlab-CI

[Thomas Huth]

On 01/09/2020 18.29, Daniel P. Berrangé wrote:
> On Sun, Aug 23, 2020 at 01:17:50PM +0200, Thomas Huth wrote:
>> Now that we can use all our QEMU build containers in the gitlab-CI,
>> we can also run the cross-compilation jobs there. Of course, some
>> problems have to be fixed first, so this is taken care of in the first
>> four patches.
>>
>> The following two patches make sure that we can also enable WHPX builds with
>> our debian-win64-cross container, so that we can compile-test this 
>> accelerator
>> code now, too.
>>
>> The last patch then finally enables the cross-compilation jobs in the CI.
>>
>> v2:
>>  - Dropped patches that are not necessary anymore
>>  - Added the first two patches to fix problems with the new meson build
>>system
>>
>> Thomas Huth (7):
>>   configure: Add system = 'linux' for meson when cross-compiling
>>   tests/docker: Install python3-setuptools in the debian9-mxe containers
>>   tests/Makefile: test-image-locking needs CONFIG_POSIX
>>   tests/Makefile: test-replication needs CONFIG_POSIX
>>   dockerfiles/debian-win64-cross: Download WHPX MinGW headers
>>   configure: Allow automatic WHPX detection
>>   gitlab-ci: Add cross-compiling build tests
>>
>>  .gitlab-ci.d/crossbuilds.yml  | 113 ++
>>  .gitlab-ci.yml|   1 +
>>  MAINTAINERS   |   1 +
>>  configure |   4 +
>>  tests/Makefile.include|   6 +-
>>  .../dockerfiles/debian-win64-cross.docker |   9 +-
>>  tests/docker/dockerfiles/debian9-mxe.docker   |   2 +-
>>  7 files changed, 133 insertions(+), 3 deletions(-)
>>  create mode 100644 .gitlab-ci.d/crossbuilds.yml
> 
> You seem to have not sent the mail for 
> 
>   [PATCH 8/7] delete obsolete shippable config
> 
> ;-P

Yeah, I wanted to chat with Alex about that first once the gitlab stuff
has been mreged...

 Thomas

Re: [PATCH v4 2/7] usb/hcd-xhci: Move qemu-xhci device to hcd-xhci-pci.c

[Philippe Mathieu-Daudé]

On 8/28/20 9:19 PM, Sai Pavan Boddu wrote:
> Move pci specific devices to new file. This set the environment to move all
> pci specific hooks in hcd-xhci.c to hcd-xhci-pci.c.
> 
> Signed-off-by: Sai Pavan Boddu 
> ---
>  hw/usb/Kconfig|  6 +
>  hw/usb/Makefile.objs  |  1 +
>  hw/usb/hcd-xhci-pci.c | 66 
> +++
>  hw/usb/hcd-xhci.c | 41 ++--
>  hw/usb/hcd-xhci.h |  3 +++
>  5 files changed, 78 insertions(+), 39 deletions(-)
>  create mode 100644 hw/usb/hcd-xhci-pci.c
> 
> diff --git a/hw/usb/Kconfig b/hw/usb/Kconfig
> index d4d8c37..d9965c1 100644
> --- a/hw/usb/Kconfig
> +++ b/hw/usb/Kconfig
> @@ -36,6 +36,12 @@ config USB_XHCI
>  depends on PCI
>  select USB
>  
> +config USB_XHCI_PCI
> +bool
> +default y if PCI_DEVICES
> +depends on PCI
> +select USB_XHCI
> +
>  config USB_XHCI_NEC
>  bool
>  default y if PCI_DEVICES
> diff --git a/hw/usb/Makefile.objs b/hw/usb/Makefile.objs
> index e342ff5..029b040 100644
> --- a/hw/usb/Makefile.objs
> +++ b/hw/usb/Makefile.objs
> @@ -11,6 +11,7 @@ common-obj-$(CONFIG_USB_EHCI_PCI) += hcd-ehci-pci.o
>  common-obj-$(CONFIG_USB_EHCI_SYSBUS) += hcd-ehci-sysbus.o
>  common-obj-$(CONFIG_USB_XHCI) += hcd-xhci.o
>  common-obj-$(CONFIG_USB_XHCI_NEC) += hcd-xhci-nec.o
> +common-obj-$(CONFIG_USB_XHCI_PCI) += hcd-xhci-pci.o
>  common-obj-$(CONFIG_USB_MUSB) += hcd-musb.o
>  common-obj-$(CONFIG_USB_DWC2) += hcd-dwc2.o
>  
> diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c
> new file mode 100644
> index 000..1562757
> --- /dev/null
> +++ b/hw/usb/hcd-xhci-pci.c
> @@ -0,0 +1,66 @@
> +/*
> + * USB xHCI controller with PCI bus emulation
> + *
> + * SPDX-FileCopyrightText: 2011 Securiforest
> + * SPDX-FileContributor: Hector Martin 
> + * SPDX-sourceInfo: Based on usb-ohci.c, emulates Renesas NEC USB 3.0
> + * SPDX-FileCopyrightText: 2020 Xilinx
> + * SPDX-FileContributor: Sai Pavan Boddu 
> + * SPDX-sourceInfo: Moved the pci specific content for hcd-xhci.c to
> + *  hcd-xhci-pci.c
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library; if not, see 
> .
> + */
> +#include "qemu/osdep.h"
> +#include "hw/pci/pci.h"
> +#include "hw/qdev-properties.h"
> +#include "hw/pci/msi.h"
> +#include "hw/pci/msix.h"
> +#include "hcd-xhci.h"
> +#include "trace.h"
> +#include "qapi/error.h"
> +
> +static void qemu_xhci_class_init(ObjectClass *klass, void *data)
> +{
> +PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
> +
> +k->vendor_id= PCI_VENDOR_ID_REDHAT;
> +k->device_id= PCI_DEVICE_ID_REDHAT_XHCI;
> +k->revision = 0x01;
> +}
> +
> +static void qemu_xhci_instance_init(Object *obj)
> +{
> +XHCIState *xhci = XHCI(obj);
> +
> +xhci->msi  = ON_OFF_AUTO_OFF;
> +xhci->msix = ON_OFF_AUTO_AUTO;
> +xhci->numintrs = MAXINTRS;
> +xhci->numslots = MAXSLOTS;
> +xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST);
> +}
> +
> +static const TypeInfo qemu_xhci_info = {
> +.name  = TYPE_QEMU_XHCI,
> +.parent= TYPE_XHCI,
> +.class_init= qemu_xhci_class_init,
> +.instance_init = qemu_xhci_instance_init,
> +};
> +
> +static void xhci_register_types(void)
> +{
> +type_register_static(_xhci_info);
> +}
> +
> +type_init(xhci_register_types)
> diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
> index 2590f7a..b15c53b 100644
> --- a/hw/usb/hcd-xhci.c
> +++ b/hw/usb/hcd-xhci.c
> @@ -23,7 +23,6 @@
>  #include "qemu/timer.h"
>  #include "qemu/module.h"
>  #include "qemu/queue.h"
> -#include "hw/usb.h"
>  #include "migration/vmstate.h"
>  #include "hw/pci/pci.h"
>  #include "hw/qdev-properties.h"
> @@ -429,12 +428,12 @@ static const char *ep_state_name(uint32_t state)
> ARRAY_SIZE(ep_state_names));
>  }
>  
> -static bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit)
> +bool xhci_get_flag(XHCIState *xhci, enum xhci_flags bit)
>  {
>  return xhci->flags & (1 << bit);
>  }
>  
> -static void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit)
> +void xhci_set_flag(XHCIState *xhci, enum xhci_flags bit)
>  {
>  xhci->flags |= (1 << bit);
>  }
> @@ -3692,13 +3691,6 @@ static Property xhci_properties[] = {
>  DEFINE_PROP_END_OF_LIST(),
>  };
>  
> -static void xhci_instance_init(Object *obj)
> -{
> -/* QEMU_PCI_CAP_EXPRESS 

Re: [PATCH v2 7/7] gitlab-ci: Add cross-compiling build tests

[Thomas Huth]

On 01/09/2020 18.27, Daniel P. Berrangé wrote:
> On Sun, Aug 23, 2020 at 01:17:57PM +0200, Thomas Huth wrote:
>> Now that we can use all our QEMU test containers in the gitlab-CI, we can
>> easily add some jobs that test cross-compilation for various architectures.
>> There is just only small ugliness: Since the shared runners on gitlab.com
>> are single-threaded, we have to split each compilation job into two parts
>> (--disable-user and --disable-system), and exclude some additional targets,
>> to avoid that the jobs are running too long and hitting the timeout of 1 h.
>>
>> Signed-off-by: Thomas Huth 
>> ---
>>  .gitlab-ci.d/crossbuilds.yml | 113 +++
>>  .gitlab-ci.yml   |   1 +
>>  MAINTAINERS  |   1 +
>>  3 files changed, 115 insertions(+)
>>  create mode 100644 .gitlab-ci.d/crossbuilds.yml
> 
> Reviewed-by: Daniel P. Berrangé 
> 
>>
>> diff --git a/.gitlab-ci.d/crossbuilds.yml b/.gitlab-ci.d/crossbuilds.yml
>> new file mode 100644
>> index 00..4ec7226b5c
>> --- /dev/null
>> +++ b/.gitlab-ci.d/crossbuilds.yml
>> @@ -0,0 +1,113 @@
>> +
>> +.cross_system_build_job_template: _system_build_job_definition
>> +  stage: build
>> +  image: $CI_REGISTRY_IMAGE/qemu/$IMAGE:latest
>> +  script:
>> +- mkdir build
>> +- cd build
>> +- PKG_CONFIG_PATH=$PKG_CONFIG_PATH
>> +  ../configure --enable-werror $QEMU_CONFIGURE_OPTS --disable-user
>> +--target-list-exclude="aarch64-softmmu i386-softmmu 
>> microblaze-softmmu
>> +  mips-softmmu mipsel-softmmu mips64-softmmu ppc64-softmmu 
>> sh4-softmmu
>> +  xtensa-softmmu"
> 
> What does this leave enabled ?  Would it be shorter to just say
> --target-list="...explicit targets we want..." ?  It would be clearer
> to review at least.

I basically excluded all targets that have a second compile test
coverage, e.g. i386-softmmu code is mostly also covered by
x86_64-softmmu, sh4-softmmu is covered by sh4eb-softmmu etc.

The --target-list-exclude also comes in handy when new targets are added
to QEMU - you then don't have to remember to add the new targets here,
they are picked up automatically.

>> +- make -j$(expr $(nproc) + 1) all check-build
> 
> None the less, it is functionally fine so
> 
> Reviewed-by: Daniel P. Berrangé 

Thanks!

 Thomas

Re: [PATCH v4 1/7] usb/hcd-xhci: Make dma read/writes hooks pci free

[Philippe Mathieu-Daudé]

On 8/28/20 9:19 PM, Sai Pavan Boddu wrote:
> This patch starts making the hcd-xhci.c pci free, as part of this
> restructuring dma read/writes are handled without passing pci object.
> 
> Signed-off-by: Sai Pavan Boddu 
> ---
>  hw/usb/hcd-xhci.c | 24 +++-
>  hw/usb/hcd-xhci.h |  3 +++
>  2 files changed, 14 insertions(+), 13 deletions(-)
> 
> diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
> index 67a18fe..2590f7a 100644
> --- a/hw/usb/hcd-xhci.c
> +++ b/hw/usb/hcd-xhci.c
> @@ -495,7 +495,7 @@ static inline void xhci_dma_read_u32s(XHCIState *xhci, 
> dma_addr_t addr,
>  
>  assert((len % sizeof(uint32_t)) == 0);
>  
> -pci_dma_read(PCI_DEVICE(xhci), addr, buf, len);
> +dma_memory_read(xhci->as, addr, buf, len);
>  
>  for (i = 0; i < (len / sizeof(uint32_t)); i++) {
>  buf[i] = le32_to_cpu(buf[i]);
> @@ -515,7 +515,7 @@ static inline void xhci_dma_write_u32s(XHCIState *xhci, 
> dma_addr_t addr,
>  for (i = 0; i < n; i++) {
>  tmp[i] = cpu_to_le32(buf[i]);
>  }
> -pci_dma_write(PCI_DEVICE(xhci), addr, tmp, len);
> +dma_memory_write(xhci->as, addr, tmp, len);
>  }
>  
>  static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport)
> @@ -644,7 +644,6 @@ static void xhci_die(XHCIState *xhci)
>  
>  static void xhci_write_event(XHCIState *xhci, XHCIEvent *event, int v)
>  {
> -PCIDevice *pci_dev = PCI_DEVICE(xhci);
>  XHCIInterrupter *intr = >intr[v];
>  XHCITRB ev_trb;
>  dma_addr_t addr;
> @@ -663,7 +662,7 @@ static void xhci_write_event(XHCIState *xhci, XHCIEvent 
> *event, int v)
> ev_trb.status, ev_trb.control);
>  
>  addr = intr->er_start + TRB_SIZE*intr->er_ep_idx;
> -pci_dma_write(pci_dev, addr, _trb, TRB_SIZE);
> +dma_memory_write(xhci->as, addr, _trb, TRB_SIZE);
>  
>  intr->er_ep_idx++;
>  if (intr->er_ep_idx >= intr->er_size) {
> @@ -720,12 +719,11 @@ static void xhci_ring_init(XHCIState *xhci, XHCIRing 
> *ring,
>  static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing *ring, XHCITRB *trb,
> dma_addr_t *addr)
>  {
> -PCIDevice *pci_dev = PCI_DEVICE(xhci);
>  uint32_t link_cnt = 0;
>  
>  while (1) {
>  TRBType type;
> -pci_dma_read(pci_dev, ring->dequeue, trb, TRB_SIZE);
> +dma_memory_read(xhci->as, ring->dequeue, trb, TRB_SIZE);
>  trb->addr = ring->dequeue;
>  trb->ccs = ring->ccs;
>  le64_to_cpus(>parameter);
> @@ -762,7 +760,6 @@ static TRBType xhci_ring_fetch(XHCIState *xhci, XHCIRing 
> *ring, XHCITRB *trb,
>  
>  static int xhci_ring_chain_length(XHCIState *xhci, const XHCIRing *ring)
>  {
> -PCIDevice *pci_dev = PCI_DEVICE(xhci);
>  XHCITRB trb;
>  int length = 0;
>  dma_addr_t dequeue = ring->dequeue;
> @@ -773,7 +770,7 @@ static int xhci_ring_chain_length(XHCIState *xhci, const 
> XHCIRing *ring)
>  
>  while (1) {
>  TRBType type;
> -pci_dma_read(pci_dev, dequeue, , TRB_SIZE);
> +dma_memory_read(xhci->as, dequeue, , TRB_SIZE);
>  le64_to_cpus();
>  le32_to_cpus();
>  le32_to_cpus();
> @@ -828,7 +825,7 @@ static void xhci_er_reset(XHCIState *xhci, int v)
>  xhci_die(xhci);
>  return;
>  }
> -pci_dma_read(PCI_DEVICE(xhci), erstba, , sizeof(seg));
> +dma_memory_read(xhci->as, erstba, , sizeof(seg));
>  le32_to_cpus(_low);
>  le32_to_cpus(_high);
>  le32_to_cpus();
> @@ -1440,7 +1437,7 @@ static int xhci_xfer_create_sgl(XHCITransfer *xfer, int 
> in_xfer)
>  int i;
>  
>  xfer->int_req = false;
> -pci_dma_sglist_init(>sgl, PCI_DEVICE(xhci), xfer->trb_count);
> +qemu_sglist_init(>sgl, DEVICE(xhci), xfer->trb_count, xhci->as);
>  for (i = 0; i < xfer->trb_count; i++) {
>  XHCITRB *trb = >trbs[i];
>  dma_addr_t addr;
> @@ -2101,7 +2098,7 @@ static TRBCCode xhci_address_slot(XHCIState *xhci, 
> unsigned int slotid,
>  assert(slotid >= 1 && slotid <= xhci->numslots);
>  
>  dcbaap = xhci_addr64(xhci->dcbaap_low, xhci->dcbaap_high);
> -poctx = ldq_le_pci_dma(PCI_DEVICE(xhci), dcbaap + 8 * slotid);
> +poctx = ldq_le_dma(xhci->as, dcbaap + 8 * slotid);
>  ictx = xhci_mask64(pictx);
>  octx = xhci_mask64(poctx);
>  
> @@ -2439,7 +2436,7 @@ static TRBCCode xhci_get_port_bandwidth(XHCIState 
> *xhci, uint64_t pctx)
>  /* TODO: actually implement real values here */
>  bw_ctx[0] = 0;
>  memset(_ctx[1], 80, xhci->numports); /* 80% */
> -pci_dma_write(PCI_DEVICE(xhci), ctx, bw_ctx, sizeof(bw_ctx));
> +dma_memory_write(xhci->as, ctx, bw_ctx, sizeof(bw_ctx));
>  
>  return CC_SUCCESS;
>  }
> @@ -3431,6 +3428,7 @@ static void usb_xhci_realize(struct PCIDevice *dev, 
> Error **errp)
>  }
>  
>  usb_xhci_init(xhci);
> +xhci->as = pci_get_address_space(dev);
>  xhci->mfwrap_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, xhci_mfwrap_timer, 
> xhci);
>  
>  

Re: [PATCH v2 5/7] dockerfiles/debian-win64-cross: Download WHPX MinGW headers

[Thomas Huth]

On 01/09/2020 18.25, Daniel P. Berrangé wrote:
> On Sun, Aug 23, 2020 at 01:17:55PM +0200, Thomas Huth wrote:
>> To compile-test the WHPX accelerator, we need to download these system
>> headers first (they are unfortunately not part of any released and
>> packaged MinGW toolchain yet).
>>
>> Idea taken from another patch by Stefan Weil.
>>
>> Message-Id: <20200804170055.2851-12-th...@redhat.com>
>> Signed-off-by: Thomas Huth 
>> ---
>>  tests/docker/dockerfiles/debian-win64-cross.docker | 9 -
>>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> 
>>
>> diff --git a/tests/docker/dockerfiles/debian-win64-cross.docker 
>> b/tests/docker/dockerfiles/debian-win64-cross.docker
>> index 2fc9cfcbc6..4cc4a3f365 100644
>> --- a/tests/docker/dockerfiles/debian-win64-cross.docker
>> +++ b/tests/docker/dockerfiles/debian-win64-cross.docker
>> @@ -32,7 +32,14 @@ RUN apt-get update && \
>>  mxe-$TARGET-w64-mingw32.shared-sdl2 \
>>  mxe-$TARGET-w64-mingw32.shared-sdl2-mixer \
>>  mxe-$TARGET-w64-mingw32.shared-sdl2-gfx \
>> -mxe-$TARGET-w64-mingw32.shared-zlib
>> +mxe-$TARGET-w64-mingw32.shared-zlib \
>> +curl && \
>> +curl -s -S -o 
>> /usr/lib/mxe/usr/x86_64-w64-mingw32.shared/include/WinHvEmulation.h \
>> +
>> "https://sourceforge.net/p/mingw-w64/mingw-w64/ci/master/tree/mingw-w64-headers/include/winhvemulation.h?format=raw;
>>  && \
>> +curl -s -S -o 
>> /usr/lib/mxe/usr/x86_64-w64-mingw32.shared/include/WinHvPlatform.h \
>> +
>> "https://sourceforge.net/p/mingw-w64/mingw-w64/ci/master/tree/mingw-w64-headers/include/winhvplatform.h?format=raw;
>>  && \
>> +curl -s -S -o 
>> /usr/lib/mxe/usr/x86_64-w64-mingw32.shared/include/winhvplatformdefs.h \
>> +
>> "https://sourceforge.net/p/mingw-w64/mingw-w64/ci/master/tree/mingw-w64-headers/include/winhvplatformdefs.h?format=raw;
> 
> My only concern here is whether sourceforge.net  URLs are reliable enough
> for CI, or whether we should instead be mirroring the w64 repo on
> git.qemu.org ?
> 
> I guess this will be a short term issue until a new mingw release is made
> and arrives i nthe distros, so we can try with the curl approach for
> now and change if it causes problems

That's my assumption, too. And since the containers are only rebuild
when something changed (as far as I understood), the download should
only occur quite rarely, so there is hopefully really not a big
dependency here.

> Reviewed-by: Daniel P. Berrangé 

Thanks!

 Thomas

[Bug 1893807] [NEW] Crash when launching windows qemu version from WSL2

[Jesús Sanz del Rey]

Public bug reported:

Version: 5.1.0
Command line from WSL2:
qemu-system-x86_64.exe -hdd /home/jesus/proyectos/RWivOS/bin/RELEASE/image.hdd 
-m 4G -smp 4 -machine q35 -debugcon stdio

OS: Windows 10(64 bits) from WSL2 Ubuntu 18.04

The error:
ERROR:/home/stefan/src/qemu/repo.or.cz/qemu/ar7/block.c:1325:bdrv_open_driver: 
assertion
 failed: (is_power_of_2(bs->bl.request_alignment))

The problem i'm seeing when i lauch from wsl2 only occurs when launched
with argument -hdd from WSL2, if i launch it from Windows pointing to
the WSL path where the file is stored works.

It occurs on other versions, i tried 4.1.0 too.

** Affects: qemu
 Importance: Undecided
 Status: New

** Description changed:

  Version: 5.1.0
- Command line from WSL2: 
+ Command line from WSL2:
  qemu-system-x86_64.exe -hdd 
/home/jesus/proyectos/RWivOS/bin/RELEASE/image.hdd -m 4G -smp 4 -machine q35 
-debugcon stdio
  
  OS: Windows 10(64 bits) from WSL2 Ubuntu 18.04
  
- The error: 
+ The error:
  
ERROR:/home/stefan/src/qemu/repo.or.cz/qemu/ar7/block.c:1325:bdrv_open_driver: 
assertion
-  failed: (is_power_of_2(bs->bl.request_alignment))
+  failed: (is_power_of_2(bs->bl.request_alignment))
  
  The problem i'm seeing when i lauch from wsl2 only occurs when launched
  with argument -hdd from WSL2, if i launch it from Windows pointing to
  the WSL path where the file is stored works.
+ 
+ It occurs on other versions, i tried 4.1.0 too.

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1893807

Title:
  Crash when launching windows qemu version from WSL2

Status in QEMU:
  New

Bug description:
  Version: 5.1.0
  Command line from WSL2:
  qemu-system-x86_64.exe -hdd 
/home/jesus/proyectos/RWivOS/bin/RELEASE/image.hdd -m 4G -smp 4 -machine q35 
-debugcon stdio

  OS: Windows 10(64 bits) from WSL2 Ubuntu 18.04

  The error:
  
ERROR:/home/stefan/src/qemu/repo.or.cz/qemu/ar7/block.c:1325:bdrv_open_driver: 
assertion
   failed: (is_power_of_2(bs->bl.request_alignment))

  The problem i'm seeing when i lauch from wsl2 only occurs when
  launched with argument -hdd from WSL2, if i launch it from Windows
  pointing to the WSL path where the file is stored works.

  It occurs on other versions, i tried 4.1.0 too.

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1893807/+subscriptions

Re: [PATCH v2 0/7] Run cross-compilation build tests in the gitlab-CI

[Daniel P . Berrangé]

On Sun, Aug 23, 2020 at 01:17:50PM +0200, Thomas Huth wrote:
> Now that we can use all our QEMU build containers in the gitlab-CI,
> we can also run the cross-compilation jobs there. Of course, some
> problems have to be fixed first, so this is taken care of in the first
> four patches.
> 
> The following two patches make sure that we can also enable WHPX builds with
> our debian-win64-cross container, so that we can compile-test this accelerator
> code now, too.
> 
> The last patch then finally enables the cross-compilation jobs in the CI.
> 
> v2:
>  - Dropped patches that are not necessary anymore
>  - Added the first two patches to fix problems with the new meson build
>system
> 
> Thomas Huth (7):
>   configure: Add system = 'linux' for meson when cross-compiling
>   tests/docker: Install python3-setuptools in the debian9-mxe containers
>   tests/Makefile: test-image-locking needs CONFIG_POSIX
>   tests/Makefile: test-replication needs CONFIG_POSIX
>   dockerfiles/debian-win64-cross: Download WHPX MinGW headers
>   configure: Allow automatic WHPX detection
>   gitlab-ci: Add cross-compiling build tests
> 
>  .gitlab-ci.d/crossbuilds.yml  | 113 ++
>  .gitlab-ci.yml|   1 +
>  MAINTAINERS   |   1 +
>  configure |   4 +
>  tests/Makefile.include|   6 +-
>  .../dockerfiles/debian-win64-cross.docker |   9 +-
>  tests/docker/dockerfiles/debian9-mxe.docker   |   2 +-
>  7 files changed, 133 insertions(+), 3 deletions(-)
>  create mode 100644 .gitlab-ci.d/crossbuilds.yml

You seem to have not sent the mail for 

  [PATCH 8/7] delete obsolete shippable config

;-P


Regards,
Daniel
-- 
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Re: [PATCH v2 7/7] gitlab-ci: Add cross-compiling build tests

[Daniel P . Berrangé]

On Sun, Aug 23, 2020 at 01:17:57PM +0200, Thomas Huth wrote:
> Now that we can use all our QEMU test containers in the gitlab-CI, we can
> easily add some jobs that test cross-compilation for various architectures.
> There is just only small ugliness: Since the shared runners on gitlab.com
> are single-threaded, we have to split each compilation job into two parts
> (--disable-user and --disable-system), and exclude some additional targets,
> to avoid that the jobs are running too long and hitting the timeout of 1 h.
> 
> Signed-off-by: Thomas Huth 
> ---
>  .gitlab-ci.d/crossbuilds.yml | 113 +++
>  .gitlab-ci.yml   |   1 +
>  MAINTAINERS  |   1 +
>  3 files changed, 115 insertions(+)
>  create mode 100644 .gitlab-ci.d/crossbuilds.yml

Reviewed-by: Daniel P. Berrangé 

> 
> diff --git a/.gitlab-ci.d/crossbuilds.yml b/.gitlab-ci.d/crossbuilds.yml
> new file mode 100644
> index 00..4ec7226b5c
> --- /dev/null
> +++ b/.gitlab-ci.d/crossbuilds.yml
> @@ -0,0 +1,113 @@
> +
> +.cross_system_build_job_template: _system_build_job_definition
> +  stage: build
> +  image: $CI_REGISTRY_IMAGE/qemu/$IMAGE:latest
> +  script:
> +- mkdir build
> +- cd build
> +- PKG_CONFIG_PATH=$PKG_CONFIG_PATH
> +  ../configure --enable-werror $QEMU_CONFIGURE_OPTS --disable-user
> +--target-list-exclude="aarch64-softmmu i386-softmmu 
> microblaze-softmmu
> +  mips-softmmu mipsel-softmmu mips64-softmmu ppc64-softmmu 
> sh4-softmmu
> +  xtensa-softmmu"

What does this leave enabled ?  Would it be shorter to just say
--target-list="...explicit targets we want..." ?  It would be clearer
to review at least.

> +- make -j$(expr $(nproc) + 1) all check-build

None the less, it is functionally fine so

Reviewed-by: Daniel P. Berrangé 



Regards,
Daniel
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Re: [PATCH v2 6/7] configure: Allow automatic WHPX detection

[Daniel P . Berrangé]

On Sun, Aug 23, 2020 at 01:17:56PM +0200, Thomas Huth wrote:
> The whpx variable is currently initialized to "no" which causes the WHPX
> check to skip the detection unless the user specified --enable-whpx.
> Since the detection code should be able to figure it out correctly, let's
> initialized the variable to "" on MinGW-builds for proper auto-detection
> instead.
> 
> Message-Id: <20200804170055.2851-11-th...@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé 
> Reviewed-by: Stefan Weil 
> Signed-off-by: Thomas Huth 
> ---
>  configure | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Daniel P. Berrangé 


Regards,
Daniel
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Re: [PATCH v2 5/7] dockerfiles/debian-win64-cross: Download WHPX MinGW headers

[Daniel P . Berrangé]

On Sun, Aug 23, 2020 at 01:17:55PM +0200, Thomas Huth wrote:
> To compile-test the WHPX accelerator, we need to download these system
> headers first (they are unfortunately not part of any released and
> packaged MinGW toolchain yet).
> 
> Idea taken from another patch by Stefan Weil.
> 
> Message-Id: <20200804170055.2851-12-th...@redhat.com>
> Signed-off-by: Thomas Huth 
> ---
>  tests/docker/dockerfiles/debian-win64-cross.docker | 9 -
>  1 file changed, 8 insertions(+), 1 deletion(-)


> 
> diff --git a/tests/docker/dockerfiles/debian-win64-cross.docker 
> b/tests/docker/dockerfiles/debian-win64-cross.docker
> index 2fc9cfcbc6..4cc4a3f365 100644
> --- a/tests/docker/dockerfiles/debian-win64-cross.docker
> +++ b/tests/docker/dockerfiles/debian-win64-cross.docker
> @@ -32,7 +32,14 @@ RUN apt-get update && \
>  mxe-$TARGET-w64-mingw32.shared-sdl2 \
>  mxe-$TARGET-w64-mingw32.shared-sdl2-mixer \
>  mxe-$TARGET-w64-mingw32.shared-sdl2-gfx \
> -mxe-$TARGET-w64-mingw32.shared-zlib
> +mxe-$TARGET-w64-mingw32.shared-zlib \
> +curl && \
> +curl -s -S -o 
> /usr/lib/mxe/usr/x86_64-w64-mingw32.shared/include/WinHvEmulation.h \
> +
> "https://sourceforge.net/p/mingw-w64/mingw-w64/ci/master/tree/mingw-w64-headers/include/winhvemulation.h?format=raw;
>  && \
> +curl -s -S -o 
> /usr/lib/mxe/usr/x86_64-w64-mingw32.shared/include/WinHvPlatform.h \
> +
> "https://sourceforge.net/p/mingw-w64/mingw-w64/ci/master/tree/mingw-w64-headers/include/winhvplatform.h?format=raw;
>  && \
> +curl -s -S -o 
> /usr/lib/mxe/usr/x86_64-w64-mingw32.shared/include/winhvplatformdefs.h \
> +
> "https://sourceforge.net/p/mingw-w64/mingw-w64/ci/master/tree/mingw-w64-headers/include/winhvplatformdefs.h?format=raw;

My only concern here is whether sourceforge.net  URLs are reliable enough
for CI, or whether we should instead be mirroring the w64 repo on
git.qemu.org ?

I guess this will be a short term issue until a new mingw release is made
and arrives i nthe distros, so we can try with the curl approach for
now and change if it causes problems

Reviewed-by: Daniel P. Berrangé 

Regards,
Daniel
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Re: [PATCH 1/2] Makefile: Add back TAGS/ctags/cscope rules

[Greg Kurz]

On Tue, 1 Sep 2020 18:04:59 +0200
Paolo Bonzini  wrote:

> On 01/09/20 16:59, Connor Kuehl wrote:
> > On 9/1/20 9:20 AM, Greg Kurz wrote:
> >> It is a bit of a pain to be forced to run configure before being able
> >> to use cscope and friends. Add back the rules to build them in-tree
> >> as before commit a56650518f5b.
> >>
> >> Fixes: a56650518f5b ("configure: integrate Meson in the build system")
> >> Signed-off-by: Greg Kurz 
> > 
> > This might be a user error on my part, but the way I read this it sounds
> > like I could do this:
> > 
> > $ rm -rf build
> > $ make cscope
> > 
> > and have it emit a cscope file,  but when I do so it complains about the
> > build dir not existing. As I understand it, running ./configure (or
> > meson build) is what generates that build dir. Here's the error for
> > posterity:
> > 
> > changing dir to build for make "cscope"...
> > make[1]: *** build: No such file or directory.  Stop.
> > make: *** [GNUmakefile:11: cscope] Error 2
> 
> You have a stray GNUmakefile in your source directory.  It's not
> introduced by Greg's patch.
> 
> I suggest that you remove the GNUmakefile and just use out-of-tree builds.
> 
> > [...]
> > Since this recipe doesn't output an artifact called "cscope" I wonder if
> > this should be:
> > 
> > .PHONY: cscope
> > cscope:
> > ...
> > 
> > or alternatively:
> > 
> > cscope.out:
> > ...
> 
> Yes it should be phony.  I have adjusted the patch and queued it.
> 

FWIW, as said in another mail, it is phony somewhere else in the makefile.

> Paolo
> 

Re: [PATCH v2 4/7] tests/Makefile: test-replication needs CONFIG_POSIX

[Daniel P . Berrangé]

On Sun, Aug 23, 2020 at 01:17:54PM +0200, Thomas Huth wrote:
> test-replication uses sigaction() and friends which are only available
> on POSIX-like systems.
> 
> Reviewed-by: Philippe Mathieu-Daudé 
> Message-Id: <20200804170055.2851-5-th...@redhat.com>
> Signed-off-by: Thomas Huth 
> ---
>  tests/Makefile.include | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)

Reviewed-by: Daniel P. Berrangé 


Regards,
Daniel
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Re: [PATCH v2 3/7] tests/Makefile: test-image-locking needs CONFIG_POSIX

[Daniel P . Berrangé]

On Sun, Aug 23, 2020 at 01:17:53PM +0200, Thomas Huth wrote:
> test-image-locking.c uses the qemu_lock_fd_test() function which is
> only available on POSIX-like systems.
> 
> Reviewed-by: John Snow 
> Message-Id: <20200804170055.2851-4-th...@redhat.com>
> Signed-off-by: Thomas Huth 
> ---
>  tests/Makefile.include | 2 ++
>  1 file changed, 2 insertions(+)

Reviewed-by: Daniel P. Berrangé 


Regards,
Daniel
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[PATCH 1/2] arm.risu: Correct VLDR/VSTR U=0 patterns

[Peter Maydell]

Correct the VLDR and VSTR patterns, which claimed to be setting U=0
but in fact left it identical to the U=1 pattern due to a
cut-and-paste error.

Signed-off-by: Peter Maydell 
---
Somehow the pre-generated test binaries I have from Alex have
U=0 insns in them -- I suspect this got fixed locally but never
made it upstream ?
---
 arm.risu | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arm.risu b/arm.risu
index f8b6deb..43a72ae 100644
--- a/arm.risu
+++ b/arm.risu
@@ -757,7 +757,7 @@ VLDM A1c cond:4 110 p u d 1 1 rn:4 vd:4 101 x imm:8 
!constraints { $p == $u; }
 VSTR A1a cond:4 1101 1 d 00 rn:4 vd:4 101 x imm:8 \
  !memory { reg_plus_imm($rn, $imm * 4); }
 # both A1 and A2 encodings, U = 0
-VSTR A1b cond:4 1101 1 d 00 rn:4 vd:4 101 x imm:8 \
+VSTR A1b cond:4 1101 0 d 00 rn:4 vd:4 101 x imm:8 \
  !memory { reg_minus_imm($rn, $imm * 4); }
 
 # VLDR
@@ -765,7 +765,7 @@ VSTR A1b cond:4 1101 1 d 00 rn:4 vd:4 101 x imm:8 \
 VLDR A1a cond:4 1101 1 d 01 rn:4 vd:4 101 x imm:8 \
  !memory { reg_plus_imm($rn, $imm * 4); }
 # both A1 and A2 encodings, U = 0
-VLDR A1b cond:4 1101 1 d 01 rn:4 vd:4 101 x imm:8 \
+VLDR A1b cond:4 1101 0 d 01 rn:4 vd:4 101 x imm:8 \
  !memory { reg_minus_imm($rn, $imm * 4); }
 
 ### Extension register transfer ###
-- 
2.20.1

[RISU PATCH 0/2] arm.risu: two minor fixes

[Peter Maydell]

These are a couple of minor fixes to arm.risu patterns.
(They're a prereq at least textually to the fp16 arm.risu
change, and I should have sent them out with that but I forgot
I had them in my patchstack.)

thanks
-- PMM

Peter Maydell (2):
  arm.risu: Correct VLDR/VSTR U=0 patterns
  arm.risu: Fix typo in VCVT_B_TT pattern name

 arm.risu | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

-- 
2.20.1

[PATCH 2/2] arm.risu: Fix typo in VCVT_B_TT pattern name

[Peter Maydell]

Fix typo in VCVT_B_TT pattern name.

Signed-off-by: Peter Maydell 
---
 arm.risu | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arm.risu b/arm.risu
index 43a72ae..048215b 100644
--- a/arm.risu
+++ b/arm.risu
@@ -669,7 +669,7 @@ VABS A2 cond:4 11101 d 11  vd:4 101 sz 1 1 m 0 vm:4
 VNEG A2 cond:4 11101 d 11 0001 vd:4 101 sz 0 1 m 0 vm:4
 VSQRT A1 cond:4 11101 d 11 0001 vd:4 101 sz 1 1 m 0 vm:4
 # VCVTB, VCVTT (A8.6.300) [requires half-precision extension]
-VCTV_B_TT A1 cond:4 1110 1 d 11 001 op vd:4 101 0 t 1 m 0 vm:4
+VCVT_B_TT A1 cond:4 1110 1 d 11 001 op vd:4 101 0 t 1 m 0 vm:4
 VCMP A1 cond:4 11101 d 11 0100 vd:4 101 sz e 1 m 0 vm:4
 VCMP A2 cond:4 11101 d 11 0101 vd:4 101 sz e 1 0 0 
 
-- 
2.20.1

Re: [PULL 00/24] Meson changes for 2020-09-01

[Paolo Bonzini]

On 01/09/20 15:19, 罗勇刚(Yonggang Luo) wrote:
> Seems forgot queue my undefsym.py patch

No it's just that I didn't have time to test it properly.

Paolo

Re: [PATCH v2 2/7] tests/docker: Install python3-setuptools in the debian9-mxe containers

[Daniel P . Berrangé]

On Sun, Aug 23, 2020 at 01:17:52PM +0200, Thomas Huth wrote:
> The python setuptools are a requirement for meson, so we need to install
> this additional package now.
> 
> Signed-off-by: Thomas Huth 
> ---
>  tests/docker/dockerfiles/debian9-mxe.docker | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Daniel P. Berrangé 

Regards,
Daniel
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