Patchew URL:
https://patchew.org/QEMU/1602999390-21324-1-git-send-email-lizhen...@huawei.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1602999390-21324-1-git-send-email-lizhen...@huawei.com
Subject: [PATCH]
Patchew URL:
https://patchew.org/QEMU/1602999097-24744-1-git-send-email-lizhen...@huawei.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1602999097-24744-1-git-send-email-lizhen...@huawei.com
Subject: [PATCH]
From: Zhengui
Currently, there is no rate limit for qemu-img convert. This may
cause the task of qemu-img convert to consume all the bandwidth
of the storage. This will affect the IO performance of other processes
and virtual machines under shared storage. So we add support for
offline rate
From: Zhengui
Currently, there is no rate limit for qemu-img commit. This may
cause the task of qemu-img commit to consume all the bandwidth
of the storage. This will affect the IO performance of other processes
and virtual machines under shared storage. So we add support for
offline rate limit
On 17 Oct 2020, at 6:24, Jason A. Donenfeld wrote:
There are a few design goals of notifying userspace: it should be
fast, because people who are using userspace RNGs are usually doing so
in the first place to completely avoid syscall overhead for whatever
high performance application they
On Sat, Oct 17, 2020 at 8:09 PM Alexander Graf wrote:
> There are applications way beyond that though. What do you do with
> applications that already consumed randomness? For example a cached pool
> of SSL keys. Or a higher level language primitive that consumes
> randomness and caches its seed
On Sun, 18 Oct 2020 02:00:44 +0530
Kirti Wankhede wrote:
> On 9/26/2020 1:50 AM, Alex Williamson wrote:
> > On Wed, 23 Sep 2020 04:54:07 +0530
> > Kirti Wankhede wrote:
> >
> >> VM state change handler gets called on change in VM's state. This is used
> >> to set
> >> VFIO device state to
On Sat, 17 Oct 2020, Philippe Mathieu-Daudé wrote:
On 10/17/20 6:31 PM, BALATON Zoltan via wrote:
On Sat, 17 Oct 2020, Philippe Mathieu-Daudé wrote:
+Alistair for loader
On 10/17/20 5:47 PM, BALATON Zoltan via wrote:
The beige G3 Power Macintosh has a 4MB firmware ROM. Fix the size of
the
Signed-off-by: Stefan Hajnoczi
Signed-off-by: Elena Afanasova
---
accel/kvm/kvm-all.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 9ef5daf4c5..baaa54249d 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@
Eventfd can be registered with a zero length when fast_mmio is true.
Handle this case properly when dispatching through QEMU.
Signed-off-by: Elena Afanasova
---
softmmu/memory.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/softmmu/memory.c
Also declare nvram variable with the correct type.
Signed-off-by: BALATON Zoltan
---
hw/sparc/sun4m.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index 54a2b2f9ef..7f1a48440c 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@
From: Mark Cave-Ayland
Now that all of the callers of this function have been switched to use qdev
properties, this legacy init function can now be removed.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Hervé Poussineau
Reviewed-by: Philippe Mathieu-Daudé
---
hw/rtc/m48t59.c | 35
This is inspired by Mark's series:
https://lists.nongnu.org/archive/html/qemu-ppc/2020-10/msg00251.html
and implements what I've suggested in review of that series to
simplify it and avoid code churn if implementing my suggestion later.
Regards,
BALATON Zoltan
BALATON Zoltan (4):
mt48t59:
From: Mark Cave-Ayland
This function is no longer used within the codebase.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Hervé Poussineau
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
---
hw/rtc/m48t59-isa.c | 25 -
On 9/29/2020 3:49 PM, Dr. David Alan Gilbert wrote:
* Philippe Mathieu-Daudé (phi...@redhat.com) wrote:
On 9/23/20 1:24 AM, Kirti Wankhede wrote:
Define flags to be used as delimeter in migration file stream.
Typo "delimiter".
Added .save_setup and .save_cleanup functions. Mapped &
Signed-off-by: BALATON Zoltan
---
hw/sparc64/sun4u.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index ad5ca2472a..a89ebed6f0 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -671,10 +671,12 @@ static void
Signed-off-by: BALATON Zoltan
---
hw/ppc/ppc405_boards.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index 6198ec1035..7a11a38831 100644
--- a/hw/ppc/ppc405_boards.c
+++ b/hw/ppc/ppc405_boards.c
@@ -28,6 +28,7 @@
#include
All instances set this value explicitely so make it the default to
make it simpler to create instances without setting property.
Signed-off-by: BALATON Zoltan
---
hw/rtc/m48t59.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c
index
On 9/26/2020 1:50 AM, Alex Williamson wrote:
On Wed, 23 Sep 2020 04:54:08 +0530
Kirti Wankhede wrote:
Added migration state change notifier to get notification on migration state
change. These states are translated to VFIO device state and conveyed to vendor
driver.
Signed-off-by: Kirti
On 9/26/2020 1:50 AM, Alex Williamson wrote:
On Wed, 23 Sep 2020 04:54:07 +0530
Kirti Wankhede wrote:
VM state change handler gets called on change in VM's state. This is used to set
VFIO device state to _RUNNING.
Signed-off-by: Kirti Wankhede
Reviewed-by: Neo Jia
Reviewed-by: Dr. David
On 9/29/2020 4:33 PM, Dr. David Alan Gilbert wrote:
* Cornelia Huck (coh...@redhat.com) wrote:
On Wed, 23 Sep 2020 04:54:07 +0530
Kirti Wankhede wrote:
VM state change handler gets called on change in VM's state. This is used to set
VFIO device state to _RUNNING.
Signed-off-by: Kirti
On 9/26/2020 1:50 AM, Alex Williamson wrote:
On Wed, 23 Sep 2020 04:54:06 +0530
Kirti Wankhede wrote:
Whether the VFIO device supports migration or not is decided based of
migration region query. If migration region query is successful and migration
region initialization is successful then
On 9/24/2020 7:38 PM, Cornelia Huck wrote:
On Wed, 23 Sep 2020 04:54:06 +0530
Kirti Wankhede wrote:
Whether the VFIO device supports migration or not is decided based of
migration region query. If migration region query is successful and migration
region initialization is successful then
On Sat, 17 Oct 2020 at 17:37, Paolo Bonzini wrote:
> Ok, so the warning remains when everything is fixed, though the text is
> slightly different (and better):
>
> Library iconv found: NO
> Run-time dependency ncursesw found: NO (tried pkgconfig)
> Library ncursesw found: YES
> Library
Hi Jason,
On 17.10.20 15:24, Jason A. Donenfeld wrote:
After discussing this offline with Jann a bit, I have a few general
comments on the design of this.
First, the UUID communicated by the hypervisor should be consumed by
the kernel -- added as another input to the rng -- and then userspace
On 201015 0838, Philippe Mathieu-Daudé wrote:
> Yet another bug in the sdcard model found by libfuzzer:
> https://bugs.launchpad.net/bugs/1895310
>
> Since RFC: Settled migration issue
>
> Philippe Mathieu-Daudé (6):
> hw/sd/sdcard: Add trace event for ERASE command (CMD38)
> hw/sd/sdcard:
On Fri, Oct 16, 2020 at 6:40 PM Jann Horn wrote:
>
> [adding some more people who are interested in RNG stuff: Andy, Jason,
> Theodore, Willy Tarreau, Eric Biggers. also linux-api@, because this
> concerns some pretty fundamental API stuff related to RNG usage]
>
> On Fri, Oct 16, 2020 at 4:33 PM
The IRQ values are defined few lines earlier, use them instead of
the magic numbers.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/intc/bcm2836_control.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/intc/bcm2836_control.c b/hw/intc/bcm2836_control.c
index
After discussing this offline with Jann a bit, I have a few general
comments on the design of this.
First, the UUID communicated by the hypervisor should be consumed by
the kernel -- added as another input to the rng -- and then userspace
should be notified that it should
Add trace event for IRQ from CPU/GPU,
use definitions for IRQ numbers.
Philippe Mathieu-Daudé (2):
hw/intc/bcm2835_ic: Trace GPU/CPU IRQ handlers
hw/intc/bcm2836_control: Use IRQ definitions instead of magic numbers
hw/intc/bcm2835_ic.c | 4 +++-
hw/intc/bcm2836_control.c | 8
Add trace events for GPU and CPU IRQs.
Reviewed-by: Luc Michel
Signed-off-by: Philippe Mathieu-Daudé
---
hw/intc/bcm2835_ic.c | 4 +++-
hw/intc/trace-events | 4
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/intc/bcm2835_ic.c b/hw/intc/bcm2835_ic.c
index
Is this a regression? Can you please bisect to the first commit where it
happened?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1874504
Title:
VFIO passthrough spits out thousands of messages
Hi Peter, Igor, Thomas,
On 2/28/20 5:38 PM, Peter Maydell wrote:
From: Thomas Huth
Old kernels from the Meego project can be used to check that Linux
is at least starting on these machines.
Signed-off-by: Thomas Huth
Reviewed-by: Wainer dos Santos Moschetta
Reviewed-by: Philippe
On 10/17/20 6:39 PM, BALATON Zoltan via wrote:
On Fri, 16 Oct 2020, Philippe Mathieu-Daudé wrote:
On 10/16/20 11:58 AM, Mark Cave-Ayland wrote:
On 16/10/2020 00:47, BALATON Zoltan via wrote:
This is the cut down version of the earlier series omitting unfinished
patches that I plan to
On 10/17/20 6:31 PM, BALATON Zoltan via wrote:
On Sat, 17 Oct 2020, Philippe Mathieu-Daudé wrote:
+Alistair for loader
On 10/17/20 5:47 PM, BALATON Zoltan via wrote:
The beige G3 Power Macintosh has a 4MB firmware ROM. Fix the size of
the rom region and fall back to loading a binary image
Il sab 17 ott 2020, 18:43 Yonggang Luo ha scritto:
> The sh script are harder to maintain for compatible different
> xsh environment so convert it to python script
> Also incorporate the fixes in
>
> https://patchew.org/QEMU/20200929143654.518157-1-marcandre.lur...@redhat.com/
>
> According to
On Sun, Oct 18, 2020 at 12:43 AM Yonggang Luo wrote:
>
> The sh script are harder to maintain for compatible different
> xsh environment so convert it to python script
> Also incorporate the fixes in
>
https://patchew.org/QEMU/20200929143654.518157-1-marcandre.lur...@redhat.com/
>
> According to
The sh script are harder to maintain for compatible different
xsh environment so convert it to python script
Also incorporate the fixes in
https://patchew.org/QEMU/20200929143654.518157-1-marcandre.lur...@redhat.com/
According to https://github.com/msys2/MSYS2-packages/issues/2176
We need use
On Fri, 16 Oct 2020, Philippe Mathieu-Daudé wrote:
On 10/16/20 11:58 AM, Mark Cave-Ayland wrote:
On 16/10/2020 00:47, BALATON Zoltan via wrote:
This is the cut down version of the earlier series omitting unfinished
patches that I plan to rework later and rebased to Mark's qemu-macppc
branch.
On 17/10/20 17:37, Paolo Bonzini wrote:
> On 17/10/20 16:39, Peter Maydell wrote:
>> Library iconv found: NO
>> ../src/meson.build:531: WARNING: iconv required for curses UI but not
>> available, disabling
>
> I'm not sure if that will remove the warning or not, but I'll check (and
> if it does
On Sat, 17 Oct 2020, Philippe Mathieu-Daudé wrote:
+Alistair for loader
On 10/17/20 5:47 PM, BALATON Zoltan via wrote:
The beige G3 Power Macintosh has a 4MB firmware ROM. Fix the size of
the rom region and fall back to loading a binary image with -bios if
loading ELF image failed. This allows
On Sat, Oct 17, 2020 at 11:37 PM Paolo Bonzini wrote:
>
> On 17/10/20 16:39, Peter Maydell wrote:
> > On Sat, 17 Oct 2020 at 14:38, Paolo Bonzini wrote:
> >> OpenBSD and NetBSD call the ninja package "ninja-build" unlike FreeBSD.
> >> I'm sure I had used the right name but well I didn't. I'll
+Alistair for loader
On 10/17/20 5:47 PM, BALATON Zoltan via wrote:
The beige G3 Power Macintosh has a 4MB firmware ROM. Fix the size of
the rom region and fall back to loading a binary image with -bios if
loading ELF image failed. This allows testing emulation with a ROM
image from real
On 10/16/20 8:51 AM, Huacai Chen wrote:
Add Loongson-3 based machine support, it use liointc as the interrupt
controler and use GPEX as the pci controller. Currently it can work with
both TCG and KVM.
As the machine model is not based on any exiting physical hardware, the
name of the machine is
On Sat, 17 Oct 2020, Mark Cave-Ayland wrote:
On 16/10/2020 13:19, BALATON Zoltan via wrote:
On Fri, 16 Oct 2020, Mark Cave-Ayland wrote:
On 16/10/2020 00:47, BALATON Zoltan via wrote:
This is the cut down version of the earlier series omitting unfinished
patches that I plan to rework later
The beige G3 Power Macintosh has a 4MB firmware ROM. Fix the size of
the rom region and fall back to loading a binary image with -bios if
loading ELF image failed. This allows testing emulation with a ROM
image from real hardware as well as using an ELF OpenBIOS image.
Signed-off-by: BALATON
On 17/10/20 16:39, Peter Maydell wrote:
> On Sat, 17 Oct 2020 at 14:38, Paolo Bonzini wrote:
>> OpenBSD and NetBSD call the ninja package "ninja-build" unlike FreeBSD.
>> I'm sure I had used the right name but well I didn't. I'll send a v3.
>
> OpenBSD built OK but meson produces this new
On 10/17/20 8:29 AM, Ju Hyung Park wrote:
> Hi Jens.
>
> On Sat, Oct 17, 2020 at 3:07 AM Jens Axboe wrote:
>>
>> Would be great if you could try 5.4.71 and see if that helps for your
>> issue.
>>
>
> Oh wow, yeah it did fix the issue.
>
> I'm able to reliably turn off and start the VM multiple
Now that the build is done entirely by Meson, there is no need
to keep the Makefile conversion. Instead, we can ask Ninja about
the targets it exposes and forward them.
The main advantages are, from smallest to largest:
- reducing the possible namespace pollution within the Makefile
- removal
The following changes since commit 3e40748834923798aa57e3751db13a069e2c617b:
Merge remote-tracking branch 'remotes/rth/tags/pull-mb-20201014' into staging
(2020-10-15 20:30:24 +0100)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to
Reviewed-by: Daniel P. Berrangé
Acked-by: Alex Bennée
Signed-off-by: Paolo Bonzini
---
.cirrus.yml| 6 +++---
.travis.yml| 13 +
tests/docker/dockerfiles/centos7.docker| 1 +
On Fri, Oct 16, 2020 at 10:38 PM BALATON Zoltan wrote:
>
> On Fri, 16 Oct 2020, Mark Cave-Ayland wrote:
> > Signed-off-by: Mark Cave-Ayland
> > ---
> > hw/ppc/ppc405_boards.c | 10 +-
> > 1 file changed, 9 insertions(+), 1 deletion(-)
> >
> > diff --git a/hw/ppc/ppc405_boards.c
This test case uses the 9pfs 'local' driver to create a directory
and then checks if the expected directory was actually created
(as real directory) on host side.
This patch introduces a custom split() implementation, because
the test code requires non empty array elements as result. For
that
On Sat, 17 Oct 2020 at 14:38, Paolo Bonzini wrote:
> OpenBSD and NetBSD call the ninja package "ninja-build" unlike FreeBSD.
> I'm sure I had used the right name but well I didn't. I'll send a v3.
OpenBSD built OK but meson produces this new warning:
Library iconv found: NO
Per "MIPS32 34K Processor Core Family Software User's Manual,
Revision 01.13" page 8 in "Joint TLB (JTLB)" section:
"The JTLB is a fully associative TLB cache containing 16, 32,
or 64-dual-entries mapping up to 128 virtual pages to their
corresponding physical addresses."
There is no
The Malta tests are already covered in the Malta section.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
Message-Id: <20201013101659.3557154-3-f4...@amsat.org>
---
MAINTAINERS | 2 --
1 file changed, 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index
Hi Jens.
On Sat, Oct 17, 2020 at 3:07 AM Jens Axboe wrote:
>
> Would be great if you could try 5.4.71 and see if that helps for your
> issue.
>
Oh wow, yeah it did fix the issue.
I'm able to reliably turn off and start the VM multiple times in a row.
Double checked by confirming QEMU is
From: Eduardo Habkost
This will make the type name constant consistent with the name of
the type checking macro.
Signed-off-by: Eduardo Habkost
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20200902224311.1321159-19-ehabk...@redhat.com>
Signed-off-by:
-20201017
for you to fetch changes up to fa4551e3f4416cc8c62086ac430b1ceb4f03eb6b:
tests/9pfs: add local Tmkdir test (2020-10-17 15:58:39 +0200)
9pfs: add tests using local fs driver
The currently existing 9pfs test cases are all
From: Pavel Dovgalyuk
This patch adds MIPS-targeted acceptance tests for
record/replay functions.
Signed-off-by: Pavel Dovgalyuk
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Message-Id: <160276110297.2705.10918105269658307206.stgit@pasha-ThinkPad-X280>
[PMD: Moved
The FPGA present on the CoreCard has an I/O region 1MiB wide.
Refs:
- Atlas User’s Manual (Document Number: MD5)
- Malta User’s Manual (Document Number: MD00048)
Fixes: ea85df72b60 ("mips_malta: convert to memory API")
Signed-off-by: Philippe Mathieu-Daudé
Message-Id:
From: Pavel Dovgalyuk
This patch updates MIPS-based machines to allow starting them without ROM.
In this case CPU starts to execute instructions from the empty memory,
but QEMU allows introspecting the machine configuration.
Signed-off-by: Pavel Dovgalyuk
Reviewed-by: Philippe Mathieu-Daudé
All our QOM users provides an input clock. In order to avoid
avoid future machines added without clock, display a warning.
User-mode emulation use the CP0 timer with the RDHWR instruction
(see commit cdfcad788394) so keep using the fixed 200 MHz clock
without diplaying any warning. Only display
This new public function virtio_9p_test_path() allows 9pfs
'local' tests to translate a path from guest scope to host
scope. For instance by passing an empty string it would
return the root path on host of the exported 9pfs tree.
Signed-off-by: Christian Schoenebeck
Message-Id:
Signed-off-by:
Instead of using a INITRD_PAGE_MASK definition, use the
simpler INITRD_PAGE_SIZE one which allows us to simplify
the code by using directly the self-explicit ROUND_UP()
macro.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id:
Now than all QOM users provides the input clock, do not allow
using a CPS without input clock connected.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201012095804.3335117-21-f4...@amsat.org>
---
hw/mips/cps.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/hw/mips/cps.c
Before running the first 9pfs test case, make sure the test directory
for running the 9pfs 'local' tests on is entirely empty. For that
reason simply delete the test directory (if any) before (re)creating
it on test suite startup.
Note: The preferable precise behaviour would be the test directory
In order to be consistent with the other code base uses,
rewrite slightly how the MIPS_MALTA object is created.
No logical change.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20201012160503.3472140-3-f4...@amsat.org>
---
hw/mips/malta.c | 8
1
The CoreLV card with ID 0x420's CPU clocked at 320 MHz. Create
a 'cpuclk' output clock and connect it to the CPU input clock.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201012095804.3335117-20-f4...@amsat.org>
---
hw/mips/malta.c | 19 ---
1 file changed, 16
This patch introduces 9pfs test cases using the 9pfs 'local'
filesystem driver which reads/writes/creates/deletes real files
and directories.
In this initial version, there is only one local test which actually
only checks if the 9pfs 'local' device was created successfully.
Before the 9pfs
Expose a qdev input clock named 'clk-in', and connect it to each
core to forward-propagate the clock.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201012095804.3335117-18-f4...@amsat.org>
---
include/hw/mips/cps.h | 2 ++
hw/mips/cps.c | 4
2 files changed, 6 insertions(+)
The 'empty_slot' region created is related to the gt64120.
Move its creation close to the gt64120 instance creation.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20201012160503.3472140-2-f4...@amsat.org>
---
hw/mips/malta.c | 13 ++---
1 file
The MIPSsim machine CPU frequency is too fast running at 200 MHz,
while it should be 12 MHz for the 24K and 6 MHz for the 5K core.
Ref: Linux commit c78cbf49c4ed
("Support for MIPSsim, the cycle accurate MIPS simulator.")
Signed-off-by: Philippe Mathieu-Daudé
Message-Id:
All existing 9pfs test cases are using the 'synth' fs driver so far, which
means they are not accessing real files, but a purely simulated (in RAM
only) file system.
Let's make this clear by changing the prefix of the individual qtest case
names from 'fs/' to 'synth/'. That way they'll be easily
The I6400 can run at 1 GHz or more. Create a 'cpuclk'
output clock and connect it to the CPU input clock.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201012095804.3335117-19-f4...@amsat.org>
---
hw/mips/boston.c | 13 +
1 file changed, 13 insertions(+)
diff --git
Introduce an helper to create a MIPS CPU and connect it to
a reference clock. This helper is not MIPS specific, but so
far only MIPS CPUs need it.
Suggested-by: Huacai Chen
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201012095804.3335117-13-f4...@amsat.org>
---
target/mips/cpu.h | 12
The CPU frequency is normally provided by the firmware in the
"cpuclock" environment variable. The 2E board can handles up
to 660MHz, but be conservative and take the same value used
by the Linux kernel: 533 MHz.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Jiaxun Yang
Message-Id:
Since its introduction in commit 6af0bf9c7c3,
the 'r4k' machine runs at 200 MHz.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201012095804.3335117-14-f4...@amsat.org>
---
hw/mips/r4k.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/hw/mips/r4k.c
Use the Clock API and let the CPU object have an input clock.
If no clock is connected, keep using the default frequency of
200 MHz used since the introduction of the 'r4k' machine in
commit 6af0bf9c7c3.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id:
From: Aleksandar Markovic
I have been working on project other than QEMU for some time, and would
like to devote myself to that project. It is impossible for me to find
enough time to perform maintainer's duties with needed meticulousness
and patience.
I wish prosperous future to QEMU and all
Currently the CP0 timer period is fixed at 10 ns, corresponding
to a fixed CPU frequency of 200 MHz (using half the speed of the
CPU).
In few commits we will be able to use a different CPU frequency.
In preparation, move the cp0_count_ns variable to CPUMIPSState
so we can modify it.
TIMER_PERIOD value of '10 ns' can be explained looking at
commit 6af0bf9c7c3doc, where the CPU frequency is 200 MHz
and CP0 default count rate is half the frequency of the
CPU. Document that.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201012095804.3335117-8-f4...@amsat.org>
---
From: Huacai Chen
Add Loongson-3A CPU models description.
Signed-off-by: Huacai Chen
Message-Id: <1602059975-10115-10-git-send-email-che...@lemote.com>
[PMD: Split patch in 2: CPU / machine]
Signed-off-by: Philippe Mathieu-Daudé
---
docs/system/cpu-models-mips.rst.inc | 10 --
1 file
Paul's Wavecomp email has been bouncing for months. He told us
he "no longer has access to modern MIPS CPUs or Boston hardware,
and wouldn't currently have time to spend on them if he did." [1]
but "perhaps that might change in the future." [2].
Be fair and downgrade the status of the Boston board
Name variables holding nanoseconds with the '_ns' suffix.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Aleksandar Markovic
Message-Id: <20201012095804.3335117-7-f4...@amsat.org>
---
target/mips/cp0_timer.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff
The cache operation is encoded in bits [20:18] of the instruction.
The 'op' argument of helper_cache() contains the bits [20:16].
Extract the 3 bits and parse them using a switch case. This allow
us to handle multiple cache types (the cache type is encoded in
bits [17:16]).
Previously the if()
Since 82790064116 ("Cast ELF datatypes properly to host 64bit types")
we don't need to sign-extend the entry_point address. Remove this
unnecessary code.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20200927163943.614604-2-f4...@amsat.org>
---
From: Jiaxun Yang
LWC2 & SWC2 have been rewritten by Loongson EXT vendor ASE
as "load/store quad word" and "shifted load/store" groups of
instructions.
This patch add implementation of these instructions:
gslq: load 16 bytes to GPR
gssq: store 16 bytes from GPR
gslqc1: load 16 bytes to
The get_random() helper uses the CP0_Wired register, which is
unrelated to the CP0_Count register used as timer.
Commit e16fe40c872 ("Move the MIPS CPU timer in a separate file")
incorrectly moved this get_random() helper with timer specific
code. Move it back to generic CP0 helpers.
To avoid the MIPS target being orphan, volunteer to keep an eye
on it and put together pull requests.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Jiaxun Yang
Reviewed-by: Thomas Huth
Message-Id: <20201013101659.3557154-2-f4...@amsat.org>
---
MAINTAINERS | 6 --
1 file changed, 4
The Magnum 4000PC CPU runs at 100 MHz, and the Acer PICA-61
CPU at ~134 MHz.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201012095804.3335117-17-f4...@amsat.org>
---
hw/mips/jazz.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/hw/mips/jazz.c
In case the guest uses a cache opcode we are not expecting,
log it to give us a chance to notice it, in case we should
actually do something.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Jiaxun Yang
Message-Id: <20200813181527.22551-4-f4...@amsat.org>
---
QEMU does not model caches, so there is not much to do with the
Invalidate/Writeback opcodes. Make it explicit adding a comment.
Suggested-by: Jiaxun Yang
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Jiaxun Yang
Message-Id:
From: Aleksandar Markovic
Remove function definitions via macros to achieve better code clarity.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <1602103041-32017-3-git-send-email-aleksandar.qemu.de...@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé
---
Since not all CPU implementations use a cores use a CP0 timer
at half the frequency of the CPU, make this variable a property.
Signed-off-by: Philippe Mathieu-Daudé
Message-Id: <20201012095804.3335117-11-f4...@amsat.org>
---
target/mips/cpu.h | 9 +
target/mips/cpu.c | 19
From: Luc Michel
This function creates a clock and parents it to another object with a
given name. It calls clock_setup_canonical_path before returning the
new clock.
This function is useful to create clocks in devices when one doesn't
want to expose it at the qdev level (as an input or an
From: Aleksandar Markovic
Remove function definitions via macros to achieve better code clarity.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <1602103041-32017-2-git-send-email-aleksandar.qemu.de...@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé
---
The CP0 timer period is a function of the CPU frequency.
Start using the default values, which will be replaced by
properties in the next commits.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Jiaxun Yang
Message-Id: <20201012095804.3335117-10-f4...@amsat.org>
---
target/mips/cpu.c | 4
From: Jiaxun Yang
LWC2 & SWC2 have been rewritten by Loongson EXT vendor ASE
as "load/store quad word" and "shifted load/store" groups of
instructions.
This patch add implementation of these instructions:
gslwlc1: similar to lwl but RT is FPR instead of GPR
gslwrc1: similar to lwr but RT
Introduce freq_to_str() to convert frequency values in human
friendly units using the SI units for Hertz.
Suggested-by: Luc Michel
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Reviewed-by: Luc Michel
Message-Id: <20201012095804.3335117-2-f4...@amsat.org>
---
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