On Fri, Dec 18, 2020 at 12:41:11PM +0100, Cornelia Huck wrote:
> On Thu, 17 Dec 2020 15:15:30 +0100
> Greg Kurz wrote:
>
> > On Thu, 17 Dec 2020 12:38:42 +0100
> > Cornelia Huck wrote:
> >
> > > On Thu, 17 Dec 2020 16:47:36 +1100
> > > David Gibson wrote:
> > >
> > > > On Mon, Dec 14, 2020
QEMU loads vnc tls certificates only when vm is started. This patch
provides a new qmp command to reload vnc tls certificates without
restart vnc-server/VM.
Signed-off-by: Zihao Chang
---
include/ui/console.h | 1 +
monitor/qmp-cmds.c | 7 +++
qapi/ui.json | 17 +
在 2021/1/4 上午1:07, BALATON Zoltan 写道:
On Sun, 3 Jan 2021, Philippe Mathieu-Daudé wrote:
On 1/3/21 3:27 PM, BALATON Zoltan via wrote:
On Sun, 3 Jan 2021, Philippe Mathieu-Daudé wrote:
On 1/2/21 11:43 AM, BALATON Zoltan via wrote:
Hello,
This is an all in one series containing all the patches
[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
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You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1569491
Title:
qemu
Apologies for the late review - will get to the rest of the series as
soon as I can.
On Mon, Dec 7, 2020 at 12:31 PM Stefan Hajnoczi wrote:
>
> Treat the num_queues field as virtio-endian. On big-endian hosts the
> vhost-user-blk num_queues field was in the wrong endianness.
>
> Move the
On Thu, 31 Dec 2020, BALATON Zoltan via wrote:
Dependency on FDT_PPC was added in commit b0048f76095
("hw/ppc/Kconfig: Only select FDT helper for machines using it") but
it does not seem to be really necessary so remove it again.
Signed-off-by: BALATON Zoltan
---
v2: Do not remove PPC405,
The MTTCG issue is known and I’ve only used multiple core emulation with
single core.
I haven’t tried your patch yet but I plan to when I get time next week. I’m
surprised because it’s (your v1 patchset) exactly what I had originally
before hitting crashes and having to add the calls to more
On Sun, 3 Jan 2021, Thomas Huth wrote:
On 03/01/2021 02.09, BALATON Zoltan via wrote:
All machines that select SERIAL also select PPC4XX so we can just add
this common dependency there once.
Signed-off-by: BALATON Zoltan
---
hw/ppc/Kconfig | 5 +
1 file changed, 1 insertion(+), 4
On Mon, 4 Jan 2021, David Gibson wrote:
On Sun, Jan 03, 2021 at 02:09:33AM +0100, BALATON Zoltan via wrote:
So this is v3 of a series that started to fix a potential problem with
irq mapping in pci440_pcix (used by sam460ex) that got some other
fixes along the way as by-products. But it turns
On Mon, 4 Jan 2021, David Gibson wrote:
On Thu, Dec 31, 2020 at 12:11:55PM +0100, BALATON Zoltan via wrote:
All machines that select SERIAL also select PPC4XX so we can just add
this common dependency there once.
Signed-off-by: BALATON Zoltan
Applied to ppc-for-6.0.
Not yet please, I'll
On Sun, Jan 03, 2021 at 02:09:33AM +0100, BALATON Zoltan via wrote:
> So this is v3 of a series that started to fix a potential problem with
> irq mapping in pci440_pcix (used by sam460ex) that got some other
> fixes along the way as by-products. But it turns out the irq issue
> this was trying to
On Thu, Dec 31, 2020 at 12:11:55PM +0100, BALATON Zoltan via wrote:
> All machines that select SERIAL also select PPC4XX so we can just add
> this common dependency there once.
>
> Signed-off-by: BALATON Zoltan
Applied to ppc-for-6.0.
> ---
> hw/ppc/Kconfig | 5 +
> 1 file changed, 1
On Sun, Jan 03, 2021 at 08:46:27AM -0800, Joelle van Dyne wrote:
> Can you test with a low memory (-m 512) and also with single threaded
> SMP (-smp 4)? Wondering if you're hitting all the edge cases because
> there's oddities with cache flushing (can be done both in code gen and
> code exec) and
On Sun, Jan 03, 2021 at 08:52:52AM -0800, Joelle van Dyne wrote:
> MAC_OS_VERSION_11_0 is always defined. You can see in
> usr/include/AvailabilityVersions.h
>
It's not defined on my old MPB that has Catalina (10.15.7). The last
entries are:
#define MAC_OS_X_VERSION_10_15 101500
#define
From: Huacai Chen
Implement fw_cfg_arch_key_name(), which returns the name of a
mips-specific key.
Co-developed-by: Jiaxun Yang
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20201221110538.3186646-3-chenhua...@kernel.org>
[PMD: Add
From: Jiaxun Yang
The kernel comes from debian archive so it's trusted.
Invoking the test can be done as follows:
$ avocado --show=app,console run -t machine:fuloong2e tests/acceptance/
(1/1)
tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_mips64el_fuloong2e:
console: [
From: Jiaxun Yang
modetty is not handled by kernel and the parameter
here seems unreasonable.
Signed-off-by: Jiaxun Yang
Message-Id: <20201224031750.52146-6-jiaxun.y...@flygoat.com>
Reviewed-by: Philippe Mathieu-Daudé
[PMD: Do not remove busclock]
Signed-off-by: Philippe Mathieu-Daudé
---
On 12/24/20 4:17 AM, Jiaxun Yang wrote:
> It can now boot Debian installer[1] as well as a custom PMON bootloader
> distribution[2].
>
> Note that it can't boot PMON shipped with actual machine as our ATI vgabios
> is using some x86 hack that can't be handled by x86emu in original PMON.
>
>
>
From: Jiaxun Yang
Missed in 3ca7639ff00 ("hw/mips/fuloong2e: Set CPU frequency
to 533 MHz"), we need to tell the kernel the correct clock.
Fixes: 3ca7639ff00 ("hw/mips/fuloong2e: Set CPU frequency to 533 MHz").
Signed-off-by: Jiaxun Yang
Reviewed-by: Huacai Chen
Reviewed-by: Philippe
From: Jiaxun Yang
Seems useless
Fixes: 051c190bce5 ("MIPS: Initial support of fulong mini pc (machine
construction)")
Signed-off-by: Jiaxun Yang
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Huacai Chen
Message-Id: <20201224031750.52146-2-jiaxun.y...@flygoat.com>
Signed-off-by:
From: Jiaxun Yang
Websites are downing, but GitHub may last forever.
Loongson even doesn't recogonize 2E as their products nowadays..
Signed-off-by: Jiaxun Yang
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Huacai Chen
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
From: Jiaxun Yang
It will signed extend vaddr properly.
Signed-off-by: Jiaxun Yang
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20201215064200.28751-4-jiaxun.y...@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé
---
hw/mips/fuloong2e.c | 24
From: BALATON Zoltan
Rename local variable holding object state for readability and
consistency.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
<69655b23df2ecebbf0aff29726f4b4746f5b74de.1609584216.git.bala...@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé
From: Jiaxun Yang
Address should be unsigned anyway, otherwise it may carry
calculations wrongly.
Signed-off-by: Jiaxun Yang
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20201215064200.28751-2-jiaxun.y...@flygoat.com>
[PMD: Fixed typo and convert
From: Huacai Chen
Update MIPS machine documentation to add Loongson-3 based machine description.
Signed-off-by: Huacai Chen
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20201221110538.3186646-6-chenhua...@kernel.org>
Signed-off-by: Philippe Mathieu-Daudé
---
docs/system/target-mips.rst
From: BALATON Zoltan
Drop DPRINTF and use trace functions instead. Two debug messages about
unimplemented registers could be converted to qemu_log_mask() but in
reality all registers are currently unimplemented (we just store and
return values of writable regs but do nothing with them). As we
From: Huacai Chen
As suggested by Philippe Mathieu-Daudé, rework Loongson's liointc:
1, Move macro definitions to loongson_liointc.h;
2, Remove magic values and use macros instead;
3, Replace dead D() code by trace events.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Huacai Chen
From: Huacai Chen
Add Loongson-3 based machine support, it use liointc as the interrupt
controler and use GPEX as the pci controller. Currently it can work with
both TCG and KVM.
As the machine model is not based on any exiting physical hardware, the
name of the machine is "loongson3-virt". It
From: BALATON Zoltan
Remove some unneded, empty code and set user_creatable to false
(besides being not implemented yet, so does nothing anyway) it's also
normally part of VIA south bridge chips so no need to confuse users
showing them these devices.
Signed-off-by: BALATON Zoltan
Reviewed-by:
From: Peter Maydell
It's common to want to print a human-readable indication of a clock's
frequency. Provide a utility function in the clock API to return a
string which is a displayable representation of the frequency,
and use it in qdev-monitor.c.
Before:
(qemu) info qtree
[...]
dev:
From: Peter Maydell
Remove the now-unused clock_get_ns() API and the CLOCK_PERIOD_TO_NS()
macro that only it was using.
Signed-off-by: Peter Maydell
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Reviewed-by: Luc Michel
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
From: BALATON Zoltan
These are legacy init functions that are just equivalent to directly
calling pci_create_simple so do that instead. Also rename objects to
lower case via-ac97 and via-mc97 matching naming of other devices.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
From: Peter Maydell
Currently the MIPS code uses the old clock_get_ns() API to
calculate a time length in nanoseconds:
cpu->cp0_count_rate * clock_get_ns(MIPS_CPU(cpu)->clock)
This relies on the clock having a period which is an exact number
of nanoseconds.
Switch to the new
From: BALATON Zoltan
This is really the ISA bridge part so name the type accordingly.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
<78db2ced4b41a8a775dbc6c97a90db683952c2cb.1609584216.git.bala...@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé
---
From: Peter Maydell
The clock_get_ns() API claims to return the period of a clock in
nanoseconds. Unfortunately since it returns an integer and a
clock's period is represented in units of 2^-32 nanoseconds,
the result is often an approximation, and calculating a clock
expiry deadline by
From: Jiaxun Yang
So it will sign extend adresses properly.
Signed-off-by: Jiaxun Yang
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20201215064200.28751-3-jiaxun.y...@flygoat.com>
Signed-off-by: Philippe Mathieu-Daudé
---
hw/mips/malta.c | 4 ++--
1
From: BALATON Zoltan
Use less confusing naming for superio config register handling related
parts that makes it clearer what belongs to this part.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
Replace pci_set_byte(PCI_INTERRUPT_PIN) by
pci_config_set_interrupt_pin().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Huacai Chen
Message-Id: <20201231224911.1467352-5-f4...@amsat.org>
---
hw/pci-host/bonito.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
From: BALATON Zoltan
These are not used or not needed.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
<35cefcc3518a3395a796bb6ad6fbc308adc65266.1609584216.git.bala...@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé
---
hw/isa/vt82c686.c | 5 -
1 file
From: Huacai Chen
Preparing to add Loongson-3 machine support, add Loongson-3's LEFI (a
UEFI-like interface for BIOS-Kernel boot parameters) helpers first.
Co-developed-by: Jiaxun Yang
Signed-off-by: Huacai Chen
Signed-off-by: Jiaxun Yang
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
From: BALATON Zoltan
Remove legacy vt82c686b_pm_init() function and also rename
VT82C686B_PM type name to match other device names.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/vt82c686.h | 5 +
From: BALATON Zoltan
The via-[am]c97 code is supposed to implement the audio part of VIA
south bridge chips so it is better placed under hw/audio/. Split it
off into a separate file.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
Signed-off-by: Philippe
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Huacai Chen
Message-Id: <20201231224911.1467352-3-f4...@amsat.org>
---
hw/pci-host/bonito.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 40dda237d8e..c2f71e5a132
We already have a generic PCI_SLOT() macro in "hw/pci/pci.h"
to extract the PCI slot identifier, use it.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Paul Durrant
Acked-by: David Gibson
Message-Id: <20201012124506.3406909-5-phi...@redhat.com>
---
hw/hppa/dino.c| 2 +-
From: BALATON Zoltan
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
<58d7585f979f154b1f1e69fdc026eed6dbc7996f.1609584216.git.bala...@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/isa/vt82c686.h | 3 +--
hw/isa/vt82c686.c | 9
We already have a generic PCI_DEVFN() macro in "hw/pci/pci.h"
to pack the PCI slot/function identifiers, use it.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: David Gibson
Message-Id: <20201012124506.3406909-6-phi...@redhat.com>
Reviewed-by: Huacai Chen
Message-Id:
From: BALATON Zoltan
There's no reason to suffix everything with _DEVICE when the names are
already unique without it and shorter names are more readable.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
Signed-off-by: Philippe Mathieu-Daudé
---
We already have a generic PCI_BUILD_BDF() macro in "hw/pci/pci.h"
to pack these values, use it.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: David Gibson
Message-Id: <20201012124506.3406909-3-phi...@redhat.com>
---
hw/pci-host/bonito.c | 3 +--
hw/pci-host/pnv_phb4.c | 2 +-
2 files
From: BALATON Zoltan
These parts are common between VT82C686B and VT8231 so can be shared
in the future. Rename them to VIA prefix accordingly.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
Message-Id:
We already have a generic PCI_FUNC() macro in "hw/pci/pci.h" to
extract the PCI function identifier, use it.
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: David Gibson
Message-Id: <20201012124506.3406909-4-phi...@redhat.com>
---
hw/pci-host/uninorth.c | 2 +-
1 file changed, 1 insertion(+),
The following changes since commit 83734919c408ba02adb6ea616d68cd1a72837fbe:
Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20201222' into
staging (2021-01-01 18:19:44 +)
are available in the Git repository at:
https://gitlab.com/philmd/qemu.git tags/mips-20210103
On 12/15/20 7:41 AM, Jiaxun Yang wrote:
> v2:
> A big reconstruction. rewrite helpers with CPU feature and sepreate
> changesets.
>
> Jiaxun Yang (8):
> hw/mips: Make bootloader addresses unsgined
> hw/mips/malta: Use address translation helper to calculate
> bootloader_run_addr
>
On 1/3/21 4:57 PM, Philippe Mathieu-Daudé wrote:
> On 1/2/21 12:15 AM, Philippe Mathieu-Daudé wrote:
>> On 12/15/20 7:41 AM, Jiaxun Yang wrote:
>>> Address should be unsigned anyway, otherwise it may carry
>>> calculations wrongly.
>>>
>>> Signed-off-by: Jiaxun Yang
>>> ---
>>>
** Tags removed: esxi raspberry vmware
** Tags added: linux-user
** Tags added: arm
--
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1909921
Title:
Raspberry Pi 4 qemu:handle_cpu_signal received
On Sun, 3 Jan 2021, Mark Cave-Ayland wrote:
On 01/01/2021 23:12, Philippe Mathieu-Daudé wrote:
From: Guenter Roeck
The IDE legacy mode emulation has been removed in commit 4ea98d317eb
("ide/via: Implement and use native PCI IDE mode") but some Linux
kernels (probably including def_config)
Public bug reported:
Hello,
I have a Raspberry Pi 4 with an ESXi hypervisor installed on it (ESXi ARM
Edition).
I created a CentOS 7 VM on it and I'm using a Docker container which is running
qemu inside it.
This container is a Debian Bullseye OS and I'm using qemu-i386 to start my
Cc'ing Gerd + patch author/reviewer.
On 1/2/21 2:11 PM, Torsten Wohlfarth wrote:
> Hello,
>
> i can't start any system if i use virgl. I get the following error:
>
> qemu-x86_64: ../ui/console.c:1791: dpy_gl_ctx_create: Assertion
> `con->gl' failed.
> ./and.sh: line 27: 3337167 Aborted
On Sun, 3 Jan 2021, Philippe Mathieu-Daudé wrote:
On 1/3/21 3:27 PM, BALATON Zoltan via wrote:
On Sun, 3 Jan 2021, Philippe Mathieu-Daudé wrote:
On 1/2/21 11:43 AM, BALATON Zoltan via wrote:
Hello,
This is an all in one series containing all the patches from my
previous part I and part II
+Paolo for question at the end.
On 12/21/20 12:05 PM, Huacai Chen wrote:
> Add Loongson-3 based machine support, it use liointc as the interrupt
> controler and use GPEX as the pci controller. Currently it can work with
> both TCG and KVM.
>
> As the machine model is not based on any exiting
MAC_OS_VERSION_11_0 is always defined. You can see in
usr/include/AvailabilityVersions.h
...
#define MAC_OS_X_VERSION_10_15 101500
#define MAC_OS_X_VERSION_10_15_1101501
#define MAC_OS_X_VERSION_10_16 101600
#define MAC_OS_VERSION_11_0 11
The proper way is to do an
Can you test with a low memory (-m 512) and also with single threaded
SMP (-smp 4)? Wondering if you're hitting all the edge cases because
there's oddities with cache flushing (can be done both in code gen and
code exec) and interrupt handling that caused issues for me.
-j
On Sun, Jan 3, 2021 at
On Sun, 3 Jan 2021, Mark Cave-Ayland wrote:
On 01/01/2021 23:56, BALATON Zoltan via wrote:
But Mark still considered that a horrible hack but after looking more
closely he also found the difficulty of implementing a more faithful
emulation so he would accept the flag at the end but still
On 1/2/21 12:15 AM, Philippe Mathieu-Daudé wrote:
> On 12/15/20 7:41 AM, Jiaxun Yang wrote:
>> Address should be unsigned anyway, otherwise it may carry
>> calculations wrongly.
>>
>> Signed-off-by: Jiaxun Yang
>> ---
>> hw/mips/fuloong2e.c | 12 ++--
>> hw/mips/malta.c | 22
On 1/3/21 3:27 PM, BALATON Zoltan via wrote:
> On Sun, 3 Jan 2021, Philippe Mathieu-Daudé wrote:
>> On 1/2/21 11:43 AM, BALATON Zoltan via wrote:
>>> Hello,
>>>
>>> This is an all in one series containing all the patches from my
>>> previous part I and part II vt82c686b clean up series plus the
Hi Huacai,
On 12/21/20 12:05 PM, Huacai Chen wrote:
> Add Loongson-3 based machine support, it use liointc as the interrupt
> controler and use GPEX as the pci controller. Currently it can work with
> both TCG and KVM.
>
> As the machine model is not based on any exiting physical hardware, the
>
On 01/01/2021 23:12, Philippe Mathieu-Daudé wrote:
From: Guenter Roeck
The IDE legacy mode emulation has been removed in commit 4ea98d317eb
("ide/via: Implement and use native PCI IDE mode") but some Linux
kernels (probably including def_config) require legacy mode on the
Fuloong2e so only
Pages can't be both write and executable at the same time on Apple
Silicon. macOS provides public API to switch write protection [1] for
JIT applications, like TCG.
1.
https://developer.apple.com/documentation/apple_silicon/porting_just-in-time_compilers_to_apple_silicon
Signed-off-by: Roman
On 01/01/2021 23:56, BALATON Zoltan via wrote:
But Mark still considered that a horrible hack but after looking more closely he also
found the difficulty of implementing a more faithful emulation so he would accept the
flag at the end but still wanted registers to be set more consistently
On Sun, 3 Jan 2021, Philippe Mathieu-Daudé wrote:
On 1/2/21 11:43 AM, BALATON Zoltan via wrote:
Hello,
This is an all in one series containing all the patches from my
previous part I and part II vt82c686b clean up series plus the end of
it to finally add vt8231 emulation that will be used by
On Sat, Jan 02, 2021 at 11:55:29AM -0800, Joelle van Dyne wrote:
> I see you didn't touch cpu_loop_exit() and I'm curious how async
> interrupts are handled. Have you tested this and it works i.e. booting
> Windows 7 or Ubuntu 20.04? Also I've seen do_tb_phys_invalidate()
> called both from code
On 29/12/2020 09.50, Cho, Yu-Chen wrote:
Add build-system-opensuse jobs and opensuse-leap.docker dockerfile.
Use openSUSE Leap 15.2 container image in the gitlab-CI.
Signed-off-by: Cho, Yu-Chen
---
v4:
Add package tar and fix python3 version from 3.8 to 3.6
Add acceptance-system-opensuse back.
On 1/2/21 11:43 AM, BALATON Zoltan via wrote:
> Hello,
>
> This is an all in one series containing all the patches from my
> previous part I and part II vt82c686b clean up series plus the end of
> it to finally add vt8231 emulation that will be used by subsequent
> ppc/pegasos2 emulation. I
On 12/31/20 11:48 PM, Philippe Mathieu-Daudé wrote:
> Patches I wrote while reviewing/testing Jiaxun's v3 [1] trying
> to understand the problem with "Fixup pci.lomem mapping" [2].
>
> The issue should be fixed by patch #8 of this series:
> 'Remap PCI "lo" regions when PCIMAP reg is modified'.
>
On 12/21/20 12:05 PM, Huacai Chen wrote:
> Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
> R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
> Loongson-3A R4 is the newest and its ISA is almost the superset of all
> others. To reduce complexity, in QEMU
On 1/1/21 9:35 PM, Philippe Mathieu-Daudé wrote:
> On 12/15/20 4:09 PM, Peter Maydell wrote:
>> This patchseries makes some changes to the clock API:
>> * Remove clock_get_ns()
>> * Add clock_ticks_to_ns() to return number of nanoseconds
>>it will take the clock to tick N times
>> *
On 12/24/20 4:17 AM, Jiaxun Yang wrote:
> The kernel comes from debian archive so it's trusted.
>
> Signed-off-by: Jiaxun Yang
> Reviewed-by: Wainer dos Santos Moschetta
> Reviewed-by: Willian Rampazzo
> Reviewed-by: Huacai Chen
> ---
> tests/acceptance/boot_linux_console.py | 21
On 10/12/20 2:45 PM, Philippe Mathieu-Daudé wrote:
> Trivial patches using the generic PCI macros from "hw/pci/pci.h".
>
> Philippe Mathieu-Daudé (5):
> hw/pci-host/bonito: Make PCI_ADDR() macro more readable
> hw/pci-host: Use the PCI_BUILD_BDF() macro from 'hw/pci/pci.h'
>
On 1/3/21 2:09 AM, BALATON Zoltan via wrote:
> The trace event for pci_host_config_write() was also using the trace
> event for read. Add corresponding trace and correct this.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/ppc/ppc440_pcix.c | 2 +-
> hw/ppc/trace-events | 1 +
> 2 files changed,
On 1/2/21 11:43 AM, BALATON Zoltan via wrote:
> Drop DPRINTF and use trace functions instead. Two debug messages about
> unimplemented registers could be converted to qemu_log_mask() but in
> reality all registers are currently unimplemented (we just store and
> return values of writable regs but
On 1/2/21 11:43 AM, BALATON Zoltan via wrote:
> Use less confusing naming for superio config register handling related
> parts that makes it clearer what belongs to this part.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/isa/vt82c686.c | 48 +++
> 1
On 1/2/21 11:43 AM, BALATON Zoltan via wrote:
> Rename local variable holding object state for readability and
> consistency.
>
> Signed-off-by: BALATON Zoltan
> ---
> hw/isa/vt82c686.c | 30 +++---
> 1 file changed, 15 insertions(+), 15 deletions(-)
Reviewed-by:
nobody then ?
Le lun. 28 déc. 2020 à 19:03, Kevin Nguetchouang <
kevinnguetchou...@gmail.com> a écrit :
> Hello everyone, in a class project, i would like to change the backing
> file of the current image opened with a particular path file.
>
> I try differents functions i saw in the source code
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