On 16/03/2021 14.59, Markus Armbruster wrote:
util/yank.c and stubs/yank.c are both in libqemuutil.a, even though
their external symbols conflict. The linker happens to pick the
former. This links a bunch of unneeded code into the executables that
actually want the latter: qemu-io, qemu-img,
On 22/03/2021 18.48, Lukas Straub wrote:
On Mon, 22 Mar 2021 17:00:23 +0100
Thomas Huth wrote:
On 22/03/2021 08.35, Lukas Straub wrote:
On Mon, 22 Mar 2021 06:20:50 +0100
Thomas Huth wrote:
On 22/03/2021 00.31, Lukas Straub wrote:
Use the normal yank code instead of stubs in relevant
Included creation of ITS as part of virt platform GIC
initialization.This Emulated ITS model now co-exists with kvm
ITS and is enabled in absence of kvm irq kernel support in a
platform.
Signed-off-by: Shashi Mallela
---
hw/arm/virt.c| 10 --
target/arm/kvm_arm.h | 4 ++--
2
Added functionality to trigger ITS command queue processing on
write to CWRITE register and process each command queue entry to
identify the command type and handle commands like MAPD,MAPC,SYNC.
Signed-off-by: Shashi Mallela
---
hw/intc/arm_gicv3_its.c | 362
1 file
Hi Peter,
As per your suggestion, i have split the series into smaller pieces and
shared newer patch-sets for review including cover letter.
Also,have added virt board support and tested the same for
functionality using kvm-unit-tests.
Please ignore this patch and consider the latest series
Included creation of ITS as part of SBSA platform GIC
initialization.
Signed-off-by: Shashi Mallela
---
hw/arm/sbsa-ref.c | 26 +---
1 file changed, 23 insertions(+), 3 deletions(-)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c
index 88dfb2284c..d05cbcae48 100644
---
Defined descriptors for ITS device table,collection table and ITS
command queue entities.Implemented register read/write functions,
extract ITS table parameters and command queue parameters,extended
gicv3 common to capture qemu address space(which host the ITS table
platform memories required for
Added register definitions relevant to ITS,implemented overall
ITS device framework with stubs for ITS control and translater
regions read/write,extended ITS common to handle mmio init between
existing kvm device and newer qemu device.
Signed-off-by: Shashi Mallela
---
hw/intc/arm_gicv3_its.c
Implemented lpi processing at redistributor to get lpi config info
from lpi configuration table,determine priority,set pending state in
lpi pending table and forward the lpi to cpuif.Added logic to invoke
redistributor lpi processing with translated LPI which set/clear LPI
from ITS device as part
Added properties to enable ITS feature and define qemu system
address space memory in gicv3 common,setup distributor and
redistributor registers to indicate LPI support.
Signed-off-by: Shashi Mallela
---
hw/intc/arm_gicv3_common.c | 16 +++
hw/intc/arm_gicv3_dist.c |
This patchset implements qemu device model for enabling physical
LPI support and ITS functionality in GIC as per GICv3 specification.
Both flat table and 2 level tables are implemented.The ITS commands
for adding/deleting ITS table entries,trigerring LPI interrupts are
implemented.Translated LPI
Added ITS command queue handling for MAPTI,MAPI commands,handled ITS
translation which triggers an LPI via INT command as well as write
to GITS_TRANSLATER register,defined enum to differentiate between ITS
command interrupt trigger and GITS_TRANSLATER based interrupt trigger.
Each of these
ping...sorry for the noise.
On 3/11/2021 19:29,Dongjiu Geng wrote:
In order to conveniently receive email, replace the Huaweiemail address with my personal one.Signed-off-by: Dongjiu Geng --- MAINTAINERS | 2 +- 1 file changed, 1
On Mon, Mar 22, 2021 at 01:06:53PM +0100, Paolo Bonzini wrote:
> On 22/03/21 07:39, David Gibson wrote:
> > > QEMU doesn't really keep track of "in flight" unplug requests, and as
> > > long as that's the case, its timeout even will have the same issue.
> > Not generically, maybe. In the PAPR
The PAPR platform which describes an OS environment that's presented by
a combination of a hypervisor and firmware. The features it specifies
require collaboration between the firmware and the hypervisor.
Since the beginning, the runtime component of the firmware (RTAS) has
been implemented as a
On 3/10/21 10:15 PM, Mahmoud Mandour wrote:
Removed a qemu_mutex_lock() and its respective qemu_mutex_unlock()
and used QEMU_LOCK_GUARD instead. This simplifies the code by
eliminiating gotos and removing the qemu_mutex_unlock() calls.
Signed-off-by: Mahmoud Mandour
---
On 2021/3/18 20:36, Tian, Kevin wrote:
From: Kunkun Jiang
Sent: Thursday, March 18, 2021 8:29 PM
Hi Kevin,
On 2021/3/18 17:04, Tian, Kevin wrote:
From: Kunkun Jiang
Sent: Thursday, March 18, 2021 3:59 PM
Hi Kevin,
On 2021/3/18 14:28, Tian, Kevin wrote:
From: Kunkun Jiang
Sent: Wednesday,
Hii Phil,
A gentle reminder to push these patches.
Thanks,
Niteesh.
On Sat, Mar 13, 2021 at 10:51 PM Niteesh G. S. wrote:
> Reviewed-by: Niteesh G S
>
> On Sat, Mar 13, 2021 at 10:25 PM Philippe Mathieu-Daudé
> wrote:
>
>> From: G S Niteesh Babu
>>
>> Added tracing for gpio read, write,
From: Bin Meng
This adds the documentation to describe what is supported for the
'microchip-icicle-kit' machine, and how to boot the machine in QEMU.
Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Message-id: 20210322075248.136255-2-bmeng...@gmail.com
Signed-off-by: Alistair Francis
From: Bin Meng
Since HSS commit c20a89f8dcac, the Icicle Kit reference design has
been updated to use a register mapped at 0x4f00 instead of a
GPIO to control whether eMMC or SD card is to be used. With this
support the same HSS image can be used for both eMMC and SD card
boot flow, while
From: Bin Meng
Per SST25VF016B datasheet [1], SST flash requires a dummy byte after
the address bytes. Note only SPI mode is supported by SST flashes.
[1] http://ww1.microchip.com/downloads/en/devicedoc/s71271_04.pdf
Signed-off-by: Bin Meng
Acked-by: Alistair Francis
Message-id:
From: Asherah Connor
Provides fw_cfg for the virt machine on riscv. This enables
using e.g. ramfb later.
Signed-off-by: Asherah Connor
Reviewed-by: Bin Meng
Reviewed-by: Alistair Francis
Message-id: 20210318235041.17175-2-a...@kivikakk.ee
Signed-off-by: Alistair Francis
---
From: Georg Kotheimer
Signed-off-by: Georg Kotheimer
Reviewed-by: Alistair Francis
Message-id: 20210311094902.1377593-1-georg.kothei...@kernkonzept.com
Signed-off-by: Alistair Francis
---
target/riscv/csr.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git
From: Georg Kotheimer
The previous implementation was broken in many ways:
- Used mideleg instead of hideleg to mask accesses
- Used MIP_VSSIP instead of VS_MODE_INTERRUPTS to mask writes to vsie
- Did not shift between S bits and VS bits (VSEIP <-> SEIP, ...)
Signed-off-by: Georg Kotheimer
From: Jim Shu
Currently, PMP permission checking of TLB page is bypassed if TLB hits
Fix it by propagating PMP permission to TLB page permission.
PMP permission checking also use MMU-style API to change TLB permission
and size.
Signed-off-by: Jim Shu
Reviewed-by: Alistair Francis
Message-id:
From: Asherah Connor
Allow ramfb on virt. This lets `-device ramfb' work.
Signed-off-by: Asherah Connor
Reviewed-by: Bin Meng
Reviewed-by: Alistair Francis
Message-id: 20210318235041.17175-3-a...@kivikakk.ee
Signed-off-by: Alistair Francis
---
hw/riscv/virt.c | 3 +++
1 file changed, 3
From: Georg Kotheimer
When decode_insn16() fails, we fall back to decode_RV32_64C() for
further compressed instruction decoding. However, prior to this change,
we did not raise an illegal instruction exception, if decode_RV32_64C()
fails to decode the instruction. This means that we skipped
From: Alexander Wagner
Not disabling the UART leads to QEMU overwriting the UART receive buffer with
the newest received byte. The rx_level variable is added to allow the use of
the existing OpenTitan driver libraries.
Signed-off-by: Alexander Wagner
Reviewed-by: Alistair Francis
Message-id:
From: Georg Kotheimer
The current condition for the use of background registers only
considers the hypervisor load and store instructions,
but not accesses from M mode via MSTATUS_MPRV+MPV.
Signed-off-by: Georg Kotheimer
Reviewed-by: Alistair Francis
Message-id:
From: Georg Kotheimer
The current two-stage lookup detection in riscv_cpu_do_interrupt falls
short of its purpose, as all it checks is whether two-stage address
translation either via the hypervisor-load store instructions or the
MPRV feature would be allowed.
What we really need instead is
Add support for configure interrupt, use kvm_irqfd_assign and set the
gsi to kernel. When the configure notifier was eventfd_signal by host
kernel, this will finally inject an msix interrupt to guest
Signed-off-by: Cindy Lu
---
hw/virtio/virtio-pci.c | 171
From: Georg Kotheimer
According to the specification the "field SPVP of hstatus controls the
privilege level of the access" for the hypervisor virtual-machine load
and store instructions HLV, HLVX and HSV.
Signed-off-by: Georg Kotheimer
Reviewed-by: Alistair Francis
Message-id:
From: Jim Shu
Like MMU translation, add qemu log of PMP permission checking for
debugging.
Signed-off-by: Jim Shu
Reviewed-by: Alistair Francis
Message-id: 1613916082-19528-3-git-send-email-cw...@andestech.com
Signed-off-by: Alistair Francis
---
target/riscv/cpu_helper.c | 12
add configure interrupt support for virtio-mmio bus. This
interrupt will working while backend is vhost-vdpa
Signed-off-by: Cindy Lu
---
hw/virtio/virtio-mmio.c | 30 --
1 file changed, 28 insertions(+), 2 deletions(-)
diff --git a/hw/virtio/virtio-mmio.c
From: Jim Shu
If PMP permission of any address has been changed by updating PMP entry,
flush all TLB pages to prevent from getting old permission.
Signed-off-by: Jim Shu
Reviewed-by: Alistair Francis
Message-id: 1613916082-19528-4-git-send-email-cw...@andestech.com
Signed-off-by: Alistair
The following changes since commit c95bd5ff1660883d15ad6e0005e4c8571604f51a:
Merge remote-tracking branch 'remotes/philmd/tags/mips-fixes-20210322' into
staging (2021-03-22 14:26:13 +)
are available in the Git repository at:
g...@github.com:alistair23/qemu.git tags/pull-riscv-to-apply
From: Frank Chang
vs() should return -RISCV_EXCP_ILLEGAL_INST instead of -1 if rvv feature
is not enabled.
If -1 is returned, exception will be raised and cs->exception_index will
be set to the negative return value. The exception will then be treated
as an instruction access fault instead of
Add call back function for configure interrupt.
Set the notifier's fd to the kernel driver when vdpa start.
also set -1 while vdpa stop. then the kernel will release
the related resource
Signed-off-by: Cindy Lu
---
hw/virtio/trace-events| 2 ++
hw/virtio/vhost-vdpa.c|
These code are all tested in vp-vdpa (support configure interrupt)
vdpa_sim (not support configure interrupt)
test in virtio-pci bus and virtio-mmio bus
Change in v2:
Add support fot virtio-mmio bus
active the notifier wihle the backend support configure intterrput
misc fixes form v1
Change in
Add configure notifier support in virtio and related driver
When peer is vhost vdpa, setup the configure interrupt function
vhost_net_start and release the resource when vhost_net_stop
Signed-off-by: Cindy Lu
---
hw/display/vhost-user-gpu.c| 14 +++
hw/net/vhost_net.c |
On 2021/3/23 2:52, Peter Xu wrote:
> On Mon, Mar 22, 2021 at 09:37:19PM +0800, Keqian Zhu wrote:
>>> +/* Should be with all slots_lock held for the address spaces. */
>>> +static void kvm_dirty_ring_mark_page(KVMState *s, uint32_t as_id,
>>> + uint32_t
On Fri, Mar 12, 2021 at 05:07:36PM -0300, Daniel Henrique Barboza wrote:
> Hi,
>
> This series adds 2 new QAPI events, DEVICE_NOT_DELETED and
> DEVICE_UNPLUG_ERROR. They were (and are still being) discussed in [1].
>
> Patches 1 and 3 are independent of the ppc patches and can be applied
>
On Fri, Mar 19, 2021 at 03:34:52PM -0300, Daniel Henrique Barboza wrote:
> Kernel commit 4bce545903fa ("powerpc/topology: Update
> topology_core_cpumask") cause a regression in the pseries machine when
> defining certain SMP topologies [1]. The reasoning behind the change is
> explained in kernel
On Wed, Mar 17, 2021 at 02:17:51AM +0100, BALATON Zoltan wrote:
> The Marvell Discovery II aka. MV64361 is a PowerPC system controller
> chip that is used on the pegasos2 PPC board. This adds emulation of it
> that models the device enough to boot guests on this board. The
> mv643xx.h header with
On Wed, Mar 17, 2021 at 02:17:51AM +0100, BALATON Zoltan wrote:
> Add new machine called pegasos2 emulating the Genesi/bPlan Pegasos II,
> a PowerPC board based on the Marvell MV64361 system controller and the
> VIA VT8231 integrated south bridge/superio chips. It can run Linux,
> AmigaOS and a
On Wed, Mar 17, 2021 at 02:17:51AM +0100, BALATON Zoltan wrote:
> Hello,
>
> This is adding a new PPC board called pegasos2. More info on it can be
> found at:
>
> https://osdn.net/projects/qmiga/wiki/SubprojectPegasos2
>
> Currently it needs a firmware ROM image that I cannot include due to
>
Hi Richard,
On 3/23/21 7:59 AM, Richard Henderson wrote:
On 3/22/21 4:54 AM, Gavin Shan wrote:
It looks this issue can be avoided after "volatile" is applied to
@target_page. However, I'm not sure if it's the correct fix to have.
Certainly not.
That is the exact opposite of what we want.
On Mon, Mar 22, 2021 at 01:48:07PM +0800, Bin Meng wrote:
> Hi David,
>
> On Mon, Mar 22, 2021 at 1:24 PM David Gibson
> wrote:
> >
> > On Mon, Mar 22, 2021 at 12:33:06PM +0800, Bin Meng wrote:
> > > Hi David,
> > >
> > > On Mon, Mar 22, 2021 at 12:11 PM David Gibson
> > > wrote:
> > > >
> > >
On Tue, Mar 16, 2021 at 04:15:05PM +0800, Bin Meng wrote:
> As the comment of tx_padding_and_crc() says: "Never add CRC in QEMU",
> min_frame_len should excluce CRC, so it should be 60 instead of 64.
>
> Signed-off-by: Bin Meng
Applied to ppc-for-6.0, thanks.
> ---
>
>
On Mon, Mar 22, 2021 at 11:05:00AM -0600, Richard Henderson wrote:
> On 3/21/21 10:00 PM, David Gibson wrote:
> > On Mon, Mar 15, 2021 at 12:46:08PM -0600, Richard Henderson wrote:
> > > Perform the test against FSCR_SCV at runtime, in the helper.
> > >
> > > This means we can remove the
On Mon, Mar 22, 2021 at 11:27:49AM -0600, Richard Henderson wrote:
> On 3/21/21 10:26 PM, David Gibson wrote:
> > On Mon, Mar 15, 2021 at 12:46:11PM -0600, Richard Henderson wrote:
> > > We weren't recording MSR_GS in hflags, which means that BookE
> > > memory accesses were essentially random vs
On Mon, Mar 22, 2021 at 10:55:46AM -0600, Richard Henderson wrote:
> On 3/21/21 9:52 PM, David Gibson wrote:
> > > +/*
> > > + * Bits for env->hflags.
> > > + *
> > > + * Most of these bits overlap with corresponding bits in MSR,
> > > + * but some come from other sources. Be cautious when
On Mon, Mar 22, 2021 at 10:55:42PM +0300, Yuri Gribov wrote:
> Hi all,
>
> This patch makes locally used symbols static to enable more compiler
> optimizations on them. Some of the symbols turned out to not be used
> at all so I marked them with ATTRIBUTE_UNUSED (as I wasn't sure if
> they were
On Mon, Mar 22, 2021 at 10:53:01AM -0600, Richard Henderson wrote:
> On 3/16/21 2:15 AM, Cédric Le Goater wrote:
> > On 3/15/21 7:46 PM, Richard Henderson wrote:
> > > Match cpu_post_load in using ppc_store_msr to set all of
> > > the cpu state implied by the value of msr. Do not restore
> > >
Kdy si muzem cinknout k dalsimu vyvoji?
Odesláno z iPhonu
> 22. 3. 2021 v 12:37, Patrik Janoušek :
>
>
>> On 3/22/21 12:18 PM, Vladimir Sementsov-Ogievskiy wrote:
>> 22.03.2021 13:46, Vladimir Sementsov-Ogievskiy wrote:
>>> 22.03.2021 13:18, Patrik Janoušek wrote:
On 3/22/21 9:41 AM,
From: Marian Postevca
The code that sets/gets oem fields is duplicated in both PC and MICROVM
variants. This commit moves it to X86MachineState so that all x86
variants can use it and duplication is removed.
Signed-off-by: Marian Postevca
Message-Id: <20210221001737.24499-2-poste...@mutex.one>
From: David Hildenbrand
Let's also set a maximum size for "etc/acpi/rsdp", so the maximum
size doesn't get implicitly set based on the initial table size. In my
experiments, the table size was in the range of 22 bytes, so a single
page (== what we used until now) seems to be good enough.
Now
From: David Hildenbrand
The resizeable memory region / RAMBlock that is created for the cmd blob
has a maximum size of whole host pages (e.g., 4k), because RAMBlocks
work on full host pages. In addition, in i386 ACPI code:
acpi_align_size(tables->linker->cmd_blob, ACPI_BUILD_ALIGN_SIZE);
makes
From: Igor Mammedov
Implement _DSM according to:
PCI Firmware Specification 3.1
4.6.7. DSM for Naming a PCI or PCI Express Device Under
Operating Systems
and wire it up to cold and hot-plugged PCI devices.
Feature depends on ACPI hotplug being enabled (as that provides
PCI
From: David Hildenbrand
We want to have safety margins for all tables based on the table type.
Let's move the maximum size logic into acpi_add_rom_blob() and make it
dependent on the table name, so we don't have to replicate for each and
every instance that creates such tables.
Suggested-by:
From: Greg Kurz
A deadlock condition potentially exists if a vhost-user process needs
to request something to QEMU on the slave channel while processing a
vhost-user message.
This doesn't seem to affect any vhost-user implementation so far, but
this is currently biting the upcoming enablement
From: Igor Mammedov
it helps to avoid device naming conflicts when guest OS is
configured to use acpi-index for naming.
Spec ialso says so:
PCI Firmware Specification Revision 3.2
4.6.7. _DSM for Naming a PCI or PCI Express Device Under Operating Systems
"
Instance number must be unique under
From: Greg Kurz
Signed-off-by: Greg Kurz
Message-Id: <20210312092212.782255-4-gr...@kaod.org>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Reviewed-by: Stefan Hajnoczi
---
hw/virtio/vhost-user.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
From: Wang Liang
ret in virtio_pmem_resp is a uint32_t variable, which should be assigned
using virtio_stl_p.
The kernel side driver does not guarantee virtio_pmem_resp to be initialized
to zero in advance, So sometimes the flush operation will fail.
Signed-off-by: Wang Liang
Message-Id:
From: Igor Mammedov
expected changes are:
* larger BNMR operation region
* new PIDX field and method to fetch acpi-index
* PDSM method that implements PCI device _DSM +
per device _DSM that calls PDSM
@@ -221,10 +221,11 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC",
0x0001)
From: Greg Kurz
slave_read() checks EAGAIN when reading or writing to the socket
fails. This gives the impression that the slave channel is in
non-blocking mode, which is certainly not the case with the current
code base. And the rest of the code isn't actually ready to cope
with non-blocking
From: Greg Kurz
Now that everything is in place, have the nested event loop to monitor
the slave channel. The source in the main event loop is destroyed and
recreated to ensure any pending even for the slave channel that was
previously detected is purged. This guarantees that the main loop
wont
From: Igor Mammedov
it will be used by follow up patches
Signed-off-by: Igor Mammedov
Message-Id: <20210315180102.3008391-5-imamm...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/acpi/aml-build.h | 3 +++
hw/acpi/aml-build.c | 28
From: Igor Mammedov
Signed-off-by: Igor Mammedov
Message-Id: <20210315180102.3008391-2-imamm...@redhat.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/qtest/bios-tables-test-allowed-diff.h | 11 +++
1 file changed, 11 insertions(+)
diff --git
From: Laurent Vivier
Both functions don't check the personality of the interface (legacy or
modern) before accessing the configuration memory and always use
virtio_config_readX()/virtio_config_writeX().
With this patch, they now check the personality and in legacy mode
call
From: Greg Kurz
The slave channel is implemented with socketpair() : QEMU creates
the pair, passes one of the socket to virtiofsd and monitors the
other one with the main event loop using qemu_set_fd_handler().
In order to fix a potential deadlock between QEMU and a vhost-user
external process
From: Igor Mammedov
In x86/ACPI world, linux distros are using predictable
network interface naming since systemd v197. Which on
QEMU based VMs results into path based naming scheme,
that names network interfaces based on PCI topology.
With itm on has to plug NIC in exactly the same bus/slot,
From: Greg Kurz
Some message types, e.g. VHOST_USER_SLAVE_VRING_HOST_NOTIFIER_MSG,
can convey file descriptors. These must be closed before returning
from slave_read() to avoid being leaked. This can currently be done
in two different places:
[1] just after the request has been processed
[2]
Changes from v1:
dropped an acpi patch causing regressions reported by clang
The following changes since commit f0f20022a0c744930935fdb7020a8c18347d391a:
Merge remote-tracking branch
'remotes/thuth-gitlab/tags/pull-request-2021-03-21' into staging (2021-03-22
10:05:45 +)
are
On Wed, Mar 17, 2021 at 02:49:31PM -0700, isaku.yamah...@gmail.com wrote:
> From: Isaku Yamahata
>
> Commit 6be8cf56bc8b made sure that SCI is enabled in PM1.CNT
> on reset in acpi_only mode by modifying acpi_pm1_cnt_reset() and
> that worked for q35 as expected.
>
> The function was introduced
On Mon, Mar 22, 2021 at 06:46:06PM +, Peter Maydell wrote:
> On Mon, 22 Mar 2021 at 16:41, Peter Maydell wrote:
> >
> > On Mon, 22 Mar 2021 at 15:44, Michael S. Tsirkin wrote:
> > >
> > > The following changes since commit
> > > f0f20022a0c744930935fdb7020a8c18347d391a:
> > >
> > > Merge
On Mon, Mar 22, 2021 at 04:41:01PM +, Peter Maydell wrote:
> On Mon, 22 Mar 2021 at 15:44, Michael S. Tsirkin wrote:
> >
> > The following changes since commit f0f20022a0c744930935fdb7020a8c18347d391a:
> >
> > Merge remote-tracking branch
> >
I'm mostly happy with this. My biggest overall comment is that I think
this should be split into two, as your refactor using different event
handlers for init is a standalone improvement over and above the bugfix.
I would have the first commit split out vhost_user_blk_event_init() and
On Mon, Mar 22, 2021 at 11:55:54PM +0200, Marian Postevca wrote:
> Introduces structure AcpiBuildOem to hold the value of OEM fields and
> uses dedicated macros to initialize/set the values.
> Unnecessary dynamically allocated OEM fields are re-factored to static
> allocation.
>
> Signed-off-by:
On Mon, Mar 22, 2021 at 08:13:36PM +, Peter Maydell wrote:
> Currently the gpex PCI controller implements no special behaviour for
> guest accesses to areas of the PIO and MMIO where it has not mapped
> any PCI devices, which means that for Arm you end up with a CPU
> exception due to a data
On 3/17/21 3:00 AM, Olaf Hering wrote:
Commit ee358e919e385fdc79d59d0d47b4a81e349cd5c9 causes a regression in
Xen HVM domUs which run xenlinux based kernels.
If the domU has an USB device assigned, for example with
"usbdevice=['tablet']" in domU.cfg, the late unplug of devices will
kill the
On 3/22/21 6:16 AM, Georg Kotheimer wrote:
When decode_insn16() fails, we fall back to decode_RV32_64C() for
further compressed instruction decoding. However, prior to this change,
we did not raise an illegal instruction exception, if decode_RV32_64C()
fails to decode the instruction. This means
This patch consolidates ACPI OEM fields handling
by:
- Moving common code in PC and MICROVM to X86.
- Changes unnecessary dynamic memory allocation to static allocation
- Uses dedicated structure to keep values of fields instead of two
separate strings
- Adds helper macros to initialize the
Introduces structure AcpiBuildOem to hold the value of OEM fields and
uses dedicated macros to initialize/set the values.
Unnecessary dynamically allocated OEM fields are re-factored to static
allocation.
Signed-off-by: Marian Postevca
---
hw/acpi/hmat.h | 2 +-
On 3/22/21 7:00 AM, Paolo Bonzini wrote:
On 22/03/21 12:24, Philippe Mathieu-Daudé wrote:
Hi,
While reviewing Richard's original patch, I split it in 3
to make it more digestible to my review taste. I then simply
filled the patch descriptions. Feel free to keep Richard's v1
if this isn't worth
On 3/22/21 1:06 PM, Max Reitz wrote:
> On 22.03.21 12:27, Patrik Janoušek wrote:
>> On 3/22/21 11:48 AM, Max Reitz wrote:
>>> Hi,
>>>
>>> On 20.03.21 11:01, Patrik Janoušek wrote:
I'm sorry, but I forgot to add you to the cc, so I'm forwarding the
patch to you additionally. I don't want
On 3/22/21 5:14 AM, Philippe Mathieu-Daudé wrote:
configure| 19 ---
meson.build | 18 ++-
include/exec/cpu-all.h | 15 ++
include/exec/page-vary.h | 34
exec-vary.c | 108 ---
6On Mon, Mar 22, 2021 at 9:13 PM Peter Maydell wrote:
>
> Currently the gpex PCI controller implements no special behaviour for
> guest accesses to areas of the PIO and MMIO where it has not mapped
> any PCI devices, which means that for Arm you end up with a CPU
> exception due to a data abort.
On Mon, Mar 22, 2021 at 12:55 PM Yuri Gribov wrote:
>
> Hi all,
>
> This patch makes locally used symbols static to enable more compiler
> optimizations on them. Some of the symbols turned out to not be used
> at all so I marked them with ATTRIBUTE_UNUSED (as I wasn't sure if
> they were ok to
On 3/22/21 4:59 AM, Robert Hoo wrote:
Since commit fa4518741e (target-i386: Rename struct XMMReg to ZMMReg),
CPUX86State.xmm_regs[] has already been extended to 512bit to support
AVX512.
Also, other qemu level supports for AVX512 registers are there for
years.
But in x86_cpu_dump_state(), still
On 3/22/21 4:54 AM, Gavin Shan wrote:
It looks this issue can be avoided after "volatile" is applied to
@target_page. However, I'm not sure if it's the correct fix to have.
Certainly not.
That is the exact opposite of what we want. We want to minimize the number of
reads from the variable,
On Mon, Mar 22, 2021 at 3:53 AM Bin Meng wrote:
>
> From: Bin Meng
>
> This adds the documentation to describe what is supported for the
> 'microchip-icicle-kit' machine, and how to boot the machine in QEMU.
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
> ---
>
>
On Fri, Mar 19, 2021 at 05:52:47PM +0300, Andrey Gruzdev wrote:
> Added missing qemu_fflush() on buffer file holding precopy device state.
> Increased initial QIOChannelBuffer allocation to 512KB to avoid reallocs.
> Typical configurations often require >200KB for device state and VMDESC.
>
>
On Mon, Mar 22, 2021 at 11:00:52AM +, Stefan Hajnoczi wrote:
> On Wed, Mar 17, 2021 at 08:32:31PM +0800, Jiachen Zhang wrote:
> > On Wed, Mar 17, 2021 at 6:05 PM Stefan Hajnoczi wrote:
> > > On Fri, Dec 18, 2020 at 05:39:34PM +0800, Jiachen Zhang wrote:
> > I agreed with you that a virtiofsd
Currently the gpex PCI controller implements no special behaviour for
guest accesses to areas of the PIO and MMIO where it has not mapped
any PCI devices, which means that for Arm you end up with a CPU
exception due to a data abort.
Most host OSes expect "like an x86 PC" behaviour, where bad
Hi all,
This patch makes locally used symbols static to enable more compiler
optimizations on them. Some of the symbols turned out to not be used
at all so I marked them with ATTRIBUTE_UNUSED (as I wasn't sure if
they were ok to delete).
The symbols have been identified with a pet project of
Hi
On Mon, Mar 22, 2021 at 10:23 PM John Snow wrote:
> On 3/22/21 12:36 PM, Peter Maydell wrote:
> > On Mon, 22 Mar 2021 at 16:03, wrote:
> >>
> >> From: Marc-André Lureau
> >>
> >> Now that we merged into one doc, it makes the nav looks nicer.
> >>
> >> Signed-off-by: Marc-André Lureau
> >>
On Mon, Mar 22, 2021 at 10:02:38PM +0800, Keqian Zhu wrote:
> Hi Peter,
Hi, Keqian,
[...]
> You emphasize that dirty ring is a "Thread-local buffers", but dirty bitmap
> is global,
> but I don't see it has optimization about "locking" compared to dirty bitmap.
>
> The thread-local means that
This should be fixed in head-of-git by commit 8eb13bbbac08a, which will
be in QEMU 6.0. (The underlying bug is that when the GTK front-end tries
to send sequences of more than one byte to a UART, it didn't account for
UARTs which don't have a FIFO capable of holding the whole sequence at
once.)
Alex Bennée writes:
> In d0f26e68a0 ("gitlab: force enable docs build in Fedora, Ubuntu,
> Debian") we made sure we can build the documents on more than one
> system. However we don't want to build documents all the time as it's
> a waste of cycles (and energy). So lets reduce the total amount
1 - 100 of 478 matches
Mail list logo