Re: [RFC PATCH v3 15/27] hw/loongarch: Add support loongson3-ls7a machine type.

2021-12-05 Thread yangxiaojuan
Hi, Huacai On 12/06/2021 12:36 PM, chen huacai wrote: > Hi, Xiaojuan, > > On Sat, Dec 4, 2021 at 8:11 PM Xiaojuan Yang wrote: >> >> Emulate a 3A5000 board use the new loongarch instruction. >> 3A5000 belongs to the Loongson3 series processors. >> The board consists of a 3A5000 cpu model and the

Re: [RFC PATCH v3 22/27] hw/loongarch: Add some devices support for 3A5000.

2021-12-05 Thread yangxiaojuan
Hi, On 12/05/2021 01:54 AM, Philippe Mathieu-Daudé wrote: > On 12/4/21 13:07, Xiaojuan Yang wrote: >> 1.Add uart,virtio-net,vga and usb for 3A5000. >> 2.Add irq set and map for the pci host. Non pci device >> use irq 0-16, pci device use 16-64. >> 3.Add some unimplented device to emulate guest

Re: [PATCH 1/2] intel_iommu: Support IR-only mode without DMA translation

2021-12-05 Thread Jason Wang
On Fri, Dec 3, 2021 at 8:14 PM Peter Xu wrote: > > On Fri, Dec 03, 2021 at 10:46:46AM +, David Woodhouse wrote: > > On Fri, 2021-12-03 at 15:38 +0800, Peter Xu wrote: > > > On Thu, Dec 02, 2021 at 11:49:25AM +0800, Jason Wang wrote: > > > > On Thu, Dec 2, 2021 at 4:55 AM David Woodhouse > >

Re: [RFC PATCH v3 05/27] target/loongarch: Add stabletimer support

2021-12-05 Thread chen huacai
Hi, Xiaojuan, Maybe it is better to use "constant timer" instead of "stable timer", which is more "native" in English. Huacai On Sat, Dec 4, 2021 at 8:11 PM Xiaojuan Yang wrote: > > Signed-off-by: Xiaojuan Yang > Signed-off-by: Song Gao > --- > target/loongarch/cpu.c | 9 + >

Re: [RFC PATCH v3 15/27] hw/loongarch: Add support loongson3-ls7a machine type.

2021-12-05 Thread chen huacai
Hi, Xiaojuan, On Sat, Dec 4, 2021 at 8:11 PM Xiaojuan Yang wrote: > > Emulate a 3A5000 board use the new loongarch instruction. > 3A5000 belongs to the Loongson3 series processors. > The board consists of a 3A5000 cpu model and the 7A1000 > bridge. The host 3A5000 board is really complicated and

Re: [PATCH v13 02/26] target/loongarch: Add core definition

2021-12-05 Thread gaosong
HI, On 2021/12/5 上午1:26, Philippe Mathieu-Daudé wrote: + +env->fcsr0_mask = 0x1f1f031f; Is this for all CPUs or only the 3A5000? Yes, env->fcsr0_mask = FCSR0_M1 | FCSR0_M2 | FCSR0_M3 = 0x1f1f031f; Thanks Song Gao

[PATCH] hw/avr: Realize AVRCPU qdev object using qdev_realize()

2021-12-05 Thread Philippe Mathieu-Daudé
TYPE_AVR_CPU inherits TYPE_CPU, which itself inherits TYPE_DEVICE. TYPE_DEVICE instances are realized using qdev_realize(), we don't need to access QOM internal values. Signed-off-by: Philippe Mathieu-Daudé --- hw/avr/atmega.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH] fuzz: pass failures from child process into libfuzzer engine

2021-12-05 Thread Konstantin Khlebnikov
Fuzzer is supposed to stop when first bug is found and report failure. Present fuzzers fork new child at each iteration to isolate side-effects. But child's exit code is ignored, i.e. libfuzzer does not see any crashes. Right now virtio-net fuzzer instantly falls on assert in iov_copy and dumps

Re: [PATCH 1/2] hw/mips: bootloader: Fix write_ulong

2021-12-05 Thread Jiaxun Yang
在2021年12月2日十二月 下午6:01,Philippe Mathieu-Daudé写道: > On 12/2/21 11:51, Jiaxun Yang wrote: >> 在2021年11月30日十一月 下午9:52,Philippe Mathieu-Daudé写道: >>> On 11/30/21 22:17, Jiaxun Yang wrote: bl_gen_write_ulong uses sd for both 32 and 64 bit CPU, while sd is illegal on 32 bit CPUs.