Re: [PATCH v11 3/7] migration: Add zero-copy-send parameter for QMP/HMP for Linux
Leonardo Bras writes:
> Add property that allows zero-copy migration of memory pages
> on the sending side, and also includes a helper function
> migrate_use_zero_copy_send() to check if it's enabled.
>
> No code is introduced to actually do the migration, but it allow
> future implementations to enable/disable this feature.
>
> On non-Linux builds this parameter is compiled-out.
>
> Signed-off-by: Leonardo Bras
> Reviewed-by: Peter Xu
> Reviewed-by: Daniel P. Berrangé
> Reviewed-by: Juan Quintela
> Acked-by: Markus Armbruster
> ---
> qapi/migration.json | 24
> migration/migration.h | 5 +
> migration/migration.c | 32
> migration/socket.c| 11 +--
> monitor/hmp-cmds.c| 6 ++
> 5 files changed, 76 insertions(+), 2 deletions(-)
>
> diff --git a/qapi/migration.json b/qapi/migration.json
> index 409eb086a2..04246481ce 100644
> --- a/qapi/migration.json
> +++ b/qapi/migration.json
> @@ -741,6 +741,13 @@
> # will consume more CPU.
> # Defaults to 1. (Since 5.0)
> #
> +# @zero-copy-send: Controls behavior on sending memory pages on migration.
> +# When true, enables a zero-copy mechanism for sending
> memory
> +# pages, if host supports it.
> +# Requires that QEMU be permitted to use locked memory for
> guest
Please wrap lines around column 75. More of the same below.
> +# RAM pages.
> +# Defaults to false. (Since 7.1)
> +#
> # @block-bitmap-mapping: Maps block nodes and bitmaps on them to
> #aliases for the purpose of dirty bitmap migration.
> Such
> #aliases may for example be the corresponding names
> on the
> @@ -780,6 +787,7 @@
> 'xbzrle-cache-size', 'max-postcopy-bandwidth',
> 'max-cpu-throttle', 'multifd-compression',
> 'multifd-zlib-level' ,'multifd-zstd-level',
> + { 'name': 'zero-copy-send', 'if' : 'CONFIG_LINUX'},
> 'block-bitmap-mapping' ] }
>
> ##
> @@ -906,6 +914,13 @@
> # will consume more CPU.
> # Defaults to 1. (Since 5.0)
> #
> +# @zero-copy-send: Controls behavior on sending memory pages on migration.
> +# When true, enables a zero-copy mechanism for sending
> memory
> +# pages, if host supports it.
> +# Requires that QEMU be permitted to use locked memory for
> guest
> +# RAM pages.
> +# Defaults to false. (Since 7.1)
> +#
> # @block-bitmap-mapping: Maps block nodes and bitmaps on them to
> #aliases for the purpose of dirty bitmap migration.
> Such
> #aliases may for example be the corresponding names
> on the
> @@ -960,6 +975,7 @@
> '*multifd-compression': 'MultiFDCompression',
> '*multifd-zlib-level': 'uint8',
> '*multifd-zstd-level': 'uint8',
> +'*zero-copy-send': { 'type': 'bool', 'if': 'CONFIG_LINUX' },
> '*block-bitmap-mapping': [ 'BitmapMigrationNodeAlias' ] } }
>
> ##
> @@ -1106,6 +1122,13 @@
> # will consume more CPU.
> # Defaults to 1. (Since 5.0)
> #
> +# @zero-copy-send: Controls behavior on sending memory pages on migration.
> +# When true, enables a zero-copy mechanism for sending
> memory
> +# pages, if host supports it.
> +# Requires that QEMU be permitted to use locked memory for
> guest
> +# RAM pages.
> +# Defaults to false. (Since 7.1)
> +#
> # @block-bitmap-mapping: Maps block nodes and bitmaps on them to
> #aliases for the purpose of dirty bitmap migration.
> Such
> #aliases may for example be the corresponding names
> on the
> @@ -1158,6 +1181,7 @@
> '*multifd-compression': 'MultiFDCompression',
> '*multifd-zlib-level': 'uint8',
> '*multifd-zstd-level': 'uint8',
> +'*zero-copy-send': { 'type': 'bool', 'if': 'CONFIG_LINUX' },
> '*block-bitmap-mapping': [ 'BitmapMigrationNodeAlias' ] } }
>
> ##
[...]
Re: [PATCH v9 07/17] vfio-user: define vfio-user-server object
Jag Raman writes:
>> On May 4, 2022, at 7:45 AM, Markus Armbruster wrote:
>>
>> Jagannathan Raman writes:
>>
>>> Define vfio-user object which is remote process server for QEMU. Setup
>>> object initialization functions and properties necessary to instantiate
>>> the object
>>>
>>> Signed-off-by: Elena Ufimtseva
>>> Signed-off-by: John G Johnson
>>> Signed-off-by: Jagannathan Raman
>>> ---
>>> qapi/qom.json | 20 +++-
>>> include/hw/remote/machine.h | 2 +
>>> hw/remote/machine.c | 27 +
>>> hw/remote/vfio-user-obj.c | 210
>>> MAINTAINERS | 1 +
>>> hw/remote/meson.build | 1 +
>>> hw/remote/trace-events | 3 +
>>> 7 files changed, 262 insertions(+), 2 deletions(-)
>>> create mode 100644 hw/remote/vfio-user-obj.c
>>>
>>> diff --git a/qapi/qom.json b/qapi/qom.json
>>> index eeb5395ff3..582def0522 100644
>>> --- a/qapi/qom.json
>>> +++ b/qapi/qom.json
>>> @@ -703,6 +703,20 @@
>>> { 'struct': 'RemoteObjectProperties',
>>> 'data': { 'fd': 'str', 'devid': 'str' } }
>>>
>>> +##
>>> +# @VfioUserServerProperties:
>>> +#
>>> +# Properties for x-vfio-user-server objects.
>>> +#
>>> +# @socket: socket to be used by the libvfio-user library
>>> +#
>>> +# @device: the id of the device to be emulated at the server
>>
>> Suggest "the ID", because "id" is not a word.
>>
>> What kind of ID is this? The kind set with -device id=...?
>
> Yes, it’s the “id” sub-option of the “-device” option. Will update this
> comment.
I was just double-checking. I think the comment is okay with "the ID".
> Thank you!
You're welcome!
Re: [PATCH qemu] spapr: Use address from elf parser for kernel address
On 5/5/22 14:16, Joel Stanley wrote:
On Thu, 5 May 2022 at 03:31, Alexey Kardashevskiy wrote:
On 5/5/22 05:16, Fabiano Rosas wrote:
Alexey Kardashevskiy writes:
tl;dr: This allows Big Endian zImage booting via -kernel + x-vof=on.
QEMU loads the kernel at 0x40 by default which works most of
the time as Linux kernels are relocatable, 64bit and compiled with "-pie"
(position independent code). This works for a little endian zImage too.
However a big endian zImage is compiled without -pie, is 32bit, linked to
0x400 so current QEMU ends up loading it at
0x440 but keeps spapr->kernel_addr unchanged so booting fails.
This uses the kernel address returned from load_elf().
If the default kernel_addr is used, there is no change in behavior (as
translate_kernel_address() takes care of this), which is:
LE/BE vmlinux and LE zImage boot, BE zImage does not.
If the VM created with "-machine kernel-addr=0,x-vof=on", then QEMU
prints a warning and BE zImage boots.
I think we can fix this without needing a different command line for BE
zImage (apart from x-vof, which is a separate matter).
If you look at translate_kernel_address, it cannot really work when the
ELF PhysAddr is != 0. We would always hit this sort of 0x440 issue,
so if we fix that function like this...
static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
{
SpaprMachineState *spapr = opaque;
return addr ? addr : spapr->kernel_addr;
}
The qemu elf loader is supposed to handle relocations which should be
calling this hook more than once, now I wonder why it is not doing so.
...then we could always use the ELF PhysAddr if it is different from 0
and only use the default load addr if the ELF PhysAddr is 0. If the user
gives kernel_addr on the cmdline, we honor that, even if puts the kernel
over the firmware (we have code to detect that).
ELF address is 0 for LE zImage only, vmlinux BE/LE uses
0xc000. And we are already chopping all these tops bits off
in translate_kernel_address() and I do not really know why _exactly_ it
is 0x0fff and not let's say 0x7fff.
@@ -2988,6 +2990,12 @@ static void spapr_machine_init(MachineState *machine)
exit(1);
}
+if (spapr->kernel_addr != loaded_addr) {
This could be:
if (spapr->kernel_addr == KERNEL_LOAD_ADDR &&
spapr->kernel_addr != loaded_addr) {
So the precedence would be:
1- ELF PhysAddr, if != 0. After all, that is what it's for. BE zImage
falls here;
2- KERNEL_LOAD_ADDR. Via translate_kernel_address, LE/BE vmlinux fall
here;
3- kernel_addr. The user is probably hacking something, just use what
they gave us. QEMU will yell if they load the kernel over the fw.
imho too complicated.
What if the user runs QEMU with kernel-addr=0x40? (0x40 is
KERNEL_LOAD_ADDR nw but not necessarily forever). Is it 2) or 3)?
I am basically fixing a bug when we ignore where load_elf() loaded the
ELF and just assume it is KERNEL_LOAD_ADDR. Now the code checks if the
ELF was loaded where we want it to be. Everything else can be done but
on top of this.
It would be good to fix this so we don't need to specify kernel-addr=0.
This means the pseries code in QEMU needs to read the ELF header and
figure out if it is position independent and what is the base address.
And because it is Linux which is special, just reading the ELF header is
not enough, need more heuristics (there is some already in
translate_kernel_address()).
LE vmlinux is 64bit EXEC type and entry=0xc000
BE vmlinux is 64bit EXEC type and entry=0xc000
LE zImage is 64bit DYN type and entry=0x0
BE zImage is 32bit EXEC type and entry=0x400
And the default address for these in QEMU is 0x40. Asking
kernel-addr=0 and vof=on looks like a small evil :)
And also worth mentioning that with this hack it should be possible to
boot grub.elf via -kernel which might be interesting for debugging, and
that thing is linked to 0x20 or so, and probably also 32bit BE (I do
not have one handy).
I only recently learnt the pseries machine doesn't support loading the zImage:
https://github.com/linuxppc/issues/issues/402
So whatever the fix is, writing down what is expected to work and what
isn't would be useful.
I tested your patch and it worked with this command line:
qemu-system-ppc64 -M pseries,kernel-addr=0,x-vof=on -nographic
-kernel arch/powerpc/boot/zImage.pseries -serial mon:stdio -nodefaults
Tested-by: Joel Stanley
Cool thanks!
Cheers,
Joel
+warn_report("spapr: kernel_addr changed from 0x%lx to 0x%lx",
+spapr->kernel_addr, loaded_addr);
+spapr->kernel_addr = loaded_addr;
+}
+
/* load initrd */
if (initrd_filename) {
/* Try to locate the initrd in the gap between the kernel
Re: [PATCH v11 2/7] QIOChannelSocket: Implement io_writev zero copy flag & io_flush for CONFIG_LINUX
On Wed, May 4, 2022 at 4:53 PM Peter Xu wrote: > > On Wed, May 04, 2022 at 04:18:31PM -0300, Leonardo Bras wrote: > > +/* > > + * Zero-copy defines bellow are included to avoid breaking builds on > > systems > > + * that don't support MSG_ZEROCOPY, while keeping the functions more > > readable > > + * (without a lot of ifdefs). > > + */ > > +#ifndef MSG_ZEROCOPY > > +#define MSG_ZEROCOPY 0x400 > > +#endif > > +#ifndef SO_ZEROCOPY > > +#define SO_ZEROCOPY 60 > > +#endif > > So this will define these two values on e.g. FreeBSD, while they do not > make sense at all there because these numbers are pure magics and > meaningless outside Linux.. Correct. But since only in Linux it's possible to set the QIO_CHANNEL_WRITE_FLAG_ZERO_COPY flag, sflags will always be zero and it would never try using MSG_ZEROCOPY outside Linux. > I don't think it's anything dangerous, but IMHO it's another way of being > not clean comparing of using some "#ifdef"s. Comparing to this approach > the "use #ifdef" approach is actually slightly more cleaner to me. :) > This requires: - Creating a define such as 'QEMU_MSG_ZEROCOPY', that needs to include to get some flags: #define QEMU_MSG_ZEROCOPY defined(CONFIG_LINUX) && defined(MSG_ZEROCOPY) && defined(SO_ZEROCOPY) - Making it available for all code in this patchset that does "ifdef CONFIG_LINUX' (migration/migration.c/h, qapi/migration.json, monitor/hmp-cmds.c, io/channel-socket.c) - Replace current usage of CONFIG_LINUX in this patchset for QEMU_MSG_ZEROCOPY - Change qio_channel_socket_writev() so the current 2 usages of MSG_ZEROCOPY are surrounded by ifdef QEMU_MSG_ZEROCOPY. Pros of above approach (1): - Smaller binary: The whole MSG_ZEROCOPY code is compiled out if the building system does not support it. - Since it's compiled out, there is a couple lines of less code running if the building system does not support it - It's not even possible to set this option in MigrationSetParams, which will return an error. Pros of current approach (2): - Define is local to file (I am not sure if it's ok to create a 'global' define for above approach, including bits) - A build system that does not support MSG_ZEROCOPY can produce a binary that can use MSG_ZEROCOPY if the target system supports it. - There are no #ifdefs on qio_channel_socket_writev() (2) is already implemented in v11, but I have no issue implementing (1) for v12 if it's ok to create this 'global' define. > Let's wait for some other inputs. Agree. Having the pros of each approach clear, I would like some input on what is better for the project. Best regards, Leo
Re: [PATCH qemu] spapr: Use address from elf parser for kernel address
On Thu, 5 May 2022 at 03:31, Alexey Kardashevskiy wrote:
>
>
>
> On 5/5/22 05:16, Fabiano Rosas wrote:
> > Alexey Kardashevskiy writes:
> >
> >> tl;dr: This allows Big Endian zImage booting via -kernel + x-vof=on.
> >>
> >> QEMU loads the kernel at 0x40 by default which works most of
> >> the time as Linux kernels are relocatable, 64bit and compiled with "-pie"
> >> (position independent code). This works for a little endian zImage too.
> >>
> >> However a big endian zImage is compiled without -pie, is 32bit, linked to
> >> 0x400 so current QEMU ends up loading it at
> >> 0x440 but keeps spapr->kernel_addr unchanged so booting fails.
> >>
> >> This uses the kernel address returned from load_elf().
> >> If the default kernel_addr is used, there is no change in behavior (as
> >> translate_kernel_address() takes care of this), which is:
> >> LE/BE vmlinux and LE zImage boot, BE zImage does not.
> >> If the VM created with "-machine kernel-addr=0,x-vof=on", then QEMU
> >> prints a warning and BE zImage boots.
> >
> > I think we can fix this without needing a different command line for BE
> > zImage (apart from x-vof, which is a separate matter).
> >
> > If you look at translate_kernel_address, it cannot really work when the
> > ELF PhysAddr is != 0. We would always hit this sort of 0x440 issue,
> > so if we fix that function like this...
> >
> > static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
> > {
> > SpaprMachineState *spapr = opaque;
> >
> > return addr ? addr : spapr->kernel_addr;
> > }
>
>
> The qemu elf loader is supposed to handle relocations which should be
> calling this hook more than once, now I wonder why it is not doing so.
>
>
> > ...then we could always use the ELF PhysAddr if it is different from 0
> > and only use the default load addr if the ELF PhysAddr is 0. If the user
> > gives kernel_addr on the cmdline, we honor that, even if puts the kernel
> > over the firmware (we have code to detect that).
>
>
> ELF address is 0 for LE zImage only, vmlinux BE/LE uses
> 0xc000. And we are already chopping all these tops bits off
> in translate_kernel_address() and I do not really know why _exactly_ it
> is 0x0fff and not let's say 0x7fff.
>
>
> >
> >> @@ -2988,6 +2990,12 @@ static void spapr_machine_init(MachineState
> >> *machine)
> >> exit(1);
> >> }
> >>
> >> +if (spapr->kernel_addr != loaded_addr) {
> >
> > This could be:
> >
> > if (spapr->kernel_addr == KERNEL_LOAD_ADDR &&
> > spapr->kernel_addr != loaded_addr) {
> >
> > So the precedence would be:
> >
> > 1- ELF PhysAddr, if != 0. After all, that is what it's for. BE zImage
> > falls here;
> >
> > 2- KERNEL_LOAD_ADDR. Via translate_kernel_address, LE/BE vmlinux fall
> > here;
> >
> > 3- kernel_addr. The user is probably hacking something, just use what
> > they gave us. QEMU will yell if they load the kernel over the fw.
>
>
> imho too complicated.
>
> What if the user runs QEMU with kernel-addr=0x40? (0x40 is
> KERNEL_LOAD_ADDR nw but not necessarily forever). Is it 2) or 3)?
>
> I am basically fixing a bug when we ignore where load_elf() loaded the
> ELF and just assume it is KERNEL_LOAD_ADDR. Now the code checks if the
> ELF was loaded where we want it to be. Everything else can be done but
> on top of this.
It would be good to fix this so we don't need to specify kernel-addr=0.
I only recently learnt the pseries machine doesn't support loading the zImage:
https://github.com/linuxppc/issues/issues/402
So whatever the fix is, writing down what is expected to work and what
isn't would be useful.
I tested your patch and it worked with this command line:
qemu-system-ppc64 -M pseries,kernel-addr=0,x-vof=on -nographic
-kernel arch/powerpc/boot/zImage.pseries -serial mon:stdio -nodefaults
Tested-by: Joel Stanley
Cheers,
Joel
>
>
> >> +warn_report("spapr: kernel_addr changed from 0x%lx to 0x%lx",
> >> +spapr->kernel_addr, loaded_addr);
> >> +spapr->kernel_addr = loaded_addr;
> >> +}
> >> +
> >> /* load initrd */
> >> if (initrd_filename) {
> >> /* Try to locate the initrd in the gap between the kernel
>
Re: [PATCH qemu] spapr: Use address from elf parser for kernel address
On 5/5/22 05:16, Fabiano Rosas wrote:
Alexey Kardashevskiy writes:
tl;dr: This allows Big Endian zImage booting via -kernel + x-vof=on.
QEMU loads the kernel at 0x40 by default which works most of
the time as Linux kernels are relocatable, 64bit and compiled with "-pie"
(position independent code). This works for a little endian zImage too.
However a big endian zImage is compiled without -pie, is 32bit, linked to
0x400 so current QEMU ends up loading it at
0x440 but keeps spapr->kernel_addr unchanged so booting fails.
This uses the kernel address returned from load_elf().
If the default kernel_addr is used, there is no change in behavior (as
translate_kernel_address() takes care of this), which is:
LE/BE vmlinux and LE zImage boot, BE zImage does not.
If the VM created with "-machine kernel-addr=0,x-vof=on", then QEMU
prints a warning and BE zImage boots.
I think we can fix this without needing a different command line for BE
zImage (apart from x-vof, which is a separate matter).
If you look at translate_kernel_address, it cannot really work when the
ELF PhysAddr is != 0. We would always hit this sort of 0x440 issue,
so if we fix that function like this...
static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
{
SpaprMachineState *spapr = opaque;
return addr ? addr : spapr->kernel_addr;
}
The qemu elf loader is supposed to handle relocations which should be
calling this hook more than once, now I wonder why it is not doing so.
...then we could always use the ELF PhysAddr if it is different from 0
and only use the default load addr if the ELF PhysAddr is 0. If the user
gives kernel_addr on the cmdline, we honor that, even if puts the kernel
over the firmware (we have code to detect that).
ELF address is 0 for LE zImage only, vmlinux BE/LE uses
0xc000. And we are already chopping all these tops bits off
in translate_kernel_address() and I do not really know why _exactly_ it
is 0x0fff and not let's say 0x7fff.
@@ -2988,6 +2990,12 @@ static void spapr_machine_init(MachineState *machine)
exit(1);
}
+if (spapr->kernel_addr != loaded_addr) {
This could be:
if (spapr->kernel_addr == KERNEL_LOAD_ADDR &&
spapr->kernel_addr != loaded_addr) {
So the precedence would be:
1- ELF PhysAddr, if != 0. After all, that is what it's for. BE zImage
falls here;
2- KERNEL_LOAD_ADDR. Via translate_kernel_address, LE/BE vmlinux fall
here;
3- kernel_addr. The user is probably hacking something, just use what
they gave us. QEMU will yell if they load the kernel over the fw.
imho too complicated.
What if the user runs QEMU with kernel-addr=0x40? (0x40 is
KERNEL_LOAD_ADDR nw but not necessarily forever). Is it 2) or 3)?
I am basically fixing a bug when we ignore where load_elf() loaded the
ELF and just assume it is KERNEL_LOAD_ADDR. Now the code checks if the
ELF was loaded where we want it to be. Everything else can be done but
on top of this.
+warn_report("spapr: kernel_addr changed from 0x%lx to 0x%lx",
+spapr->kernel_addr, loaded_addr);
+spapr->kernel_addr = loaded_addr;
+}
+
/* load initrd */
if (initrd_filename) {
/* Try to locate the initrd in the gap between the kernel
[PATCH] target/arm: fix s2mmu input size check
From: Keisuke Iida
The maximum IPA size('inputsize') is constrained by the implemented PA size
that is
specified by ID_AA64MMFR0_EL1.PARange. Please reference Arm Architecture
Reference
Manual for A-profile architecture "Supported IPA size" on page D5-4788.
Signed-off-by: Keisuke Iida
---
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 5a244c3ed9..868e7a2c0b 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6,7 +6,7 @@ static bool check_s2_mmu_setup(ARMCPU *cpu, bool
is_aa64, int level,
}
/* Inputsize checks. */
-if (inputsize > outputsize &&
+if (inputsize > arm_pamax(cpu) &&
(arm_el_is_aa64(>env, 1) || inputsize > 40)) {
/* This is CONSTRAINED UNPREDICTABLE and we choose to fault. */
return false;
--
2.34.1
Re: [PATCH 1/2] acpi/nvdimm: Create _LS{I,R,W} method for NVDIMM device
On Tue, 2022-05-03 at 10:27 +0200, Igor Mammedov wrote:
> On Fri, 29 Apr 2022 17:01:47 +0800
> Robert Hoo wrote:
>
> > On Wed, 2022-04-27 at 16:34 +0200, Igor Mammedov wrote:
> > > On Tue, 12 Apr 2022 14:57:52 +0800
> > > Robert Hoo wrote:
> > >
> > > > Since ACPI 6.2, previous NVDIMM/_DSM funcions "Get Namespace
> > > > Label
> > > > Data
> > > > Size (function index 4)", "Get Namespace Label Data (function
> > > > index
> > > > 5)",
> > > > "Set Namespace Label Data (function index 6)" has been
> > > > deprecated
> > > > by ACPI
> > >
> > > where it's said that old way was deprecated, should be mentioned
> > > here
> > > including
> > > pointer to spec where it came into effect.
> >
> > OK.
> > https://pmem.io/documents/IntelOptanePMem_DSM_Interface-V2.0.pdf,
> > 3.10 Deprecated Functions.
> > I put it in cover letter. Will also mention it here.
> > >
> >
> > ...
> > > >
> > > > diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
> > > > index 0d43da19ea..7cc419401b 100644
> > > > --- a/hw/acpi/nvdimm.c
> > > > +++ b/hw/acpi/nvdimm.c
> > > > @@ -848,10 +848,10 @@ nvdimm_dsm_write(void *opaque, hwaddr
> > > > addr,
> > > > uint64_t val, unsigned size)
> > > >
> > > > nvdimm_debug("Revision 0x%x Handler 0x%x Function
> > > > 0x%x.\n",
> > > > in->revision,
> > > > in->handle, in->function);
> > > > -
> > > > -if (in->revision != 0x1 /* Currently we only support DSM
> > > > Spec
> > > > Rev1. */) {
> > > > -nvdimm_debug("Revision 0x%x is not supported, expect
> > > > 0x%x.\n",
> > > > - in->revision, 0x1);
> > > > +/* Currently we only support DSM Spec Rev1 and Rev2. */
> > >
> > > where does revision 2 come from? It would be better to add a
> > > pointer
> > > to relevant spec.
> >
> > https://pmem.io/documents/IntelOptanePMem_DSM_Interface-V2.0.pdf,
> > Section 3 "_DSM Interface for the NVDIMM Device", table 3-A and 3-
> > B.
> >
> > I'll add this in comments in next version.
> > >
> > > > +if (in->revision != 0x1 && in->revision != 0x2) {
> > > > +nvdimm_debug("Revision 0x%x is not supported, expect
> > > > 0x1
> > > > or 0x2.\n",
> > > > + in->revision);
> > >
> > > since you are touching nvdimm_debug(), please replace it with
> > > tracing,
> > > see docs/devel/tracing.rst and any commit that adds tracing calls
> > > (functions starting with 'trace_').
> >
> > OK I'll have a try.
>
> just make conversion a separate patch
Yeah, I supposed so too.
>
> > >
> > > > nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_UNSUPPORT,
> > > > dsm_mem_addr);
> > > > goto exit;
> > > > }
> > >
> > >
> > > this whole hunk should be a separate patch, properly documented
> > >
> >
> > OK
> > >
> > > also I wonder if DSM
> >
> > It's not in SDM, but above-mentioned _DSM Interface spec by Intel.
> > >
> > > > @@ -1247,6 +1247,11 @@ static void nvdimm_build_fit(Aml *dev)
> > > > static void nvdimm_build_nvdimm_devices(Aml *root_dev,
> > > > uint32_t
> > > > ram_slots)
> > > > {
> > > > uint32_t slot;
> > > > +Aml *method, *pkg, *buff;
> > > > +
> > > > +/* Build common shared buffer for params pass in/out */
> > > > +buff = aml_buffer(4096, NULL);
> > > > +aml_append(root_dev, aml_name_decl("BUFF", buff));
> > >
> > > is there a reason to use global variable instead of LocalX?
> >
> > Local in root_dev but global to its sub devices? I think it is
> > doable.
> >
> > But given your below comments on return param _LS{I,R,W}, I now
> > think,
> > in v2, I'm not going to reuse existing "NCAL" method, but implement
> > _LS{I,R,W} their own, stringently follow interface spec. Then, no
> > buff
> > required at all. How do you like this?
> > >
> > > >
> > > > for (slot = 0; slot < ram_slots; slot++) {
> > > > uint32_t handle = nvdimm_slot_to_handle(slot);
> > > > @@ -1264,6 +1269,49 @@ static void
> > > > nvdimm_build_nvdimm_devices(Aml
> > > > *root_dev, uint32_t ram_slots)
> > > > */
> > > > aml_append(nvdimm_dev, aml_name_decl("_ADR",
> > > > aml_int(handle)));
> > > >
> > > > +/* Build _LSI, _LSR, _LSW */
> > >
> > > should be 1 comment per method with spec/ver and chapter where
> > > it's
> > > defined
> >
> > OK
> > >
> > > > +method = aml_method("_LSI", 0, AML_NOTSERIALIZED);
> > > > +aml_append(method,
> > > > aml_return(aml_call5(NVDIMM_COMMON_DSM,
> > > > +aml_touuid("4309AC30-0D11-11E4-
> > > > 9191-
> > > > 0800200C9A66"),
> > > > +aml_int(2), aml_int(4),
> > > > aml_int(0),
> > > > +aml_int(handle;
> > > > +aml_append(nvdimm_dev, method);
> > >
> > > _LSI should return Package
> >
> > Right. See above.
> > >
> > > > +method = aml_method("_LSR", 2, AML_SERIALIZED);
> > > > +aml_append(method,
> > > > +
Re: [PATCH] linux-user: Expose risc-v V and H isa bit in get_elf_hwcap()
Ah, I admit that I haven't tested the availability of the H extension,
I could update the new patch to only add the V extension.
Regarding the motivation for this modification,
the ncnn project uses the risc-v vector extension to optimize the efficiency of
nn inference.
I am very happy to find that qemu already supports rvv.
I want to use qemu's userspace mode to do unit testing faster and more
conveniently on the ci server.
In the past, I used the rvv branch of sifive/qemu.
On that branch, the V bit exists in hwcap and works well [1].
I can distinguish at runtime whether the current system supports rvv by
checking this bit.
As an early adopter of rvv, I think exposing V bit will help rvv to be more
tested and widely used.
After all, rvv is not enabled by default.
This V bit will only exist in the -cpu rv64,v=true parameter, which is for some
advanced developers.
We know that qemu currently implements rvv-1.0 and removes rvv-0.7.1.
[1]
https://github.com/sifive/qemu/commit/7a3e8e23b4cf1422ec48e9d4b4009337a05a635d
best wishes
nihui
At 2022-05-05 00:05:31, "Palmer Dabbelt" wrote:
>On Wed, 04 May 2022 08:10:03 PDT (-0700), alistai...@gmail.com wrote:
>> On Wed, May 4, 2022 at 2:32 PM nihui wrote:
>>>
>>> This patch brings the optional risc-v vector and hypervisor bits
>>> in hwcap so that application could detect these isa support from
>>> /proc/self/auxv correctly in qemu userspace mode.
>>>
>>> Signed-off-by: Ni Hui
>>> ---
>>> linux-user/elfload.c | 3 ++-
>>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/linux-user/elfload.c b/linux-user/elfload.c
>>> index 61063fd974..3f0ef2b8f6 100644
>>> --- a/linux-user/elfload.c
>>> +++ b/linux-user/elfload.c
>>> @@ -1484,7 +1484,8 @@ static uint32_t get_elf_hwcap(void)
>>> #define MISA_BIT(EXT) (1 << (EXT - 'A'))
>>> RISCVCPU *cpu = RISCV_CPU(thread_cpu);
>>> uint32_t mask = MISA_BIT('I') | MISA_BIT('M') | MISA_BIT('A')
>>> -| MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C');
>>> +| MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C')
>>> +| MISA_BIT('V') | MISA_BIT('H');
>>
>> The kernel doesn't support H or V. I understand V should be supported
>> in the future, but what is the use case for H?
>
>IMO even V is a bit in question: sure that bit's likely to be set at
>some point, but there's many flavors of V now and we'll have to give
>userspace a way to differentiate between them. There's been some
>proposals (see Kito's talk from Plumbers last year, for example) about
>how to deal with this, but nothing really concrete has shown up yet.
>
>If we flip on the V bit in user mode emulation then we run the risk of
>having a wacky ABI here, where QEMU is setting the V bit but then not
>setting whatever extra info is expected to come along with it. That'd
>mean userspace has to deal with that case -- maybe that's not the worst
>problem, and I guess it's better than just assuming V is always on,
>which is all userspace can do now, but any ABI divergence is going to
>lead to headaches at some point.
>
>IMO the right way forward here is to just sort out what the actual
>interface is, last time I talked to Kito about it we had a rough idea of
>where to go and plans to do it. Not sure what's up these days, so I've
>added him to the thread. If it's a long way off then we can always toss
>some intermediate thing together like this, but if it's close then it's
>probably best to just get the interface ironed out and then have it
>match.
>
>>
>> Alistair
>>
>>>
>>> return cpu->env.misa_ext & mask;
>>> #undef MISA_BIT
>>> --
>>> 2.25.1
>>>
>>>
Re: [PATCH] mos6522: fix linking error when CONFIG_MOS6522 is not set
Hi, Mark.
On 5/4/22 11:32, Mark Cave-Ayland wrote:
On 04/05/2022 14:16, Murilo Opsfelder Araújo wrote:
Hi, Mark.
On 5/4/22 04:10, Mark Cave-Ayland wrote:
On 02/05/2022 14:36, Murilo Opsfelder Araújo wrote:
Hi, Mark.
Thanks for reviewing. Comments below.
On 5/2/22 06:43, Mark Cave-Ayland wrote:
On 30/04/2022 00:31, Murilo Opsfelder Araujo wrote:
When CONFIG_MOS6522 is not set, building ppc64-softmmu target fails:
/usr/bin/ld: libqemu-ppc64-softmmu.fa.p/monitor_misc.c.o:(.data+0x1158):
undefined reference to `hmp_info_via'
clang-13: error: linker command failed with exit code 1 (use -v to see
invocation)
Add CONFIG_MOS6522 check for hmp_info_via in hmp-commands-info.hx to fix
such linking error.
Fixes: 409e9f7131e5 (mos6522: add "info via" HMP command for debugging)
Signed-off-by: Murilo Opsfelder Araujo
Cc: Mark Cave-Ayland
Cc: Fabiano Rosas
---
hmp-commands-info.hx | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx
index adfa085a9b..9ad784dd9f 100644
--- a/hmp-commands-info.hx
+++ b/hmp-commands-info.hx
@@ -881,6 +881,7 @@ SRST
ERST
#if defined(TARGET_M68K) || defined(TARGET_PPC)
+#if defined(CONFIG_MOS6522)
{
.name = "via",
.args_type = "",
@@ -889,6 +890,7 @@ ERST
.cmd = hmp_info_via,
},
#endif
+#endif
SRST
``info via``
Hmmm. The patch in its proposed form isn't correct, since device CONFIG_*
defines aren't declared when processing hmp-commands-info.hx. This was
something that was discovered and discussed in the original thread for which
the current workaround is to use the per-target TARGET_* defines instead.
So my proposed fix worked just by coincidence. Thanks for providing the
background.
Given that the g3beige and mac99 machines are included by default in
qemu-system-ppc64 which both contain the MOS6522 device, I can't quite
understand how CONFIG_MOS6522 isn't being selected.
Can you give more information about how you are building QEMU including your
configure command line?
Here is a reproducer adapted from CentOS 9 Stream qemu-kvm[0] package
(build failed on c9s ppc64le with QEMU at commit
f5643914a9e8f79c606a76e6a9d7ea82a3fc3e65):
$ cat > configs/devices/rh-virtio.mak <<"EOF"
CONFIG_VIRTIO=y
CONFIG_VIRTIO_BALLOON=y
CONFIG_VIRTIO_BLK=y
CONFIG_VIRTIO_GPU=y
CONFIG_VIRTIO_INPUT=y
CONFIG_VIRTIO_INPUT_HOST=y
CONFIG_VIRTIO_NET=y
CONFIG_VIRTIO_RNG=y
CONFIG_VIRTIO_SCSI=y
CONFIG_VIRTIO_SERIAL=y
EOF
$ cat > configs/devices/ppc64-softmmu/ppc64-rh-devices.mak <<"EOF"
include ../rh-virtio.mak
CONFIG_DIMM=y
CONFIG_MEM_DEVICE=y
CONFIG_NVDIMM=y
CONFIG_PCI=y
CONFIG_PCI_DEVICES=y
CONFIG_PCI_TESTDEV=y
CONFIG_PCI_EXPRESS=y
CONFIG_PSERIES=y
CONFIG_SCSI=y
CONFIG_SPAPR_VSCSI=y
CONFIG_TEST_DEVICES=y
CONFIG_USB=y
CONFIG_USB_OHCI=y
CONFIG_USB_OHCI_PCI=y
CONFIG_USB_SMARTCARD=y
CONFIG_USB_STORAGE_CORE=y
CONFIG_USB_STORAGE_CLASSIC=y
CONFIG_USB_XHCI=y
CONFIG_USB_XHCI_NEC=y
CONFIG_USB_XHCI_PCI=y
CONFIG_VFIO=y
CONFIG_VFIO_PCI=y
CONFIG_VGA=y
CONFIG_VGA_PCI=y
CONFIG_VHOST_USER=y
CONFIG_VIRTIO_PCI=y
CONFIG_VIRTIO_VGA=y
CONFIG_WDT_IB6300ESB=y
CONFIG_XICS=y
CONFIG_XIVE=y
CONFIG_TPM=y
CONFIG_TPM_SPAPR=y
CONFIG_TPM_EMULATOR=y
EOF
$ mkdir build
$ cd build
$ ../configure --cc=clang --cxx=/bin/false --prefix=/usr --libdir=/usr/lib64 --datadir=/usr/share --sysconfdir=/etc --interp-prefix=/usr/qemu-%M --localstatedir=/var --docdir=/usr/share/doc --libexecdir=/usr/libexec '--extra-ldflags=-Wl,-z,relro -Wl,--as-needed -Wl,-z,now ' '--extra-cflags=-O2 -fexceptions -g -grecord-gcc-switches -pipe -Wall -Werror=format-security -Wp,-D_FORTIFY_SOURCE=2 -Wp,-D_GLIBCXX_ASSERTIONS --config /usr/lib/rpm/redhat/redhat-hardened-clang.cfg -fstack-protector-strong -m64 -mcpu=power9 -mtune=power9 -fasynchronous-unwind-tables -fstack-clash-protection -Wno-string-plus-int' --with-pkgversion=qemu-kvm-7.0.0-1.el9 --with-suffix=qemu-kvm --firmwarepath=/usr/share/qemu-firmware:/usr/share/ipxe/qemu:/usr/share/seavgabios:/usr/share/seabios --meson=internal --enable-trace-backend=dtrace --with-coroutine=ucontext --with-git=git --tls-priority=@QEMU,SYSTEM --audio-drv-list= --disable-alsa --disable-attr --disable-auth-pam --disable-avx2
--disable-avx512f --disable-block-drv-whitelist-in-tools --disable-bochs --disable-bpf --disable-brlapi --disable-bsd-user --disable-bzip2 --disable-cap-ng --disable-capstone --disable-cfi --disable-cfi-debug --disable-cloop --disable-cocoa --disable-coreaudio --disable-coroutine-pool --disable-crypto-afalg --disable-curl --disable-curses --disable-dbus-display --disable-debug-info --disable-debug-mutex --disable-debug-tcg --disable-dmg --disable-docs --disable-dsound --disable-fdt --disable-fuse --disable-fuse-lseek --disable-gcrypt --disable-gettext --disable-gio --disable-glusterfs --disable-gnutls --disable-gtk --disable-guest-agent --disable-guest-agent-msi --disable-hax --disable-hvf --disable-iconv --disable-jack --disable-kvm --disable-l2tpv3
Re: [PATCH] hw/dma: Add Xilinx AXI CDMA
On Thu, May 5, 2022 at 4:50 AM Edgar E. Iglesias wrote: > > On Tue, May 3, 2022 at 7:12 PM Edgar E. Iglesias > wrote: > >> On Tue, May 3, 2022 at 5:06 PM Frank Chang >> wrote: >> >>> On Tue, May 3, 2022 at 5:35 PM Edgar E. Iglesias < >>> edgar.igles...@gmail.com> wrote: >>> On Tue, May 3, 2022 at 3:16 AM Frank Chang wrote: > On Mon, May 2, 2022 at 6:29 PM Edgar E. Iglesias < > edgar.igles...@gmail.com> wrote: > >> On Thu, Apr 28, 2022 at 5:43 PM wrote: >> >>> From: Frank Chang >>> >>> Add Xilinx AXI CDMA model, which follows >>> AXI Central Direct Memory Access v4.1 spec: >>> https://docs.xilinx.com/v/u/en-US/pg034-axi-cdma >>> >>> Supports both Simple DMA and Scatter Gather modes. >>> >> >> Hi Frank, >> >> Thanks for modeling this! I have a couple of questions. >> > > Hi Edgar, > > Thanks for reviewing. > > >> >> Do you plan to submit a machine that uses this DMA? >> > > Currently, Xilinx CDMA is used in our internal platform only, which is > not upstream. > Do you have any suggestions for the existing machine that I can add > Xilinx CDMA to? > Or perhaps, ARM virt machine? > If there's a reference design somewhere we could use we could potentially create a new zynqmp or versal based machine. >>> >>> Thanks Edgar, >>> >>> Do you think it's a good idea to add CDMA in xlnx-zynqmp.c? >>> (Though I found GDMA and ADMA already exist) >>> >>> I'm not familiar with Xilinx's FPGA family, and there are lots of >>> variants. >>> Not sure which machine is the best one for me to add CDMA. >>> >> >> xlnx-zynqmp.c models the hardened logic of the ZynqMP, the GDMA and ADMA >> are hard logic but this CDMA is not. >> xlnx-zcu102.c models a board with a ZynqMP and off-chip peripherals >> (reuses xlnx-zynqmp.c) but without anything programmed into the PL (FPGA) >> parts. >> >> If there's some kind of public design (Demo, product, reference design, >> whatever) that uses the CDMA as a soft IP on the PL and that is somewhat >> documented, perhaps we could add a xlnx-zcu102-name-of-design.c or a >> versal-xyz.c to enable this. I don't know of any such design though, but >> I'll let you know if I find something. >> > > Hi Frank, > > This could be something: > > https://xilinx.github.io/Embedded-Design-Tutorials/docs/2020.2/docs/Introduction/Zynq7000-EDT/6-using-hp-port.html > > A machine model would be based on hw/arm/xilinx_zynq.c. > Thanks Edgar, I was also aware of Zynq-7000 series SoC. But the datasheet: https://docs.xilinx.com/v/u/en-US/ds190-Zynq-7000-Overview doesn't mention that the DMA it uses is CDMA. It is something interchangeable for Zynq-7000 series SoC? And from the header comment of hw/arm/xilinx_zynq.c, it says it models Xilinx Zynq Baseboard. I'm not familiar with Xilinx's products family. Do you know what are the differences between "Xilinx Zynq Baseboard" and "Zynq-7000 SoC"? Regards, Frank Chang > > Best regards, > Edgar > > > >> >> >>> >>> It would be great if you guys had a public RISCV design with the CDMA that we could model. >>> >>> I would love to, >>> but unfortunately, we don't have the spec for this model publicly yet. >>> >> >> Or we wait for your machine to become public and make a model of that >> >> >> >>> >>> > > >> >> The CDMA has a 32-bit AXI4-Lite port for register accesses (see page >> 6 and 8 in the spec you referenced), so axicdma_ops.impl.max should be 4 >> and you shouldn't need the read/write q versions. >> > > Okay, that's something I was not aware of. > > However, I have a question regarding the 64-bit address space. > > For 64-bit address space, i.e. xlnx,addrwidth = 64. > The CDMA spec says that: > "TAILDESC_PNTR[_MSB] register causes the AXI CDMA SG Engine > to start fetching descriptors starting from the CURDESC_PNTR register > value." > > It seems that DMA will start the transfer if either TAILDESC_PNTR or > TAILDESC_PNTR_MSB is written. > Then how can we guarantee that the full 64-bit address pointer is > written > before the DMA transfer is started if we can't write both > TAILDESC_PNTR and TAILDESC_PNTR_MSB > at the same time? > This is described on pages 25 and 26: "When the AXI CDMA is in SG Mode and the address space is 32 bits (CDMACR.SGMode = 1), a write by the software application to the TAILDESC_PNTR register causes the AXI CDMA SG Engine to start fetching descriptors" I.e TAILDESC_PNTR only starts the DMA if 32bit addresses have been selected. If 64bit addresses are selected, TAILDESC_PNTR_MSB starts the DMA: "When the AXI CDMA is in SG Mode, and the address space is more than 32 bits, (CDMACR.SGMode = 1), a write by the software application to the TAILDESC_PNTR_MSB register causes the AXI
PING: [PATCH] KVM: HWPoison: Fix memory address during remap
Hi, Paolo
I would appreciate it if you could review patch.
On 4/20/22 14:45, zhenwei pi wrote:
qemu exits during reset with log:
qemu-system-x86_64: Could not remap addr: 1000@22001000
Currently, after MCE on RAM of a guest, qemu records a ram_addr only,
remaps this address with a fixed size(TARGET_PAGE_SIZE) during reset.
In the hugetlbfs scenario, mmap(addr...) needs page_size aligned
address and correct size. Unaligned address leads mmap to fail.
What's more, hitting MCE on RAM of a guest, qemu records this address
and try to fix it during reset, this should be a common logic. So
remove kvm_hwpoison_page_add from architecture dependent code, record
this in SIGBUS handler instead. Finally poisoning/unpoisoning a page
gets static in kvm-all.c,
Signed-off-by: zhenwei pi
---
accel/kvm/kvm-all.c | 47 ++--
include/sysemu/kvm_int.h | 12 --
target/arm/kvm64.c | 1 -
target/i386/kvm/kvm.c| 1 -
4 files changed, 36 insertions(+), 25 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 5f1377ca04..2a91c5a461 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -1167,11 +1167,14 @@ int kvm_vm_check_extension(KVMState *s, unsigned int
extension)
return ret;
}
+#ifdef KVM_HAVE_MCE_INJECTION
typedef struct HWPoisonPage {
ram_addr_t ram_addr;
+size_t page_size; /* normal page or hugeTLB page? */
QLIST_ENTRY(HWPoisonPage) list;
} HWPoisonPage;
+/* hwpoison_page_list stores the poisoned pages, unpoison them during reset */
static QLIST_HEAD(, HWPoisonPage) hwpoison_page_list =
QLIST_HEAD_INITIALIZER(hwpoison_page_list);
@@ -1181,25 +1184,48 @@ static void kvm_unpoison_all(void *param)
QLIST_FOREACH_SAFE(page, _page_list, list, next_page) {
QLIST_REMOVE(page, list);
-qemu_ram_remap(page->ram_addr, TARGET_PAGE_SIZE);
+qemu_ram_remap(page->ram_addr, page->page_size);
g_free(page);
}
}
-void kvm_hwpoison_page_add(ram_addr_t ram_addr)
+static void kvm_hwpoison_page_add(CPUState *cpu, int sigbus_code, void *addr)
{
HWPoisonPage *page;
+ram_addr_t ram_addr, align_ram_addr;
+ram_addr_t offset;
+hwaddr paddr;
+size_t page_size;
+
+assert(sigbus_code == BUS_MCEERR_AR || sigbus_code == BUS_MCEERR_AO);
+ram_addr = qemu_ram_addr_from_host(addr);
+if (ram_addr == RAM_ADDR_INVALID ||
+!kvm_physical_memory_addr_from_host(cpu->kvm_state, addr, )) {
+/* only deal with valid guest RAM here */
+return;
+}
+/* get page size of RAM block, test it's a normal page or huge page */
+page_size = qemu_ram_block_from_host(addr, false, )->page_size;
+align_ram_addr = QEMU_ALIGN_DOWN(ram_addr, page_size);
QLIST_FOREACH(page, _page_list, list) {
-if (page->ram_addr == ram_addr) {
+if (page->ram_addr == align_ram_addr) {
+assert(page->page_size == page_size);
return;
}
}
-page = g_new(HWPoisonPage, 1);
-page->ram_addr = ram_addr;
+
+page = g_new0(HWPoisonPage, 1);
+page->ram_addr = align_ram_addr;
+page->page_size = page_size;
QLIST_INSERT_HEAD(_page_list, page, list);
}
+static __thread void *pending_sigbus_addr;
+static __thread int pending_sigbus_code;
+static __thread bool have_sigbus_pending;
+#endif
+
static uint32_t adjust_ioeventfd_endianness(uint32_t val, uint32_t size)
{
#if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
@@ -2601,7 +2627,9 @@ static int kvm_init(MachineState *ms)
s->kernel_irqchip_split = mc->default_kernel_irqchip_split ?
ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
}
+#if defined KVM_HAVE_MCE_INJECTION
qemu_register_reset(kvm_unpoison_all, NULL);
+#endif
if (s->kernel_irqchip_allowed) {
kvm_irqchip_create(s);
@@ -2782,12 +2810,6 @@ void kvm_cpu_synchronize_pre_loadvm(CPUState *cpu)
run_on_cpu(cpu, do_kvm_cpu_synchronize_pre_loadvm, RUN_ON_CPU_NULL);
}
-#ifdef KVM_HAVE_MCE_INJECTION
-static __thread void *pending_sigbus_addr;
-static __thread int pending_sigbus_code;
-static __thread bool have_sigbus_pending;
-#endif
-
static void kvm_cpu_kick(CPUState *cpu)
{
qatomic_set(>kvm_run->immediate_exit, 1);
@@ -2883,6 +2905,8 @@ int kvm_cpu_exec(CPUState *cpu)
#ifdef KVM_HAVE_MCE_INJECTION
if (unlikely(have_sigbus_pending)) {
qemu_mutex_lock_iothread();
+kvm_hwpoison_page_add(cpu, pending_sigbus_code,
+ pending_sigbus_addr);
kvm_arch_on_sigbus_vcpu(cpu, pending_sigbus_code,
pending_sigbus_addr);
have_sigbus_pending = false;
@@ -3436,6 +3460,7 @@ int kvm_on_sigbus(int code, void *addr)
* we can only get action optional here.
*/
assert(code != BUS_MCEERR_AR);
+kvm_hwpoison_page_add(first_cpu, code, addr);
Re: [PATCH] vhost-user: Use correct macro name TARGET_PPC64g
On Tue, May 03, 2022 at 03:01:08PM -0300, Murilo Opsfelder Araujo wrote:
> The correct name of the macro is TARGET_PPC64.
>
> Fixes: 27598393a232 ("Lift max memory slots limit imposed by vhost-user")
> Reported-by: Fabiano Rosas
> Signed-off-by: Murilo Opsfelder Araujo
> Cc: Raphael Norwitz
> Cc: Peter Turschmid
Reviewed-by: Raphael Norwitz
> ---
> hw/virtio/vhost-user.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
> index 9c4f84f35f..e356c72c81 100644
> --- a/hw/virtio/vhost-user.c
> +++ b/hw/virtio/vhost-user.c
> @@ -51,7 +51,7 @@
> #include "hw/acpi/acpi.h"
> #define VHOST_USER_MAX_RAM_SLOTS ACPI_MAX_RAM_SLOTS
>
> -#elif defined(TARGET_PPC) || defined(TARGET_PPC_64)
> +#elif defined(TARGET_PPC) || defined(TARGET_PPC64)
> #include "hw/ppc/spapr.h"
> #define VHOST_USER_MAX_RAM_SLOTS SPAPR_MAX_RAM_SLOTS
>
> --
> 2.35.1
>
Re: [PATCH v2 0/2] ppc/xive: Update for guest interrupt handling
On 4/29/22 04:16, Frederic Barrat wrote: This short series fixes a couple of issues about interrupt handling found when running a KVM guest on the powernv9 and powernv10 models. I split a patch I previously sent. Changlog: v2: - update comment on patch 1 - picked up Cedric's reviewed-by on patch 2 Queued in gitlab.com/danielhb/qemu/tree/ppc-next. Thanks, Daniel Frederic Barrat (2): ppc/xive: Always recompute the PIPR when pushing an OS context ppc/xive: Update the state of the External interrupt signal hw/intc/xive.c| 25 ++--- hw/intc/xive2.c | 18 +++--- include/hw/ppc/xive.h | 1 + 3 files changed, 34 insertions(+), 10 deletions(-)
Re: [PATCH v2] hw/openrisc: use right OMPIC size variable
On Wed, May 04, 2022 at 01:10:04PM +0200, Jason A. Donenfeld wrote:
> On Tue, May 3, 2022 at 10:22 PM Stafford Horne wrote:
> >
> > On Tue, May 03, 2022 at 11:45:33AM +0200, Jason A. Donenfeld wrote:
> > > This appears to be a copy and paste error. The UART size was used
> > > instead of the much smaller OMPIC size. But actually that smaller OMPIC
> > > size is wrong too and doesn't allow the IPI to work in Linux. So set it
> > > to the old value.
> > >
> > > Signed-off-by: Jason A. Donenfeld
> > > ---
> > > hw/openrisc/openrisc_sim.c | 4 ++--
> > > 1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
> > > index 99b14940f4..3218db6656 100644
> > > --- a/hw/openrisc/openrisc_sim.c
> > > +++ b/hw/openrisc/openrisc_sim.c
> > > @@ -78,7 +78,7 @@ static const struct MemmapEntry {
> > > [OR1KSIM_DRAM] = { 0x, 0 },
> > > [OR1KSIM_UART] = { 0x9000, 0x100 },
> > > [OR1KSIM_ETHOC] = { 0x9200, 0x800 },
> > > -[OR1KSIM_OMPIC] = { 0x9800, 16 },
> > > +[OR1KSIM_OMPIC] = { 0x9800, 0x100 },
> >
> > Right, I missed this as part of my series. OMPIC will allocate 2 32-bit
> > registers per CPU. I documented this here:
> >
> > -
> > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/irqchip/irq-ompic.c
> >
> > I think what we will want here is something like:
> >
> > [OR1KSIM_OMPIC] = { 0x9800, 8 * OR1KSIM_CPUS_MAX },
>
> Do you want a v3 or are you going to fix it up yourself?
I'll fix it up.
-Stafford
Re: [PATCH] vhost-user: Use correct macro name TARGET_PPC64
On 5/4/22 17:59, Michael S. Tsirkin wrote:
On Tue, May 03, 2022 at 03:01:08PM -0300, Murilo Opsfelder Araujo wrote:
The correct name of the macro is TARGET_PPC64.
Fixes: 27598393a232 ("Lift max memory slots limit imposed by vhost-user")
Reported-by: Fabiano Rosas
Signed-off-by: Murilo Opsfelder Araujo
Cc: Raphael Norwitz
Cc: Peter Turschmid
Reviewed-by: Michael S. Tsirkin
ok to merge through the ppc tree
Thanks for the r-b. Queued in gitlab.com/danielhb/qemu/tree/ppc-next.
Daniel
---
hw/virtio/vhost-user.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 9c4f84f35f..e356c72c81 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -51,7 +51,7 @@
#include "hw/acpi/acpi.h"
#define VHOST_USER_MAX_RAM_SLOTS ACPI_MAX_RAM_SLOTS
-#elif defined(TARGET_PPC) || defined(TARGET_PPC_64)
+#elif defined(TARGET_PPC) || defined(TARGET_PPC64)
#include "hw/ppc/spapr.h"
#define VHOST_USER_MAX_RAM_SLOTS SPAPR_MAX_RAM_SLOTS
--
2.35.1
[PATCH v4 20/22] target/ppc: Remove msr_de macro
msr_de macro hides the usage of env->msr, which is a bad
behavior. Substitute it with FIELD_EX64 calls that explicitly use
env->msr as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
---
v4: Add this patch as an usage of msr_de was added in another patch
https://patchew.org/QEMU/20220421011729.1148727-1-bmeng...@gmail.com/
Signed-off-by: Víctor Colombo
---
target/ppc/cpu.h | 3 +--
target/ppc/helper_regs.c | 4 ++--
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 9f19b3c0a8..af249239d5 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -371,6 +371,7 @@ FIELD(MSR, PR, MSR_PR, 1)
FIELD(MSR, FP, MSR_FP, 1)
FIELD(MSR, ME, MSR_ME, 1)
FIELD(MSR, FE0, MSR_FE0, 1)
+FIELD(MSR, DE, MSR_DE, 1)
FIELD(MSR, FE1, MSR_FE1, 1)
FIELD(MSR, EP, MSR_EP, 1)
FIELD(MSR, IR, MSR_IR, 1)
@@ -495,8 +496,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define HFSCR_MSGP PPC_BIT(53) /* Privileged Message Send Facilities */
#define HFSCR_IC_MSGP 0xA
-#define msr_de ((env->msr >> MSR_DE) & 1)
-
#define DBCR0_ICMP (1 << 27)
#define DBCR0_BRT (1 << 26)
#define DBSR_ICMP (1 << 27)
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index 97cd263131..6159a15b7b 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -63,10 +63,10 @@ static uint32_t hreg_compute_hflags_value(CPUPPCState *env)
if (ppc_flags & POWERPC_FLAG_DE) {
target_ulong dbcr0 = env->spr[SPR_BOOKE_DBCR0];
-if ((dbcr0 & DBCR0_ICMP) && msr_de) {
+if ((dbcr0 & DBCR0_ICMP) && FIELD_EX64(env->msr, MSR, DE)) {
hflags |= 1 << HFLAGS_SE;
}
-if ((dbcr0 & DBCR0_BRT) && msr_de) {
+if ((dbcr0 & DBCR0_BRT) && FIELD_EX64(env->msr, MSR, DE)) {
hflags |= 1 << HFLAGS_BE;
}
} else {
--
2.25.1
[PATCH v4 22/22] target/ppc: Change MSR_* to follow POWER ISA numbering convention
Today we have the issue where MSR_* values are the 'inverted order'
bit numbers from what the ISA specifies. e.g. MSR_LE is bit 63 but
is defined as 0 in QEMU.
Add a macro to be used to convert from QEMU order to ISA order.
This solution requires less changes than to use the already defined
PPC_BIT macro, which would turn MSR_* in masks instead of the numbers
itself.
Signed-off-by: Víctor Colombo
Acked-by: Richard Henderson
---
target/ppc/cpu.h | 87
1 file changed, 44 insertions(+), 43 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 4577cfcc23..48596cfb25 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -38,6 +38,7 @@
#define PPC_ELF_MACHINE EM_PPC
#endif
+#define PPC_BIT_NR(bit) (63 - (bit))
#define PPC_BIT(bit)(0x8000ULL >> (bit))
#define PPC_BIT32(bit) (0x8000 >> (bit))
#define PPC_BIT8(bit) (0x80 >> (bit))
@@ -310,49 +311,49 @@ typedef enum {
/*/
/* Machine state register bits definition*/
-#define MSR_SF 63 /* Sixty-four-bit modehflags */
-#define MSR_TAG 62 /* Tag-active mode (POWERx ?)*/
-#define MSR_ISF 61 /* Sixty-four-bit interrupt mode on 630 */
-#define MSR_HV 60 /* hypervisor state hflags */
-#define MSR_TS0 34 /* Transactional state, 2 bits (Book3s) */
-#define MSR_TS1 33
-#define MSR_TM 32 /* Transactional Memory Available (Book3s) */
-#define MSR_CM 31 /* Computation mode for BookE hflags */
-#define MSR_ICM 30 /* Interrupt computation mode for BookE */
-#define MSR_GS 28 /* guest state for BookE */
-#define MSR_UCLE 26 /* User-mode cache lock enable for BookE */
-#define MSR_VR 25 /* altivec availablex hflags */
-#define MSR_SPE 25 /* SPE enable for BookE x hflags */
-#define MSR_VSX 23 /* Vector Scalar Extension (ISA 2.06 and later) x hflags */
-#define MSR_S22 /* Secure state */
-#define MSR_KEY 19 /* key bit on 603e */
-#define MSR_POW 18 /* Power management */
-#define MSR_WE 18 /* Wait State Enable on 405 */
-#define MSR_TGPR 17 /* TGPR usage on 602/603x*/
-#define MSR_CE 17 /* Critical interrupt enable on embedded PowerPC x */
-#define MSR_ILE 16 /* Interrupt little-endian mode */
-#define MSR_EE 15 /* External interrupt enable */
-#define MSR_PR 14 /* Problem state hflags */
-#define MSR_FP 13 /* Floating point available hflags */
-#define MSR_ME 12 /* Machine check interrupt enable*/
-#define MSR_FE0 11 /* Floating point exception mode 0 */
-#define MSR_SE 10 /* Single-step trace enable x hflags */
-#define MSR_DWE 10 /* Debug wait enable on 405 x*/
-#define MSR_UBLE 10 /* User BTB lock enable on e500 x*/
-#define MSR_BE 9 /* Branch trace enable x hflags */
-#define MSR_DE 9 /* Debug interrupts enable on embedded PowerPC x*/
-#define MSR_FE1 8 /* Floating point exception mode 1 */
-#define MSR_AL 7 /* AL bit on POWER */
-#define MSR_EP 6 /* Exception prefix on 601 */
-#define MSR_IR 5 /* Instruction relocate */
-#define MSR_DR 4 /* Data relocate */
-#define MSR_IS 5 /* Instruction address space (BookE) */
-#define MSR_DS 4 /* Data address space (BookE)*/
-#define MSR_PE 3 /* Protection enable on 403 */
-#define MSR_PX 2 /* Protection exclusive on 403 x*/
-#define MSR_PMM 2 /* Performance monitor mark on POWERx*/
-#define MSR_RI 1 /* Recoverable interrupt1*/
-#define MSR_LE 0 /* Little-endian mode 1 hflags */
+#define MSR_SF PPC_BIT_NR(0) /* Sixty-four-bit modehflags */
+#define MSR_TAG PPC_BIT_NR(1) /* Tag-active mode (POWERx ?)*/
+#define MSR_ISF PPC_BIT_NR(2) /* Sixty-four-bit interrupt mode on 630 */
+#define MSR_HV PPC_BIT_NR(3) /* hypervisor state hflags */
+#define MSR_TS0 PPC_BIT_NR(29) /* Transactional state, 2 bits (Book3s)
[PATCH v4 16/22] target/ppc: Remove msr_ep macro
msr_ep macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h | 2 +-
target/ppc/helper_regs.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index cd672dec93..5e804f0373 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -363,6 +363,7 @@ FIELD(MSR, EE, MSR_EE, 1)
FIELD(MSR, PR, MSR_PR, 1)
FIELD(MSR, FP, MSR_FP, 1)
FIELD(MSR, ME, MSR_ME, 1)
+FIELD(MSR, EP, MSR_EP, 1)
FIELD(MSR, IR, MSR_IR, 1)
FIELD(MSR, DR, MSR_DR, 1)
FIELD(MSR, DS, MSR_DS, 1)
@@ -486,7 +487,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
#define msr_de ((env->msr >> MSR_DE) & 1)
#define msr_fe1 ((env->msr >> MSR_FE1) & 1)
-#define msr_ep ((env->msr >> MSR_EP) & 1)
#define msr_ts ((env->msr >> MSR_TS1) & 3)
#define DBCR0_ICMP (1 << 27)
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index b150b78182..97cd263131 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -240,8 +240,8 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value,
int alter_hv)
/* Swap temporary saved registers with GPRs */
hreg_swap_gpr_tgpr(env);
}
-if (unlikely((value >> MSR_EP) & 1) != msr_ep) {
-env->excp_prefix = ((value >> MSR_EP) & 1) * 0xFFF0;
+if (unlikely((value ^ env->msr) & R_MSR_EP_MASK)) {
+env->excp_prefix = FIELD_EX64(value, MSR, EP) * 0xFFF0;
}
/*
* If PR=1 then EE, IR and DR must be 1
--
2.25.1
[PATCH v4 21/22] target/ppc: Add unused msr bits FIELDs
Add FIELDs macros for msr bits that had an unused msr_* before.
Signed-off-by: Víctor Colombo
Acked-by: Richard Henderson
---
v4: Don't add a FIELD for MSR_DE anymore as it was already added
in patch 20
Signed-off-by: Víctor Colombo
---
target/ppc/cpu.h | 25 +
1 file changed, 25 insertions(+)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index af249239d5..4577cfcc23 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -354,16 +354,31 @@ typedef enum {
#define MSR_RI 1 /* Recoverable interrupt1*/
#define MSR_LE 0 /* Little-endian mode 1 hflags */
+FIELD(MSR, SF, MSR_SF, 1)
+FIELD(MSR, TAG, MSR_TAG, 1)
+FIELD(MSR, ISF, MSR_ISF, 1)
#if defined(TARGET_PPC64)
FIELD(MSR, HV, MSR_HV, 1)
#define FIELD_EX64_HV(storage) FIELD_EX64(storage, MSR, HV)
#else
#define FIELD_EX64_HV(storage) 0
#endif
+FIELD(MSR, TS0, MSR_TS0, 1)
+FIELD(MSR, TS1, MSR_TS1, 1)
FIELD(MSR, TS, MSR_TS0, 2)
+FIELD(MSR, TM, MSR_TM, 1)
FIELD(MSR, CM, MSR_CM, 1)
+FIELD(MSR, ICM, MSR_ICM, 1)
FIELD(MSR, GS, MSR_GS, 1)
+FIELD(MSR, UCLE, MSR_UCLE, 1)
+FIELD(MSR, VR, MSR_VR, 1)
+FIELD(MSR, SPE, MSR_SPE, 1)
+FIELD(MSR, VSX, MSR_VSX, 1)
+FIELD(MSR, S, MSR_S, 1)
+FIELD(MSR, KEY, MSR_KEY, 1)
FIELD(MSR, POW, MSR_POW, 1)
+FIELD(MSR, WE, MSR_WE, 1)
+FIELD(MSR, TGPR, MSR_TGPR, 1)
FIELD(MSR, CE, MSR_CE, 1)
FIELD(MSR, ILE, MSR_ILE, 1)
FIELD(MSR, EE, MSR_EE, 1)
@@ -371,12 +386,22 @@ FIELD(MSR, PR, MSR_PR, 1)
FIELD(MSR, FP, MSR_FP, 1)
FIELD(MSR, ME, MSR_ME, 1)
FIELD(MSR, FE0, MSR_FE0, 1)
+FIELD(MSR, SE, MSR_SE, 1)
+FIELD(MSR, DWE, MSR_DWE, 1)
+FIELD(MSR, UBLE, MSR_UBLE, 1)
+FIELD(MSR, BE, MSR_BE, 1)
FIELD(MSR, DE, MSR_DE, 1)
FIELD(MSR, FE1, MSR_FE1, 1)
+FIELD(MSR, AL, MSR_AL, 1)
FIELD(MSR, EP, MSR_EP, 1)
FIELD(MSR, IR, MSR_IR, 1)
FIELD(MSR, DR, MSR_DR, 1)
+FIELD(MSR, IS, MSR_IS, 1)
FIELD(MSR, DS, MSR_DS, 1)
+FIELD(MSR, PE, MSR_PE, 1)
+FIELD(MSR, PX, MSR_PX, 1)
+FIELD(MSR, PMM, MSR_PMM, 1)
+FIELD(MSR, RI, MSR_RI, 1)
FIELD(MSR, LE, MSR_LE, 1)
/*
--
2.25.1
[PATCH v4 19/22] target/ppc: Remove msr_hv macro
msr_hv macro hides the usage of env->msr, which is a bad
behavior. Substitute it with FIELD_EX64 calls that explicitly use
env->msr as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
v4: Some context lines
Signed-off-by: Víctor Colombo
---
target/ppc/cpu.h | 11 ++-
target/ppc/cpu_init.c| 6 --
target/ppc/excp_helper.c | 8
target/ppc/mem_helper.c | 4 ++--
target/ppc/misc_helper.c | 2 +-
target/ppc/mmu-radix64.c | 6 +++---
6 files changed, 20 insertions(+), 17 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 5ac7d7d68f..9f19b3c0a8 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -354,6 +354,12 @@ typedef enum {
#define MSR_RI 1 /* Recoverable interrupt1*/
#define MSR_LE 0 /* Little-endian mode 1 hflags */
+#if defined(TARGET_PPC64)
+FIELD(MSR, HV, MSR_HV, 1)
+#define FIELD_EX64_HV(storage) FIELD_EX64(storage, MSR, HV)
+#else
+#define FIELD_EX64_HV(storage) 0
+#endif
FIELD(MSR, TS, MSR_TS0, 2)
FIELD(MSR, CM, MSR_CM, 1)
FIELD(MSR, GS, MSR_GS, 1)
@@ -489,11 +495,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define HFSCR_MSGP PPC_BIT(53) /* Privileged Message Send Facilities */
#define HFSCR_IC_MSGP 0xA
-#if defined(TARGET_PPC64)
-#define msr_hv ((env->msr >> MSR_HV) & 1)
-#else
-#define msr_hv (0)
-#endif
#define msr_de ((env->msr >> MSR_DE) & 1)
#define DBCR0_ICMP (1 << 27)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 10e7c41bc9..d4c7813de5 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -6305,7 +6305,8 @@ static bool cpu_has_work_POWER9(CPUState *cs)
if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) &&
(env->spr[SPR_LPCR] & LPCR_EEE)) {
bool heic = !!(env->spr[SPR_LPCR] & LPCR_HEIC);
-if (!heic || !msr_hv || FIELD_EX64(env->msr, MSR, PR)) {
+if (!heic || !FIELD_EX64_HV(env->msr) ||
+FIELD_EX64(env->msr, MSR, PR)) {
return true;
}
}
@@ -6520,7 +6521,8 @@ static bool cpu_has_work_POWER10(CPUState *cs)
if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) &&
(env->spr[SPR_LPCR] & LPCR_EEE)) {
bool heic = !!(env->spr[SPR_LPCR] & LPCR_HEIC);
-if (!heic || !msr_hv || FIELD_EX64(env->msr, MSR, PR)) {
+if (!heic || !FIELD_EX64_HV(env->msr) ||
+FIELD_EX64(env->msr, MSR, PR)) {
return true;
}
}
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index aa201c63c6..cb752b184a 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1715,7 +1715,7 @@ static void ppc_hw_interrupt(CPUPPCState *env)
if (env->pending_interrupts & (1 << PPC_INTERRUPT_HDECR)) {
/* LPCR will be clear when not supported so this will work */
bool hdice = !!(env->spr[SPR_LPCR] & LPCR_HDICE);
-if ((async_deliver || msr_hv == 0) && hdice) {
+if ((async_deliver || !FIELD_EX64_HV(env->msr)) && hdice) {
/* HDEC clears on delivery */
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_HDECR);
powerpc_excp(cpu, POWERPC_EXCP_HDECR);
@@ -1727,7 +1727,7 @@ static void ppc_hw_interrupt(CPUPPCState *env)
if (env->pending_interrupts & (1 << PPC_INTERRUPT_HVIRT)) {
/* LPCR will be clear when not supported so this will work */
bool hvice = !!(env->spr[SPR_LPCR] & LPCR_HVICE);
-if ((async_deliver || msr_hv == 0) && hvice) {
+if ((async_deliver || !FIELD_EX64_HV(env->msr)) && hvice) {
powerpc_excp(cpu, POWERPC_EXCP_HVIRT);
return;
}
@@ -1738,9 +1738,9 @@ static void ppc_hw_interrupt(CPUPPCState *env)
bool lpes0 = !!(env->spr[SPR_LPCR] & LPCR_LPES0);
bool heic = !!(env->spr[SPR_LPCR] & LPCR_HEIC);
/* HEIC blocks delivery to the hypervisor */
-if ((async_deliver && !(heic && msr_hv &&
+if ((async_deliver && !(heic && FIELD_EX64_HV(env->msr) &&
!FIELD_EX64(env->msr, MSR, PR))) ||
-(env->has_hv_mode && msr_hv == 0 && !lpes0)) {
+(env->has_hv_mode && !FIELD_EX64_HV(env->msr) && !lpes0)) {
if (books_vhyp_promotes_external_to_hvirt(cpu)) {
powerpc_excp(cpu, POWERPC_EXCP_HVIRT);
} else {
diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c
index 9af135e88e..d1163f316c 100644
--- a/target/ppc/mem_helper.c
+++ b/target/ppc/mem_helper.c
@@ -612,11 +612,11 @@ void helper_tbegin(CPUPPCState *env)
env->spr[SPR_TEXASR] =
(1ULL << TEXASR_FAILURE_PERSISTENT) |
(1ULL << TEXASR_NESTING_OVERFLOW) |
-(msr_hv << TEXASR_PRIVILEGE_HV) |
+(FIELD_EX64_HV(env->msr) << TEXASR_PRIVILEGE_HV) |
(FIELD_EX64(env->msr, MSR, PR) << TEXASR_PRIVILEGE_PR) |
[PATCH v4 14/22] target/ppc: Remove msr_ir macro
msr_ir macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h | 2 +-
target/ppc/helper_regs.c | 2 +-
target/ppc/mmu_common.c | 11 ++-
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 75a81d4304..6cfbec26a1 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -363,6 +363,7 @@ FIELD(MSR, EE, MSR_EE, 1)
FIELD(MSR, PR, MSR_PR, 1)
FIELD(MSR, FP, MSR_FP, 1)
FIELD(MSR, ME, MSR_ME, 1)
+FIELD(MSR, IR, MSR_IR, 1)
FIELD(MSR, DS, MSR_DS, 1)
FIELD(MSR, LE, MSR_LE, 1)
@@ -485,7 +486,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_de ((env->msr >> MSR_DE) & 1)
#define msr_fe1 ((env->msr >> MSR_FE1) & 1)
#define msr_ep ((env->msr >> MSR_EP) & 1)
-#define msr_ir ((env->msr >> MSR_IR) & 1)
#define msr_dr ((env->msr >> MSR_DR) & 1)
#define msr_ts ((env->msr >> MSR_TS1) & 3)
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index 4e649d8b0e..e40078c001 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -227,7 +227,7 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value,
int alter_hv)
value &= ~MSR_HVB;
value |= env->msr & MSR_HVB;
}
-if (((value >> MSR_IR) & 1) != msr_ir ||
+if (((value ^ env->msr) & R_MSR_IR_MASK) ||
((value >> MSR_DR) & 1) != msr_dr) {
cpu_interrupt_exittb(cs);
}
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 031bb4493b..30deca0425 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -388,7 +388,7 @@ static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t
*ctx,
" nip=" TARGET_FMT_lx " lr=" TARGET_FMT_lx
" ir=%d dr=%d pr=%d %d t=%d\n",
eaddr, (int)(eaddr >> 28), sr, env->nip, env->lr,
- (int)msr_ir, (int)msr_dr, pr ? 1 : 0,
+ (int)FIELD_EX64(env->msr, MSR, IR), (int)msr_dr, pr ? 1 : 0,
access_type == MMU_DATA_STORE, type);
pgidx = (eaddr & ~SEGMENT_MASK_256M) >> target_page_bits;
hash = vsid ^ pgidx;
@@ -626,7 +626,8 @@ found_tlb:
}
/* Check the address space */
-if ((access_type == MMU_INST_FETCH ? msr_ir : msr_dr) != (tlb->attr & 1)) {
+if ((access_type == MMU_INST_FETCH ?
+FIELD_EX64(env->msr, MSR, IR) : msr_dr) != (tlb->attr & 1)) {
qemu_log_mask(CPU_LOG_MMU, "%s: AS doesn't match\n", __func__);
return -1;
}
@@ -839,7 +840,7 @@ found_tlb:
if (access_type == MMU_INST_FETCH) {
/* There is no way to fetch code using epid load */
assert(!use_epid);
-as = msr_ir;
+as = FIELD_EX64(env->msr, MSR, IR);
}
if (as != ((tlb->mas1 & MAS1_TS) >> MAS1_TS_SHIFT)) {
@@ -1169,7 +1170,7 @@ int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t
*ctx,
int mmu_idx)
{
int ret = -1;
-bool real_mode = (type == ACCESS_CODE && msr_ir == 0)
+bool real_mode = (type == ACCESS_CODE && !FIELD_EX64(env->msr, MSR, IR))
|| (type != ACCESS_CODE && msr_dr == 0);
switch (env->mmu_model) {
@@ -1231,7 +1232,7 @@ static void booke206_update_mas_tlb_miss(CPUPPCState
*env, target_ulong address,
bool use_epid = mmubooke206_get_as(env, mmu_idx, , , );
if (access_type == MMU_INST_FETCH) {
-as = msr_ir;
+as = FIELD_EX64(env->msr, MSR, IR);
}
env->spr[SPR_BOOKE_MAS0] = env->spr[SPR_BOOKE_MAS4] & MAS4_TLBSELD_MASK;
env->spr[SPR_BOOKE_MAS1] = env->spr[SPR_BOOKE_MAS4] & MAS4_TSIZED_MASK;
--
2.25.1
[PATCH v4 18/22] target/ppc: Remove msr_ts macro
msr_ts macro hides the usage of env->msr, which is a bad
behavior. Substitute it with FIELD_EX64 calls that explicitly use
env->msr as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
v4: patch is the same, changed some context lines
Signed-off-by: Víctor Colombo
---
target/ppc/cpu.h | 2 +-
target/ppc/kvm.c | 4 ++--
target/ppc/machine.c | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 74a3c01f99..5ac7d7d68f 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -354,6 +354,7 @@ typedef enum {
#define MSR_RI 1 /* Recoverable interrupt1*/
#define MSR_LE 0 /* Little-endian mode 1 hflags */
+FIELD(MSR, TS, MSR_TS0, 2)
FIELD(MSR, CM, MSR_CM, 1)
FIELD(MSR, GS, MSR_GS, 1)
FIELD(MSR, POW, MSR_POW, 1)
@@ -494,7 +495,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_hv (0)
#endif
#define msr_de ((env->msr >> MSR_DE) & 1)
-#define msr_ts ((env->msr >> MSR_TS1) & 3)
#define DBCR0_ICMP (1 << 27)
#define DBCR0_BRT (1 << 26)
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 8276326de9..59db1b9227 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -973,7 +973,7 @@ int kvm_arch_put_registers(CPUState *cs, int level)
}
#ifdef TARGET_PPC64
-if (msr_ts) {
+if (FIELD_EX64(env->msr, MSR, TS)) {
for (i = 0; i < ARRAY_SIZE(env->tm_gpr); i++) {
kvm_set_one_reg(cs, KVM_REG_PPC_TM_GPR(i), >tm_gpr[i]);
}
@@ -1281,7 +1281,7 @@ int kvm_arch_get_registers(CPUState *cs)
}
#ifdef TARGET_PPC64
-if (msr_ts) {
+if (FIELD_EX64(env->msr, MSR, TS)) {
for (i = 0; i < ARRAY_SIZE(env->tm_gpr); i++) {
kvm_get_one_reg(cs, KVM_REG_PPC_TM_GPR(i), >tm_gpr[i]);
}
diff --git a/target/ppc/machine.c b/target/ppc/machine.c
index e673944597..7104a5c67e 100644
--- a/target/ppc/machine.c
+++ b/target/ppc/machine.c
@@ -417,7 +417,7 @@ static bool tm_needed(void *opaque)
{
PowerPCCPU *cpu = opaque;
CPUPPCState *env = >env;
-return msr_ts;
+return FIELD_EX64(env->msr, MSR, TS);
}
static const VMStateDescription vmstate_tm = {
--
2.25.1
[PATCH v4 15/22] target/ppc: Remove msr_dr macro
msr_dr macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h | 2 +-
target/ppc/helper_regs.c | 3 +--
target/ppc/mmu_common.c | 10 ++
3 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 6cfbec26a1..cd672dec93 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -364,6 +364,7 @@ FIELD(MSR, PR, MSR_PR, 1)
FIELD(MSR, FP, MSR_FP, 1)
FIELD(MSR, ME, MSR_ME, 1)
FIELD(MSR, IR, MSR_IR, 1)
+FIELD(MSR, DR, MSR_DR, 1)
FIELD(MSR, DS, MSR_DS, 1)
FIELD(MSR, LE, MSR_LE, 1)
@@ -486,7 +487,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_de ((env->msr >> MSR_DE) & 1)
#define msr_fe1 ((env->msr >> MSR_FE1) & 1)
#define msr_ep ((env->msr >> MSR_EP) & 1)
-#define msr_dr ((env->msr >> MSR_DR) & 1)
#define msr_ts ((env->msr >> MSR_TS1) & 3)
#define DBCR0_ICMP (1 << 27)
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index e40078c001..b150b78182 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -227,8 +227,7 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value,
int alter_hv)
value &= ~MSR_HVB;
value |= env->msr & MSR_HVB;
}
-if (((value ^ env->msr) & R_MSR_IR_MASK) ||
-((value >> MSR_DR) & 1) != msr_dr) {
+if ((value ^ env->msr) & (R_MSR_IR_MASK | R_MSR_DR_MASK)) {
cpu_interrupt_exittb(cs);
}
if ((env->mmu_model == POWERPC_MMU_BOOKE ||
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 30deca0425..89107a6af2 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -388,7 +388,8 @@ static int get_segment_6xx_tlb(CPUPPCState *env, mmu_ctx_t
*ctx,
" nip=" TARGET_FMT_lx " lr=" TARGET_FMT_lx
" ir=%d dr=%d pr=%d %d t=%d\n",
eaddr, (int)(eaddr >> 28), sr, env->nip, env->lr,
- (int)FIELD_EX64(env->msr, MSR, IR), (int)msr_dr, pr ? 1 : 0,
+ (int)FIELD_EX64(env->msr, MSR, IR),
+ (int)FIELD_EX64(env->msr, MSR, DR), pr ? 1 : 0,
access_type == MMU_DATA_STORE, type);
pgidx = (eaddr & ~SEGMENT_MASK_256M) >> target_page_bits;
hash = vsid ^ pgidx;
@@ -627,7 +628,8 @@ found_tlb:
/* Check the address space */
if ((access_type == MMU_INST_FETCH ?
-FIELD_EX64(env->msr, MSR, IR) : msr_dr) != (tlb->attr & 1)) {
+FIELD_EX64(env->msr, MSR, IR) :
+FIELD_EX64(env->msr, MSR, DR)) != (tlb->attr & 1)) {
qemu_log_mask(CPU_LOG_MMU, "%s: AS doesn't match\n", __func__);
return -1;
}
@@ -1170,8 +1172,8 @@ int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t
*ctx,
int mmu_idx)
{
int ret = -1;
-bool real_mode = (type == ACCESS_CODE && !FIELD_EX64(env->msr, MSR, IR))
-|| (type != ACCESS_CODE && msr_dr == 0);
+bool real_mode = (type == ACCESS_CODE && !FIELD_EX64(env->msr, MSR, IR)) ||
+ (type != ACCESS_CODE && !FIELD_EX64(env->msr, MSR, DR));
switch (env->mmu_model) {
case POWERPC_MMU_SOFT_6xx:
--
2.25.1
[PATCH v4 17/22] target/ppc: Remove msr_fe0 and msr_fe1 macros
msr_fe0 and msr_fe1 macros hide the usage of env->msr, which is a bad
behavior. Substitute it with FIELD_EX64 calls that explicitly use
env->msr as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
v4: this patch is pretty much the same, just that keeping msr_de
changed some context lines in this patch and I had to resolve
the conflict
Signed-off-by: Víctor Colombo
---
target/ppc/cpu.h | 11 +--
target/ppc/excp_helper.c | 18 ++
2 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 5e804f0373..74a3c01f99 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -363,12 +363,21 @@ FIELD(MSR, EE, MSR_EE, 1)
FIELD(MSR, PR, MSR_PR, 1)
FIELD(MSR, FP, MSR_FP, 1)
FIELD(MSR, ME, MSR_ME, 1)
+FIELD(MSR, FE0, MSR_FE0, 1)
+FIELD(MSR, FE1, MSR_FE1, 1)
FIELD(MSR, EP, MSR_EP, 1)
FIELD(MSR, IR, MSR_IR, 1)
FIELD(MSR, DR, MSR_DR, 1)
FIELD(MSR, DS, MSR_DS, 1)
FIELD(MSR, LE, MSR_LE, 1)
+/*
+ * FE0 and FE1 bits are not side-by-side
+ * so we can't combine them using FIELD()
+ */
+#define FIELD_EX64_FE(msr) \
+((FIELD_EX64(msr, MSR, FE0) << 1) | FIELD_EX64(msr, MSR, FE1))
+
/* PMU bits */
#define MMCR0_FC PPC_BIT(32) /* Freeze Counters */
#define MMCR0_PMAO PPC_BIT(56) /* Perf Monitor Alert Ocurred */
@@ -484,9 +493,7 @@ FIELD(MSR, LE, MSR_LE, 1)
#else
#define msr_hv (0)
#endif
-#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
#define msr_de ((env->msr >> MSR_DE) & 1)
-#define msr_fe1 ((env->msr >> MSR_FE1) & 1)
#define msr_ts ((env->msr >> MSR_TS1) & 3)
#define DBCR0_ICMP (1 << 27)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 30baad0489..aa201c63c6 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -478,8 +478,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception*/
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
-if ((msr_fe0 == 0 && msr_fe1 == 0) ||
-!FIELD_EX64(env->msr, MSR, FP)) {
+if (!FIELD_EX64_FE(env->msr) || !FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu);
return;
@@ -616,8 +615,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception*/
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
-if ((msr_fe0 == 0 && msr_fe1 == 0) ||
-!FIELD_EX64(env->msr, MSR, FP)) {
+if (!FIELD_EX64_FE(env->msr) || !FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu);
return;
@@ -790,8 +788,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception*/
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
-if ((msr_fe0 == 0 && msr_fe1 == 0) ||
-!FIELD_EX64(env->msr, MSR, FP)) {
+if (!FIELD_EX64_FE(env->msr) || !FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu);
return;
@@ -976,8 +973,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception*/
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
-if ((msr_fe0 == 0 && msr_fe1 == 0) ||
-!FIELD_EX64(env->msr, MSR, FP)) {
+if (!FIELD_EX64_FE(env->msr) || !FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu);
return;
@@ -1175,8 +1171,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception*/
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
-if ((msr_fe0 == 0 && msr_fe1 == 0) ||
-!FIELD_EX64(env->msr, MSR, FP)) {
+if (!FIELD_EX64_FE(env->msr) || !FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu);
return;
@@ -1439,8 +1434,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception*/
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
-if ((msr_fe0 == 0 && msr_fe1 == 0) ||
-!FIELD_EX64(env->msr, MSR, FP)) {
+if (!FIELD_EX64_FE(env->msr) || !FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore();
[PATCH v4 13/22] target/ppc: Remove msr_cm macro
msr_cm macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h| 2 +-
target/ppc/mmu_common.c | 2 +-
target/ppc/mmu_helper.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 17b7f5f6d9..75a81d4304 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -354,6 +354,7 @@ typedef enum {
#define MSR_RI 1 /* Recoverable interrupt1*/
#define MSR_LE 0 /* Little-endian mode 1 hflags */
+FIELD(MSR, CM, MSR_CM, 1)
FIELD(MSR, GS, MSR_GS, 1)
FIELD(MSR, POW, MSR_POW, 1)
FIELD(MSR, CE, MSR_CE, 1)
@@ -480,7 +481,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#else
#define msr_hv (0)
#endif
-#define msr_cm ((env->msr >> MSR_CM) & 1)
#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
#define msr_de ((env->msr >> MSR_DE) & 1)
#define msr_fe1 ((env->msr >> MSR_FE1) & 1)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 7e77b9b84a..031bb4493b 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -692,7 +692,7 @@ int ppcmas_tlb_check(CPUPPCState *env, ppcmas_tlb_t *tlb,
hwaddr mask;
uint32_t tlb_pid;
-if (!msr_cm) {
+if (!FIELD_EX64(env->msr, MSR, CM)) {
/* In 32bit mode we can only address 32bit EAs */
address = (uint32_t)address;
}
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index 5bb5c71038..15239dc95b 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -1003,7 +1003,7 @@ void helper_booke206_tlbwe(CPUPPCState *env)
/* Add a mask for page attributes */
mask |= MAS2_ACM | MAS2_VLE | MAS2_W | MAS2_I | MAS2_M | MAS2_G | MAS2_E;
-if (!msr_cm) {
+if (!FIELD_EX64(env->msr, MSR, CM)) {
/*
* Executing a tlbwe instruction in 32-bit mode will set bits
* 0:31 of the TLB EPN field to zero.
--
2.25.1
[PATCH v4 12/22] target/ppc: Remove msr_fp macro
msr_fp macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h | 2 +-
target/ppc/excp_helper.c | 18 --
2 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index bd5dffc9b1..17b7f5f6d9 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -360,6 +360,7 @@ FIELD(MSR, CE, MSR_CE, 1)
FIELD(MSR, ILE, MSR_ILE, 1)
FIELD(MSR, EE, MSR_EE, 1)
FIELD(MSR, PR, MSR_PR, 1)
+FIELD(MSR, FP, MSR_FP, 1)
FIELD(MSR, ME, MSR_ME, 1)
FIELD(MSR, DS, MSR_DS, 1)
FIELD(MSR, LE, MSR_LE, 1)
@@ -480,7 +481,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_hv (0)
#endif
#define msr_cm ((env->msr >> MSR_CM) & 1)
-#define msr_fp ((env->msr >> MSR_FP) & 1)
#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
#define msr_de ((env->msr >> MSR_DE) & 1)
#define msr_fe1 ((env->msr >> MSR_FE1) & 1)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index e254ae806c..30baad0489 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -478,7 +478,8 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception*/
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
-if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
+if ((msr_fe0 == 0 && msr_fe1 == 0) ||
+!FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu);
return;
@@ -615,7 +616,8 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception*/
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
-if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
+if ((msr_fe0 == 0 && msr_fe1 == 0) ||
+!FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu);
return;
@@ -788,7 +790,8 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception*/
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
-if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
+if ((msr_fe0 == 0 && msr_fe1 == 0) ||
+!FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu);
return;
@@ -973,7 +976,8 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception*/
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
-if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
+if ((msr_fe0 == 0 && msr_fe1 == 0) ||
+!FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu);
return;
@@ -1171,7 +1175,8 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception*/
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
-if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
+if ((msr_fe0 == 0 && msr_fe1 == 0) ||
+!FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu);
return;
@@ -1434,7 +1439,8 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_PROGRAM: /* Program exception*/
switch (env->error_code & ~0xF) {
case POWERPC_EXCP_FP:
-if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) {
+if ((msr_fe0 == 0 && msr_fe1 == 0) ||
+!FIELD_EX64(env->msr, MSR, FP)) {
trace_ppc_excp_fp_ignore();
powerpc_reset_excp_state(cpu);
return;
--
2.25.1
[PATCH v4 10/22] target/ppc: Remove msr_me macro
msr_me macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h | 2 +-
target/ppc/excp_helper.c | 12 ++--
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 5a83c4b028..deb861f5f3 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -359,6 +359,7 @@ FIELD(MSR, CE, MSR_CE, 1)
FIELD(MSR, ILE, MSR_ILE, 1)
FIELD(MSR, EE, MSR_EE, 1)
FIELD(MSR, PR, MSR_PR, 1)
+FIELD(MSR, ME, MSR_ME, 1)
FIELD(MSR, DS, MSR_DS, 1)
FIELD(MSR, LE, MSR_LE, 1)
@@ -480,7 +481,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_cm ((env->msr >> MSR_CM) & 1)
#define msr_gs ((env->msr >> MSR_GS) & 1)
#define msr_fp ((env->msr >> MSR_FP) & 1)
-#define msr_me ((env->msr >> MSR_ME) & 1)
#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
#define msr_de ((env->msr >> MSR_DE) & 1)
#define msr_fe1 ((env->msr >> MSR_FE1) & 1)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index ee63641dd0..e254ae806c 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -444,7 +444,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
srr1 = SPR_40x_SRR3;
break;
case POWERPC_EXCP_MCHECK:/* Machine check exception */
-if (msr_me == 0) {
+if (!FIELD_EX64(env->msr, MSR, ME)) {
/*
* Machine check exception is not enabled. Enter
* checkstop state.
@@ -575,7 +575,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_CRITICAL:/* Critical input */
break;
case POWERPC_EXCP_MCHECK:/* Machine check exception */
-if (msr_me == 0) {
+if (!FIELD_EX64(env->msr, MSR, ME)) {
/*
* Machine check exception is not enabled. Enter
* checkstop state.
@@ -748,7 +748,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
switch (excp) {
case POWERPC_EXCP_MCHECK:/* Machine check exception */
-if (msr_me == 0) {
+if (!FIELD_EX64(env->msr, MSR, ME)) {
/*
* Machine check exception is not enabled. Enter
* checkstop state.
@@ -933,7 +933,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
switch (excp) {
case POWERPC_EXCP_MCHECK:/* Machine check exception */
-if (msr_me == 0) {
+if (!FIELD_EX64(env->msr, MSR, ME)) {
/*
* Machine check exception is not enabled. Enter
* checkstop state.
@@ -1128,7 +1128,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
srr1 = SPR_BOOKE_CSRR1;
break;
case POWERPC_EXCP_MCHECK:/* Machine check exception */
-if (msr_me == 0) {
+if (!FIELD_EX64(env->msr, MSR, ME)) {
/*
* Machine check exception is not enabled. Enter
* checkstop state.
@@ -1366,7 +1366,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
switch (excp) {
case POWERPC_EXCP_MCHECK:/* Machine check exception */
-if (msr_me == 0) {
+if (!FIELD_EX64(env->msr, MSR, ME)) {
/*
* Machine check exception is not enabled. Enter
* checkstop state.
--
2.25.1
[PATCH v4 09/22] target/ppc: Remove msr_pow macro
msr_pow macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h | 2 +-
target/ppc/excp_helper.c | 12 ++--
target/ppc/helper_regs.c | 2 +-
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index b1883b23e2..5a83c4b028 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -354,6 +354,7 @@ typedef enum {
#define MSR_RI 1 /* Recoverable interrupt1*/
#define MSR_LE 0 /* Little-endian mode 1 hflags */
+FIELD(MSR, POW, MSR_POW, 1)
FIELD(MSR, CE, MSR_CE, 1)
FIELD(MSR, ILE, MSR_ILE, 1)
FIELD(MSR, EE, MSR_EE, 1)
@@ -478,7 +479,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#endif
#define msr_cm ((env->msr >> MSR_CM) & 1)
#define msr_gs ((env->msr >> MSR_GS) & 1)
-#define msr_pow ((env->msr >> MSR_POW) & 1)
#define msr_fp ((env->msr >> MSR_FP) & 1)
#define msr_me ((env->msr >> MSR_ME) & 1)
#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index ca80c1ed63..ee63641dd0 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -661,7 +661,7 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_ITLB: /* Instruction TLB error*/
break;
case POWERPC_EXCP_RESET: /* System reset exception */
-if (msr_pow) {
+if (FIELD_EX64(env->msr, MSR, POW)) {
cpu_abort(cs, "Trying to deliver power-saving system reset "
"exception %d with no HV support\n", excp);
}
@@ -853,7 +853,7 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_DECR: /* Decrementer exception*/
break;
case POWERPC_EXCP_RESET: /* System reset exception */
-if (msr_pow) {
+if (FIELD_EX64(env->msr, MSR, POW)) {
cpu_abort(cs, "Trying to deliver power-saving system reset "
"exception %d with no HV support\n", excp);
}
@@ -1038,7 +1038,7 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp)
case POWERPC_EXCP_DECR: /* Decrementer exception*/
break;
case POWERPC_EXCP_RESET: /* System reset exception */
-if (msr_pow) {
+if (FIELD_EX64(env->msr, MSR, POW)) {
cpu_abort(cs, "Trying to deliver power-saving system reset "
"exception %d with no HV support\n", excp);
}
@@ -1248,7 +1248,7 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp)
env->spr[SPR_BOOKE_ESR] = ESR_SPV;
break;
case POWERPC_EXCP_RESET: /* System reset exception */
-if (msr_pow) {
+if (FIELD_EX64(env->msr, MSR, POW)) {
cpu_abort(cs, "Trying to deliver power-saving system reset "
"exception %d with no HV support\n", excp);
}
@@ -1507,7 +1507,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
break;
case POWERPC_EXCP_RESET: /* System reset exception */
/* A power-saving exception sets ME, otherwise it is unchanged */
-if (msr_pow) {
+if (FIELD_EX64(env->msr, MSR, POW)) {
/* indicate that we resumed from power save mode */
msr |= 0x1;
new_msr |= ((target_ulong)1 << MSR_ME);
@@ -1519,7 +1519,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
*/
new_msr |= (target_ulong)MSR_HVB;
} else {
-if (msr_pow) {
+if (FIELD_EX64(env->msr, MSR, POW)) {
cpu_abort(cs, "Trying to deliver power-saving system reset "
"exception %d with no HV support\n", excp);
}
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index 77bc57415c..79c0143a7a 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -261,7 +261,7 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value,
int alter_hv)
env->msr = value;
hreg_compute_hflags(env);
#if !defined(CONFIG_USER_ONLY)
-if (unlikely(msr_pow == 1)) {
+if (unlikely(FIELD_EX64(env->msr, MSR, POW))) {
if (!env->pending_interrupts && (*env->check_pow)(env)) {
cs->halted = 1;
excp = EXCP_HALTED;
--
2.25.1
[PATCH v4 11/22] target/ppc: Remove msr_gs macro
msr_gs macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h | 2 +-
target/ppc/helper_regs.c | 2 +-
target/ppc/mmu_helper.c | 4 ++--
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index deb861f5f3..bd5dffc9b1 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -354,6 +354,7 @@ typedef enum {
#define MSR_RI 1 /* Recoverable interrupt1*/
#define MSR_LE 0 /* Little-endian mode 1 hflags */
+FIELD(MSR, GS, MSR_GS, 1)
FIELD(MSR, POW, MSR_POW, 1)
FIELD(MSR, CE, MSR_CE, 1)
FIELD(MSR, ILE, MSR_ILE, 1)
@@ -479,7 +480,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_hv (0)
#endif
#define msr_cm ((env->msr >> MSR_CM) & 1)
-#define msr_gs ((env->msr >> MSR_GS) & 1)
#define msr_fp ((env->msr >> MSR_FP) & 1)
#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
#define msr_de ((env->msr >> MSR_DE) & 1)
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index 79c0143a7a..4e649d8b0e 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -233,7 +233,7 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value,
int alter_hv)
}
if ((env->mmu_model == POWERPC_MMU_BOOKE ||
env->mmu_model == POWERPC_MMU_BOOKE206) &&
-((value >> MSR_GS) & 1) != msr_gs) {
+((value ^ env->msr) & R_MSR_GS_MASK)) {
cpu_interrupt_exittb(cs);
}
if (unlikely((env->flags & POWERPC_FLAG_TGPR) &&
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index 142a717255..5bb5c71038 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -935,7 +935,7 @@ void helper_booke206_tlbwe(CPUPPCState *env)
}
if (((env->spr[SPR_BOOKE_MAS0] & MAS0_ATSEL) == MAS0_ATSEL_LRAT) &&
-!msr_gs) {
+!FIELD_EX64(env->msr, MSR, GS)) {
/* XXX we don't support direct LRAT setting yet */
fprintf(stderr, "cpu: don't support LRAT setting yet\n");
return;
@@ -962,7 +962,7 @@ void helper_booke206_tlbwe(CPUPPCState *env)
POWERPC_EXCP_INVAL_INVAL, GETPC());
}
-if (msr_gs) {
+if (FIELD_EX64(env->msr, MSR, GS)) {
cpu_abort(env_cpu(env), "missing HV implementation\n");
}
--
2.25.1
[PATCH v4 03/22] target/ppc: Remove msr_pr macro
msr_pr macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
hw/ppc/pegasos2.c| 2 +-
hw/ppc/spapr.c | 2 +-
target/ppc/cpu.h | 4 +++-
target/ppc/cpu_init.c| 4 ++--
target/ppc/excp_helper.c | 8 +---
target/ppc/mem_helper.c | 5 +++--
target/ppc/mmu-radix64.c | 5 +++--
target/ppc/mmu_common.c | 23 ---
8 files changed, 30 insertions(+), 23 deletions(-)
diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c
index 56bf203dfd..9411ca6b16 100644
--- a/hw/ppc/pegasos2.c
+++ b/hw/ppc/pegasos2.c
@@ -461,7 +461,7 @@ static void pegasos2_hypercall(PPCVirtualHypervisor *vhyp,
PowerPCCPU *cpu)
/* The TCG path should also be holding the BQL at this point */
g_assert(qemu_mutex_iothread_locked());
-if (msr_pr) {
+if (FIELD_EX64(env->msr, MSR, PR)) {
qemu_log_mask(LOG_GUEST_ERROR, "Hypercall made with MSR[PR]=1\n");
env->gpr[3] = H_PRIVILEGE;
} else if (env->gpr[3] == KVMPPC_H_RTAS) {
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 22569305d2..fe9937e811 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1269,7 +1269,7 @@ static void emulate_spapr_hypercall(PPCVirtualHypervisor
*vhyp,
g_assert(!vhyp_cpu_in_nested(cpu));
-if (msr_pr) {
+if (FIELD_EX64(env->msr, MSR, PR)) {
hcall_dprintf("Hypercall made with MSR[PR]=1\n");
env->gpr[3] = H_PRIVILEGE;
} else {
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 112b456220..8f1dc4cb15 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -25,6 +25,7 @@
#include "exec/cpu-defs.h"
#include "cpu-qom.h"
#include "qom/object.h"
+#include "hw/registerfields.h"
#define TCG_GUEST_DEFAULT_MO 0
@@ -353,6 +354,8 @@ typedef enum {
#define MSR_RI 1 /* Recoverable interrupt1*/
#define MSR_LE 0 /* Little-endian mode 1 hflags */
+FIELD(MSR, PR, MSR_PR, 1)
+
/* PMU bits */
#define MMCR0_FC PPC_BIT(32) /* Freeze Counters */
#define MMCR0_PMAO PPC_BIT(56) /* Perf Monitor Alert Ocurred */
@@ -474,7 +477,6 @@ typedef enum {
#define msr_ce ((env->msr >> MSR_CE) & 1)
#define msr_ile ((env->msr >> MSR_ILE) & 1)
#define msr_ee ((env->msr >> MSR_EE) & 1)
-#define msr_pr ((env->msr >> MSR_PR) & 1)
#define msr_fp ((env->msr >> MSR_FP) & 1)
#define msr_me ((env->msr >> MSR_ME) & 1)
#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index d42e2ba8e0..ac16a64846 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -6303,7 +6303,7 @@ static bool cpu_has_work_POWER9(CPUState *cs)
if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) &&
(env->spr[SPR_LPCR] & LPCR_EEE)) {
bool heic = !!(env->spr[SPR_LPCR] & LPCR_HEIC);
-if (heic == 0 || !msr_hv || msr_pr) {
+if (!heic || !msr_hv || FIELD_EX64(env->msr, MSR, PR)) {
return true;
}
}
@@ -6517,7 +6517,7 @@ static bool cpu_has_work_POWER10(CPUState *cs)
if ((env->pending_interrupts & (1u << PPC_INTERRUPT_EXT)) &&
(env->spr[SPR_LPCR] & LPCR_EEE)) {
bool heic = !!(env->spr[SPR_LPCR] & LPCR_HEIC);
-if (heic == 0 || !msr_hv || msr_pr) {
+if (!heic || !msr_hv || FIELD_EX64(env->msr, MSR, PR)) {
return true;
}
}
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index d3e2cfcd71..7e8e34ef06 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1738,7 +1738,8 @@ static void ppc_hw_interrupt(CPUPPCState *env)
bool lpes0 = !!(env->spr[SPR_LPCR] & LPCR_LPES0);
bool heic = !!(env->spr[SPR_LPCR] & LPCR_HEIC);
/* HEIC blocks delivery to the hypervisor */
-if ((async_deliver && !(heic && msr_hv && !msr_pr)) ||
+if ((async_deliver && !(heic && msr_hv &&
+!FIELD_EX64(env->msr, MSR, PR))) ||
(env->has_hv_mode && msr_hv == 0 && !lpes0)) {
if (books_vhyp_promotes_external_to_hvirt(cpu)) {
powerpc_excp(cpu, POWERPC_EXCP_HVIRT);
@@ -1818,7 +1819,8 @@ static void ppc_hw_interrupt(CPUPPCState *env)
* EBB exception must be taken in problem state and
* with BESCR_GE set.
*/
-if (msr_pr == 1 && env->spr[SPR_BESCR] & BESCR_GE) {
+if (FIELD_EX64(env->msr, MSR, PR) &&
+(env->spr[SPR_BESCR] & BESCR_GE)) {
env->pending_interrupts &= ~(1 << PPC_INTERRUPT_EBB);
if (env->spr[SPR_BESCR] & BESCR_PMEO) {
@@ -2094,7 +2096,7 @@ static void do_ebb(CPUPPCState *env, int ebb_excp)
env->spr[SPR_BESCR] |= BESCR_EEO;
}
[PATCH v4 06/22] target/ppc: Remove msr_ile macro
msr_ile macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 5abc612fe0..0d5a850794 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -354,6 +354,7 @@ typedef enum {
#define MSR_RI 1 /* Recoverable interrupt1*/
#define MSR_LE 0 /* Little-endian mode 1 hflags */
+FIELD(MSR, ILE, MSR_ILE, 1)
FIELD(MSR, PR, MSR_PR, 1)
FIELD(MSR, DS, MSR_DS, 1)
FIELD(MSR, LE, MSR_LE, 1)
@@ -477,7 +478,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_gs ((env->msr >> MSR_GS) & 1)
#define msr_pow ((env->msr >> MSR_POW) & 1)
#define msr_ce ((env->msr >> MSR_CE) & 1)
-#define msr_ile ((env->msr >> MSR_ILE) & 1)
#define msr_ee ((env->msr >> MSR_EE) & 1)
#define msr_fp ((env->msr >> MSR_FP) & 1)
#define msr_me ((env->msr >> MSR_ME) & 1)
@@ -2679,7 +2679,7 @@ static inline bool
ppc_interrupts_little_endian(PowerPCCPU *cpu, bool hv)
} else if (pcc->lpcr_mask & LPCR_ILE) {
ile = !!(env->spr[SPR_LPCR] & LPCR_ILE);
} else {
-ile = !!(msr_ile);
+ile = FIELD_EX64(env->msr, MSR, ILE);
}
return ile;
--
2.25.1
[PATCH v4 08/22] target/ppc: Remove msr_ce macro
msr_ce macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h | 2 +-
target/ppc/excp_helper.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 06667c2c60..b1883b23e2 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -354,6 +354,7 @@ typedef enum {
#define MSR_RI 1 /* Recoverable interrupt1*/
#define MSR_LE 0 /* Little-endian mode 1 hflags */
+FIELD(MSR, CE, MSR_CE, 1)
FIELD(MSR, ILE, MSR_ILE, 1)
FIELD(MSR, EE, MSR_EE, 1)
FIELD(MSR, PR, MSR_PR, 1)
@@ -478,7 +479,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_cm ((env->msr >> MSR_CM) & 1)
#define msr_gs ((env->msr >> MSR_GS) & 1)
#define msr_pow ((env->msr >> MSR_POW) & 1)
-#define msr_ce ((env->msr >> MSR_CE) & 1)
#define msr_fp ((env->msr >> MSR_FP) & 1)
#define msr_me ((env->msr >> MSR_ME) & 1)
#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 4c206ba209..ca80c1ed63 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1749,7 +1749,7 @@ static void ppc_hw_interrupt(CPUPPCState *env)
return;
}
}
-if (msr_ce != 0) {
+if (FIELD_EX64(env->msr, MSR, CE)) {
/* External critical interrupt */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_CEXT)) {
powerpc_excp(cpu, POWERPC_EXCP_CRITICAL);
--
2.25.1
[PATCH v4 02/22] target/ppc: Remove unused msr_* macros
Some msr_* macros are not used anywhere. Remove them as part of
the work to remove all hidden usage of *env.
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Víctor Colombo
---
v4: an usage of msr_de was added by a recent patch that was not in
master yet. Re-add it to this patch
Signed-off-by: Víctor Colombo
---
target/ppc/cpu.h | 20
1 file changed, 20 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index ad31e51d69..112b456220 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -463,23 +463,14 @@ typedef enum {
#define HFSCR_MSGP PPC_BIT(53) /* Privileged Message Send Facilities */
#define HFSCR_IC_MSGP 0xA
-#define msr_sf ((env->msr >> MSR_SF) & 1)
-#define msr_isf ((env->msr >> MSR_ISF) & 1)
#if defined(TARGET_PPC64)
#define msr_hv ((env->msr >> MSR_HV) & 1)
#else
#define msr_hv (0)
#endif
#define msr_cm ((env->msr >> MSR_CM) & 1)
-#define msr_icm ((env->msr >> MSR_ICM) & 1)
#define msr_gs ((env->msr >> MSR_GS) & 1)
-#define msr_ucle ((env->msr >> MSR_UCLE) & 1)
-#define msr_vr ((env->msr >> MSR_VR) & 1)
-#define msr_spe ((env->msr >> MSR_SPE) & 1)
-#define msr_vsx ((env->msr >> MSR_VSX) & 1)
-#define msr_key ((env->msr >> MSR_KEY) & 1)
#define msr_pow ((env->msr >> MSR_POW) & 1)
-#define msr_tgpr ((env->msr >> MSR_TGPR) & 1)
#define msr_ce ((env->msr >> MSR_CE) & 1)
#define msr_ile ((env->msr >> MSR_ILE) & 1)
#define msr_ee ((env->msr >> MSR_EE) & 1)
@@ -487,25 +478,14 @@ typedef enum {
#define msr_fp ((env->msr >> MSR_FP) & 1)
#define msr_me ((env->msr >> MSR_ME) & 1)
#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
-#define msr_se ((env->msr >> MSR_SE) & 1)
-#define msr_dwe ((env->msr >> MSR_DWE) & 1)
-#define msr_uble ((env->msr >> MSR_UBLE) & 1)
-#define msr_be ((env->msr >> MSR_BE) & 1)
#define msr_de ((env->msr >> MSR_DE) & 1)
#define msr_fe1 ((env->msr >> MSR_FE1) & 1)
-#define msr_al ((env->msr >> MSR_AL) & 1)
#define msr_ep ((env->msr >> MSR_EP) & 1)
#define msr_ir ((env->msr >> MSR_IR) & 1)
#define msr_dr ((env->msr >> MSR_DR) & 1)
-#define msr_is ((env->msr >> MSR_IS) & 1)
#define msr_ds ((env->msr >> MSR_DS) & 1)
-#define msr_pe ((env->msr >> MSR_PE) & 1)
-#define msr_px ((env->msr >> MSR_PX) & 1)
-#define msr_pmm ((env->msr >> MSR_PMM) & 1)
-#define msr_ri ((env->msr >> MSR_RI) & 1)
#define msr_le ((env->msr >> MSR_LE) & 1)
#define msr_ts ((env->msr >> MSR_TS1) & 3)
-#define msr_tm ((env->msr >> MSR_TM) & 1)
#define DBCR0_ICMP (1 << 27)
#define DBCR0_BRT (1 << 26)
--
2.25.1
[PATCH v4 05/22] target/ppc: Remove msr_ds macro
msr_ds macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h| 2 +-
target/ppc/mmu_common.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index c561d664de..5abc612fe0 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -355,6 +355,7 @@ typedef enum {
#define MSR_LE 0 /* Little-endian mode 1 hflags */
FIELD(MSR, PR, MSR_PR, 1)
+FIELD(MSR, DS, MSR_DS, 1)
FIELD(MSR, LE, MSR_LE, 1)
/* PMU bits */
@@ -486,7 +487,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_ep ((env->msr >> MSR_EP) & 1)
#define msr_ir ((env->msr >> MSR_IR) & 1)
#define msr_dr ((env->msr >> MSR_DR) & 1)
-#define msr_ds ((env->msr >> MSR_DS) & 1)
#define msr_ts ((env->msr >> MSR_TS1) & 3)
#define DBCR0_ICMP (1 << 27)
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index 6ef8b1c00d..7e77b9b84a 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -768,7 +768,7 @@ static bool mmubooke206_get_as(CPUPPCState *env,
*pr_out = !!(epidr & EPID_EPR);
return true;
} else {
-*as_out = msr_ds;
+*as_out = FIELD_EX64(env->msr, MSR, DS);
*pr_out = FIELD_EX64(env->msr, MSR, PR);
return false;
}
--
2.25.1
[PATCH v4 07/22] target/ppc: Remove msr_ee macro
msr_ee macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h | 2 +-
target/ppc/cpu_init.c| 15 ++-
target/ppc/excp_helper.c | 2 +-
target/ppc/kvm.c | 3 ++-
4 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 0d5a850794..06667c2c60 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -355,6 +355,7 @@ typedef enum {
#define MSR_LE 0 /* Little-endian mode 1 hflags */
FIELD(MSR, ILE, MSR_ILE, 1)
+FIELD(MSR, EE, MSR_EE, 1)
FIELD(MSR, PR, MSR_PR, 1)
FIELD(MSR, DS, MSR_DS, 1)
FIELD(MSR, LE, MSR_LE, 1)
@@ -478,7 +479,6 @@ FIELD(MSR, LE, MSR_LE, 1)
#define msr_gs ((env->msr >> MSR_GS) & 1)
#define msr_pow ((env->msr >> MSR_POW) & 1)
#define msr_ce ((env->msr >> MSR_CE) & 1)
-#define msr_ee ((env->msr >> MSR_EE) & 1)
#define msr_fp ((env->msr >> MSR_FP) & 1)
#define msr_me ((env->msr >> MSR_ME) & 1)
#define msr_fe0 ((env->msr >> MSR_FE0) & 1)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 0c6b83406e..10e7c41bc9 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -5949,7 +5949,8 @@ static bool cpu_has_work_POWER7(CPUState *cs)
}
return false;
} else {
-return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+return FIELD_EX64(env->msr, MSR, EE) &&
+ (cs->interrupt_request & CPU_INTERRUPT_HARD);
}
}
@@ -6120,7 +6121,8 @@ static bool cpu_has_work_POWER8(CPUState *cs)
}
return false;
} else {
-return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+return FIELD_EX64(env->msr, MSR, EE) &&
+ (cs->interrupt_request & CPU_INTERRUPT_HARD);
}
}
@@ -6337,7 +6339,8 @@ static bool cpu_has_work_POWER9(CPUState *cs)
}
return false;
} else {
-return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+return FIELD_EX64(env->msr, MSR, EE) &&
+ (cs->interrupt_request & CPU_INTERRUPT_HARD);
}
}
@@ -6551,7 +6554,8 @@ static bool cpu_has_work_POWER10(CPUState *cs)
}
return false;
} else {
-return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+return FIELD_EX64(env->msr, MSR, EE) &&
+ (cs->interrupt_request & CPU_INTERRUPT_HARD);
}
}
@@ -7119,7 +7123,8 @@ static bool ppc_cpu_has_work(CPUState *cs)
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = >env;
-return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
+return FIELD_EX64(env->msr, MSR, EE) &&
+ (cs->interrupt_request & CPU_INTERRUPT_HARD);
}
static void ppc_cpu_reset(DeviceState *dev)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 7e8e34ef06..4c206ba209 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1709,7 +1709,7 @@ static void ppc_hw_interrupt(CPUPPCState *env)
* clear when coming out of some power management states (in order
* for them to become a 0x100).
*/
-async_deliver = (msr_ee != 0) || env->resume_as_sreset;
+async_deliver = FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sreset;
/* Hypervisor decrementer exception */
if (env->pending_interrupts & (1 << PPC_INTERRUPT_HDECR)) {
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index a3c31b4e48..8276326de9 100644
--- a/target/ppc/kvm.c
+++ b/target/ppc/kvm.c
@@ -1351,7 +1351,8 @@ static int kvmppc_handle_halt(PowerPCCPU *cpu)
CPUState *cs = CPU(cpu);
CPUPPCState *env = >env;
-if (!(cs->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
+if (!(cs->interrupt_request & CPU_INTERRUPT_HARD) &&
+FIELD_EX64(env->msr, MSR, EE)) {
cs->halted = 1;
cs->exception_index = EXCP_HLT;
}
--
2.25.1
[PATCH v4 01/22] target/ppc: Remove fpscr_* macros from cpu.h
fpscr_* defined macros are hiding the usage of *env behind them.
Substitute the usage of these macros with `env->fpscr & FP_*` to make
the code cleaner.
Suggested-by: Richard Henderson
Reviewed-by: Richard Henderson
Signed-off-by: Víctor Colombo
---
target/ppc/cpu.c| 2 +-
target/ppc/cpu.h| 29 -
target/ppc/fpu_helper.c | 28 ++--
3 files changed, 15 insertions(+), 44 deletions(-)
diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c
index d7b42bae52..401b6f9e63 100644
--- a/target/ppc/cpu.c
+++ b/target/ppc/cpu.c
@@ -88,7 +88,7 @@ static inline void fpscr_set_rounding_mode(CPUPPCState *env)
int rnd_type;
/* Set rounding mode */
-switch (fpscr_rn) {
+switch (env->fpscr & FP_RN) {
case 0:
/* Best approximation (round to nearest) */
rnd_type = float_round_nearest_even;
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index c2b6c987c0..ad31e51d69 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -713,41 +713,12 @@ enum {
#define FPSCR_NI 2 /* Floating-point non-IEEE mode */
#define FPSCR_RN11
#define FPSCR_RN00 /* Floating-point rounding control */
-#define fpscr_drn(((env->fpscr) & FP_DRN) >> FPSCR_DRN0)
-#define fpscr_fex(((env->fpscr) >> FPSCR_FEX)& 0x1)
-#define fpscr_vx (((env->fpscr) >> FPSCR_VX) & 0x1)
-#define fpscr_ox (((env->fpscr) >> FPSCR_OX) & 0x1)
-#define fpscr_ux (((env->fpscr) >> FPSCR_UX) & 0x1)
-#define fpscr_zx (((env->fpscr) >> FPSCR_ZX) & 0x1)
-#define fpscr_xx (((env->fpscr) >> FPSCR_XX) & 0x1)
-#define fpscr_vxsnan (((env->fpscr) >> FPSCR_VXSNAN) & 0x1)
-#define fpscr_vxisi (((env->fpscr) >> FPSCR_VXISI) & 0x1)
-#define fpscr_vxidi (((env->fpscr) >> FPSCR_VXIDI) & 0x1)
-#define fpscr_vxzdz (((env->fpscr) >> FPSCR_VXZDZ) & 0x1)
-#define fpscr_vximz (((env->fpscr) >> FPSCR_VXIMZ) & 0x1)
-#define fpscr_vxvc (((env->fpscr) >> FPSCR_VXVC) & 0x1)
-#define fpscr_fpcc (((env->fpscr) >> FPSCR_FPCC) & 0xF)
-#define fpscr_vxsoft (((env->fpscr) >> FPSCR_VXSOFT) & 0x1)
-#define fpscr_vxsqrt (((env->fpscr) >> FPSCR_VXSQRT) & 0x1)
-#define fpscr_vxcvi (((env->fpscr) >> FPSCR_VXCVI) & 0x1)
-#define fpscr_ve (((env->fpscr) >> FPSCR_VE) & 0x1)
-#define fpscr_oe (((env->fpscr) >> FPSCR_OE) & 0x1)
-#define fpscr_ue (((env->fpscr) >> FPSCR_UE) & 0x1)
-#define fpscr_ze (((env->fpscr) >> FPSCR_ZE) & 0x1)
-#define fpscr_xe (((env->fpscr) >> FPSCR_XE) & 0x1)
-#define fpscr_ni (((env->fpscr) >> FPSCR_NI) & 0x1)
-#define fpscr_rn (((env->fpscr) >> FPSCR_RN0)& 0x3)
/* Invalid operation exception summary */
#define FPSCR_IX ((1 << FPSCR_VXSNAN) | (1 << FPSCR_VXISI) | \
(1 << FPSCR_VXIDI) | (1 << FPSCR_VXZDZ) | \
(1 << FPSCR_VXIMZ) | (1 << FPSCR_VXVC) | \
(1 << FPSCR_VXSOFT) | (1 << FPSCR_VXSQRT) | \
(1 << FPSCR_VXCVI))
-/* exception summary */
-#define fpscr_ex (((env->fpscr) >> FPSCR_XX) & 0x1F)
-/* enabled exception summary */
-#define fpscr_eex (((env->fpscr) >> FPSCR_XX) & ((env->fpscr) >> FPSCR_XE) & \
- 0x1F)
#define FP_DRN2 (1ull << FPSCR_DRN2)
#define FP_DRN1 (1ull << FPSCR_DRN1)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 99281cc37a..f6c8318a71 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -202,7 +202,7 @@ static void finish_invalid_op_excp(CPUPPCState *env, int
op, uintptr_t retaddr)
env->fpscr |= FP_VX;
/* Update the floating-point exception summary */
env->fpscr |= FP_FX;
-if (fpscr_ve != 0) {
+if (env->fpscr & FP_VE) {
/* Update the floating-point enabled exception summary */
env->fpscr |= FP_FEX;
if (fp_exceptions_enabled(env)) {
@@ -216,7 +216,7 @@ static void finish_invalid_op_arith(CPUPPCState *env, int
op,
bool set_fpcc, uintptr_t retaddr)
{
env->fpscr &= ~(FP_FR | FP_FI);
-if (fpscr_ve == 0) {
+if (!(env->fpscr & FP_VE)) {
if (set_fpcc) {
env->fpscr &= ~FP_FPCC;
env->fpscr |= (FP_C | FP_FU);
@@ -286,7 +286,7 @@ static void float_invalid_op_vxvc(CPUPPCState *env, bool
set_fpcc,
/* Update the floating-point exception summary */
env->fpscr |= FP_FX;
/* We must update the target FPR before raising the exception */
-if (fpscr_ve != 0) {
+if (env->fpscr & FP_VE) {
CPUState *cs = env_cpu(env);
cs->exception_index = POWERPC_EXCP_PROGRAM;
@@ -303,7 +303,7 @@ static void float_invalid_op_vxcvi(CPUPPCState *env, bool
set_fpcc,
{
env->fpscr |= FP_VXCVI;
env->fpscr &= ~(FP_FR | FP_FI);
-if (fpscr_ve == 0) {
+if (!(env->fpscr & FP_VE)) {
if (set_fpcc) {
env->fpscr &= ~FP_FPCC;
env->fpscr |=
[PATCH v4 04/22] target/ppc: Remove msr_le macro
msr_le macro hides the usage of env->msr, which is a bad behavior
Substitute it with FIELD_EX64 calls that explicitly use env->msr
as a parameter.
Suggested-by: Richard Henderson
Signed-off-by: Víctor Colombo
Reviewed-by: Richard Henderson
---
target/ppc/cpu.h| 2 +-
target/ppc/cpu_init.c | 2 +-
target/ppc/gdbstub.c| 2 +-
target/ppc/mem_helper.c | 16
4 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 8f1dc4cb15..c561d664de 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -355,6 +355,7 @@ typedef enum {
#define MSR_LE 0 /* Little-endian mode 1 hflags */
FIELD(MSR, PR, MSR_PR, 1)
+FIELD(MSR, LE, MSR_LE, 1)
/* PMU bits */
#define MMCR0_FC PPC_BIT(32) /* Freeze Counters */
@@ -486,7 +487,6 @@ FIELD(MSR, PR, MSR_PR, 1)
#define msr_ir ((env->msr >> MSR_IR) & 1)
#define msr_dr ((env->msr >> MSR_DR) & 1)
#define msr_ds ((env->msr >> MSR_DS) & 1)
-#define msr_le ((env->msr >> MSR_LE) & 1)
#define msr_ts ((env->msr >> MSR_TS1) & 3)
#define DBCR0_ICMP (1 << 27)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index ac16a64846..0c6b83406e 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7210,7 +7210,7 @@ static bool ppc_cpu_is_big_endian(CPUState *cs)
cpu_synchronize_state(cs);
-return !msr_le;
+return !FIELD_EX64(env->msr, MSR, LE);
}
#ifdef CONFIG_TCG
diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c
index 1252429a2a..1a0b9ca82c 100644
--- a/target/ppc/gdbstub.c
+++ b/target/ppc/gdbstub.c
@@ -95,7 +95,7 @@ static int ppc_gdb_register_len(int n)
void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len)
{
#ifndef CONFIG_USER_ONLY
-if (!msr_le) {
+if (!FIELD_EX64(env->msr, MSR, LE)) {
/* do nothing */
} else if (len == 4) {
bswap32s((uint32_t *)mem_buf);
diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c
index fba7f84b7a..9af135e88e 100644
--- a/target/ppc/mem_helper.c
+++ b/target/ppc/mem_helper.c
@@ -33,9 +33,9 @@
static inline bool needs_byteswap(const CPUPPCState *env)
{
#if TARGET_BIG_ENDIAN
- return msr_le;
+ return FIELD_EX64(env->msr, MSR, LE);
#else
- return !msr_le;
+ return !FIELD_EX64(env->msr, MSR, LE);
#endif
}
@@ -470,8 +470,8 @@ uint32_t helper_stqcx_be_parallel(CPUPPCState *env,
target_ulong addr,
#endif
/*
- * We use msr_le to determine index ordering in a vector. However,
- * byteswapping is not simply controlled by msr_le. We also need to
+ * We use MSR_LE to determine index ordering in a vector. However,
+ * byteswapping is not simply controlled by MSR_LE. We also need to
* take into account endianness of the target. This is done for the
* little-endian PPC64 user-mode target.
*/
@@ -484,7 +484,7 @@ uint32_t helper_stqcx_be_parallel(CPUPPCState *env,
target_ulong addr,
int adjust = HI_IDX * (n_elems - 1);\
int sh = sizeof(r->element[0]) >> 1;\
int index = (addr & 0xf) >> sh; \
-if (msr_le) { \
+if (FIELD_EX64(env->msr, MSR, LE)) {\
index = n_elems - index - 1;\
} \
\
@@ -511,7 +511,7 @@ LVE(lvewx, cpu_ldl_data_ra, bswap32, u32)
int adjust = HI_IDX * (n_elems - 1);\
int sh = sizeof(r->element[0]) >> 1;\
int index = (addr & 0xf) >> sh; \
-if (msr_le) { \
+if (FIELD_EX64(env->msr, MSR, LE)) {\
index = n_elems - index - 1;\
} \
\
@@ -545,7 +545,7 @@ void helper_##name(CPUPPCState *env, target_ulong addr,
\
t.s128 = int128_zero(); \
if (nb) { \
nb = (nb >= 16) ? 16 : nb; \
-if (msr_le && !lj) {\
+if (FIELD_EX64(env->msr, MSR, LE) && !lj) { \
for (i = 16; i > 16 - nb; i--) {\
t.VsrB(i - 1) = cpu_ldub_data_ra(env, addr, GETPC()); \
addr = addr_add(env, addr, 1); \
@@ -576,7 +576,7 @@ void helper_##name(CPUPPCState *env, target_ulong addr,
\
}
[PATCH v4 00/22] target/ppc: Remove hidden usages of *env
By running the grep command `git grep -nr 'define \(fpscr\|msr\)_[a-z0-9]\+\>'` we can find multiple macros that use `env->fpscr` and `env->msr` but doesn't take *env as a parameter. Richard Henderson said [1] that these macros hiding the usage of *env "are evil". This patch series remove them and substitute with an explicit usage of *env by using registerfields API. Patch 20 (target/ppc: Add unused msr bits FIELDs) declares unused FIELDs, the same that were removed in patch 02 (target/ppc: Remove unused msr_* macros). I did that to keep the changes consistent with what was already present before. Patch 21 (target/ppc: Change MSR_* to follow POWER ISA numbering convention) changes the MSR_* bit number to match POWER ISA by adding a new macro to 'invert' the ordering. (added in v2) [1]: https://lists.gnu.org/archive/html/qemu-ppc/2021-11/msg00280.html Sending a v4 because another patch queued in ppc-next added an usage of msr_de v2: - Abandon the ideia to add an M_MSR_* macro - Instead, use registerfields API as suggested by Richard - Add patch 21 to invert MSR_* values to match ISA ordering v3: - Add macro to extract both FE0 and FE1. Use it to simplify the conditionals in patch 17 - Fix the checks that should be a xor - Fix incorrect parameter in FIELD_EX64 (was env->msr should be value) in patch 16 - Fix patch 13 title v4: - Rebase on top of target/ppc: Fix BookE debug interrupt generation - Add patch target/ppc: Remove msr_de macro. msr_de was not being used anywhere before, but an usage was added in the patch target/ppc: Fix BookE debug interrupt generation - Necessary changes in other patches: dont remove msr_de in patch 2 context change in other patches Víctor Colombo (22): target/ppc: Remove fpscr_* macros from cpu.h target/ppc: Remove unused msr_* macros target/ppc: Remove msr_pr macro target/ppc: Remove msr_le macro target/ppc: Remove msr_ds macro target/ppc: Remove msr_ile macro target/ppc: Remove msr_ee macro target/ppc: Remove msr_ce macro target/ppc: Remove msr_pow macro target/ppc: Remove msr_me macro target/ppc: Remove msr_gs macro target/ppc: Remove msr_fp macro target/ppc: Remove msr_cm macro target/ppc: Remove msr_ir macro target/ppc: Remove msr_dr macro target/ppc: Remove msr_ep macro target/ppc: Remove msr_fe0 and msr_fe1 macros target/ppc: Remove msr_ts macro target/ppc: Remove msr_hv macro target/ppc: Remove msr_de macro target/ppc: Add unused msr bits FIELDs target/ppc: Change MSR_* to follow POWER ISA numbering convention hw/ppc/pegasos2.c| 2 +- hw/ppc/spapr.c | 2 +- target/ppc/cpu.c | 2 +- target/ppc/cpu.h | 220 ++- target/ppc/cpu_init.c| 23 ++-- target/ppc/excp_helper.c | 54 +- target/ppc/fpu_helper.c | 28 ++--- target/ppc/gdbstub.c | 2 +- target/ppc/helper_regs.c | 15 ++- target/ppc/kvm.c | 7 +- target/ppc/machine.c | 2 +- target/ppc/mem_helper.c | 23 ++-- target/ppc/misc_helper.c | 2 +- target/ppc/mmu-radix64.c | 11 +- target/ppc/mmu_common.c | 40 +++ target/ppc/mmu_helper.c | 6 +- 16 files changed, 220 insertions(+), 219 deletions(-) -- 2.25.1
[PULL 19/25] build: move vhost-vsock configuration to Kconfig
vhost-vsock and vhost-user-vsock are two devices of their own; it should
be possible to enable/disable them with --without-default-devices, not
--without-default-features. Compute their default value in Kconfig to
obtain the more intuitive behavior.
Reviewed-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
configure | 16
hw/virtio/Kconfig | 10 ++
meson.build | 1 -
scripts/ci/org.centos/stream/8/x86_64/configure | 2 --
4 files changed, 10 insertions(+), 19 deletions(-)
diff --git a/configure b/configure
index d6ddd4f05f..603434fc7f 100755
--- a/configure
+++ b/configure
@@ -286,7 +286,6 @@ vhost_kernel="$default_feature"
vhost_net="$default_feature"
vhost_crypto="$default_feature"
vhost_scsi="$default_feature"
-vhost_vsock="$default_feature"
vhost_user="no"
vhost_user_fs="$default_feature"
vhost_vdpa="$default_feature"
@@ -879,10 +878,6 @@ for opt do
;;
--enable-vhost-scsi) vhost_scsi="yes"
;;
- --disable-vhost-vsock) vhost_vsock="no"
- ;;
- --enable-vhost-vsock) vhost_vsock="yes"
- ;;
--disable-vhost-user-fs) vhost_user_fs="no"
;;
--enable-vhost-user-fs) vhost_user_fs="yes"
@@ -1109,7 +1104,6 @@ cat << EOF
safe-stack SafeStack Stack Smash Protection. Depends on
clang/llvm >= 3.7 and requires coroutine backend ucontext.
vhost-net vhost-net kernel acceleration support
- vhost-vsock virtio sockets device support
vhost-scsi vhost-scsi kernel target support
vhost-cryptovhost-user-crypto backend support
vhost-kernelvhost kernel backend support
@@ -1549,10 +1543,6 @@ test "$vhost_scsi" = "" && vhost_scsi=$vhost_kernel
if test "$vhost_scsi" = "yes" && test "$vhost_kernel" != "yes"; then
error_exit "--enable-vhost-scsi requires --enable-vhost-kernel"
fi
-test "$vhost_vsock" = "" && vhost_vsock=$vhost_kernel
-if test "$vhost_vsock" = "yes" && test "$vhost_kernel" != "yes"; then
- error_exit "--enable-vhost-vsock requires --enable-vhost-kernel"
-fi
# vhost-user backends
test "$vhost_crypto" = "" && vhost_crypto=$vhost_user
@@ -2105,12 +2095,6 @@ fi
if test "$vhost_crypto" = "yes" ; then
echo "CONFIG_VHOST_CRYPTO=y" >> $config_host_mak
fi
-if test "$vhost_vsock" = "yes" ; then
- echo "CONFIG_VHOST_VSOCK=y" >> $config_host_mak
- if test "$vhost_user" = "yes" ; then
-echo "CONFIG_VHOST_USER_VSOCK=y" >> $config_host_mak
- fi
-fi
if test "$vhost_kernel" = "yes" ; then
echo "CONFIG_VHOST_KERNEL=y" >> $config_host_mak
fi
diff --git a/hw/virtio/Kconfig b/hw/virtio/Kconfig
index c144d42f9b..b642ae1081 100644
--- a/hw/virtio/Kconfig
+++ b/hw/virtio/Kconfig
@@ -59,6 +59,16 @@ config VIRTIO_MEM
depends on VIRTIO_MEM_SUPPORTED
select MEM_DEVICE
+config VHOST_VSOCK
+bool
+default y
+depends on VIRTIO && VHOST_KERNEL
+
+config VHOST_USER_VSOCK
+bool
+default y
+depends on VIRTIO && VHOST_USER
+
config VHOST_USER_I2C
bool
default y
diff --git a/meson.build b/meson.build
index 7c52ef135c..8621f84916 100644
--- a/meson.build
+++ b/meson.build
@@ -3691,7 +3691,6 @@ summary_info += {'vhost-kernel support':
config_host.has_key('CONFIG_VHOST_KERNE
summary_info += {'vhost-net support': config_host.has_key('CONFIG_VHOST_NET')}
summary_info += {'vhost-crypto support':
config_host.has_key('CONFIG_VHOST_CRYPTO')}
summary_info += {'vhost-scsi support':
config_host.has_key('CONFIG_VHOST_SCSI')}
-summary_info += {'vhost-vsock support':
config_host.has_key('CONFIG_VHOST_VSOCK')}
summary_info += {'vhost-user support':
config_host.has_key('CONFIG_VHOST_USER')}
summary_info += {'vhost-user-blk server support': have_vhost_user_blk_server}
summary_info += {'vhost-user-fs support':
config_host.has_key('CONFIG_VHOST_USER_FS')}
diff --git a/scripts/ci/org.centos/stream/8/x86_64/configure
b/scripts/ci/org.centos/stream/8/x86_64/configure
index 08225ee514..e6ac2e5877 100755
--- a/scripts/ci/org.centos/stream/8/x86_64/configure
+++ b/scripts/ci/org.centos/stream/8/x86_64/configure
@@ -136,7 +136,6 @@
--disable-vhost-user \
--disable-vhost-user-blk-server \
--disable-vhost-vdpa \
---disable-vhost-vsock \
--disable-virglrenderer \
--disable-virtfs \
--disable-virtiofsd \
@@ -198,7 +197,6 @@
--enable-vhost-user \
--enable-vhost-user-blk-server \
--enable-vhost-vdpa \
---enable-vhost-vsock \
--enable-vnc \
--enable-png \
--enable-vnc-sasl \
--
2.35.1
[PATCH 3/5] net: slirp: switch to slirp_new
Replace slirp_init with slirp_new, so that a more recent cfg.version
can be specified.
Signed-off-by: Paolo Bonzini
---
net/slirp.c | 27 +--
1 file changed, 21 insertions(+), 6 deletions(-)
diff --git a/net/slirp.c b/net/slirp.c
index f1e25d741f..b3a92d6e38 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -389,6 +389,7 @@ static int net_slirp_init(NetClientState *peer, const char
*model,
#if defined(CONFIG_SMBD_COMMAND)
struct in_addr smbsrv = { .s_addr = 0 };
#endif
+SlirpConfig cfg = { 0 };
NetClientState *nc;
SlirpState *s;
char buf[20];
@@ -577,12 +578,26 @@ static int net_slirp_init(NetClientState *peer, const
char *model,
s = DO_UPCAST(SlirpState, nc, nc);
-s->slirp = slirp_init(restricted, ipv4, net, mask, host,
- ipv6, ip6_prefix, vprefix6_len, ip6_host,
- vhostname, tftp_server_name,
- tftp_export, bootfile, dhcp,
- dns, ip6_dns, dnssearch, vdomainname,
- _cb, s);
+cfg.version = 3;
+cfg.restricted = restricted;
+cfg.in_enabled = ipv4;
+cfg.vnetwork = net;
+cfg.vnetmask = mask;
+cfg.vhost = host;
+cfg.in6_enabled = ipv6;
+cfg.vprefix_addr6 = ip6_prefix;
+cfg.vprefix_len = vprefix6_len;
+cfg.vhost6 = ip6_host;
+cfg.vhostname = vhostname;
+cfg.tftp_server_name = tftp_server_name;
+cfg.tftp_path = tftp_export;
+cfg.bootfile = bootfile;
+cfg.vdhcp_start = dhcp;
+cfg.vnameserver = dns;
+cfg.vnameserver6 = ip6_dns;
+cfg.vdnssearch = dnssearch;
+cfg.vdomainname = vdomainname;
+s->slirp = slirp_new(, _cb, s);
QTAILQ_INSERT_TAIL(_stacks, s, entry);
/*
--
2.35.1
[PULL v4 00/25] Misc patches for 2022-04-29
The following changes since commit f5643914a9e8f79c606a76e6a9d7ea82a3fc3e65:
Merge tag 'pull-9p-20220501' of https://github.com/cschoenebeck/qemu into
staging (2022-05-01 07:48:11 -0700)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you to fetch changes up to ec7bd939178789b371df86276ba1d983f2de07ce:
pc: remove -soundhw pcspk (2022-05-01 23:06:15 +0200)
* WHPX support for xcr0
* qga-wss fixes
* Meson conversions
* Removed -soundhw pcspk
Konstantin Kostiuk (2):
configure: Add cross prefix for widl tool
qga-vss: always build qga-vss.tlb when qga-vss.dll is built
Paolo Bonzini (22):
meson-buildoptions: add support for string options
meson, configure: move Xen detection to meson
configure, meson: move iasl detection to meson
configure: move Windows flags detection to meson
configure: switch string options to automatic parsing
meson, configure: move --tls-priority to meson
meson, configure: move bdrv whitelists to meson
meson, configure: move --with-pkgversion, CONFIG_STAMP to meson
meson, configure: move --interp-prefix to meson
meson: always combine directories with prefix
configure: switch directory options to automatic parsing
meson: pass more options directly as -D
configure: omit options with default values from meson command line
meson, virtio: place all virtio-pci devices under virtio_pci_ss
configure: simplify vhost-net-{user, vdpa} configuration
build: move vhost-vsock configuration to Kconfig
build: move vhost-scsi configuration to Kconfig
build: move vhost-user-fs configuration to Kconfig
meson: create have_vhost_* variables
meson: use have_vhost_* variables to pick sources
configure, meson: move vhost options to Meson
pc: remove -soundhw pcspk
Sunil Muthuswamy (1):
WHPX: support for xcr0
Kconfig.host| 3 -
backends/meson.build| 8 +-
configure | 673 ++--
docs/meson.build| 2 +-
hw/audio/pcspk.c| 10 -
hw/audio/soundhw.c | 27 +-
hw/net/meson.build | 8 +-
hw/scsi/Kconfig | 5 +
hw/virtio/Kconfig | 18 +-
hw/virtio/meson.build | 34 +-
include/hw/audio/soundhw.h | 3 -
include/hw/virtio/virtio-scsi.h | 2 -
meson.build | 256 ++---
meson_options.txt | 28 +-
net/meson.build | 12 +-
qga/vss-win32/meson.build | 4 +-
scripts/ci/org.centos/stream/8/x86_64/configure | 3 -
scripts/meson-buildoptions.py | 86 ++-
scripts/meson-buildoptions.sh | 74 ++-
scripts/qemu-stamp.py | 24 +
scripts/xen-detect.c| 203 +++
target/i386/whpx/whpx-all.c | 87 +++
target/i386/whpx/whpx-internal.h| 3 +
tests/meson.build | 2 +-
tests/qtest/meson.build | 4 +-
tools/meson.build | 2 +-
26 files changed, 776 insertions(+), 805 deletions(-)
create mode 100644 scripts/qemu-stamp.py
create mode 100644 scripts/xen-detect.c
--
2.35.1
[PATCH 1/5] slirp: bump submodule to 4.7 release
Version 4.7 of slirp provides a new timer API that works better with CFI, together with several other improvements: * Allow disabling the internal DHCP server !22 * Support Unix sockets in hostfwd !103 * IPv6 DNS proxying support !110 * bootp: add support for UEFI HTTP boot !111 and bugfixes. Signed-off-by: Paolo Bonzini --- slirp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/slirp b/slirp index a88d9ace23..3ad1710a96 16 --- a/slirp +++ b/slirp @@ -1 +1 @@ -Subproject commit a88d9ace234a24ce1c17189642ef9104799425e0 +Subproject commit 3ad1710a96678fe79066b1469cead4058713a1d9 -- 2.35.1
[PATCH 5/5] net: slirp: allow CFI with libslirp >= 4.7
slirp 4.7 introduces a new CFI-friendly timer callback that does
not pass function pointers within libslirp as callbacks for timers.
Check the version number and, if it is new enough, allow using CFI
even with a system libslirp.
Signed-off-by: Paolo Bonzini
---
meson.build | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/meson.build b/meson.build
index c26aa442d4..defe604065 100644
--- a/meson.build
+++ b/meson.build
@@ -2509,10 +2509,25 @@ if have_system
slirp_opt = get_option('slirp')
if slirp_opt in ['enabled', 'auto', 'system']
have_internal = fs.exists(meson.current_source_dir() / 'slirp/meson.build')
+slirp_dep_required = (slirp_opt == 'system' or
+ slirp_opt == 'enabled' and not have_internal)
slirp = dependency('slirp', kwargs: static_kwargs,
method: 'pkg-config',
- required: slirp_opt == 'system' or
- slirp_opt == 'enabled' and not have_internal)
+ required: slirp_dep_required)
+# slirp <4.7 is incompatible with CFI support in QEMU. This is because
+# it passes function pointers within libslirp as callbacks for timers.
+# When using a system-wide shared libslirp, the type information for the
+# callback is missing and the timer call produces a false positive with
CFI.
+# Do not use the "version" keyword argument to produce a better error.
+# with control-flow integrity.
+if get_option('cfi') and slirp.found() and
slirp.version().version_compare('<4.7')
+ if slirp_dep_required
+error('Control-Flow Integrity requires libslirp 4.7.')
+ else
+warning('Control-Flow Integrity requires libslirp 4.7, not using
system-wide libslirp.')
+slirp = not_found
+ endif
+endif
if slirp.found()
slirp_opt = 'system'
elif have_internal
@@ -2585,18 +2600,6 @@ if have_system
endif
endif
-# For CFI, we need to compile slirp as a static library together with qemu.
-# This is because we register slirp functions as callbacks for QEMU Timers.
-# When using a system-wide shared libslirp, the type information for the
-# callback is missing and the timer call produces a false positive with CFI.
-#
-# Now that slirp_opt has been defined, check if the selected slirp is
compatible
-# with control-flow integrity.
-if get_option('cfi') and slirp_opt == 'system'
- error('Control-Flow Integrity is not compatible with system-wide slirp.' \
- + ' Please configure with --enable-slirp=git')
-endif
-
fdt = not_found
if have_system
fdt_opt = get_option('fdt')
--
2.35.1
[PATCH 0/5] net: support for CFI with libslirp >= 4.7
Up until now, a CFI-enabled build would require slirp to be compiled as a static library, using the version that is bundled together with QEMU. This is because slirp registers functions as callbacks for QEMU Timers and, when using a system-wide shared libslirp, the type information for the callback is missing. Thus, the timer call produces a false positive with CFI. slirp 4.7 introduces a new CFI-friendly timer callback that does not pass function pointers within libslirp as callbacks for timers. Check the version number and, if it is new enough, allow using CFI even with a system libslirp. Supersedes: <20220412121337.207203-1-pbonz...@redhat.com> Paolo Paolo Bonzini (5): slirp: bump submodule to 4.7 release net: slirp: introduce a wrapper struct for QemuTimer net: slirp: switch to slirp_new net: slirp: add support for CFI-friendly timer API net: slirp: allow CFI with libslirp >= 4.7 meson.build | 31 ++- net/slirp.c | 85 ++--- slirp | 2 +- 3 files changed, 92 insertions(+), 26 deletions(-) -- 2.35.1
[PATCH 2/5] net: slirp: introduce a wrapper struct for QemuTimer
This struct will be extended in the next few patches to support the
new slirp_handle_timer() call. For that we need to store an additional
"int" for each SLIRP timer, in addition to the cb_opaque.
Signed-off-by: Paolo Bonzini
---
net/slirp.c | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/net/slirp.c b/net/slirp.c
index bc5e9e4f77..f1e25d741f 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -184,23 +184,32 @@ static int64_t net_slirp_clock_get_ns(void *opaque)
return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
}
+struct SlirpTimer {
+QEMUTimer timer;
+}
+
static void *net_slirp_timer_new(SlirpTimerCb cb,
void *cb_opaque, void *opaque)
{
-return timer_new_full(NULL, QEMU_CLOCK_VIRTUAL,
- SCALE_MS, QEMU_TIMER_ATTR_EXTERNAL,
- cb, cb_opaque);
+SlirpTimer *t = g_new(SlirpTimer, 1);
+timer_init_full(>timer, NULL, QEMU_CLOCK_VIRTUAL,
+SCALE_MS, QEMU_TIMER_ATTR_EXTERNAL,
+cb, cb_opaque);
+return t;
}
static void net_slirp_timer_free(void *timer, void *opaque)
{
-timer_free(timer);
+SlirpTimer *t = timer;
+timer_del(>timer);
+g_free(t);
}
static void net_slirp_timer_mod(void *timer, int64_t expire_timer,
void *opaque)
{
-timer_mod(timer, expire_timer);
+SlirpTimer *t = timer;
+timer_mod(>timer, expire_timer);
}
static void net_slirp_register_poll_fd(int fd, void *opaque)
--
2.35.1
[PATCH 4/5] net: slirp: add support for CFI-friendly timer API
libslirp 4.7 introduces a CFI-friendly version of the .timer_new callback.
The new callback replaces the function pointer with an enum; invoking the
callback is done with a new function slirp_handle_timer.
Support the new API so that CFI can be made compatible with using a system
libslirp.
Signed-off-by: Paolo Bonzini
---
net/slirp.c | 41 -
1 file changed, 40 insertions(+), 1 deletion(-)
diff --git a/net/slirp.c b/net/slirp.c
index b3a92d6e38..57af42299d 100644
--- a/net/slirp.c
+++ b/net/slirp.c
@@ -184,10 +184,43 @@ static int64_t net_slirp_clock_get_ns(void *opaque)
return qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
}
+typedef struct SlirpTimer SlirpTimer;
struct SlirpTimer {
QEMUTimer timer;
+#if SLIRP_CHECK_VERSION(4,7,0)
+Slirp *slirp;
+SlirpTimerId id;
+void *cb_opaque;
+#endif
+};
+
+#if SLIRP_CHECK_VERSION(4,7,0)
+static void net_slirp_init_completed(Slirp *slirp, void *opaque)
+{
+SlirpState *s = opaque;
+s->slirp = slirp;
}
+static void net_slirp_timer_cb(void *opaque)
+{
+SlirpTimer *t = opaque;
+slirp_handle_timer(t->slirp, t->id, t->cb_opaque);
+}
+
+static void *net_slirp_timer_new_opaque(SlirpTimerId id,
+void *cb_opaque, void *opaque)
+{
+SlirpState *s = opaque;
+SlirpTimer *t = g_new(SlirpTimer, 1);
+t->slirp = s->slirp;
+t->id = id;
+t->cb_opaque = cb_opaque;
+timer_init_full(>timer, NULL, QEMU_CLOCK_VIRTUAL,
+SCALE_MS, QEMU_TIMER_ATTR_EXTERNAL,
+net_slirp_timer_cb, t);
+return t;
+}
+#else
static void *net_slirp_timer_new(SlirpTimerCb cb,
void *cb_opaque, void *opaque)
{
@@ -197,6 +230,7 @@ static void *net_slirp_timer_new(SlirpTimerCb cb,
cb, cb_opaque);
return t;
}
+#endif
static void net_slirp_timer_free(void *timer, void *opaque)
{
@@ -231,7 +265,12 @@ static const SlirpCb slirp_cb = {
.send_packet = net_slirp_send_packet,
.guest_error = net_slirp_guest_error,
.clock_get_ns = net_slirp_clock_get_ns,
+#if SLIRP_CHECK_VERSION(4,7,0)
+.init_completed = net_slirp_init_completed,
+.timer_new_opaque = net_slirp_timer_new_opaque,
+#else
.timer_new = net_slirp_timer_new,
+#endif
.timer_free = net_slirp_timer_free,
.timer_mod = net_slirp_timer_mod,
.register_poll_fd = net_slirp_register_poll_fd,
@@ -578,7 +617,7 @@ static int net_slirp_init(NetClientState *peer, const char
*model,
s = DO_UPCAST(SlirpState, nc, nc);
-cfg.version = 3;
+cfg.version = SLIRP_CHECK_VERSION(4,7,0) ? 4 : 3;
cfg.restricted = restricted;
cfg.in_enabled = ipv4;
cfg.vnetwork = net;
--
2.35.1
Re: [PATCH] vhost-user: Use correct macro name TARGET_PPC64
On Tue, May 03, 2022 at 03:01:08PM -0300, Murilo Opsfelder Araujo wrote:
> The correct name of the macro is TARGET_PPC64.
>
> Fixes: 27598393a232 ("Lift max memory slots limit imposed by vhost-user")
> Reported-by: Fabiano Rosas
> Signed-off-by: Murilo Opsfelder Araujo
> Cc: Raphael Norwitz
> Cc: Peter Turschmid
Reviewed-by: Michael S. Tsirkin
ok to merge through the ppc tree
> ---
> hw/virtio/vhost-user.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
> index 9c4f84f35f..e356c72c81 100644
> --- a/hw/virtio/vhost-user.c
> +++ b/hw/virtio/vhost-user.c
> @@ -51,7 +51,7 @@
> #include "hw/acpi/acpi.h"
> #define VHOST_USER_MAX_RAM_SLOTS ACPI_MAX_RAM_SLOTS
>
> -#elif defined(TARGET_PPC) || defined(TARGET_PPC_64)
> +#elif defined(TARGET_PPC) || defined(TARGET_PPC64)
> #include "hw/ppc/spapr.h"
> #define VHOST_USER_MAX_RAM_SLOTS SPAPR_MAX_RAM_SLOTS
>
> --
> 2.35.1
Re: [PATCH] hw/dma: Add Xilinx AXI CDMA
On Tue, May 3, 2022 at 7:12 PM Edgar E. Iglesias wrote: > On Tue, May 3, 2022 at 5:06 PM Frank Chang wrote: > >> On Tue, May 3, 2022 at 5:35 PM Edgar E. Iglesias < >> edgar.igles...@gmail.com> wrote: >> >>> On Tue, May 3, 2022 at 3:16 AM Frank Chang >>> wrote: >>> On Mon, May 2, 2022 at 6:29 PM Edgar E. Iglesias < edgar.igles...@gmail.com> wrote: > On Thu, Apr 28, 2022 at 5:43 PM wrote: > >> From: Frank Chang >> >> Add Xilinx AXI CDMA model, which follows >> AXI Central Direct Memory Access v4.1 spec: >> https://docs.xilinx.com/v/u/en-US/pg034-axi-cdma >> >> Supports both Simple DMA and Scatter Gather modes. >> > > Hi Frank, > > Thanks for modeling this! I have a couple of questions. > Hi Edgar, Thanks for reviewing. > > Do you plan to submit a machine that uses this DMA? > Currently, Xilinx CDMA is used in our internal platform only, which is not upstream. Do you have any suggestions for the existing machine that I can add Xilinx CDMA to? Or perhaps, ARM virt machine? >>> >>> If there's a reference design somewhere we could use we could >>> potentially create a new zynqmp or versal based machine. >>> >> >> Thanks Edgar, >> >> Do you think it's a good idea to add CDMA in xlnx-zynqmp.c? >> (Though I found GDMA and ADMA already exist) >> >> I'm not familiar with Xilinx's FPGA family, and there are lots of >> variants. >> Not sure which machine is the best one for me to add CDMA. >> > > xlnx-zynqmp.c models the hardened logic of the ZynqMP, the GDMA and ADMA > are hard logic but this CDMA is not. > xlnx-zcu102.c models a board with a ZynqMP and off-chip peripherals > (reuses xlnx-zynqmp.c) but without anything programmed into the PL (FPGA) > parts. > > If there's some kind of public design (Demo, product, reference design, > whatever) that uses the CDMA as a soft IP on the PL and that is somewhat > documented, perhaps we could add a xlnx-zcu102-name-of-design.c or a > versal-xyz.c to enable this. I don't know of any such design though, but > I'll let you know if I find something. > Hi Frank, This could be something: https://xilinx.github.io/Embedded-Design-Tutorials/docs/2020.2/docs/Introduction/Zynq7000-EDT/6-using-hp-port.html A machine model would be based on hw/arm/xilinx_zynq.c. Best regards, Edgar > > >> >> >>> It would be great if you guys had a public RISCV design with the CDMA >>> that we could model. >>> >> >> I would love to, >> but unfortunately, we don't have the spec for this model publicly yet. >> > > Or we wait for your machine to become public and make a model of that > > > >> >> >>> > > The CDMA has a 32-bit AXI4-Lite port for register accesses (see page 6 > and 8 in the spec you referenced), so axicdma_ops.impl.max should be 4 and > you shouldn't need the read/write q versions. > Okay, that's something I was not aware of. However, I have a question regarding the 64-bit address space. For 64-bit address space, i.e. xlnx,addrwidth = 64. The CDMA spec says that: "TAILDESC_PNTR[_MSB] register causes the AXI CDMA SG Engine to start fetching descriptors starting from the CURDESC_PNTR register value." It seems that DMA will start the transfer if either TAILDESC_PNTR or TAILDESC_PNTR_MSB is written. Then how can we guarantee that the full 64-bit address pointer is written before the DMA transfer is started if we can't write both TAILDESC_PNTR and TAILDESC_PNTR_MSB at the same time? >>> >>> This is described on pages 25 and 26: >>> "When the AXI CDMA is in SG Mode and the address space is 32 bits >>> (CDMACR.SGMode = 1), a write by the software application to the >>> TAILDESC_PNTR register causes the AXI CDMA SG Engine to start fetching >>> descriptors" >>> >>> I.e TAILDESC_PNTR only starts the DMA if 32bit addresses have been >>> selected. >>> If 64bit addresses are selected, TAILDESC_PNTR_MSB starts the DMA: >>> >>> "When the AXI CDMA is in SG Mode, and the address space is more than 32 >>> bits, (CDMACR.SGMode = 1), a write by the software application to the >>> TAILDESC_PNTR_MSB register causes the AXI CDMA SG Engine to start fetching >>> descriptors" >>> >> >> I guess I missed the description: "the address space is 32 bits" for >> TAILDESC_PNTR register in the spec. >> I will fix it in my next version patchset. >> >> Regards, >> Frank Chang >> >> >>> >>> >>> I'm also awarded that Xilinx CDMA Linux driver also has separate 32-bit writes for a 64-bit address. But wouldn't that cause, e.g. dmatest to be failed? >>> >>> The driver probably relies on the interconnect to down-size the 64bit >>> access to 2x32bit ones. QEMU will do the same so this shouldn't be a >>> problem. >>> >>> Best regards, >>> Edgar >>> >>> >>> Regards, Frank Chang > > Best
Re: [PULL 00/15] s390x patches
On 5/4/22 06:05, Thomas Huth wrote:
The following changes since commit 2e3408b3cc7de4e87a9adafc8c19bfce3abec947:
Merge tag 'misc-pull-request' of gitlab.com:marcandre.lureau/qemu into
staging (2022-05-03 09:13:17 -0700)
are available in the Git repository at:
https://gitlab.com/thuth/qemu.git tags/pull-request-2022-05-04
for you to fetch changes up to 0c5c4d5b3c1cb594e808dd4120cc56ee28fa31dd:
tests/tcg/s390x: Use a different PCRel32 notation in branch-relative-long.c
(2022-05-04 08:47:19 +0200)
* Silence the warning about the msa5 feature when using the "max" CPU on s390x
* Implement the s390x Vector-Enhancements Facility 2
* Remove the old libopcode-based s390 disassembler
* Fix branch-relative-long test compilation with Clang
Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/7.1 as
appropriate.
r~
David Hildenbrand (2):
s390x/cpu_models: drop "msa5" from the TCG "max" model
s390x/cpu_models: make "max" match the unmodified "qemu" CPU model under
TCG
David Miller (9):
target/s390x: vxeh2: vector convert short/32b
target/s390x: vxeh2: vector string search
target/s390x: vxeh2: Update for changes to vector shifts
target/s390x: vxeh2: vector shift double by bit
target/s390x: vxeh2: vector {load, store} elements reversed
target/s390x: vxeh2: vector {load, store} byte reversed elements
target/s390x: vxeh2: vector {load, store} byte reversed element
target/s390x: add S390_FEAT_VECTOR_ENH2 to qemu CPU model
tests/tcg/s390x: Tests for Vector Enhancements Facility 2
Ilya Leoshkevich (1):
tests/tcg/s390x: Use a different PCRel32 notation in
branch-relative-long.c
Richard Henderson (2):
target/s390x: Fix writeback to v1 in helper_vstl
tcg: Implement tcg_gen_{h,w}swap_{i32,i64}
Thomas Huth (1):
disas: Remove old libopcode s390 disassembler
include/disas/dis-asm.h|1 -
include/tcg/tcg-op.h |6 +
target/s390x/helper.h | 13 +
tests/tcg/s390x/vx.h | 19 +
disas.c|1 -
disas/s390.c | 1892
hw/s390x/s390-virtio-ccw.c |3 +
target/s390x/cpu.c |1 -
target/s390x/cpu_models.c | 26 +-
target/s390x/gen-features.c| 14 +-
target/s390x/tcg/translate.c |3 +-
target/s390x/tcg/vec_fpu_helper.c | 31 +
target/s390x/tcg/vec_helper.c |2 -
target/s390x/tcg/vec_int_helper.c | 55 +
target/s390x/tcg/vec_string_helper.c | 99 ++
tcg/tcg-op.c | 30 +
tests/tcg/s390x/branch-relative-long.c |4 +-
tests/tcg/s390x/vxeh2_vcvt.c | 88 ++
tests/tcg/s390x/vxeh2_vlstr.c | 139 +++
tests/tcg/s390x/vxeh2_vs.c | 93 ++
target/s390x/tcg/translate_vx.c.inc| 461 +++-
MAINTAINERS|2 -
disas/meson.build |1 -
target/s390x/tcg/insn-data.def | 40 +-
tests/tcg/s390x/Makefile.target|8 +
25 files changed, 1053 insertions(+), 1979 deletions(-)
create mode 100644 tests/tcg/s390x/vx.h
delete mode 100644 disas/s390.c
create mode 100644 tests/tcg/s390x/vxeh2_vcvt.c
create mode 100644 tests/tcg/s390x/vxeh2_vlstr.c
create mode 100644 tests/tcg/s390x/vxeh2_vs.c
Re: [PATCH] vhost-user: Use correct macro name TARGET_PPC64
Michael,
I'll send a PR in the next few days. This change seems trivial enough to me
to push via the PPC64 tree.
Let me know if you're ok with that or if you want to pick it via the vhost tree.
Thanks,
Daniel
On 5/3/22 15:01, Murilo Opsfelder Araujo wrote:
The correct name of the macro is TARGET_PPC64.
Fixes: 27598393a232 ("Lift max memory slots limit imposed by vhost-user")
Reported-by: Fabiano Rosas
Signed-off-by: Murilo Opsfelder Araujo
Cc: Raphael Norwitz
Cc: Peter Turschmid
---
hw/virtio/vhost-user.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
index 9c4f84f35f..e356c72c81 100644
--- a/hw/virtio/vhost-user.c
+++ b/hw/virtio/vhost-user.c
@@ -51,7 +51,7 @@
#include "hw/acpi/acpi.h"
#define VHOST_USER_MAX_RAM_SLOTS ACPI_MAX_RAM_SLOTS
-#elif defined(TARGET_PPC) || defined(TARGET_PPC_64)
+#elif defined(TARGET_PPC) || defined(TARGET_PPC64)
#include "hw/ppc/spapr.h"
#define VHOST_USER_MAX_RAM_SLOTS SPAPR_MAX_RAM_SLOTS
Re: [PATCH v3 00/21] target/ppc: Remove hidden usages of *env
I asked Victor to rebase this series on top of ppc-next at: gitlab.com/danielhb/qemu/tree/ppc-next Because of "[PATCH v2] target/ppc: Fix BookE debug interrupt generation" that added new occurrences of the msr_de macro that wasn't being handled. I believe that the changes needed are not removing msr_de in patch 02 and adding a new patch to handle the two existing msr_de instances. After this series is fully reviewed I'll send a PR with it ASAP to avoid further conflicts. Thanks, Daniel On 5/3/22 17:24, Víctor Colombo wrote: By running the grep command `git grep -nr 'define \(fpscr\|msr\)_[a-z0-9]\+\>'` we can find multiple macros that use `env->fpscr` and `env->msr` but doesn't take *env as a parameter. Richard Henderson said [1] that these macros hiding the usage of *env "are evil". This patch series remove them and substitute with an explicit usage of *env by using registerfields API. Patch 20 (target/ppc: Add unused msr bits FIELDs) declares unused FIELDs, the same that were removed in patch 02 (target/ppc: Remove unused msr_* macros). I did that to keep the changes consistent with what was already present before. Patch 21 (target/ppc: Change MSR_* to follow POWER ISA numbering convention) changes the MSR_* bit number to match POWER ISA by adding a new macro to 'invert' the ordering. (added in v2) [1]: https://lists.gnu.org/archive/html/qemu-ppc/2021-11/msg00280.html Patches requiring review: 11, 14, 15, 16, 17, 21 Patch 17 was reviewed before, but I created a macro to extract both FE0 and FE1, so decided to drop the R-b for you to take a look at the new version. Thanks v2: - Abandon the ideia to add an M_MSR_* macro - Instead, use registerfields API as suggested by Richard - Add patch 21 to invert MSR_* values to match ISA ordering v3: - Add macro to extract both FE0 and FE1. Use it to simplify the conditionals in patch 17 - Fix the checks that should be a xor - Fix incorrect parameter in FIELD_EX64 (was env->msr should be value) in patch 16 - Fix patch 13 title Víctor Colombo (21): target/ppc: Remove fpscr_* macros from cpu.h target/ppc: Remove unused msr_* macros target/ppc: Remove msr_pr macro target/ppc: Remove msr_le macro target/ppc: Remove msr_ds macro target/ppc: Remove msr_ile macro target/ppc: Remove msr_ee macro target/ppc: Remove msr_ce macro target/ppc: Remove msr_pow macro target/ppc: Remove msr_me macro target/ppc: Remove msr_gs macro target/ppc: Remove msr_fp macro target/ppc: Remove msr_cm macro target/ppc: Remove msr_ir macro target/ppc: Remove msr_dr macro target/ppc: Remove msr_ep macro target/ppc: Remove msr_fe0 and msr_fe1 macros target/ppc: Remove msr_ts macro target/ppc: Remove msr_hv macro target/ppc: Add unused msr bits FIELDs target/ppc: Change MSR_* to follow POWER ISA numbering convention hw/ppc/pegasos2.c| 2 +- hw/ppc/spapr.c | 2 +- target/ppc/cpu.c | 2 +- target/ppc/cpu.h | 219 ++- target/ppc/cpu_init.c| 23 ++-- target/ppc/excp_helper.c | 54 +- target/ppc/fpu_helper.c | 28 ++--- target/ppc/gdbstub.c | 2 +- target/ppc/helper_regs.c | 11 +- target/ppc/kvm.c | 7 +- target/ppc/machine.c | 2 +- target/ppc/mem_helper.c | 23 ++-- target/ppc/misc_helper.c | 2 +- target/ppc/mmu-radix64.c | 11 +- target/ppc/mmu_common.c | 40 +++ target/ppc/mmu_helper.c | 6 +- 16 files changed, 217 insertions(+), 217 deletions(-)
[PATCH] checkpatch: fix g_malloc check
Use the string equality operator "eq", and ensure that $1 is defined by
using "(try|)" instead of "(try)?". The alternative "((?:try)?)" is
longer and less readable.
Signed-off-by: Paolo Bonzini
---
scripts/checkpatch.pl | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 4763d02ae7..d900d18048 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -2831,8 +2831,8 @@ sub process {
}
# check for pointless casting of g_malloc return
- if ($line =~ /\*\s*\)\s*g_(try)?(m|re)alloc(0?)(_n)?\b/) {
- if ($2 == 'm') {
+ if ($line =~ /\*\s*\)\s*g_(try|)(m|re)alloc(0?)(_n)?\b/) {
+ if ($2 eq 'm') {
ERROR("unnecessary cast may hide bugs, use
g_$1new$3 instead\n" . $herecurr);
} else {
ERROR("unnecessary cast may hide bugs, use
g_$1renew$3 instead\n" . $herecurr);
--
2.35.1
Re: [PATCH RFC 04/10] intel_iommu: Second Stage Access Dirty bit support
Hi, Joao,
On Thu, Apr 28, 2022 at 10:13:45PM +0100, Joao Martins wrote:
> +/* Get the content of a spte located in @base_addr[@index] */
> +static uint64_t vtd_set_slpte(dma_addr_t base_addr, uint32_t index,
> + uint64_t slpte)
> +{
> +
> +if (dma_memory_write(_space_memory,
> + base_addr + index * sizeof(slpte), ,
> + sizeof(slpte), MEMTXATTRS_UNSPECIFIED)) {
> +slpte = (uint64_t)-1;
> +return slpte;
> +}
> +
> +return vtd_get_slpte(base_addr, index);
> +}
Could I ask when the write succeeded, why need to read slpte again?
Thanks,
--
Peter Xu
Re: [PATCH v11 2/7] QIOChannelSocket: Implement io_writev zero copy flag & io_flush for CONFIG_LINUX
On Wed, May 04, 2022 at 04:18:31PM -0300, Leonardo Bras wrote: > +/* > + * Zero-copy defines bellow are included to avoid breaking builds on systems > + * that don't support MSG_ZEROCOPY, while keeping the functions more readable > + * (without a lot of ifdefs). > + */ > +#ifndef MSG_ZEROCOPY > +#define MSG_ZEROCOPY 0x400 > +#endif > +#ifndef SO_ZEROCOPY > +#define SO_ZEROCOPY 60 > +#endif So this will define these two values on e.g. FreeBSD, while they do not make sense at all there because these numbers are pure magics and meaningless outside Linux.. I don't think it's anything dangerous, but IMHO it's another way of being not clean comparing of using some "#ifdef"s. Comparing to this approach the "use #ifdef" approach is actually slightly more cleaner to me. :) Let's wait for some other inputs. -- Peter Xu
iotests and python dependencies
Howdy! So, I want to finally delete python/qemu/qmp from qemu.git, and this creates a small problem -- namely, iotests needs access to it in order to run the python-based tests. What I think needs to happen is that we create a virtual environment that installs python/qemu/. The reason this cannot be done with PYTHONPATH alone anymore is because the qmp package itself won't be there anymore, we need an installer like `pip` to actually fetch it for us and put it somewhere. (i.e., we need to process the dependencies of python/qemu now and can't treat it as a pre-installed location.) Avocado tests are already creating a venv for the purposes of installing and running Avocado. We can amend e.g. "../../python" to tests/requirements.txt and the Avocado environment is A-OK good-to-go. The Makefile magic for avocado tests creates a venv-per-build. It seems to work well enough. One thing to note here is that the supported invocation for avocado tests is only through the Makefile, which handles creating and entering the venv to make the command seamless. iotests, however, manages its own execution environment with testenv.py, and we support running iotests from outside of the Makefile, for example by going to $build/tests/qemu-iotests and running ./check. Now ... I could update testenv.py to be smart enough to create and enter a python venv, and have even prototyped this. It seems to work pretty well! This approach seemed like the least invasive to how iotests are expected to be run and used. But a downside with this approach is that now avocado tests and iotests are each managing their own python venv. Worse, vm-tests and device-crash-test are still unhandled entirely. I'd like to find a solution where I create a unified python testing venv tied to the build shared by avocado, iotests, vm-tests and device-crash-test. I'm not completely sure how exactly I'll manage that right now, but I wanted to throw this out there in case there are some requirements I might be overlooking. I think vm-tests and avocado-tests can both have a venv created for them and activated before the test runs. device-crash-test I believe will need a script change in the gitlab ci yaml. iotests is somewhat unique in that it needs to run both by manual invocation and from makefile invocations. If I want a shared VM between all of these, I'll need to isolate the create-and-enter-venv logic somewhere where it can be shared both inside and outside of a Makefile. I'll see what I can cook up, but if you have any concerns or Cool Ideas, lemme know. I want to make sure this is as painless as I can think to make it. Thanks, --js
RE: [PATCH 5/9] hw/9pfs: Add a 'local' file system backend driver for Windows
> -Original Message- > From: Christian Schoenebeck > Sent: Thursday, May 5, 2022 02:02 > To: qemu-devel@nongnu.org > Cc: Greg Kurz ; Meng, Bin ; Shi, > Guohuai ; Bin Meng > Subject: Re: [PATCH 5/9] hw/9pfs: Add a 'local' file system backend driver > for Windows > > [Please note: This e-mail is from an EXTERNAL e-mail address] > > On Montag, 25. April 2022 16:27:01 CEST Bin Meng wrote: > > From: Guohuai Shi > > > > Add a 9p local file system backend driver to support Windows, > > including open, read, write, close, rename, remove, etc. > > > > All security models are supported. The mapped (mapped-xattr) > > security model is implemented using NTFS Alternate Data Stream > > (ADS) so the 9p export path shall be on an NTFS partition. > > > > Signed-off-by: Guohuai Shi > > Signed-off-by: Bin Meng > > --- > > > > hw/9pfs/9p-linux-errno.h | 151 + > > hw/9pfs/9p-local.h |4 + > > hw/9pfs/9p-util.h| 41 ++ > > hw/9pfs/9p.h | 23 + > > hw/9pfs/9p-local-win32.c | 1242 ++ > > hw/9pfs/9p-util-win32.c | 303 ++ > > hw/9pfs/9p-xattr.c | 113 > > hw/9pfs/9p.c | 91 ++- > > hw/9pfs/codir.c | 15 + > > 9 files changed, 1982 insertions(+), 1 deletion(-) > > create mode 100644 hw/9pfs/9p-linux-errno.h > > create mode 100644 hw/9pfs/9p-local-win32.c > > create mode 100644 hw/9pfs/9p-util-win32.c > > This patch is definitely too huge and should be split up into a huge bunch of > separate patches! > > > diff --git a/hw/9pfs/9p-linux-errno.h b/hw/9pfs/9p-linux-errno.h > > new file mode 100644 > > index 00..b0d6ac45ac > > --- /dev/null > > +++ b/hw/9pfs/9p-linux-errno.h > > This file definitely deserves a patch on its own. > > As for its filename: Following our current filename scheme, it would probably > be better be named 9p-errno-linux.h or 9p-errno-dotl.h as this is probably a > 9p protocol version thing. > > > @@ -0,0 +1,151 @@ > > +/* > > + * 9p Linux errno translation definition > > + * > > + * This work is licensed under the terms of the GNU GPL, version 2 or > > later. + * See the COPYING file in the top-level directory. > > + */ > > + > > +#include > > + > > +#ifndef QEMU_9P_LINUX_ERRNO_H > > +#define QEMU_9P_LINUX_ERRNO_H > > + > > +/* > > + * This file contains the Linux errno definitions to translate errnos set > > by + * the 9P server (running on Windows) to a corresponding errno value. + > > * > > + * This list should be periodically reviewed and updated; particularly for > > + * errnos that might be set as a result of a file system operation. > > + */ > > + > > I would just import the already existing sys/errno.h from the Linux kernel, > with all its copyright header etc. and then with a 2nd patch just prefix the > individual macros with DOTL_* > > > +#define L_EPERM 1 /* Operation not permitted */ > > +#define L_ENOENT2 /* No such file or directory */ > > +#define L_ESRCH 3 /* No such process */ > > +#define L_EINTR 4 /* Interrupted system call */ > > +#define L_EIO 5 /* I/O error */ > > +#define L_ENXIO 6 /* No such device or address */ > > +#define L_E2BIG 7 /* Argument list too long */ > > +#define L_ENOEXEC 8 /* Exec format error */ > > +#define L_EBADF 9 /* Bad file number */ > > +#define L_ECHILD10 /* No child processes */ > > +#define L_EAGAIN11 /* Try again */ > > +#define L_ENOMEM12 /* Out of memory */ > > +#define L_EACCES13 /* Permission denied */ > > +#define L_EFAULT14 /* Bad address */ > > +#define L_ENOTBLK 15 /* Block device required */ > > +#define L_EBUSY 16 /* Device or resource busy */ > > +#define L_EEXIST17 /* File exists */ > > +#define L_EXDEV 18 /* Cross-device link */ > > +#define L_ENODEV19 /* No such device */ > > +#define L_ENOTDIR 20 /* Not a directory */ > > +#define L_EISDIR21 /* Is a directory */ > > +#define L_EINVAL22 /* Invalid argument */ > > +#define L_ENFILE23 /* File table overflow */ > > +#define L_EMFILE24 /* Too many open files */ > > +#define L_ENOTTY25 /* Not a typewriter */ > > +#define L_ETXTBSY 26 /* Text file busy */ > > +#define L_EFBIG 27 /* File too large */ > > +#define L_ENOSPC28 /* No space left on device */ > > +#define L_ESPIPE29 /* Illegal seek */ > > +#define L_EROFS 30 /* Read-only file system */ > > +#define L_EMLINK31 /* Too many links */ > > +#define L_EPIPE 32 /* Broken pipe */ > > +#define L_EDOM 33 /* Math argument out of domain of func */ > > +#define L_ERANGE34 /* Math result not representable */ > > +#define L_EDEADLK 35 /* Resource
[PATCH v11 7/7] multifd: Implement zero copy write in multifd migration (multifd-zero-copy)
Implement zero copy send on nocomp_send_write(), by making use of QIOChannel
writev + flags & flush interface.
Change multifd_send_sync_main() so flush_zero_copy() can be called
after each iteration in order to make sure all dirty pages are sent before
a new iteration is started. It will also flush at the beginning and at the
end of migration.
Also make it return -1 if flush_zero_copy() fails, in order to cancel
the migration process, and avoid resuming the guest in the target host
without receiving all current RAM.
This will work fine on RAM migration because the RAM pages are not usually
freed,
and there is no problem on changing the pages content between
writev_zero_copy() and
the actual sending of the buffer, because this change will dirty the page and
cause it to be re-sent on a next iteration anyway.
A lot of locked memory may be needed in order to use multifd migration
with zero-copy enabled, so disabling the feature should be necessary for
low-privileged users trying to perform multifd migrations.
Signed-off-by: Leonardo Bras
Reviewed-by: Peter Xu
Reviewed-by: Daniel P. Berrangé
---
migration/multifd.h | 2 ++
migration/migration.c | 11 ++-
migration/multifd.c | 37 +++--
migration/socket.c| 5 +++--
4 files changed, 50 insertions(+), 5 deletions(-)
diff --git a/migration/multifd.h b/migration/multifd.h
index bcf5992945..4d8d89e5e5 100644
--- a/migration/multifd.h
+++ b/migration/multifd.h
@@ -92,6 +92,8 @@ typedef struct {
uint32_t packet_len;
/* pointer to the packet */
MultiFDPacket_t *packet;
+/* multifd flags for sending ram */
+int write_flags;
/* multifd flags for each packet */
uint32_t flags;
/* size of the next packet that contains pages */
diff --git a/migration/migration.c b/migration/migration.c
index 4b6df2eb5e..31739b2af9 100644
--- a/migration/migration.c
+++ b/migration/migration.c
@@ -1497,7 +1497,16 @@ static bool migrate_params_check(MigrationParameters
*params, Error **errp)
error_prepend(errp, "Invalid mapping given for block-bitmap-mapping:
");
return false;
}
-
+#ifdef CONFIG_LINUX
+if (params->zero_copy_send &&
+(!migrate_use_multifd() ||
+ params->multifd_compression != MULTIFD_COMPRESSION_NONE ||
+ (params->tls_creds && *params->tls_creds))) {
+error_setg(errp,
+ "Zero copy only available for non-compressed non-TLS
multifd migration");
+return false;
+}
+#endif
return true;
}
diff --git a/migration/multifd.c b/migration/multifd.c
index 2541cd2322..9282ab6aa4 100644
--- a/migration/multifd.c
+++ b/migration/multifd.c
@@ -569,6 +569,7 @@ void multifd_save_cleanup(void)
int multifd_send_sync_main(QEMUFile *f)
{
int i;
+bool flush_zero_copy;
if (!migrate_use_multifd()) {
return 0;
@@ -579,6 +580,20 @@ int multifd_send_sync_main(QEMUFile *f)
return -1;
}
}
+
+/*
+ * When using zero-copy, it's necessary to flush the pages before any of
+ * the pages can be sent again, so we'll make sure the new version of the
+ * pages will always arrive _later_ than the old pages.
+ *
+ * Currently we achieve this by flushing the zero-page requested writes
+ * per ram iteration, but in the future we could potentially optimize it
+ * to be less frequent, e.g. only after we finished one whole scanning of
+ * all the dirty bitmaps.
+ */
+
+flush_zero_copy = migrate_use_zero_copy_send();
+
for (i = 0; i < migrate_multifd_channels(); i++) {
MultiFDSendParams *p = _send_state->params[i];
@@ -600,6 +615,17 @@ int multifd_send_sync_main(QEMUFile *f)
ram_counters.transferred += p->packet_len;
qemu_mutex_unlock(>mutex);
qemu_sem_post(>sem);
+
+if (flush_zero_copy && p->c) {
+int ret;
+Error *err = NULL;
+
+ret = qio_channel_flush(p->c, );
+if (ret < 0) {
+error_report_err(err);
+return -1;
+}
+}
}
for (i = 0; i < migrate_multifd_channels(); i++) {
MultiFDSendParams *p = _send_state->params[i];
@@ -684,8 +710,8 @@ static void *multifd_send_thread(void *opaque)
p->iov[0].iov_base = p->packet;
}
-ret = qio_channel_writev_all(p->c, p->iov, p->iovs_num,
- _err);
+ret = qio_channel_writev_full_all(p->c, p->iov, p->iovs_num, NULL,
+ 0, p->write_flags, _err);
if (ret != 0) {
break;
}
@@ -913,6 +939,13 @@ int multifd_save_setup(Error **errp)
/* We need one extra place for the packet header */
p->iov = g_new0(struct iovec, page_count + 1);
p->normal = g_new0(ram_addr_t, page_count);
+
+if (migrate_use_zero_copy_send()) {
+
[PATCH v11 3/7] migration: Add zero-copy-send parameter for QMP/HMP for Linux
Add property that allows zero-copy migration of memory pages
on the sending side, and also includes a helper function
migrate_use_zero_copy_send() to check if it's enabled.
No code is introduced to actually do the migration, but it allow
future implementations to enable/disable this feature.
On non-Linux builds this parameter is compiled-out.
Signed-off-by: Leonardo Bras
Reviewed-by: Peter Xu
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Juan Quintela
Acked-by: Markus Armbruster
---
qapi/migration.json | 24
migration/migration.h | 5 +
migration/migration.c | 32
migration/socket.c| 11 +--
monitor/hmp-cmds.c| 6 ++
5 files changed, 76 insertions(+), 2 deletions(-)
diff --git a/qapi/migration.json b/qapi/migration.json
index 409eb086a2..04246481ce 100644
--- a/qapi/migration.json
+++ b/qapi/migration.json
@@ -741,6 +741,13 @@
# will consume more CPU.
# Defaults to 1. (Since 5.0)
#
+# @zero-copy-send: Controls behavior on sending memory pages on migration.
+# When true, enables a zero-copy mechanism for sending memory
+# pages, if host supports it.
+# Requires that QEMU be permitted to use locked memory for
guest
+# RAM pages.
+# Defaults to false. (Since 7.1)
+#
# @block-bitmap-mapping: Maps block nodes and bitmaps on them to
#aliases for the purpose of dirty bitmap migration.
Such
#aliases may for example be the corresponding names on
the
@@ -780,6 +787,7 @@
'xbzrle-cache-size', 'max-postcopy-bandwidth',
'max-cpu-throttle', 'multifd-compression',
'multifd-zlib-level' ,'multifd-zstd-level',
+ { 'name': 'zero-copy-send', 'if' : 'CONFIG_LINUX'},
'block-bitmap-mapping' ] }
##
@@ -906,6 +914,13 @@
# will consume more CPU.
# Defaults to 1. (Since 5.0)
#
+# @zero-copy-send: Controls behavior on sending memory pages on migration.
+# When true, enables a zero-copy mechanism for sending memory
+# pages, if host supports it.
+# Requires that QEMU be permitted to use locked memory for
guest
+# RAM pages.
+# Defaults to false. (Since 7.1)
+#
# @block-bitmap-mapping: Maps block nodes and bitmaps on them to
#aliases for the purpose of dirty bitmap migration.
Such
#aliases may for example be the corresponding names on
the
@@ -960,6 +975,7 @@
'*multifd-compression': 'MultiFDCompression',
'*multifd-zlib-level': 'uint8',
'*multifd-zstd-level': 'uint8',
+'*zero-copy-send': { 'type': 'bool', 'if': 'CONFIG_LINUX' },
'*block-bitmap-mapping': [ 'BitmapMigrationNodeAlias' ] } }
##
@@ -1106,6 +1122,13 @@
# will consume more CPU.
# Defaults to 1. (Since 5.0)
#
+# @zero-copy-send: Controls behavior on sending memory pages on migration.
+# When true, enables a zero-copy mechanism for sending memory
+# pages, if host supports it.
+# Requires that QEMU be permitted to use locked memory for
guest
+# RAM pages.
+# Defaults to false. (Since 7.1)
+#
# @block-bitmap-mapping: Maps block nodes and bitmaps on them to
#aliases for the purpose of dirty bitmap migration.
Such
#aliases may for example be the corresponding names on
the
@@ -1158,6 +1181,7 @@
'*multifd-compression': 'MultiFDCompression',
'*multifd-zlib-level': 'uint8',
'*multifd-zstd-level': 'uint8',
+'*zero-copy-send': { 'type': 'bool', 'if': 'CONFIG_LINUX' },
'*block-bitmap-mapping': [ 'BitmapMigrationNodeAlias' ] } }
##
diff --git a/migration/migration.h b/migration/migration.h
index a863032b71..e8f2941a55 100644
--- a/migration/migration.h
+++ b/migration/migration.h
@@ -375,6 +375,11 @@ MultiFDCompression migrate_multifd_compression(void);
int migrate_multifd_zlib_level(void);
int migrate_multifd_zstd_level(void);
+#ifdef CONFIG_LINUX
+bool migrate_use_zero_copy_send(void);
+#else
+#define migrate_use_zero_copy_send() (false)
+#endif
int migrate_use_xbzrle(void);
uint64_t migrate_xbzrle_cache_size(void);
bool migrate_colo_enabled(void);
diff --git a/migration/migration.c b/migration/migration.c
index 5a31b23bd6..3e91f4b5e2 100644
--- a/migration/migration.c
+++ b/migration/migration.c
@@ -910,6 +910,10 @@ MigrationParameters *qmp_query_migrate_parameters(Error
**errp)
params->multifd_zlib_level = s->parameters.multifd_zlib_level;
params->has_multifd_zstd_level = true;
params->multifd_zstd_level =
[PATCH v11 2/7] QIOChannelSocket: Implement io_writev zero copy flag & io_flush for CONFIG_LINUX
For CONFIG_LINUX, implement the new zero copy flag and the optional callback
io_flush on QIOChannelSocket, but enables it only when MSG_ZEROCOPY
feature is available in the host kernel, which is checked on
qio_channel_socket_connect_sync()
qio_channel_socket_flush() was implemented by counting how many times
sendmsg(...,MSG_ZEROCOPY) was successfully called, and then reading the
socket's error queue, in order to find how many of them finished sending.
Flush will loop until those counters are the same, or until some error occurs.
Notes on using writev() with QIO_CHANNEL_WRITE_FLAG_ZERO_COPY:
1: Buffer
- As MSG_ZEROCOPY tells the kernel to use the same user buffer to avoid copying,
some caution is necessary to avoid overwriting any buffer before it's sent.
If something like this happen, a newer version of the buffer may be sent
instead.
- If this is a problem, it's recommended to call qio_channel_flush() before
freeing
or re-using the buffer.
2: Locked memory
- When using MSG_ZERCOCOPY, the buffer memory will be locked after queued, and
unlocked after it's sent.
- Depending on the size of each buffer, and how often it's sent, it may require
a larger amount of locked memory than usually available to non-root user.
- If the required amount of locked memory is not available, writev_zero_copy
will return an error, which can abort an operation like migration,
- Because of this, when an user code wants to add zero copy as a feature, it
requires a mechanism to disable it, so it can still be accessible to less
privileged users.
Signed-off-by: Leonardo Bras
Reviewed-by: Peter Xu
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Juan Quintela
---
include/io/channel-socket.h | 2 +
io/channel-socket.c | 120 ++--
2 files changed, 118 insertions(+), 4 deletions(-)
diff --git a/include/io/channel-socket.h b/include/io/channel-socket.h
index e747e63514..513c428fe4 100644
--- a/include/io/channel-socket.h
+++ b/include/io/channel-socket.h
@@ -47,6 +47,8 @@ struct QIOChannelSocket {
socklen_t localAddrLen;
struct sockaddr_storage remoteAddr;
socklen_t remoteAddrLen;
+ssize_t zero_copy_queued;
+ssize_t zero_copy_sent;
};
diff --git a/io/channel-socket.c b/io/channel-socket.c
index 696a04dc9c..ae756ce166 100644
--- a/io/channel-socket.c
+++ b/io/channel-socket.c
@@ -25,9 +25,25 @@
#include "io/channel-watch.h"
#include "trace.h"
#include "qapi/clone-visitor.h"
+#ifdef CONFIG_LINUX
+#include
+#include
+#endif
#define SOCKET_MAX_FDS 16
+/*
+ * Zero-copy defines bellow are included to avoid breaking builds on systems
+ * that don't support MSG_ZEROCOPY, while keeping the functions more readable
+ * (without a lot of ifdefs).
+ */
+#ifndef MSG_ZEROCOPY
+#define MSG_ZEROCOPY 0x400
+#endif
+#ifndef SO_ZEROCOPY
+#define SO_ZEROCOPY 60
+#endif
+
SocketAddress *
qio_channel_socket_get_local_address(QIOChannelSocket *ioc,
Error **errp)
@@ -54,6 +70,8 @@ qio_channel_socket_new(void)
sioc = QIO_CHANNEL_SOCKET(object_new(TYPE_QIO_CHANNEL_SOCKET));
sioc->fd = -1;
+sioc->zero_copy_queued = 0;
+sioc->zero_copy_sent = 0;
ioc = QIO_CHANNEL(sioc);
qio_channel_set_feature(ioc, QIO_CHANNEL_FEATURE_SHUTDOWN);
@@ -153,6 +171,16 @@ int qio_channel_socket_connect_sync(QIOChannelSocket *ioc,
return -1;
}
+#ifdef CONFIG_LINUX
+int ret, v = 1;
+ret = setsockopt(fd, SOL_SOCKET, SO_ZEROCOPY, , sizeof(v));
+if (ret == 0) {
+/* Zero copy available on host */
+qio_channel_set_feature(QIO_CHANNEL(ioc),
+QIO_CHANNEL_FEATURE_WRITE_ZERO_COPY);
+}
+#endif
+
return 0;
}
@@ -533,6 +561,7 @@ static ssize_t qio_channel_socket_writev(QIOChannel *ioc,
char control[CMSG_SPACE(sizeof(int) * SOCKET_MAX_FDS)];
size_t fdsize = sizeof(int) * nfds;
struct cmsghdr *cmsg;
+int sflags = 0;
memset(control, 0, CMSG_SPACE(sizeof(int) * SOCKET_MAX_FDS));
@@ -557,15 +586,27 @@ static ssize_t qio_channel_socket_writev(QIOChannel *ioc,
memcpy(CMSG_DATA(cmsg), fds, fdsize);
}
+if (flags & QIO_CHANNEL_WRITE_FLAG_ZERO_COPY) {
+sflags = MSG_ZEROCOPY;
+}
+
retry:
-ret = sendmsg(sioc->fd, , 0);
+ret = sendmsg(sioc->fd, , sflags);
if (ret <= 0) {
-if (errno == EAGAIN) {
+switch (errno) {
+case EAGAIN:
return QIO_CHANNEL_ERR_BLOCK;
-}
-if (errno == EINTR) {
+case EINTR:
goto retry;
+case ENOBUFS:
+if (sflags & MSG_ZEROCOPY) {
+error_setg_errno(errp, errno,
+ "Process can't lock enough memory for using
MSG_ZEROCOPY");
+return -1;
+}
+break;
}
+
error_setg_errno(errp, errno,
"Unable to write to socket");
return -1;
@@ -659,6 +700,74 @@ static
[PATCH v11 5/7] multifd: multifd_send_sync_main now returns negative on error
Even though multifd_send_sync_main() currently emits error_reports, it's
callers don't really check it before continuing.
Change multifd_send_sync_main() to return -1 on error and 0 on success.
Also change all it's callers to make use of this change and possibly fail
earlier.
(This change is important to next patch on multifd zero copy
implementation, to make it sure an error in zero-copy flush does not go
unnoticed.
Signed-off-by: Leonardo Bras
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Peter Xu
---
migration/multifd.h | 2 +-
migration/multifd.c | 10 ++
migration/ram.c | 29 ++---
3 files changed, 29 insertions(+), 12 deletions(-)
diff --git a/migration/multifd.h b/migration/multifd.h
index 7d0effcb03..bcf5992945 100644
--- a/migration/multifd.h
+++ b/migration/multifd.h
@@ -20,7 +20,7 @@ int multifd_load_cleanup(Error **errp);
bool multifd_recv_all_channels_created(void);
bool multifd_recv_new_channel(QIOChannel *ioc, Error **errp);
void multifd_recv_sync_main(void);
-void multifd_send_sync_main(QEMUFile *f);
+int multifd_send_sync_main(QEMUFile *f);
int multifd_queue_page(QEMUFile *f, RAMBlock *block, ram_addr_t offset);
/* Multifd Compression flags */
diff --git a/migration/multifd.c b/migration/multifd.c
index 2a8c8570c3..15fb668e64 100644
--- a/migration/multifd.c
+++ b/migration/multifd.c
@@ -566,17 +566,17 @@ void multifd_save_cleanup(void)
multifd_send_state = NULL;
}
-void multifd_send_sync_main(QEMUFile *f)
+int multifd_send_sync_main(QEMUFile *f)
{
int i;
if (!migrate_use_multifd()) {
-return;
+return 0;
}
if (multifd_send_state->pages->num) {
if (multifd_send_pages(f) < 0) {
error_report("%s: multifd_send_pages fail", __func__);
-return;
+return -1;
}
}
for (i = 0; i < migrate_multifd_channels(); i++) {
@@ -589,7 +589,7 @@ void multifd_send_sync_main(QEMUFile *f)
if (p->quit) {
error_report("%s: channel %d has already quit", __func__, i);
qemu_mutex_unlock(>mutex);
-return;
+return -1;
}
p->packet_num = multifd_send_state->packet_num++;
@@ -608,6 +608,8 @@ void multifd_send_sync_main(QEMUFile *f)
qemu_sem_wait(>sem_sync);
}
trace_multifd_send_sync_main(multifd_send_state->packet_num);
+
+return 0;
}
static void *multifd_send_thread(void *opaque)
diff --git a/migration/ram.c b/migration/ram.c
index a2489a2699..5f5e37f64d 100644
--- a/migration/ram.c
+++ b/migration/ram.c
@@ -2909,6 +2909,7 @@ static int ram_save_setup(QEMUFile *f, void *opaque)
{
RAMState **rsp = opaque;
RAMBlock *block;
+int ret;
if (compress_threads_save_setup()) {
return -1;
@@ -2943,7 +2944,11 @@ static int ram_save_setup(QEMUFile *f, void *opaque)
ram_control_before_iterate(f, RAM_CONTROL_SETUP);
ram_control_after_iterate(f, RAM_CONTROL_SETUP);
-multifd_send_sync_main(f);
+ret = multifd_send_sync_main(f);
+if (ret < 0) {
+return ret;
+}
+
qemu_put_be64(f, RAM_SAVE_FLAG_EOS);
qemu_fflush(f);
@@ -3052,7 +3057,11 @@ static int ram_save_iterate(QEMUFile *f, void *opaque)
out:
if (ret >= 0
&& migration_is_setup_or_active(migrate_get_current()->state)) {
-multifd_send_sync_main(rs->f);
+ret = multifd_send_sync_main(rs->f);
+if (ret < 0) {
+return ret;
+}
+
qemu_put_be64(f, RAM_SAVE_FLAG_EOS);
qemu_fflush(f);
ram_transferred_add(8);
@@ -3112,13 +3121,19 @@ static int ram_save_complete(QEMUFile *f, void *opaque)
ram_control_after_iterate(f, RAM_CONTROL_FINISH);
}
-if (ret >= 0) {
-multifd_send_sync_main(rs->f);
-qemu_put_be64(f, RAM_SAVE_FLAG_EOS);
-qemu_fflush(f);
+if (ret < 0) {
+return ret;
}
-return ret;
+ret = multifd_send_sync_main(rs->f);
+if (ret < 0) {
+return ret;
+}
+
+qemu_put_be64(f, RAM_SAVE_FLAG_EOS);
+qemu_fflush(f);
+
+return 0;
}
static void ram_save_pending(QEMUFile *f, void *opaque, uint64_t max_size,
--
2.36.0
[PATCH v11 4/7] migration: Add migrate_use_tls() helper
A lot of places check parameters.tls_creds in order to evaluate if TLS is
in use, and sometimes call migrate_get_current() just for that test.
Add new helper function migrate_use_tls() in order to simplify testing
for TLS usage.
Signed-off-by: Leonardo Bras
Reviewed-by: Juan Quintela
Reviewed-by: Peter Xu
Reviewed-by: Daniel P. Berrangé
---
migration/migration.h | 1 +
migration/channel.c | 3 +--
migration/migration.c | 9 +
migration/multifd.c | 5 +
4 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/migration/migration.h b/migration/migration.h
index e8f2941a55..485d58b95f 100644
--- a/migration/migration.h
+++ b/migration/migration.h
@@ -380,6 +380,7 @@ bool migrate_use_zero_copy_send(void);
#else
#define migrate_use_zero_copy_send() (false)
#endif
+int migrate_use_tls(void);
int migrate_use_xbzrle(void);
uint64_t migrate_xbzrle_cache_size(void);
bool migrate_colo_enabled(void);
diff --git a/migration/channel.c b/migration/channel.c
index c6a8dcf1d7..a162d00fea 100644
--- a/migration/channel.c
+++ b/migration/channel.c
@@ -38,8 +38,7 @@ void migration_channel_process_incoming(QIOChannel *ioc)
trace_migration_set_incoming_channel(
ioc, object_get_typename(OBJECT(ioc)));
-if (s->parameters.tls_creds &&
-*s->parameters.tls_creds &&
+if (migrate_use_tls() &&
!object_dynamic_cast(OBJECT(ioc),
TYPE_QIO_CHANNEL_TLS)) {
migration_tls_channel_process_incoming(s, ioc, _err);
diff --git a/migration/migration.c b/migration/migration.c
index 3e91f4b5e2..4b6df2eb5e 100644
--- a/migration/migration.c
+++ b/migration/migration.c
@@ -2588,6 +2588,15 @@ bool migrate_use_zero_copy_send(void)
}
#endif
+int migrate_use_tls(void)
+{
+MigrationState *s;
+
+s = migrate_get_current();
+
+return s->parameters.tls_creds && *s->parameters.tls_creds;
+}
+
int migrate_use_xbzrle(void)
{
MigrationState *s;
diff --git a/migration/multifd.c b/migration/multifd.c
index 9ea4f581e2..2a8c8570c3 100644
--- a/migration/multifd.c
+++ b/migration/multifd.c
@@ -782,15 +782,12 @@ static bool multifd_channel_connect(MultiFDSendParams *p,
QIOChannel *ioc,
Error *error)
{
-MigrationState *s = migrate_get_current();
-
trace_multifd_set_outgoing_channel(
ioc, object_get_typename(OBJECT(ioc)),
migrate_get_current()->hostname, error);
if (!error) {
-if (s->parameters.tls_creds &&
-*s->parameters.tls_creds &&
+if (migrate_use_tls() &&
!object_dynamic_cast(OBJECT(ioc),
TYPE_QIO_CHANNEL_TLS)) {
multifd_tls_channel_connect(p, ioc, );
--
2.36.0
[PATCH v11 1/7] QIOChannel: Add flags on io_writev and introduce io_flush callback
Add flags to io_writev and introduce io_flush as optional callback to
QIOChannelClass, allowing the implementation of zero copy writes by
subclasses.
How to use them:
- Write data using qio_channel_writev*(...,QIO_CHANNEL_WRITE_FLAG_ZERO_COPY),
- Wait write completion with qio_channel_flush().
Notes:
As some zero copy write implementations work asynchronously, it's
recommended to keep the write buffer untouched until the return of
qio_channel_flush(), to avoid the risk of sending an updated buffer
instead of the buffer state during write.
As io_flush callback is optional, if a subclass does not implement it, then:
- io_flush will return 0 without changing anything.
Also, some functions like qio_channel_writev_full_all() were adapted to
receive a flag parameter. That allows shared code between zero copy and
non-zero copy writev, and also an easier implementation on new flags.
Signed-off-by: Leonardo Bras
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Peter Xu
Reviewed-by: Juan Quintela
---
include/io/channel.h| 38 +-
chardev/char-io.c | 2 +-
hw/remote/mpqemu-link.c | 2 +-
io/channel-buffer.c | 1 +
io/channel-command.c| 1 +
io/channel-file.c | 1 +
io/channel-socket.c | 2 ++
io/channel-tls.c| 1 +
io/channel-websock.c| 1 +
io/channel.c| 49 +++--
migration/rdma.c| 1 +
scsi/pr-manager-helper.c| 2 +-
tests/unit/test-io-channel-socket.c | 1 +
13 files changed, 88 insertions(+), 14 deletions(-)
diff --git a/include/io/channel.h b/include/io/channel.h
index 88988979f8..c680ee7480 100644
--- a/include/io/channel.h
+++ b/include/io/channel.h
@@ -32,12 +32,15 @@ OBJECT_DECLARE_TYPE(QIOChannel, QIOChannelClass,
#define QIO_CHANNEL_ERR_BLOCK -2
+#define QIO_CHANNEL_WRITE_FLAG_ZERO_COPY 0x1
+
typedef enum QIOChannelFeature QIOChannelFeature;
enum QIOChannelFeature {
QIO_CHANNEL_FEATURE_FD_PASS,
QIO_CHANNEL_FEATURE_SHUTDOWN,
QIO_CHANNEL_FEATURE_LISTEN,
+QIO_CHANNEL_FEATURE_WRITE_ZERO_COPY,
};
@@ -104,6 +107,7 @@ struct QIOChannelClass {
size_t niov,
int *fds,
size_t nfds,
+ int flags,
Error **errp);
ssize_t (*io_readv)(QIOChannel *ioc,
const struct iovec *iov,
@@ -136,6 +140,8 @@ struct QIOChannelClass {
IOHandler *io_read,
IOHandler *io_write,
void *opaque);
+int (*io_flush)(QIOChannel *ioc,
+Error **errp);
};
/* General I/O handling functions */
@@ -228,6 +234,7 @@ ssize_t qio_channel_readv_full(QIOChannel *ioc,
* @niov: the length of the @iov array
* @fds: an array of file handles to send
* @nfds: number of file handles in @fds
+ * @flags: write flags (QIO_CHANNEL_WRITE_FLAG_*)
* @errp: pointer to a NULL-initialized error object
*
* Write data to the IO channel, reading it from the
@@ -260,6 +267,7 @@ ssize_t qio_channel_writev_full(QIOChannel *ioc,
size_t niov,
int *fds,
size_t nfds,
+int flags,
Error **errp);
/**
@@ -837,6 +845,7 @@ int qio_channel_readv_full_all(QIOChannel *ioc,
* @niov: the length of the @iov array
* @fds: an array of file handles to send
* @nfds: number of file handles in @fds
+ * @flags: write flags (QIO_CHANNEL_WRITE_FLAG_*)
* @errp: pointer to a NULL-initialized error object
*
*
@@ -846,6 +855,14 @@ int qio_channel_readv_full_all(QIOChannel *ioc,
* to be written, yielding from the current coroutine
* if required.
*
+ * If QIO_CHANNEL_WRITE_FLAG_ZERO_COPY is passed in flags,
+ * instead of waiting for all requested data to be written,
+ * this function will wait until it's all queued for writing.
+ * In this case, if the buffer gets changed between queueing and
+ * sending, the updated buffer will be sent. If this is not a
+ * desired behavior, it's suggested to call qio_channel_flush()
+ * before reusing the buffer.
+ *
* Returns: 0 if all bytes were written, or -1 on error
*/
@@ -853,6 +870,25 @@ int qio_channel_writev_full_all(QIOChannel *ioc,
const struct iovec *iov,
size_t niov,
int *fds, size_t nfds,
-Error **errp);
+int flags, Error **errp);
+
+/**
+ * qio_channel_flush:
+ * @ioc: the channel object
+ * @errp: pointer to a NULL-initialized error object
+ *
+ * Will block until every packet queued with
+ * qio_channel_writev_full() +
[PATCH v11 6/7] multifd: Send header packet without flags if zero-copy-send is enabled
Since d48c3a0445 ("multifd: Use a single writev on the send side"),
sending the header packet and the memory pages happens in the same
writev, which can potentially make the migration faster.
Using channel-socket as example, this works well with the default copying
mechanism of sendmsg(), but with zero-copy-send=true, it will cause
the migration to often break.
This happens because the header packet buffer gets reused quite often,
and there is a high chance that by the time the MSG_ZEROCOPY mechanism get
to send the buffer, it has already changed, sending the wrong data and
causing the migration to abort.
It means that, as it is, the buffer for the header packet is not suitable
for sending with MSG_ZEROCOPY.
In order to enable zero copy for multifd, send the header packet on an
individual write(), without any flags, and the remanining pages with a
writev(), as it was happening before. This only changes how a migration
with zero-copy-send=true works, not changing any current behavior for
migrations with zero-copy-send=false.
Signed-off-by: Leonardo Bras
Reviewed-by: Peter Xu
Reviewed-by: Daniel P. Berrangé
---
migration/multifd.c | 22 +++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/migration/multifd.c b/migration/multifd.c
index 15fb668e64..2541cd2322 100644
--- a/migration/multifd.c
+++ b/migration/multifd.c
@@ -617,6 +617,7 @@ static void *multifd_send_thread(void *opaque)
MultiFDSendParams *p = opaque;
Error *local_err = NULL;
int ret = 0;
+bool use_zero_copy_send = migrate_use_zero_copy_send();
trace_multifd_send_thread_start(p->id);
rcu_register_thread();
@@ -639,9 +640,14 @@ static void *multifd_send_thread(void *opaque)
if (p->pending_job) {
uint64_t packet_num = p->packet_num;
uint32_t flags = p->flags;
-p->iovs_num = 1;
p->normal_num = 0;
+if (use_zero_copy_send) {
+p->iovs_num = 0;
+} else {
+p->iovs_num = 1;
+}
+
for (int i = 0; i < p->pages->num; i++) {
p->normal[p->normal_num] = p->pages->offset[i];
p->normal_num++;
@@ -665,8 +671,18 @@ static void *multifd_send_thread(void *opaque)
trace_multifd_send(p->id, packet_num, p->normal_num, flags,
p->next_packet_size);
-p->iov[0].iov_len = p->packet_len;
-p->iov[0].iov_base = p->packet;
+if (use_zero_copy_send) {
+/* Send header first, without zerocopy */
+ret = qio_channel_write_all(p->c, (void *)p->packet,
+p->packet_len, _err);
+if (ret != 0) {
+break;
+}
+} else {
+/* Send header using the same writev call */
+p->iov[0].iov_len = p->packet_len;
+p->iov[0].iov_base = p->packet;
+}
ret = qio_channel_writev_all(p->c, p->iov, p->iovs_num,
_err);
--
2.36.0
[PATCH v11 0/7] MSG_ZEROCOPY + multifd
This patch series intends to enable MSG_ZEROCOPY in QIOChannel, and make
use of it for multifd migration performance improvement, by reducing cpu
usage.
Patch #1 creates new callbacks for QIOChannel, allowing the implementation
of zero copy writing.
Patch #2 implements io_writev flags and io_flush() on QIOChannelSocket,
making use of MSG_ZEROCOPY on Linux.
Patch #3 adds a "zero_copy_send" migration property, only available with
CONFIG_LINUX, and compiled-out in any other architectures.
This migration property has to be enabled before multifd migration starts.
Patch #4 adds a helper function that allows to see if TLS is going to be used.
This helper will be later used in patch #5.
Patch #5 changes multifd_send_sync_main() so it returns int instead of void.
The return value is used to understand if any error happened in the function,
allowing migration to possible fail earlier.
Patch #6 implements an workaround: The behavior introduced in d48c3a0445 is
hard to deal with in zerocopy, so a workaround is introduced to send the
header in a different syscall, without MSG_ZEROCOPY.
Patch #7 Makes use of QIOChannelSocket zero_copy implementation on
nocomp multifd migration.
Results:
In preliminary tests, the resource usage of __sys_sendmsg() reduced 15 times,
and the overall migration took 13-22% less time, based in synthetic cpu
workload.
In further tests, it was noted that, on multifd migration with 8 channels:
- On idle hosts, migration time reduced in 10% to 21%.
- On hosts busy with heavy cpu stress (1 stress thread per cpu, but
not cpu-pinned) migration time reduced in ~25% by enabling zero-copy.
- On hosts with heavy cpu-pinned workloads (1 stress thread per cpu,
cpu-pinned), migration time reducted in ~66% by enabling zero-copy.
Above tests setup:
- Sending and Receiving hosts:
- CPU : Intel(R) Xeon(R) Platinum 8276L CPU @ 2.20GHz (448 CPUS)
- Network card: E810-C (100Gbps)
- >1TB RAM
- QEMU: Upstream master branch + This patchset
- Linux: Upstream v5.15
- VM configuration:
- 28 VCPUs
- 512GB RAM
---
Changes since v10:
- Patch #2 was breaking build on systems with glibc < glibc-2.27,
and probably non-linux builds.
- Also on Patch #2, replaced bits/socket.h with sys/socket.h,
(thanks Peter Xu)
Changes since v9:
- Patch #6 got simplified and improved (thanks Daniel)
- Patch #7 got better comments (thanks Peter Xu)
Changes since v8:
- Inserted two new patches #5 & #6, previous patch #5 is now #7.
- Workaround an optimization introduced in d48c3a0445
- Removed unnecessary assert in qio_channel_writev_full_all
Changes since v7:
- Migration property renamed from zero-copy to zero-copy-send
- A few early tests added to help misconfigurations to fail earlier
- qio_channel_full*_flags() renamed back to qio_channel_full*()
- multifd_send_sync_main() reverted back to not receiving a flag,
so it always sync zero-copy when enabled.
- Improve code quality on a few points
Changes since v6:
- Remove io_writev_zero_copy(), and makes use of io_writev() new flags
to achieve the same results.
- Rename io_flush_zero_copy() to io_flush()
- Previous patch #2 became too small, so it was squashed in previous
patch #3 (now patch #2)
Changes since v5:
- flush_zero_copy now returns -1 on fail, 0 on success, and 1 when all
processed writes were not able to use zerocopy in kernel.
- qio_channel_socket_poll() removed, using qio_channel_wait() instead
- ENOBUFS is now processed inside qio_channel_socket_writev_flags()
- Most zerocopy parameter validation moved to migrate_params_check(),
leaving only feature test to socket_outgoing_migration() callback
- Naming went from *zerocopy to *zero_copy or *zero-copy, due to QAPI/QMP
preferences
- Improved docs
Changes since v4:
- 3 patches got splitted in 6
- Flush is used for syncing after each iteration, instead of only at the end
- If zerocopy is not available, fail in connect instead of failing on write
- 'multifd-zerocopy' property renamed to 'zerocopy'
- Fail migrations that don't support zerocopy, if it's enabled.
- Instead of checking for zerocopy at each write, save the flags in
MultiFDSendParams->write_flags and use them on write
- Reorganized flag usage in QIOChannelSocket
- A lot of typos fixed
- More doc on buffer restrictions
Changes since v3:
- QIOChannel interface names changed from io_async_{writev,flush} to
io_{writev,flush}_zerocopy
- Instead of falling back in case zerocopy is not implemented, return
error and abort operation.
- Flush now waits as long as needed, or return error in case anything
goes wrong, aborting the operation.
- Zerocopy is now conditional in multifd, being set by parameter
multifd-zerocopy
- Moves zerocopy_flush to multifd_send_sync_main() from multifd_save_cleanup
so migration can abort if flush goes wrong.
- Several other small improvements
Changes since v2:
- Patch #1: One more fallback
- Patch #2: Fall back to sync if fails to lock buffer memory in MSG_ZEROCOPY
send.
Changes since
Re: [PATCH qemu] spapr: Use address from elf parser for kernel address
Alexey Kardashevskiy writes:
> tl;dr: This allows Big Endian zImage booting via -kernel + x-vof=on.
>
> QEMU loads the kernel at 0x40 by default which works most of
> the time as Linux kernels are relocatable, 64bit and compiled with "-pie"
> (position independent code). This works for a little endian zImage too.
>
> However a big endian zImage is compiled without -pie, is 32bit, linked to
> 0x400 so current QEMU ends up loading it at
> 0x440 but keeps spapr->kernel_addr unchanged so booting fails.
>
> This uses the kernel address returned from load_elf().
> If the default kernel_addr is used, there is no change in behavior (as
> translate_kernel_address() takes care of this), which is:
> LE/BE vmlinux and LE zImage boot, BE zImage does not.
> If the VM created with "-machine kernel-addr=0,x-vof=on", then QEMU
> prints a warning and BE zImage boots.
I think we can fix this without needing a different command line for BE
zImage (apart from x-vof, which is a separate matter).
If you look at translate_kernel_address, it cannot really work when the
ELF PhysAddr is != 0. We would always hit this sort of 0x440 issue,
so if we fix that function like this...
static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
{
SpaprMachineState *spapr = opaque;
return addr ? addr : spapr->kernel_addr;
}
...then we could always use the ELF PhysAddr if it is different from 0
and only use the default load addr if the ELF PhysAddr is 0. If the user
gives kernel_addr on the cmdline, we honor that, even if puts the kernel
over the firmware (we have code to detect that).
> @@ -2988,6 +2990,12 @@ static void spapr_machine_init(MachineState *machine)
> exit(1);
> }
>
> +if (spapr->kernel_addr != loaded_addr) {
This could be:
if (spapr->kernel_addr == KERNEL_LOAD_ADDR &&
spapr->kernel_addr != loaded_addr) {
So the precedence would be:
1- ELF PhysAddr, if != 0. After all, that is what it's for. BE zImage
falls here;
2- KERNEL_LOAD_ADDR. Via translate_kernel_address, LE/BE vmlinux fall
here;
3- kernel_addr. The user is probably hacking something, just use what
they gave us. QEMU will yell if they load the kernel over the fw.
> +warn_report("spapr: kernel_addr changed from 0x%lx to 0x%lx",
> +spapr->kernel_addr, loaded_addr);
> +spapr->kernel_addr = loaded_addr;
> +}
> +
> /* load initrd */
> if (initrd_filename) {
> /* Try to locate the initrd in the gap between the kernel
Re: [PATCH v2 1/1] hw/arm/aspeed: Add fby35 machine type
> On May 4, 2022, at 9:34 AM, Peter Delevoryas wrote:
>
>>
>> On May 4, 2022, at 12:39 AM, Cédric Le Goater wrote:
>>
>> On 5/4/22 00:59, Peter Delevoryas wrote:
>>> Add the 'fby35-bmc' machine type based on the kernel DTS[1] and userspace
>>> i2c setup scripts[2]. Undefined values are inherited from the AST2600-EVB.
>>> Reference images can be found in Facebook OpenBMC Github Release assets
>>> as "fby35.mtd". [3]
>>> You can boot the reference images as follows (fby35 uses dual-flash):
>>> qemu-system-arm -machine fby35-bmc \
>>> -drive file=fby35.mtd,format=raw,if=mtd \
>>> -drive file=fby35.mtd,format=raw,if=mtd \
>>> -nographic
>>> [1]
>>> https://github.com/facebook/openbmc-linux/blob/412d5053258007117e94b1e36015aefc1301474b/arch/arm/boot/dts/aspeed-bmc-facebook-fby35.dts
>>> [2]
>>> https://github.com/facebook/openbmc/blob/e2294ff5d31dd65c248fe396a385286d6d5c463d/meta-facebook/meta-fby35/recipes-fby35/plat-utils/files/setup-dev.sh
>>> [3] https://github.com/facebook/openbmc/releases
>>> Signed-off-by: Peter Delevoryas
>>
>> Reviewed-by: Cédric Le Goater
>
> Thanks!
>
>>
>> a question below,
>>
>>> ---
>>> v2: Removed avocado test, updated commit message.
>>> hw/arm/aspeed.c | 63 +
>>> 1 file changed, 63 insertions(+)
>>> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
>>> index a74c13ab0f..725c169488 100644
>>> --- a/hw/arm/aspeed.c
>>> +++ b/hw/arm/aspeed.c
>>> @@ -21,6 +21,7 @@
>>> #include "hw/misc/led.h"
>>> #include "hw/qdev-properties.h"
>>> #include "sysemu/block-backend.h"
>>> +#include "sysemu/reset.h"
>>> #include "hw/loader.h"
>>> #include "qemu/error-report.h"
>>> #include "qemu/units.h"
>>> @@ -951,6 +952,35 @@ static void bletchley_bmc_i2c_init(AspeedMachineState
>>> *bmc)
>>> i2c_slave_create_simple(i2c[12], TYPE_PCA9552, 0x67);
>>> }
>>> +static void fby35_i2c_init(AspeedMachineState *bmc)
>>> +{
>>> + AspeedSoCState *soc = >soc;
>>> + I2CBus *i2c[16];
>>> +
>>> + for (int i = 0; i < 16; i++) {
>>> + i2c[i] = aspeed_i2c_get_bus(>i2c, i);
>>> + }
>>> +
>>> + i2c_slave_create_simple(i2c[2], TYPE_LM75, 0x4f);
>>> + i2c_slave_create_simple(i2c[8], TYPE_TMP421, 0x1f);
>>> + /* Hotswap controller is actually supposed to be mp5920 or ltc4282. */
>>> + i2c_slave_create_simple(i2c[11], "adm1272", 0x44);
>>> + i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4e);
>>> + i2c_slave_create_simple(i2c[12], TYPE_LM75, 0x4f);
>>> +
>>> + aspeed_eeprom_init(i2c[4], 0x51, 128 * KiB);
>>> + aspeed_eeprom_init(i2c[6], 0x51, 128 * KiB);
>>> + aspeed_eeprom_init(i2c[8], 0x50, 32 * KiB);
>>> + aspeed_eeprom_init(i2c[11], 0x51, 128 * KiB);
>>> + aspeed_eeprom_init(i2c[11], 0x54, 128 * KiB);
>>> +
>>> + /*
>>> + * TODO: There is a multi-master i2c connection to an AST1030 MiniBMC on
>>> + * buses 0, 1, 2, 3, and 9. Source address 0x10, target address 0x20 on
>>> + * each.
>>> + */
>>
>>
>> Have you considered extending the emulation to include a AST1030 SoC
>> in a larger machine ?
>>
>> The AST1030 SoC is merged and I think that QEMU could run a cortex-m4
>> CPU and a A7 CPU. A + R CPUs is supported (Xilinx boards).
>>
>
> As a matter of fact yes! I tested booting our OpenBIC Zephyr kernel last week
> with the 1030, that worked. I also used the experimental i2c multi-master
> patches from Klaus to make a i2c-netdev device that connects two separate
> QEMU instances through a socket and sends their i2c messages back and forth.
> I was able to test a basic MCTP transaction.
>
> I’m hoping to help however possible with merging Klaus’s changes, and then
> propose the i2c-netdev thing too.
Oh wait a minute: You mean I could include both SoC’s in one machine? Oh that’s
a good idea actually. Maybe I’ll look into that as an alternative to the socket
thing. Still, it might be something useful to submit anyways.
>
>> Thanks,
>>
>> C.
>>
>>
>>> +}
>>> +
>>> static bool aspeed_get_mmio_exec(Object *obj, Error **errp)
>>> {
>>> return ASPEED_MACHINE(obj)->mmio_exec;
>>> @@ -1293,6 +1323,35 @@ static void
>>> aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
>>> aspeed_soc_num_cpus(amc->soc_name);
>>> }
>>> +static void fby35_reset(MachineState *state)
>>> +{
>>> + AspeedMachineState *bmc = ASPEED_MACHINE(state);
>>> + AspeedGPIOState *gpio = >soc.gpio;
>>> +
>>> + qemu_devices_reset();
>>> +
>>> + /* Board ID */
>>> + object_property_set_bool(OBJECT(gpio), "gpioV4", true, _fatal);
>>> + object_property_set_bool(OBJECT(gpio), "gpioV5", true, _fatal);
>>> + object_property_set_bool(OBJECT(gpio), "gpioV6", true, _fatal);
>>> + object_property_set_bool(OBJECT(gpio), "gpioV7", false, _fatal);
>>> +}
>>> +
>>> +static void aspeed_machine_fby35_class_init(ObjectClass *oc, void *data)
>>> +{
>>> + MachineClass *mc = MACHINE_CLASS(oc);
>>> + AspeedMachineClass *amc = ASPEED_MACHINE_CLASS(oc);
>>> +
>>> + mc->desc = "Facebook fby35 BMC (Cortex-A7)";
>>> + mc->reset = fby35_reset;
>>> + amc->fmc_model = "mx66l1g45g";
>>> + amc->num_cs
Re: [PATCH for-7.1 v2 0/1] use dc->vmsd with spapr devices vmstate
Ping On 4/9/22 09:09, Daniel Henrique Barboza wrote: Hi, This v2 contains only the last patch from v1, patch 4, given that all other patches are breaking backward migration due to how qdev_set_legacy_instance_id() works when vmstate_register() is passing an id to the vmsds. Changes from v1: - patches 1-3: removed - v1 link: https://lists.gnu.org/archive/html/qemu-devel/2022-03/msg05615.html Daniel Henrique Barboza (1): hw/ppc: use qdev to register spapr_nvdimm vmsd hw/ppc/spapr_nvdimm.c | 11 ++- 1 file changed, 2 insertions(+), 9 deletions(-)
Re: [PATCH v2 0/1] Coverity fixes in hw/ppc/spapr_nvdimm.c
Ping On 4/9/22 17:08, Daniel Henrique Barboza wrote: Changes from v1: - clarified in the commit message which kind of errors we aim to prevent - changed the H_HARDWARE return to g_assert() exit - v1 link: https://lists.gnu.org/archive/html/qemu-devel/2022-04/msg00569.html Daniel Henrique Barboza (1): hw/ppc: check if spapr_drc_index() returns NULL in spapr_nvdimm.c hw/ppc/spapr_nvdimm.c | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-)
Re: [PATCH 04/16] compiler.h: add QEMU_{BEGIN, END}_IGNORE_INITIALIZER_OVERRIDES
On Wed, 4 May 2022 at 18:36, wrote:
>
> From: Marc-André Lureau
>
> clang has this default warning which QEMU codes triggers in many
> situations. However, other projects in general may not want to disable
> globally the warning but only in limited specific code blocks.
>
> Signed-off-by: Marc-André Lureau
> +#if defined (__clang__)
> +#define QEMU_BEGIN_IGNORE_INITIALIZER_OVERRIDES \
> +_Pragma("clang diagnostic push")\
> +_Pragma("clang diagnostic ignored \"-Winitializer-overrides\"")
> +#define QEMU_END_IGNORE_INITIALIZER_OVERRIDES \
> +_Pragma("clang diagnostic pop")
> +#else
> +#define QEMU_BEGIN_IGNORE_INITIALIZER_OVERRIDES
> +#define QEMU_END_IGNORE_INITIALIZER_OVERRIDES
> +#endif
We use pragma diagnostic controls generally sparingly and
only when we need to briefly disable an otherwise widely
useful warning. In this case the clang warning is just
broken (because it doesn't correctly handle the array
range initializer extension we use), and so we turn off
the warning altogether in configure, so that we get the
behaviour we want everywhere in the source tree, not just
if we mark it up with special macros.
If other projects want to borrow bits of QEMU code then
they need to either (a) abide by our conventions for
what compiler warnings to enable or disable, or else
(b) fork the code and fiddle with their own copy.
I don't really want to see QEMU's source code get littered
with a pile of extra macros hiding diagnostic pragmas.
(If we stop passing -Wno-initializer-overrides to the
compiler then we set a bunch of new "built on gcc on the
developer's machine but fails to build on clang in the
CI jobs" traps for ourselves, and if we don't stop passing
that then the places that should be marked up with the
macros won't reliably be marked up.)
thanks
-- PMM
Re: [PATCH 03/16] tests: make libqmp buildable for win32
On 04/05/2022 19.30, marcandre.lur...@redhat.com wrote: From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- tests/qtest/libqmp.h | 2 ++ tests/qtest/libqmp.c | 35 +-- 2 files changed, 31 insertions(+), 6 deletions(-) Reviewed-by: Thomas Huth
Re: [PATCH 9/9] hw/9p: win32: Translate Windows error number to Linux value
On Montag, 25. April 2022 16:27:05 CEST Bin Meng wrote:
> From: Guohuai Shi
>
> Some of Windows error numbers have different value from Linux ones.
> For example, ENOTEMPTY is defined to 39 in Linux, but is defined to
> 41 in Windows. So deleting a directory from a Linux guest on top
> of QEMU from a Windows host complains:
>
> # rmdir tmp
> rmdir: 'tmp': Unknown error 41
>
> This commit provides error number traslation from Windows to Linux.
> It can make Linux guest OS happy with the error number when running
> on top of QEMU from a Windows host.
>
> This has a side effet that it requires all guest OSes' 9pfs drivers
> to use the same errno.
>
> It looks like macOS has different errno too so using 9p in a Linux
> on top of QEMU from a macOS host may also fail in the above case.
> I suspect we only tested 9p from a macOS guest on top of QEMU from
> a macOS host, so this issue was not exposed.
>
> I am not aware of Windows's native support for 9pfs so I think using
> the Linux errnor as the standard is probably okay, but I am open for
> suggestions.
>
> Signed-off-by: Guohuai Shi
> Signed-off-by: Bin Meng
> ---
This patch collides with recent fixes for macOS hosts. Please rebase and use
the already existing function errno_to_dotl().
>
> hw/9pfs/9p.h| 4
> hw/9pfs/9p-util-win32.c | 38 ++
> hw/9pfs/9p.c| 7 +++
> 3 files changed, 49 insertions(+)
>
> diff --git a/hw/9pfs/9p.h b/hw/9pfs/9p.h
> index 87e8eac840..db2013d549 100644
> --- a/hw/9pfs/9p.h
> +++ b/hw/9pfs/9p.h
> @@ -490,6 +490,10 @@ void pdu_free(V9fsPDU *pdu);
> void pdu_submit(V9fsPDU *pdu, P9MsgHeader *hdr);
> void v9fs_reset(V9fsState *s);
>
> +#ifdef CONFIG_WIN32
> +int errno_translate_win32(int errno_win32);
> +#endif
> +
> struct V9fsTransport {
> ssize_t (*pdu_vmarshal)(V9fsPDU *pdu, size_t offset, const char
> *fmt, va_list ap);
> diff --git a/hw/9pfs/9p-util-win32.c b/hw/9pfs/9p-util-win32.c
> index d9b35e7425..c4f90c6503 100644
> --- a/hw/9pfs/9p-util-win32.c
> +++ b/hw/9pfs/9p-util-win32.c
> @@ -20,6 +20,11 @@
> #define V9FS_MAGIC 0x53465039 /* string "9PFS" */
> #endif
>
> +struct translate_map {
> +int output; /* Linux error number */
> +int input; /* Windows error number */
> +};
> +
No need to define a structure for this. Your motivation was to define a sparse
array. That safes you only a couple bytes and comes with runtime overhead
OTOH. See below.
> static int build_ads_name(char *namebuf, size_t namebuflen,
>const char *dirname, const char *filename,
>const char *ads_name)
> @@ -301,3 +306,36 @@ int qemu_statfs(const char *fs_root, struct statfs
> *stbuf)
>
> return 0;
> }
> +
> +int errno_translate_win32(int errno_win32)
> +{
> +unsigned int i;
> +
> +/*
> + * The translation table only contains values which could be returned
> + * as a result of a filesystem operation, i.e. network/socket related
> + * errno values need not be considered for translation.
> + */
> +static struct translate_map errno_map[] = {
> +/* Linux errno Windows errno */
> +{ L_EDEADLK,EDEADLK },
> +{ L_ENAMETOOLONG, ENAMETOOLONG},
> +{ L_ENOLCK, ENOLCK },
> +{ L_ENOSYS, ENOSYS },
> +{ L_ENOTEMPTY, ENOTEMPTY },
> +{ L_EILSEQ, EILSEQ },
> +{ L_ELOOP, ELOOP },
> +};
So far we are using if .. else if ... blocks for macOS host errno translation,
because I needed quick and small patches for qemu-stable for fixing macOS host
support.
So it is OK to use an array solution, but simply use a dense array and use GCC
designated initializers ...
> +
> +/* scan errno_win32 table for a matching Linux errno value */
> +
> +for (i = 0; i < sizeof(errno_map) / sizeof(errno_map[0]); i++) {
> +if (errno_win32 == errno_map[i].input) {
> +return errno_map[i].output;
> +}
> +}
... then this loop will become unnecessary, and you can just make a constant
time array access with prior array range check.
> +
> +/* no translation necessary */
> +
> +return errno_win32;
> +}
> diff --git a/hw/9pfs/9p.c b/hw/9pfs/9p.c
> index a04889c1d6..0a9c0a509e 100644
> --- a/hw/9pfs/9p.c
> +++ b/hw/9pfs/9p.c
> @@ -1062,6 +1062,13 @@ static void coroutine_fn pdu_complete(V9fsPDU *pdu,
> ssize_t len) id = P9_RERROR;
> }
>
> +#ifdef CONFIG_WIN32
> +/*
> + * Some Windows errnos have different value from Linux,
> + * and they need to be translated to the Linux value.
> + */
> +err = errno_translate_win32(err);
> +#endif
This would translate it for all 9p protocol versions. We want translation only
for 9p2000.L. Current git version does this already correctly. So
Re: [PATCH 06/16] include: adjust header guards after renaming
Am 04.05.22 um 19:30 schrieb marcandre.lur...@redhat.com: From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- include/qemu/help-texts.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/qemu/help-texts.h b/include/qemu/help-texts.h index ba32cc8b1f39..4f265fed8df1 100644 --- a/include/qemu/help-texts.h +++ b/include/qemu/help-texts.h @@ -1,5 +1,5 @@ -#ifndef QEMU_COMMON_H -#define QEMU_COMMON_H +#ifndef QEMU_HELP_TEXTS_H +#define QEMU_HELP_TEXTS_H /* Copyright string for -version arguments, About dialogs, etc */ #define QEMU_COPYRIGHT "Copyright (c) 2003-2022 " \ Reviewed-by: Stefan Weil OpenPGP_0xE08C21D5677450AD.asc Description: OpenPGP public key OpenPGP_signature Description: OpenPGP digital signature
Re: [PATCH 02/16] util/win32: simplify qemu_get_local_state_dir()
Am 04.05.22 um 19:30 schrieb marcandre.lur...@redhat.com: From: Marc-André Lureau SHGetFolderPath() is a deprecated API: https://docs.microsoft.com/en-us/windows/win32/api/shlobj_core/nf-shlobj_core-shgetfolderpatha It is a wrapper for SHGetKnownFolderPath() and CSIDL_COMMON_PATH is mapped to FOLDERID_ProgramData: https://docs.microsoft.com/en-us/windows/win32/shell/csidl g_get_system_data_dirs() is a suitable replacement, as it will have FOLDERID_ProgramData in the returned list. However, it follows the XDG Base Directory Specification, if `XDG_DATA_DIRS` is defined, it will be returned instead. Signed-off-by: Marc-André Lureau --- util/oslib-win32.c | 17 - 1 file changed, 4 insertions(+), 13 deletions(-) Reviewed-by: Stefan Weil OpenPGP_0xE08C21D5677450AD.asc Description: OpenPGP public key OpenPGP_signature Description: OpenPGP digital signature
Re: [PATCH 5/9] hw/9pfs: Add a 'local' file system backend driver for Windows
On Montag, 25. April 2022 16:27:01 CEST Bin Meng wrote: > From: Guohuai Shi > > Add a 9p local file system backend driver to support Windows, > including open, read, write, close, rename, remove, etc. > > All security models are supported. The mapped (mapped-xattr) > security model is implemented using NTFS Alternate Data Stream > (ADS) so the 9p export path shall be on an NTFS partition. > > Signed-off-by: Guohuai Shi > Signed-off-by: Bin Meng > --- > > hw/9pfs/9p-linux-errno.h | 151 + > hw/9pfs/9p-local.h |4 + > hw/9pfs/9p-util.h| 41 ++ > hw/9pfs/9p.h | 23 + > hw/9pfs/9p-local-win32.c | 1242 ++ > hw/9pfs/9p-util-win32.c | 303 ++ > hw/9pfs/9p-xattr.c | 113 > hw/9pfs/9p.c | 91 ++- > hw/9pfs/codir.c | 15 + > 9 files changed, 1982 insertions(+), 1 deletion(-) > create mode 100644 hw/9pfs/9p-linux-errno.h > create mode 100644 hw/9pfs/9p-local-win32.c > create mode 100644 hw/9pfs/9p-util-win32.c This patch is definitely too huge and should be split up into a huge bunch of separate patches! > diff --git a/hw/9pfs/9p-linux-errno.h b/hw/9pfs/9p-linux-errno.h > new file mode 100644 > index 00..b0d6ac45ac > --- /dev/null > +++ b/hw/9pfs/9p-linux-errno.h This file definitely deserves a patch on its own. As for its filename: Following our current filename scheme, it would probably be better be named 9p-errno-linux.h or 9p-errno-dotl.h as this is probably a 9p protocol version thing. > @@ -0,0 +1,151 @@ > +/* > + * 9p Linux errno translation definition > + * > + * This work is licensed under the terms of the GNU GPL, version 2 or > later. + * See the COPYING file in the top-level directory. > + */ > + > +#include > + > +#ifndef QEMU_9P_LINUX_ERRNO_H > +#define QEMU_9P_LINUX_ERRNO_H > + > +/* > + * This file contains the Linux errno definitions to translate errnos set > by + * the 9P server (running on Windows) to a corresponding errno value. + > * > + * This list should be periodically reviewed and updated; particularly for > + * errnos that might be set as a result of a file system operation. > + */ > + I would just import the already existing sys/errno.h from the Linux kernel, with all its copyright header etc. and then with a 2nd patch just prefix the individual macros with DOTL_* > +#define L_EPERM 1 /* Operation not permitted */ > +#define L_ENOENT2 /* No such file or directory */ > +#define L_ESRCH 3 /* No such process */ > +#define L_EINTR 4 /* Interrupted system call */ > +#define L_EIO 5 /* I/O error */ > +#define L_ENXIO 6 /* No such device or address */ > +#define L_E2BIG 7 /* Argument list too long */ > +#define L_ENOEXEC 8 /* Exec format error */ > +#define L_EBADF 9 /* Bad file number */ > +#define L_ECHILD10 /* No child processes */ > +#define L_EAGAIN11 /* Try again */ > +#define L_ENOMEM12 /* Out of memory */ > +#define L_EACCES13 /* Permission denied */ > +#define L_EFAULT14 /* Bad address */ > +#define L_ENOTBLK 15 /* Block device required */ > +#define L_EBUSY 16 /* Device or resource busy */ > +#define L_EEXIST17 /* File exists */ > +#define L_EXDEV 18 /* Cross-device link */ > +#define L_ENODEV19 /* No such device */ > +#define L_ENOTDIR 20 /* Not a directory */ > +#define L_EISDIR21 /* Is a directory */ > +#define L_EINVAL22 /* Invalid argument */ > +#define L_ENFILE23 /* File table overflow */ > +#define L_EMFILE24 /* Too many open files */ > +#define L_ENOTTY25 /* Not a typewriter */ > +#define L_ETXTBSY 26 /* Text file busy */ > +#define L_EFBIG 27 /* File too large */ > +#define L_ENOSPC28 /* No space left on device */ > +#define L_ESPIPE29 /* Illegal seek */ > +#define L_EROFS 30 /* Read-only file system */ > +#define L_EMLINK31 /* Too many links */ > +#define L_EPIPE 32 /* Broken pipe */ > +#define L_EDOM 33 /* Math argument out of domain of func */ > +#define L_ERANGE34 /* Math result not representable */ > +#define L_EDEADLK 35 /* Resource deadlock would occur */ > +#define L_ENAMETOOLONG 36 /* File name too long */ > +#define L_ENOLCK37 /* No record locks available */ > +#define L_ENOSYS38 /* Function not implemented */ > +#define L_ENOTEMPTY 39 /* Directory not empty */ > +#define L_ELOOP 40 /* Too many symbolic links encountered */ > +#define L_ENOMSG42 /* No message of desired type */ > +#define L_EIDRM 43 /* Identifier removed */ > +#define L_ECHRNG44 /* Channel number out of range
Re: [PATCH 4/9] fsdev: Add missing definitions for Windows in file-op-9p.h
On Montag, 25. April 2022 16:27:00 CEST Bin Meng wrote:
> From: Guohuai Shi
>
> Add uid_t, gid_t and struct statfs definitions, which are currently
> missing from Windows headers, but are required when we add 9p file
> system support for Windows in later patches.
>
> Signed-off-by: Guohuai Shi
> Signed-off-by: Bin Meng
> ---
>
> fsdev/file-op-9p.h | 33 +
> 1 file changed, 33 insertions(+)
>
> diff --git a/fsdev/file-op-9p.h b/fsdev/file-op-9p.h
> index 4997677460..7d9a736b66 100644
> --- a/fsdev/file-op-9p.h
> +++ b/fsdev/file-op-9p.h
> @@ -27,6 +27,39 @@
> # include
> #endif
>
> +#ifdef CONFIG_WIN32
> +
> +/* POSIX structure not defined in Windows */
> +
> +typedef uint32_t uid_t;
> +typedef uint32_t gid_t;
> +
> +/* from http://man7.org/linux/man-pages/man2/statfs.2.html */
> +typedef uint32_t __fsword_t;
> +typedef uint32_t fsblkcnt_t;
> +typedef uint32_t fsfilcnt_t;
> +
> +/* from linux/include/uapi/asm-generic/posix_types.h */
> +typedef struct {
> +long __val[2];
> +} fsid_t;
> +
> +struct statfs {
> +__fsword_t f_type;
> +__fsword_t f_bsize;
> +fsblkcnt_t f_blocks;
> +fsblkcnt_t f_bfree;
> +fsblkcnt_t f_bavail;
> +fsfilcnt_t f_files;
> +fsfilcnt_t f_ffree;
> +fsid_t f_fsid;
> +__fsword_t f_namelen;
> +__fsword_t f_frsize;
> +__fsword_t f_flags;
> +};
> +
> +#endif /* CONFIG_WIN32 */
> +
> #define SM_LOCAL_MODE_BITS0600
> #define SM_LOCAL_DIR_MODE_BITS0700
I don't think this header file is the right place to add these missing POSIX
types. I would add them to 9p-util-windows.h or something like that.
Best regards,
Christian Schoenebeck
[PATCH 14/16] qga/wixl: require Mingw_bin
From: Marc-André Lureau No clear reason to make guesses here. Signed-off-by: Marc-André Lureau --- qga/installer/qemu-ga.wxs | 9 - 1 file changed, 9 deletions(-) diff --git a/qga/installer/qemu-ga.wxs b/qga/installer/qemu-ga.wxs index 8a19aa165651..651db6e51cda 100644 --- a/qga/installer/qemu-ga.wxs +++ b/qga/installer/qemu-ga.wxs @@ -4,15 +4,6 @@ - - - - - - - - - -- 2.36.0.44.g0f828332d5ac
[PATCH 13/16] qga/wixl: prefer variables over environment
From: Marc-André Lureau
No need to setup an environment or to check if the variable is undefined
manually.
Signed-off-by: Marc-André Lureau
---
qga/installer/qemu-ga.wxs | 30 +-
qga/meson.build | 9 -
2 files changed, 13 insertions(+), 26 deletions(-)
diff --git a/qga/installer/qemu-ga.wxs b/qga/installer/qemu-ga.wxs
index 0950e8c6becc..8a19aa165651 100644
--- a/qga/installer/qemu-ga.wxs
+++ b/qga/installer/qemu-ga.wxs
@@ -1,17 +1,5 @@
http://schemas.microsoft.com/wix/2006/wi;>
-
-
-
-
-
-
-
-
-
-
-
-
@@ -43,20 +31,20 @@
Name="QEMU guest agent"
Id="*"
UpgradeCode="{EB6B8302-C06E-4BEC-ADAC-932C68A3A98D}"
-Manufacturer="$(env.QEMU_GA_MANUFACTURER)"
-Version="$(env.QEMU_GA_VERSION)"
+Manufacturer="$(var.QEMU_GA_MANUFACTURER)"
+Version="$(var.QEMU_GA_VERSION)"
Language="1033">
NOT VersionNT64
-
+
1
-
+
-
+
-
+
@@ -133,9 +121,9 @@
+
Key="Software\$(var.QEMU_GA_MANUFACTURER)\$(var.QEMU_GA_DISTRO)\Tools\QemuGA">
-
+
diff --git a/qga/meson.build b/qga/meson.build
index 6d9f39bb321b..3ad3bc0260cf 100644
--- a/qga/meson.build
+++ b/qga/meson.build
@@ -121,15 +121,14 @@ if targetos == 'windows'
output: 'qemu-ga-@0@.msi'.format(host_arch),
depends: deps,
command: [
- find_program('env'),
- 'QEMU_GA_VERSION=' +
config_host['QEMU_GA_VERSION'],
- 'QEMU_GA_MANUFACTURER=' +
config_host['QEMU_GA_MANUFACTURER'],
- 'QEMU_GA_DISTRO=' +
config_host['QEMU_GA_DISTRO'],
- 'BUILD_DIR=' + meson.build_root(),
wixl, '-o', '@OUTPUT0@', '@INPUT0@',
qemu_ga_msi_arch[cpu],
qemu_ga_msi_vss,
+ '-D', 'BUILD_DIR=' + meson.build_root(),
'-D', 'Mingw_bin=' +
config_host['QEMU_GA_MSI_MINGW_BIN_PATH'],
+ '-D', 'QEMU_GA_VERSION=' +
config_host['QEMU_GA_VERSION'],
+ '-D', 'QEMU_GA_MANUFACTURER=' +
config_host['QEMU_GA_MANUFACTURER'],
+ '-D', 'QEMU_GA_DISTRO=' +
config_host['QEMU_GA_DISTRO'],
])
all_qga += [qga_msi]
alias_target('msi', qga_msi)
--
2.36.0.44.g0f828332d5ac
[PATCH 12/16] test/qga: use G_TEST_DIR to locate os-release test file
From: Marc-André Lureau
This a more accurate way to lookup the test data, and will allow to move
the test in a subproject.
Signed-off-by: Marc-André Lureau
---
tests/unit/test-qga.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/tests/unit/test-qga.c b/tests/unit/test-qga.c
index d6df1ee92ea1..ab0b12a2dd16 100644
--- a/tests/unit/test-qga.c
+++ b/tests/unit/test-qga.c
@@ -914,15 +914,14 @@ static void test_qga_guest_get_osinfo(gconstpointer data)
{
TestFixture fixture;
const gchar *str;
-gchar *cwd, *env[2];
-QDict *ret, *val;
+QDict *ret = NULL;
+char *env[2];
+QDict *val;
-cwd = g_get_current_dir();
env[0] = g_strdup_printf(
-"QGA_OS_RELEASE=%s%ctests%cdata%ctest-qga-os-release",
-cwd, G_DIR_SEPARATOR, G_DIR_SEPARATOR, G_DIR_SEPARATOR);
+"QGA_OS_RELEASE=%s%c..%cdata%ctest-qga-os-release",
+g_test_get_dir(G_TEST_DIST), G_DIR_SEPARATOR, G_DIR_SEPARATOR,
G_DIR_SEPARATOR);
env[1] = NULL;
-g_free(cwd);
fixture_setup(, NULL, env);
ret = qmp_fd(fixture.fd, "{'execute': 'guest-get-osinfo'}");
--
2.36.0.44.g0f828332d5ac
[PATCH 11/16] qga: replace qemu_open_old() with qemu_open_cloexec()
From: Marc-André Lureau
qemu_open_old() uses qemu_open_internal() which handles special
"/dev/fdset/" path for monitor fd sets, set CLOEXEC, and uses Error
reporting (and some O_DIRECT special error casing).
The monitor fdset handling is unnecessary for qga, use
qemu_open_cloexec() instead.
Signed-off-by: Marc-André Lureau
---
qga/channel-posix.c | 18 --
qga/commands-posix.c | 23 +++
2 files changed, 23 insertions(+), 18 deletions(-)
diff --git a/qga/channel-posix.c b/qga/channel-posix.c
index a996858e2492..7752114e214d 100644
--- a/qga/channel-posix.c
+++ b/qga/channel-posix.c
@@ -1,4 +1,5 @@
#include "qemu/osdep.h"
+#include "qemu/cutils.h"
#include
#include "qapi/error.h"
#include "qemu/sockets.h"
@@ -121,19 +122,24 @@ static int ga_channel_client_add(GAChannel *c, int fd)
static gboolean ga_channel_open(GAChannel *c, const gchar *path,
GAChannelMethod method, int fd)
{
+g_autoptr(Error) err = NULL;
int ret;
c->method = method;
switch (c->method) {
case GA_CHANNEL_VIRTIO_SERIAL: {
assert(fd < 0);
-fd = qemu_open_old(path, O_RDWR | O_NONBLOCK
+fd = qemu_open_cloexec(
+path,
#ifndef CONFIG_SOLARIS
- | O_ASYNC
+O_ASYNC |
#endif
- );
+O_RDWR | O_NONBLOCK,
+0,
+
+);
if (fd == -1) {
-g_critical("error opening channel: %s", strerror(errno));
+g_critical("error opening channel: %s", error_get_pretty(err));
return false;
}
#ifdef CONFIG_SOLARIS
@@ -157,9 +163,9 @@ static gboolean ga_channel_open(GAChannel *c, const gchar
*path,
struct termios tio;
assert(fd < 0);
-fd = qemu_open_old(path, O_RDWR | O_NOCTTY | O_NONBLOCK);
+fd = qemu_open_cloexec(path, O_RDWR | O_NOCTTY | O_NONBLOCK, 0, );
if (fd == -1) {
-g_critical("error opening channel: %s", strerror(errno));
+g_critical("error opening channel: %s", error_get_pretty(err));
return false;
}
tcgetattr(fd, );
diff --git a/qga/commands-posix.c b/qga/commands-posix.c
index 974bcbee7e97..70036b789e6f 100644
--- a/qga/commands-posix.c
+++ b/qga/commands-posix.c
@@ -1394,6 +1394,7 @@ static GuestDiskInfoList *get_disk_partitions(
static void get_nvme_smart(GuestDiskInfo *disk)
{
+g_autoptr(Error) err = NULL;
int fd;
GuestNVMeSmart *smart;
NvmeSmartLog log = {0};
@@ -1406,9 +1407,9 @@ static void get_nvme_smart(GuestDiskInfo *disk)
| (((sizeof(log) >> 2) - 1) << 16)
};
-fd = qemu_open_old(disk->name, O_RDONLY);
+fd = qemu_open_cloexec(disk->name, O_RDONLY, 0, );
if (fd == -1) {
-g_debug("Failed to open device: %s: %s", disk->name,
g_strerror(errno));
+g_debug("Failed to open device: %s: %s", disk->name,
error_get_pretty(err));
return;
}
@@ -1739,9 +1740,8 @@ int64_t qmp_guest_fsfreeze_freeze_list(bool
has_mountpoints,
}
}
-fd = qemu_open_old(mount->dirname, O_RDONLY);
+fd = qemu_open_cloexec(mount->dirname, O_RDONLY, 0, errp);
if (fd == -1) {
-error_setg_errno(errp, errno, "failed to open %s", mount->dirname);
goto error;
}
@@ -1806,7 +1806,7 @@ int64_t qmp_guest_fsfreeze_thaw(Error **errp)
QTAILQ_FOREACH(mount, , next) {
logged = false;
-fd = qemu_open_old(mount->dirname, O_RDONLY);
+fd = qemu_open_cloexec(mount->dirname, O_RDONLY, 0, NULL);
if (fd == -1) {
continue;
}
@@ -1866,21 +1866,20 @@ static void guest_fsfreeze_cleanup(void)
GuestFilesystemTrimResponse *
qmp_guest_fstrim(bool has_minimum, int64_t minimum, Error **errp)
{
+ERRP_GUARD();
GuestFilesystemTrimResponse *response;
GuestFilesystemTrimResult *result;
int ret = 0;
FsMountList mounts;
struct FsMount *mount;
int fd;
-Error *local_err = NULL;
struct fstrim_range r;
slog("guest-fstrim called");
QTAILQ_INIT();
-build_fs_mount_list(, _err);
-if (local_err) {
-error_propagate(errp, local_err);
+build_fs_mount_list(, errp);
+if (*errp) {
return NULL;
}
@@ -1892,11 +1891,11 @@ qmp_guest_fstrim(bool has_minimum, int64_t minimum,
Error **errp)
QAPI_LIST_PREPEND(response->paths, result);
-fd = qemu_open_old(mount->dirname, O_RDONLY);
+fd = qemu_open_cloexec(mount->dirname, O_RDONLY, 0, errp);
if (fd == -1) {
-result->error = g_strdup_printf("failed to open: %s",
-strerror(errno));
+result->error = g_strdup(error_get_pretty(*errp));
result->has_error = true;
+g_clear_pointer(errp, error_free);
continue;
}
--
[PATCH 15/16] qga/wixl: simplify some pre-processing
From: Marc-André Lureau Sadly, wixl doesn't have 'elif'. Signed-off-by: Marc-André Lureau --- qga/installer/qemu-ga.wxs | 20 +++- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/qga/installer/qemu-ga.wxs b/qga/installer/qemu-ga.wxs index 651db6e51cda..e5b0958e1898 100644 --- a/qga/installer/qemu-ga.wxs +++ b/qga/installer/qemu-ga.wxs @@ -1,21 +1,15 @@ http://schemas.microsoft.com/wix/2006/wi;> - - - - - - - - - - - - - + + + + + + +
[PATCH 09/16] qga: use qemu_open_cloexec() for safe_open_or_create()
From: Marc-André Lureau
The function takes care of setting CLOEXEC, and reporting error.
Signed-off-by: Marc-André Lureau
---
qga/commands-posix.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/qga/commands-posix.c b/qga/commands-posix.c
index 98d481a58485..974bcbee7e97 100644
--- a/qga/commands-posix.c
+++ b/qga/commands-posix.c
@@ -370,21 +370,16 @@ safe_open_or_create(const char *path, const char *mode,
Error **errp)
* open() is decisive and its third argument is ignored, and the second
* open() and the fchmod() are never called.
*/
-fd = open(path, oflag | ((oflag & O_CREAT) ? O_EXCL : 0), 0);
+fd = qemu_open_cloexec(path, oflag | ((oflag & O_CREAT) ? O_EXCL : 0), 0,
errp);
if (fd == -1 && errno == EEXIST) {
+g_clear_pointer(errp, error_free);
oflag &= ~(unsigned)O_CREAT;
-fd = open(path, oflag);
+fd = qemu_open_cloexec(path, oflag, 0, errp);
}
if (fd == -1) {
-error_setg_errno(errp, errno,
- "failed to open file '%s' "
- "(mode: '%s')",
- path, mode);
goto end;
}
-qemu_set_cloexec(fd);
-
if ((oflag & O_CREAT) && fchmod(fd, DEFAULT_NEW_FILE_MODE) == -1) {
error_setg_errno(errp, errno,
"failed to set permission "
--
2.36.0.44.g0f828332d5ac
[PATCH 07/16] qga: flatten safe_open_or_create()
From: Marc-André Lureau
There is a bit too much branching in the function, this can be
simplified a bit, and have a common exit point thanks to ERRP_PROPAGATE.
This also helps with the following error handling changes.
Signed-off-by: Marc-André Lureau
---
qga/commands-posix.c | 126 ++-
1 file changed, 65 insertions(+), 61 deletions(-)
diff --git a/qga/commands-posix.c b/qga/commands-posix.c
index 69f209af87e6..98d481a58485 100644
--- a/qga/commands-posix.c
+++ b/qga/commands-posix.c
@@ -339,73 +339,77 @@ find_open_flag(const char *mode_str, Error **errp)
static FILE *
safe_open_or_create(const char *path, const char *mode, Error **errp)
{
-Error *local_err = NULL;
-int oflag;
-
-oflag = find_open_flag(mode, _err);
-if (local_err == NULL) {
-int fd;
+ERRP_GUARD();
+int oflag, fd = -1;
+FILE *f = NULL;
+
+oflag = find_open_flag(mode, errp);
+if (*errp) {
+goto end;
+}
+
+/* If the caller wants / allows creation of a new file, we implement it
+ * with a two step process: open() + (open() / fchmod()).
+ *
+ * First we insist on creating the file exclusively as a new file. If
+ * that succeeds, we're free to set any file-mode bits on it. (The
+ * motivation is that we want to set those file-mode bits independently
+ * of the current umask.)
+ *
+ * If the exclusive creation fails because the file already exists
+ * (EEXIST is not possible for any other reason), we just attempt to
+ * open the file, but in this case we won't be allowed to change the
+ * file-mode bits on the preexistent file.
+ *
+ * The pathname should never disappear between the two open()s in
+ * practice. If it happens, then someone very likely tried to race us.
+ * In this case just go ahead and report the ENOENT from the second
+ * open() to the caller.
+ *
+ * If the caller wants to open a preexistent file, then the first
+ * open() is decisive and its third argument is ignored, and the second
+ * open() and the fchmod() are never called.
+ */
+fd = open(path, oflag | ((oflag & O_CREAT) ? O_EXCL : 0), 0);
+if (fd == -1 && errno == EEXIST) {
+oflag &= ~(unsigned)O_CREAT;
+fd = open(path, oflag);
+}
+if (fd == -1) {
+error_setg_errno(errp, errno,
+ "failed to open file '%s' "
+ "(mode: '%s')",
+ path, mode);
+goto end;
+}
-/* If the caller wants / allows creation of a new file, we implement it
- * with a two step process: open() + (open() / fchmod()).
- *
- * First we insist on creating the file exclusively as a new file. If
- * that succeeds, we're free to set any file-mode bits on it. (The
- * motivation is that we want to set those file-mode bits independently
- * of the current umask.)
- *
- * If the exclusive creation fails because the file already exists
- * (EEXIST is not possible for any other reason), we just attempt to
- * open the file, but in this case we won't be allowed to change the
- * file-mode bits on the preexistent file.
- *
- * The pathname should never disappear between the two open()s in
- * practice. If it happens, then someone very likely tried to race us.
- * In this case just go ahead and report the ENOENT from the second
- * open() to the caller.
- *
- * If the caller wants to open a preexistent file, then the first
- * open() is decisive and its third argument is ignored, and the second
- * open() and the fchmod() are never called.
- */
-fd = open(path, oflag | ((oflag & O_CREAT) ? O_EXCL : 0), 0);
-if (fd == -1 && errno == EEXIST) {
-oflag &= ~(unsigned)O_CREAT;
-fd = open(path, oflag);
-}
+qemu_set_cloexec(fd);
-if (fd == -1) {
-error_setg_errno(_err, errno, "failed to open file '%s' "
- "(mode: '%s')", path, mode);
-} else {
-qemu_set_cloexec(fd);
+if ((oflag & O_CREAT) && fchmod(fd, DEFAULT_NEW_FILE_MODE) == -1) {
+error_setg_errno(errp, errno,
+ "failed to set permission "
+ "0%03o on new file '%s' (mode: '%s')",
+ (unsigned)DEFAULT_NEW_FILE_MODE, path, mode);
+goto end;
+}
-if ((oflag & O_CREAT) && fchmod(fd, DEFAULT_NEW_FILE_MODE) == -1) {
-error_setg_errno(_err, errno, "failed to set permission "
- "0%03o on new file '%s' (mode: '%s')",
- (unsigned)DEFAULT_NEW_FILE_MODE, path, mode);
-} else {
-FILE *f;
-
-f = fdopen(fd, mode);
-if (f == NULL) {
-
[PATCH 10/16] qapi/error: add g_autoptr(Error) support
From: Marc-André Lureau Sometime, ERRP_GUARD() isn't what you are looking for, because the function doesn't throw errors, yet auto-cleaning is nice to have. Signed-off-by: Marc-André Lureau --- include/qapi/error.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/qapi/error.h b/include/qapi/error.h index d798faeec3e9..9482b6a58ae6 100644 --- a/include/qapi/error.h +++ b/include/qapi/error.h @@ -519,6 +519,8 @@ static inline void error_propagator_cleanup(ErrorPropagator *prop) G_DEFINE_AUTO_CLEANUP_CLEAR_FUNC(ErrorPropagator, error_propagator_cleanup); +G_DEFINE_AUTOPTR_CLEANUP_FUNC(Error, error_free); + /* * Special error destination to abort on error. * See error_setg() and error_propagate() for details. -- 2.36.0.44.g0f828332d5ac
[PATCH 06/16] include: adjust header guards after renaming
From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- include/qemu/help-texts.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/qemu/help-texts.h b/include/qemu/help-texts.h index ba32cc8b1f39..4f265fed8df1 100644 --- a/include/qemu/help-texts.h +++ b/include/qemu/help-texts.h @@ -1,5 +1,5 @@ -#ifndef QEMU_COMMON_H -#define QEMU_COMMON_H +#ifndef QEMU_HELP_TEXTS_H +#define QEMU_HELP_TEXTS_H /* Copyright string for -version arguments, About dialogs, etc */ #define QEMU_COPYRIGHT "Copyright (c) 2003-2022 " \ -- 2.36.0.44.g0f828332d5ac
[PATCH 16/16] qga/wixl: replace QEMU_GA_MSI_MINGW_BIN_PATH with glib bindir
From: Marc-André Lureau
Use more conventional variables to set the location of pre-built
DLL/bin.
Signed-off-by: Marc-André Lureau
---
configure | 9 ++---
meson.build | 5 -
qga/installer/qemu-ga.wxs | 24
qga/meson.build | 2 +-
4 files changed, 23 insertions(+), 17 deletions(-)
diff --git a/configure b/configure
index 59c43bea05eb..616cd2d0e36c 100755
--- a/configure
+++ b/configure
@@ -2023,6 +2023,11 @@ for i in $glib_modules; do
fi
done
+glib_bindir="$($pkg_config --variable=bindir glib-2.0)"
+if test -z "$glib_bindir" ; then
+ glib_bindir="$($pkg_config --variable=prefix glib-2.0)"/bin
+fi
+
# This workaround is required due to a bug in pkg-config file for glib as it
# doesn't define GLIB_STATIC_COMPILATION for pkg-config --static
@@ -2430,8 +2435,6 @@ if test "$QEMU_GA_VERSION" = ""; then
QEMU_GA_VERSION=$(cat $source_path/VERSION)
fi
-QEMU_GA_MSI_MINGW_BIN_PATH="$($pkg_config --variable=prefix glib-2.0)/bin"
-
# Mac OS X ships with a broken assembler
roms=
if { test "$cpu" = "i386" || test "$cpu" = "x86_64"; } && \
@@ -2518,7 +2521,6 @@ if test "$debug_tcg" = "yes" ; then
fi
if test "$mingw32" = "yes" ; then
echo "CONFIG_WIN32=y" >> $config_host_mak
- echo "QEMU_GA_MSI_MINGW_BIN_PATH=${QEMU_GA_MSI_MINGW_BIN_PATH}" >>
$config_host_mak
echo "QEMU_GA_MANUFACTURER=${QEMU_GA_MANUFACTURER}" >> $config_host_mak
echo "QEMU_GA_DISTRO=${QEMU_GA_DISTRO}" >> $config_host_mak
echo "QEMU_GA_VERSION=${QEMU_GA_VERSION}" >> $config_host_mak
@@ -2639,6 +2641,7 @@ echo "QEMU_CXXFLAGS=$QEMU_CXXFLAGS" >> $config_host_mak
echo "QEMU_OBJCFLAGS=$QEMU_OBJCFLAGS" >> $config_host_mak
echo "GLIB_CFLAGS=$glib_cflags" >> $config_host_mak
echo "GLIB_LIBS=$glib_libs" >> $config_host_mak
+echo "GLIB_BINDIR=$glib_bindir" >> $config_host_mak
echo "GLIB_VERSION=$(pkg-config --modversion glib-2.0)" >> $config_host_mak
echo "QEMU_LDFLAGS=$QEMU_LDFLAGS" >> $config_host_mak
echo "LD_I386_EMULATION=$ld_i386_emulation" >> $config_host_mak
diff --git a/meson.build b/meson.build
index c26aa442d40e..2f68b6cb8634 100644
--- a/meson.build
+++ b/meson.build
@@ -443,7 +443,10 @@ add_project_arguments(config_host['GLIB_CFLAGS'].split(),
native: false, language: ['c', 'cpp', 'objc'])
glib = declare_dependency(compile_args: config_host['GLIB_CFLAGS'].split(),
link_args: config_host['GLIB_LIBS'].split(),
- version: config_host['GLIB_VERSION'])
+ version: config_host['GLIB_VERSION'],
+ variables: {
+'bindir': config_host['GLIB_BINDIR'],
+ })
# override glib dep with the configure results (for subprojects)
meson.override_dependency('glib-2.0', glib)
diff --git a/qga/installer/qemu-ga.wxs b/qga/installer/qemu-ga.wxs
index e5b0958e1898..813d1c6ca6ae 100644
--- a/qga/installer/qemu-ga.wxs
+++ b/qga/installer/qemu-ga.wxs
@@ -58,7 +58,7 @@
-
+
@@ -69,40 +69,40 @@
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
-
+
[PATCH 05/16] qobject/json-lexer: disable -Winitializer-overrides warnings
From: Marc-André Lureau
Silence the clang warning when building the code with default clang,
outside of QEMU.
Signed-off-by: Marc-André Lureau
---
qobject/json-lexer.c | 4
1 file changed, 4 insertions(+)
diff --git a/qobject/json-lexer.c b/qobject/json-lexer.c
index 632320d72d5d..955ce0ff2a53 100644
--- a/qobject/json-lexer.c
+++ b/qobject/json-lexer.c
@@ -128,6 +128,8 @@ QEMU_BUILD_BUG_ON(IN_START_INTERP != IN_START + 1);
#define LOOKAHEAD 0x80
#define TERMINAL(state) [0 ... 0xFF] = ((state) | LOOKAHEAD)
+QEMU_BEGIN_IGNORE_INITIALIZER_OVERRIDES
+
static const uint8_t json_lexer[][256] = {
/* Relies on default initialization to IN_ERROR! */
@@ -261,6 +263,8 @@ static const uint8_t json_lexer[][256] = {
[IN_START_INTERP]['%'] = IN_INTERP,
};
+QEMU_END_IGNORE_INITIALIZER_OVERRIDES
+
static inline uint8_t next_state(JSONLexer *lexer, char ch, bool flush,
bool *char_consumed)
{
--
2.36.0.44.g0f828332d5ac
[PATCH 02/16] util/win32: simplify qemu_get_local_state_dir()
From: Marc-André Lureau
SHGetFolderPath() is a deprecated API:
https://docs.microsoft.com/en-us/windows/win32/api/shlobj_core/nf-shlobj_core-shgetfolderpatha
It is a wrapper for SHGetKnownFolderPath() and CSIDL_COMMON_PATH is
mapped to FOLDERID_ProgramData:
https://docs.microsoft.com/en-us/windows/win32/shell/csidl
g_get_system_data_dirs() is a suitable replacement, as it will have
FOLDERID_ProgramData in the returned list. However, it follows the XDG
Base Directory Specification, if `XDG_DATA_DIRS` is defined, it will be
returned instead.
Signed-off-by: Marc-André Lureau
---
util/oslib-win32.c | 17 -
1 file changed, 4 insertions(+), 13 deletions(-)
diff --git a/util/oslib-win32.c b/util/oslib-win32.c
index 6c818749d2b9..5723d3eb4c5a 100644
--- a/util/oslib-win32.c
+++ b/util/oslib-win32.c
@@ -40,9 +40,6 @@
#include "qemu/error-report.h"
#include
-/* this must come after including "trace.h" */
-#include
-
static int get_allocation_granularity(void)
{
SYSTEM_INFO system_info;
@@ -237,17 +234,11 @@ int qemu_get_thread_id(void)
char *
qemu_get_local_state_dir(void)
{
-HRESULT result;
-char base_path[MAX_PATH+1] = "";
+const char * const *data_dirs = g_get_system_data_dirs();
-result = SHGetFolderPath(NULL, CSIDL_COMMON_APPDATA, NULL,
- /* SHGFP_TYPE_CURRENT */ 0, base_path);
-if (result != S_OK) {
-/* misconfigured environment */
-g_critical("CSIDL_COMMON_APPDATA unavailable: %ld", (long)result);
-abort();
-}
-return g_strdup(base_path);
+g_assert(data_dirs && data_dirs[0]);
+
+return g_strdup(data_dirs[0]);
}
void qemu_set_tty_echo(int fd, bool echo)
--
2.36.0.44.g0f828332d5ac
[PATCH 04/16] compiler.h: add QEMU_{BEGIN, END}_IGNORE_INITIALIZER_OVERRIDES
From: Marc-André Lureau
clang has this default warning which QEMU codes triggers in many
situations. However, other projects in general may not want to disable
globally the warning but only in limited specific code blocks.
Signed-off-by: Marc-André Lureau
---
include/qemu/compiler.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/qemu/compiler.h b/include/qemu/compiler.h
index f20a76e4a286..ea0797959641 100644
--- a/include/qemu/compiler.h
+++ b/include/qemu/compiler.h
@@ -184,4 +184,15 @@
#define QEMU_DISABLE_CFI
#endif
+#if defined (__clang__)
+#define QEMU_BEGIN_IGNORE_INITIALIZER_OVERRIDES \
+_Pragma("clang diagnostic push")\
+_Pragma("clang diagnostic ignored \"-Winitializer-overrides\"")
+#define QEMU_END_IGNORE_INITIALIZER_OVERRIDES \
+_Pragma("clang diagnostic pop")
+#else
+#define QEMU_BEGIN_IGNORE_INITIALIZER_OVERRIDES
+#define QEMU_END_IGNORE_INITIALIZER_OVERRIDES
+#endif
+
#endif /* COMPILER_H */
--
2.36.0.44.g0f828332d5ac
[PATCH 08/16] osdep: export qemu_open_cloexec()
From: Marc-André Lureau
Used in the next patch, to simplify qga code.
Signed-off-by: Marc-André Lureau
---
include/qemu/osdep.h | 1 +
util/osdep.c | 10 --
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index 67cc4654166b..64f51cfb7a62 100644
--- a/include/qemu/osdep.h
+++ b/include/qemu/osdep.h
@@ -489,6 +489,7 @@ void sigaction_invoke(struct sigaction *action,
*/
int qemu_open_old(const char *name, int flags, ...);
int qemu_open(const char *name, int flags, Error **errp);
+int qemu_open_cloexec(const char *name, int flags, mode_t mode, Error **errp);
int qemu_create(const char *name, int flags, mode_t mode, Error **errp);
int qemu_close(int fd);
int qemu_unlink(const char *name);
diff --git a/util/osdep.c b/util/osdep.c
index 60fcbbaebe72..67541b7654ef 100644
--- a/util/osdep.c
+++ b/util/osdep.c
@@ -279,9 +279,11 @@ int qemu_lock_fd_test(int fd, int64_t start, int64_t len,
bool exclusive)
}
#endif
-static int qemu_open_cloexec(const char *name, int flags, mode_t mode)
+int qemu_open_cloexec(const char *name, int flags, mode_t mode, Error **errp)
{
+ERRP_GUARD();
int ret;
+
#ifdef O_CLOEXEC
ret = open(name, flags | O_CLOEXEC, mode);
#else
@@ -290,6 +292,10 @@ static int qemu_open_cloexec(const char *name, int flags,
mode_t mode)
qemu_set_cloexec(ret);
}
#endif
+if (ret == -1) {
+error_setg_errno(errp, errno, "Could not open '%s'", name);
+}
+
return ret;
}
@@ -327,7 +333,7 @@ qemu_open_internal(const char *name, int flags, mode_t
mode, Error **errp)
}
#endif
-ret = qemu_open_cloexec(name, flags, mode);
+ret = qemu_open_cloexec(name, flags, mode, NULL);
if (ret == -1) {
const char *action = flags & O_CREAT ? "create" : "open";
--
2.36.0.44.g0f828332d5ac
[PATCH 03/16] tests: make libqmp buildable for win32
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
---
tests/qtest/libqmp.h | 2 ++
tests/qtest/libqmp.c | 35 +--
2 files changed, 31 insertions(+), 6 deletions(-)
diff --git a/tests/qtest/libqmp.h b/tests/qtest/libqmp.h
index 94aa97328a17..772f18b73ba3 100644
--- a/tests/qtest/libqmp.h
+++ b/tests/qtest/libqmp.h
@@ -20,8 +20,10 @@
#include "qapi/qmp/qdict.h"
QDict *qmp_fd_receive(int fd);
+#ifndef G_OS_WIN32
void qmp_fd_vsend_fds(int fd, int *fds, size_t fds_num,
const char *fmt, va_list ap) G_GNUC_PRINTF(4, 0);
+#endif
void qmp_fd_vsend(int fd, const char *fmt, va_list ap) G_GNUC_PRINTF(2, 0);
void qmp_fd_send(int fd, const char *fmt, ...) G_GNUC_PRINTF(2, 3);
void qmp_fd_send_raw(int fd, const char *fmt, ...) G_GNUC_PRINTF(2, 3);
diff --git a/tests/qtest/libqmp.c b/tests/qtest/libqmp.c
index 0358b8313dc4..93c9b31cd4ca 100644
--- a/tests/qtest/libqmp.c
+++ b/tests/qtest/libqmp.c
@@ -15,9 +15,13 @@
*/
#include "qemu/osdep.h"
-
#include "libqmp.h"
+#ifndef G_OS_WIN32
+#include
+#endif
+
+#include "qemu/cutils.h"
#include "qapi/error.h"
#include "qapi/qmp/json-parser.h"
#include "qapi/qmp/qjson.h"
@@ -87,6 +91,7 @@ QDict *qmp_fd_receive(int fd)
return qmp.response;
}
+#ifndef G_OS_WIN32
/* Sends a message and file descriptors to the socket.
* It's needed for qmp-commands like getfd/add-fd */
static void socket_send_fds(int socket_fd, int *fds, size_t fds_num,
@@ -120,17 +125,23 @@ static void socket_send_fds(int socket_fd, int *fds,
size_t fds_num,
} while (ret < 0 && errno == EINTR);
g_assert_cmpint(ret, >, 0);
}
+#endif
/**
* Allow users to send a message without waiting for the reply,
* in the case that they choose to discard all replies up until
* a particular EVENT is received.
*/
-void qmp_fd_vsend_fds(int fd, int *fds, size_t fds_num,
- const char *fmt, va_list ap)
+static void
+_qmp_fd_vsend_fds(int fd, int *fds, size_t fds_num,
+ const char *fmt, va_list ap)
{
QObject *qobj;
+#ifdef G_OS_WIN32
+assert(fds_num == 0);
+#endif
+
/* Going through qobject ensures we escape strings properly */
qobj = qobject_from_vjsonf_nofail(fmt, ap);
@@ -148,10 +159,14 @@ void qmp_fd_vsend_fds(int fd, int *fds, size_t fds_num,
if (log) {
fprintf(stderr, "%s", str->str);
}
+
+#ifndef G_OS_WIN32
/* Send QMP request */
if (fds && fds_num > 0) {
socket_send_fds(fd, fds, fds_num, str->str, str->len);
-} else {
+} else
+#endif
+{
socket_send(fd, str->str, str->len);
}
@@ -160,15 +175,23 @@ void qmp_fd_vsend_fds(int fd, int *fds, size_t fds_num,
}
}
+#ifndef G_OS_WIN32
+void qmp_fd_vsend_fds(int fd, int *fds, size_t fds_num,
+ const char *fmt, va_list ap)
+{
+_qmp_fd_vsend_fds(fd, fds, fds_num, fmt, ap);
+}
+#endif
+
void qmp_fd_vsend(int fd, const char *fmt, va_list ap)
{
-qmp_fd_vsend_fds(fd, NULL, 0, fmt, ap);
+_qmp_fd_vsend_fds(fd, NULL, 0, fmt, ap);
}
QDict *qmp_fdv(int fd, const char *fmt, va_list ap)
{
-qmp_fd_vsend_fds(fd, NULL, 0, fmt, ap);
+_qmp_fd_vsend_fds(fd, NULL, 0, fmt, ap);
return qmp_fd_receive(fd);
}
--
2.36.0.44.g0f828332d5ac
[PATCH 01/16] include: move qemu_*_exec_dir() to cutils
From: Marc-André Lureau
The function is required by get_relocated_path() (already in cutils),
and used by qemu-ga and may be generally useful.
Signed-off-by: Marc-André Lureau
---
include/qemu/cutils.h| 7 ++
include/qemu/osdep.h | 8 --
qemu-io.c| 1 +
storage-daemon/qemu-storage-daemon.c | 1 +
tests/qtest/fuzz/fuzz.c | 1 +
util/cutils.c| 108 +++
util/oslib-posix.c | 81
util/oslib-win32.c | 36 -
8 files changed, 118 insertions(+), 125 deletions(-)
diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h
index 5c6572d44422..40e10e19a7ed 100644
--- a/include/qemu/cutils.h
+++ b/include/qemu/cutils.h
@@ -193,6 +193,13 @@ int uleb128_decode_small(const uint8_t *in, uint32_t *n);
*/
int qemu_pstrcmp0(const char **str1, const char **str2);
+/* Find program directory, and save it for later usage with
+ * qemu_get_exec_dir().
+ * Try OS specific API first, if not working, parse from argv0. */
+void qemu_init_exec_dir(const char *argv0);
+
+/* Get the saved exec dir. */
+const char *qemu_get_exec_dir(void);
/**
* get_relocated_path:
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index 1c1e7eca9898..67cc4654166b 100644
--- a/include/qemu/osdep.h
+++ b/include/qemu/osdep.h
@@ -557,14 +557,6 @@ void qemu_set_cloexec(int fd);
*/
char *qemu_get_local_state_dir(void);
-/* Find program directory, and save it for later usage with
- * qemu_get_exec_dir().
- * Try OS specific API first, if not working, parse from argv0. */
-void qemu_init_exec_dir(const char *argv0);
-
-/* Get the saved exec dir. */
-const char *qemu_get_exec_dir(void);
-
/**
* qemu_getauxval:
* @type: the auxiliary vector key to lookup
diff --git a/qemu-io.c b/qemu-io.c
index d70d3dd4fde5..2bd7bfb65073 100644
--- a/qemu-io.c
+++ b/qemu-io.c
@@ -16,6 +16,7 @@
#endif
#include "qemu/help-texts.h"
+#include "qemu/cutils.h"
#include "qapi/error.h"
#include "qemu-io.h"
#include "qemu/error-report.h"
diff --git a/storage-daemon/qemu-storage-daemon.c
b/storage-daemon/qemu-storage-daemon.c
index 9b8b17f52e48..c104817cdddc 100644
--- a/storage-daemon/qemu-storage-daemon.c
+++ b/storage-daemon/qemu-storage-daemon.c
@@ -44,6 +44,7 @@
#include "qemu/help-texts.h"
#include "qemu-version.h"
+#include "qemu/cutils.h"
#include "qemu/config-file.h"
#include "qemu/error-report.h"
#include "qemu/help_option.h"
diff --git a/tests/qtest/fuzz/fuzz.c b/tests/qtest/fuzz/fuzz.c
index a7a5e14fa3bc..0ad4ba9e94dc 100644
--- a/tests/qtest/fuzz/fuzz.c
+++ b/tests/qtest/fuzz/fuzz.c
@@ -15,6 +15,7 @@
#include
+#include "qemu/cutils.h"
#include "qemu/datadir.h"
#include "sysemu/sysemu.h"
#include "sysemu/qtest.h"
diff --git a/util/cutils.c b/util/cutils.c
index b2777210e7da..6cc7cc8cde99 100644
--- a/util/cutils.c
+++ b/util/cutils.c
@@ -931,6 +931,114 @@ static inline const char *next_component(const char *dir,
int *p_len)
return dir;
}
+static const char *exec_dir;
+
+void qemu_init_exec_dir(const char *argv0)
+{
+#ifdef G_OS_WIN32
+char *p;
+char buf[MAX_PATH];
+DWORD len;
+
+if (exec_dir) {
+return;
+}
+
+len = GetModuleFileName(NULL, buf, sizeof(buf) - 1);
+if (len == 0) {
+return;
+}
+
+buf[len] = 0;
+p = buf + len - 1;
+while (p != buf && *p != '\\') {
+p--;
+}
+*p = 0;
+if (access(buf, R_OK) == 0) {
+exec_dir = g_strdup(buf);
+} else {
+exec_dir = CONFIG_BINDIR;
+}
+#else
+char *p = NULL;
+char buf[PATH_MAX];
+
+if (exec_dir) {
+return;
+}
+
+#if defined(__linux__)
+{
+int len;
+len = readlink("/proc/self/exe", buf, sizeof(buf) - 1);
+if (len > 0) {
+buf[len] = 0;
+p = buf;
+}
+}
+#elif defined(__FreeBSD__) \
+ || (defined(__NetBSD__) && defined(KERN_PROC_PATHNAME))
+{
+#if defined(__FreeBSD__)
+static int mib[4] = {CTL_KERN, KERN_PROC, KERN_PROC_PATHNAME, -1};
+#else
+static int mib[4] = {CTL_KERN, KERN_PROC_ARGS, -1, KERN_PROC_PATHNAME};
+#endif
+size_t len = sizeof(buf) - 1;
+
+*buf = '\0';
+if (!sysctl(mib, ARRAY_SIZE(mib), buf, , NULL, 0) &&
+*buf) {
+buf[sizeof(buf) - 1] = '\0';
+p = buf;
+}
+}
+#elif defined(__APPLE__)
+{
+char fpath[PATH_MAX];
+uint32_t len = sizeof(fpath);
+if (_NSGetExecutablePath(fpath, ) == 0) {
+p = realpath(fpath, buf);
+if (!p) {
+return;
+}
+}
+}
+#elif defined(__HAIKU__)
+{
+image_info ii;
+int32_t c = 0;
+
+*buf = '\0';
+while (get_next_image_info(0, , ) == B_OK) {
+if (ii.type == B_APP_IMAGE) {
+strncpy(buf, ii.name, sizeof(buf));
+
[PATCH 00/16] Misc cleanups
From: Marc-André Lureau
Hi,
Perhaps the last series of preliminary patches before I propose a longer series
to add qemu-common & qga meson subprojects. That's why they are mostly
QGA-related cleanups.
Thanks for the reviews!
Marc-André Lureau (16):
include: move qemu_*_exec_dir() to cutils
util/win32: simplify qemu_get_local_state_dir()
tests: make libqmp buildable for win32
compiler.h: add QEMU_{BEGIN,END}_IGNORE_INITIALIZER_OVERRIDES
qobject/json-lexer: disable -Winitializer-overrides warnings
include: adjust header guards after renaming
qga: flatten safe_open_or_create()
osdep: export qemu_open_cloexec()
qga: use qemu_open_cloexec() for safe_open_or_create()
qapi/error: add g_autoptr(Error) support
qga: replace qemu_open_old() with qemu_open_cloexec()
test/qga: use G_TEST_DIR to locate os-release test file
qga/wixl: prefer variables over environment
qga/wixl: require Mingw_bin
qga/wixl: simplify some pre-processing
qga/wixl: replace QEMU_GA_MSI_MINGW_BIN_PATH with glib bindir
configure| 9 +-
meson.build | 5 +-
include/qapi/error.h | 2 +
include/qemu/compiler.h | 11 ++
include/qemu/cutils.h| 7 ++
include/qemu/help-texts.h| 4 +-
include/qemu/osdep.h | 9 +-
tests/qtest/libqmp.h | 2 +
qemu-io.c| 1 +
qga/channel-posix.c | 18 ++--
qga/commands-posix.c | 146 +--
qobject/json-lexer.c | 4 +
storage-daemon/qemu-storage-daemon.c | 1 +
tests/qtest/fuzz/fuzz.c | 1 +
tests/qtest/libqmp.c | 35 +--
tests/unit/test-qga.c| 11 +-
util/cutils.c| 108
util/osdep.c | 10 +-
util/oslib-posix.c | 81 ---
util/oslib-win32.c | 53 +-
qga/installer/qemu-ga.wxs| 83 +--
qga/meson.build | 11 +-
22 files changed, 313 insertions(+), 299 deletions(-)
--
2.36.0.44.g0f828332d5ac
Re: [PATCH v9 3/7] migration: Add zero-copy-send parameter for QMP/HMP for Linux
On Wed, May 4, 2022 at 7:48 AM Markus Armbruster wrote: > > Leonardo Bras writes: > > > Add property that allows zero-copy migration of memory pages > > on the sending side, and also includes a helper function > > migrate_use_zero_copy_send() to check if it's enabled. > > > > No code is introduced to actually do the migration, but it allow > > future implementations to enable/disable this feature. > > > > On non-Linux builds this parameter is compiled-out. > > > > Signed-off-by: Leonardo Bras > > Reviewed-by: Peter Xu > > Reviewed-by: Daniel P. Berrangé > > Reviewed-by: Juan Quintela > > --- > > qapi/migration.json | 24 > > migration/migration.h | 5 + > > migration/migration.c | 32 > > migration/socket.c| 11 +-- > > monitor/hmp-cmds.c| 6 ++ > > 5 files changed, 76 insertions(+), 2 deletions(-) > > > > diff --git a/qapi/migration.json b/qapi/migration.json > > index 409eb086a2..04246481ce 100644 > > --- a/qapi/migration.json > > +++ b/qapi/migration.json > > @@ -741,6 +741,13 @@ > > # will consume more CPU. > > # Defaults to 1. (Since 5.0) > > # > > +# @zero-copy-send: Controls behavior on sending memory pages on migration. > > +# When true, enables a zero-copy mechanism for sending > > memory > > +# pages, if host supports it. > > +# Requires that QEMU be permitted to use locked memory > > for guest > > +# RAM pages. > > Please wrap lines around column 75. More of the same below. > > > +# Defaults to false. (Since 7.1) > > +# > > # @block-bitmap-mapping: Maps block nodes and bitmaps on them to > > #aliases for the purpose of dirty bitmap > > migration. Such > > #aliases may for example be the corresponding > > names on the > > With that, QAPI schema > Acked-by: Markus Armbruster Thanks Markus! Best regards, Leo > > [...] >
Re: [PATCH 0/9] 9pfs: Add 9pfs support for Windows host
On Dienstag, 3. Mai 2022 05:42:03 CEST Bin Meng wrote: > On Tue, Apr 26, 2022 at 9:41 AM Bin Meng wrote: > > +Mark > > > > On Mon, Apr 25, 2022 at 10:27 PM Bin Meng wrote: > > > At present there is no Windows support for 9p file system. > > > This series adds initial Windows support for 9p file system. > > > > > > 'local' file system backend driver is supported on Windows, > > > including open, read, write, close, rename, remove, etc. > > > All security models are supported. The mapped (mapped-xattr) > > > security model is implemented using NTFS Alternate Data Stream > > > (ADS) so the 9p export path shall be on an NTFS partition. > > > > > > 'synth' backend driver is updated only to build sucessuflly > > > in a Windows build. Funtionalities are not tested as test > > > cases do not run on Windows at present. Like I mentioned in the previous RFC version; I don't really see a show stopper for the tests to run on Windows: https://lore.kernel.org/all/4649965.RNUEIdHhq1@silver/ > > > > > > Example command line to test: > > > "-fsdev local,path=c:\msys64,security_model=mapped,id=p9 -device > > > virtio-9p-pci,fsdev=p9,mount_tag=p9fs" > Any comments to v1 before we send a v2 which will be rebased on master? > > Regards, > Bin
Re: [PATCH v2 10/50] dino: return PCIBus from dino_init() using qdev_get_child_bus()
On 5/4/22 02:25, Mark Cave-Ayland wrote:
This allows access to the PCI bus without having to reference parent_obj
directly.
Signed-off-by: Mark Cave-Ayland
Acked-by: Helge Deller
---
hw/hppa/dino.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/hw/hppa/dino.c b/hw/hppa/dino.c
index 77b8089664..d89b48493f 100644
--- a/hw/hppa/dino.c
+++ b/hw/hppa/dino.c
@@ -523,14 +523,12 @@ PCIBus *dino_init(MemoryRegion *addr_space,
{
DeviceState *dev;
DinoState *s;
-PCIBus *b;
+PCIBus *pci_bus;
dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE);
object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space),
_fatal);
s = DINO_PCI_HOST_BRIDGE(dev);
-
-b = s->parent_obj.bus;
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), _fatal);
memory_region_add_subregion(addr_space, DINO_HPA,
@@ -539,7 +537,8 @@ PCIBus *dino_init(MemoryRegion *addr_space,
*p_rtc_irq = qemu_allocate_irq(dino_set_timer_irq, s, 0);
*p_ser_irq = qemu_allocate_irq(dino_set_serial_irq, s, 0);
-return b;
+pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci"));
+return pci_bus;
}
static void dino_pcihost_reset(DeviceState *dev)
Reviewed-by: Richard Henderson
r~
Re: [PATCH v2 09/50] dino: use QOM cast instead of directly referencing parent_obj
On 5/4/22 02:25, Mark Cave-Ayland wrote: Use a QOM cast in both dino_chip_read_with_attrs() and dino_chip_write_with_attrs() instead of directly referencing parent_obj. Signed-off-by: Mark Cave-Ayland Acked-by: Helge Deller --- hw/hppa/dino.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson r~
Help trying to add a new vhost-user test to qos-test
Hi, Apologies for the wide CC but I'm stuck trying to work out what is going on. I've had a very frustrating few weeks trying to enable a basic vhost-user test for the gpio stub device. I've been attempting to model it on the existing vhost-user-test for virtio-net but I think I've triggered some sort of subtle race condition but it's very hard to work out amongst the moving pieces. I think this comes down to the fact that the GPIO device supports the VHOST_USER_GET_CONFIG message and this subtly breaks the test harness as can be seen by the following backtrace: #0 virtio_pci_set_guest_notifiers (d=0x5615571bf620, nvqs=2, assign=false) at ../../hw/virtio/virtio-pci.c:990 #1 0x561553a585d5 in vu_gpio_stop (vdev=0x5615571c79c0) at ../../hw/virtio/vhost-user-gpio.c:106 #2 0x561553a58958 in vu_gpio_disconnect (dev=0x5615571c79c0) at ../../hw/virtio/vhost-user-gpio.c:215 #3 0x561553a589fa in vu_gpio_event (opaque=0x5615571c79c0, event=CHR_EVENT_CLOSED) at ../../hw/virtio/vhost-user-gpio.c:233 #4 0x561553bf47ac in chr_be_event (s=0x561556608000, event=CHR_EVENT_CLOSED) at ../../chardev/char.c:61 #5 0x561553bf4820 in qemu_chr_be_event (s=0x561556608000, event=CHR_EVENT_CLOSED) at ../../chardev/char.c:81 #6 0x561553bf06f9 in tcp_chr_disconnect_locked (chr=0x561556608000) at ../../chardev/char-socket.c:470 #7 0x561553bf0768 in tcp_chr_disconnect (chr=0x561556608000) at ../../chardev/char-socket.c:480 #8 0x561553bf094c in tcp_chr_hup (channel=0x561556532c00, cond=G_IO_HUP, opaque=0x561556608000) at ../../chardev/char-socket.c:520 #9 0x561553ae7ab5 in qio_channel_fd_source_dispatch (source=0x5615567a6c00, callback=0x561553bf091d , user_data=0x561556608000) at ../../io/channel-watch.c:84 #10 0x7f905b47fd6f in g_main_dispatch (context=0x5615571fff00) at ../../../glib/gmain.c:3325 #11 g_main_context_dispatch (context=0x5615571fff00) at ../../../glib/gmain.c:4043 #12 0x7f905b480118 in g_main_context_iterate (context=0x5615571fff00, block=block@entry=1, dispatch=dispatch@entry=1, self=) at ../../../glib/gmain.c:4119 #13 0x7f905b48040b in g_main_loop_run (loop=0x561557200170) at #../../../glib/gmain.c:4317 For a not totally clear reason we dispatch a new run loop and discover the vhost user socket has been closed down. This triggers the above stop which then asserts because we haven't had a chance to fully initialise the device yet. #14 0x561553a36fc3 in vhost_user_read (dev=0x5615571c7be0, msg=0x7ffcac609df0) at ../../hw/virtio/vhost-user.c:406 #15 0x561553a3be39 in vhost_user_get_config (dev=0x5615571c7be0, config=0x5615571c7bd0 "", config_len=8, errp=0x7ffcac60a120) at ../../hw/virtio/vhost-user.c:2304 #16 0x561553a344b6 in vhost_dev_get_config (hdev=0x5615571c7be0, config=0x5615571c7bd0 "", config_len=8, errp=0x7ffcac60a120) at ../../hw/virtio/vhost.c:1593 #17 0x561553a58c0e in vu_gpio_device_realize (dev=0x5615571c79c0, errp=0x7ffcac60a120) at ../../hw/virtio/vhost-user-gpio.c:283 #18 0x561553a2ec5d in virtio_device_realize (dev=0x5615571c79c0, errp=0x7ffcac60a180) at ../../hw/virtio/virtio.c:3623 #19 0x561553ad5ee0 in device_set_realized (obj=0x5615571c79c0, value=true, errp=0x7ffcac60a428) at ../../hw/core/qdev.c:531 #20 0x561553adf935 in property_set_bool (obj=0x5615571c79c0, v=0x5615571cfbe0, name=0x561553ef77d1 "realized", opaque=0x5615564a4b80, errp=0x7ffcac60a428) at ../../qom/object.c:2273 #21 0x561553add97c in object_property_set (obj=0x5615571c79c0, name=0x561553ef77d1 "realized", v=0x5615571cfbe0, errp=0x7ffcac60a428) at ../../qom/object.c:1408 #22 0x561553ae1d27 in object_property_set_qobject (obj=0x5615571c79c0, name=0x561553ef77d1 "realized", value=0x5615571cfbc0, errp=0x7ffcac60a428) at ../../qom/qom-qobject.c:28 #23 0x561553addce1 in object_property_set_bool (obj=0x5615571c79c0, name=0x561553ef77d1 "realized", value=true, errp=0x7ffcac60a428) at ../../qom/object.c:1477 #24 0x561553ad57a8 in qdev_realize (dev=0x5615571c79c0, bus=0x5615571c7938, errp=0x7ffcac60a428) at ../../hw/core/qdev.c:333 #25 0x561553a58fe0 in vhost_user_gpio_pci_realize (vpci_dev=0x5615571bf620, errp=0x7ffcac60a428) at ../../hw/virtio/vhost-user-gpio-pci.c:32 #26 0x561553679b82 in virtio_pci_realize (pci_dev=0x5615571bf620, errp=0x7ffcac60a428) at ../../hw/virtio/virtio-pci.c:1926 #27 0x56155357a983 in pci_qdev_realize (qdev=0x5615571bf620, errp=0x7ffcac60a4e0) at ../../hw/pci/pci.c:2191 #28 0x561553679f26 in virtio_pci_dc_realize (qdev=0x5615571bf620, errp=0x7ffcac60a4e0) at ../../hw/virtio/virtio-pci.c:2011 #29 0x561553ad5ee0 in device_set_realized (obj=0x5615571bf620, value=true, errp=0x7ffcac60a750) at ../../hw/core/qdev.c:531 #30 0x561553adf935 in property_set_bool (obj=0x5615571bf620, v=0x5615571c9db0, name=0x561553ef77d1 "realized", opaque=0x5615564a4b80, errp=0x7ffcac60a750) at
Re: [PATCH v2 07/50] dino: move PCI bus master address space setup to dino_pcihost_realize()
On 5/4/22 02:25, Mark Cave-Ayland wrote: Add a new dino_pcihost_unrealize() function to remove the address space when the device is unrealized. Signed-off-by: Mark Cave-Ayland Acked-by: Helge Deller --- hw/hppa/dino.c | 25 - 1 file changed, 20 insertions(+), 5 deletions(-) Reviewed-by: Richard Henderson r~
Re: [PATCH v2 06/50] dino: move pci_setup_iommu() to dino_pcihost_init()
On 5/4/22 02:25, Mark Cave-Ayland wrote: Signed-off-by: Mark Cave-Ayland Acked-by: Helge Deller --- hw/hppa/dino.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) Reviewed-by: Richard Henderson r~
