[PATCH v3] target/arm: align exposed ID registers with Linux

In CPUID registers exposed to userspace, some registers were missing and some fields were not exposed. This patch aligns exposed ID registers and their fields with what the upstream kernel currently exposes. Specifically, the following new ID registers/fields are exposed to userspace:

Re: [PATCH 5/5] target/s390x/tcg/excp_helper: Restrict system headers to sysemu

On 12/16/22 14:04, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/tcg/excp_helper.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index

Re: [PATCH 4/5] target/s390x/tcg/misc_helper: Remove unused "memory.h" include

On 12/16/22 14:04, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/tcg/misc_helper.c | 1 - 1 file changed, 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [PATCH 1/5] exec/memory: Expose memory_region_access_valid()

On 12/16/22 14:04, Philippe Mathieu-Daudé wrote: Instead of having hardware device poking into memory internal API, expose memory_region_access_valid(). Signed-off-by: Philippe Mathieu-Daudé --- hw/s390x/s390-pci-inst.c | 2 +- include/exec/memory-internal.h | 4

Re: [PATCH 10/10] target/xtensa/cpu: Include missing "memory.h" header

On 12/16/22 14:05, Philippe Mathieu-Daudé wrote: Under system emulation, xtensa_cpu_initfn() calls memory_region_init_io(), itself declared in "exec/memory.h". Signed-off-by: Philippe Mathieu-Daudé --- target/xtensa/cpu.c | 3 +++ 1 file changed, 3 insertions(+) Reviewed-by: Richard

Re: [PATCH 08/10] target/riscv/cpu: Restrict sysemu-specific fields from CPUArchState

On 12/16/22 14:05, Philippe Mathieu-Daudé wrote: The 'hwaddr' type is only available / meaningful on system emulation. Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.h | 34 ++ 1 file changed, 18 insertions(+), 16 deletions(-) diff --git

Re: [PATCH 07/10] target/ppc/internal: Restrict MMU declarations to sysemu

On 12/16/22 14:05, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/internal.h | 5 + 1 file changed, 5 insertions(+) diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 337a362205..901bae6d39 100644 --- a/target/ppc/internal.h +++

Re: [PATCH 04/10] target/loongarch/cpu: Restrict "memory.h" header to sysemu

On 12/16/22 14:05, Philippe Mathieu-Daudé wrote: Missed in 0093b9a5ee ("target/loongarch: Adjust functions and structure to support user-mode") while cleaning commit f84a2aacf5 ("target/loongarch: Add LoongArch IOCSR instruction"). Signed-off-by: Philippe Mathieu-Daudé ---

Re: [PATCH 06/10] target/ppc/helper: Include missing "cpu.h" header

On 12/16/22 14:05, Philippe Mathieu-Daudé wrote: 'dh_ctype_*' are defined as 'ppc_avr_t/ppc_vsr_t/ppc_acc_t', themselves declared in "cpu.h". Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/helper.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/ppc/helper.h

Re: [PATCH 05/10] target/m68k/helper: Include missing "cpu.h" header

On 12/16/22 14:05, Philippe Mathieu-Daudé wrote: 'dh_ctype_fp' is defined as 'FPReg *', itself declared in "cpu.h". Signed-off-by: Philippe Mathieu-Daudé --- target/m68k/helper.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/m68k/helper.h b/target/m68k/helper.h index

Re: [PATCH 03/10] target/loongarch/cpu: Remove unused "sysbus.h" header

On 12/16/22 14:05, Philippe Mathieu-Daudé wrote: Nothing requires SysBus declarations here. Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.h | 1 - 1 file changed, 1 deletion(-) Reviewed-by: Richard Henderson r~

Re: [PATCH 02/10] target/hexagon: Declare hexagon_regnames[] in "cpu.h"

On 12/16/22 14:05, Philippe Mathieu-Daudé wrote: The hexagon_regnames array has TOTAL_PER_THREAD_REGS elements. TOTAL_PER_THREAD_REGS is defined in "cpu.h". Instead of pulling "cpu.h" in "internal.h", move the hexagon_regnames[] declaration to "cpu.h". I don't think this is correct. I would

Re: [PATCH 01/10] target/hppa/helper: Include missing "cpu.h" header

On 12/16/22 14:05, Philippe Mathieu-Daudé wrote: 'dh_ctype_tr' is defined as 'target_ureg', itself declared in "cpu.h". Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/helper.h | 2 ++ 1 file changed, 2 insertions(+) No, helper.h is multiply included. It should probably be renamed

Re: [PATCH 2/2] sysemu/kvm: Reduce target-specific declarations

On 12/16/22 14:07, Philippe Mathieu-Daudé wrote: Only the declarations using the target_ulong type are target specific. Signed-off-by: Philippe Mathieu-Daudé --- include/sysemu/kvm.h | 25 - 1 file changed, 12 insertions(+), 13 deletions(-) diff --git

Re: [PATCH 1/2] sysemu/kvm: Remove CONFIG_USER_ONLY guard

On 12/16/22 14:07, Philippe Mathieu-Daudé wrote: User emulation shouldn't really include this header; if included these declarations are guarded by CONFIG_KVM_IS_POSSIBLE. Signed-off-by: Philippe Mathieu-Daudé --- include/sysemu/kvm.h | 2 -- 1 file changed, 2 deletions(-) Reviewed-by:

Re: [PATCH 5/5] hw/i386/x86: Reduce init_topo_info() scope

On 12/16/22 14:01, Philippe Mathieu-Daudé wrote: This function is not used anywhere outside this file, so we can delete the prototype from include/hw/i386/x86.h and make the function "static void". This fixes when building with -Wall and using Clang ("Apple clang version 14.0.0

Re: [PATCH 4/5] target/i386: Remove x86_cpu_dump_local_apic_state() dead stub

On 12/16/22 14:01, Philippe Mathieu-Daudé wrote: x86_cpu_dump_local_apic_state() is called from monitor.c which is only compiled for system emulation since commit bf95728400 ("monitor: remove target-specific code from monitor.c"). Interestingly this stub was added few weeks later in commit

Re: [PATCH 3/5] target/i386/ops_sse: Include missing "cpu.h" header

On 12/16/22 14:01, Philippe Mathieu-Daudé wrote: 'Reg' is defined as 'MMXReg', itself declared in "cpu.h". Signed-off-by: Philippe Mathieu-Daudé --- target/i386/ops_sse.h| 1 + target/i386/ops_sse_header.h | 3 +++ 2 files changed, 4 insertions(+) No, both of these are multiply

Re: [PATCH 2/5] target/i386/cpu: Remove dead helper_lock() declaration

On 12/16/22 14:01, Philippe Mathieu-Daudé wrote: Missed in commit 37b995f6e7 ("target-i386: remove helper_lock()"). Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu.h | 3 --- 1 file changed, 3 deletions(-) Reviewed-by: Richard Henderson r~

Re: [PATCH 1/5] target/i386: Remove NEED_CPU_H guard from target-specific headers

On 12/16/22 14:01, Philippe Mathieu-Daudé wrote: NEED_CPU_H is always defined for these target-specific headers. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/hax/hax-i386.h | 2 -- target/i386/hvf/hvf-i386.h | 4 2 files changed, 6 deletions(-) Reviewed-by: Richard Henderson

Re: [PATCH 5/5] target/arm: only perform TCG cpu and machine inits if TCG enabled

On 12/16/22 13:29, Fabiano Rosas wrote: -/* - * Misaligned thumb pc is architecturally impossible. - * We have an assert in thumb_tr_translate_insn to verify this. - * Fail an incoming migrate to avoid this assert. - */ -if (!is_a64(env) && env->thumb && (env->regs[15] &

Re: [PATCH 3/5] target/arm: wrap semihosting and psci calls with tcg_enabled

On 12/16/22 13:29, Fabiano Rosas wrote: -if (arm_is_psci_call(cpu, cs->exception_index)) { -arm_handle_psci_call(cpu); -qemu_log_mask(CPU_LOG_INT, "...handled as PSCI call\n"); -return; -} +if (tcg_enabled()) { +if (arm_is_psci_call(cpu,

Re: [PATCH 2/5] target/arm: rename handle_semihosting to tcg_handle_semihosting

On 12/16/22 13:29, Fabiano Rosas wrote: From: Claudio Fontana make it clearer from the name that this is a tcg-only function. Signed-off-by: Claudio Fontana Signed-off-by: Fabiano Rosas --- This function moves elsewhere in the original series, but the name change doesn't need to wait.

Re: [PATCH v3 1/5] dump: Include missing "cpu.h" header for tswap32/tswap64() declarations

On 12/16/22 13:55, Philippe Mathieu-Daudé wrote: Signed-off-by: Philippe Mathieu-Daudé --- dump/dump.c | 1 + 1 file changed, 1 insertion(+) diff --git a/dump/dump.c b/dump/dump.c index 279b07f09b..c62dc94213 100644 --- a/dump/dump.c +++ b/dump/dump.c @@ -29,6 +29,7 @@ #include

Re: [PATCH v2 2/2] hw/arm/smmu-common: Avoid using inlined functions with external linkage

On 12/16/22 13:49, Philippe Mathieu-Daudé wrote: When using Clang ("Apple clang version 14.0.0 (clang-1400.0.29.202)") and building with -Wall we get: hw/arm/smmu-common.c:173:33: warning: static function 'smmu_hash_remove_by_asid_iova' is used in an inline function with external linkage

Re: [PATCH v2 1/2] hw/arm/smmu-common: Reduce smmu_inv_notifiers_mr() scope

On 12/16/22 13:49, Philippe Mathieu-Daudé wrote: This function is not used anywhere outside this file, so we can make the function "static void". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson r~

Re: [PATCH] scripts/git.orderfile: Display MAINTAINERS changes first

On 12/16/22 14:55, Philippe Mathieu-Daudé wrote: If we get custom to see MAINTAINERS changes first, we might catch missing MAINTAINERS updates easier. Signed-off-by: Philippe Mathieu-Daudé --- scripts/git.orderfile | 2 ++ 1 file changed, 2 insertions(+) Reviewed-by: Richard Henderson

Re: [PATCH 2/2] meson: Set avx512f option to auto

On 12/16/22 15:08, Paolo Bonzini wrote: Because that's what configure used to do (https://lists.nongnu.org/archive/html/qemu-devel/2022-02/msg00650.html). .. Yeah, but I wondered if that was just a bug. It can surely

Re: [PATCH 2/5] hw/s390x/pv: Un-inline s390_pv_init()

On 16/12/22 23:04, Philippe Mathieu-Daudé wrote: There is no point in having s390_pv_init() inlined. Signed-off-by: Philippe Mathieu-Daudé --- hw/s390x/pv.c | 13 + include/hw/s390x/pv.h | 14 +- 2 files changed, 14 insertions(+), 13 deletions(-) diff

Re: [PATCH 2/2] meson: Set avx512f option to auto

Because that's what configure used to do ( https://lists.nongnu.org/archive/html/qemu-devel/2022-02/msg00650.html)... It can surely be changed but AVX512 is known to limit processor frequency. I am not sure if the limitation is per core or extends to multiple cores, and it would be a pity if

[PATCH] scripts/git.orderfile: Display MAINTAINERS changes first

If we get custom to see MAINTAINERS changes first, we might catch missing MAINTAINERS updates easier. Signed-off-by: Philippe Mathieu-Daudé --- scripts/git.orderfile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/scripts/git.orderfile b/scripts/git.orderfile index b32203b710..8edac0380b

[PATCH] exec/helper-head: Include missing "fpu/softfloat-types.h" header

'dh_ctype_f32' is defined as 'float32', itself declared in "fpu/softfloat-types.h". Include this header to avoid when refactoring other headers: In file included from include/exec/helper-proto.h:7, from include/tcg/tcg-op.h:29, from

RE: [PATCH 02/10] target/hexagon: Declare hexagon_regnames[] in "cpu.h"

> -Original Message- > From: Philippe Mathieu-Daudé > Sent: Friday, December 16, 2022 4:06 PM > To: qemu-devel@nongnu.org > Cc: Daniel Henrique Barboza ; David Gibson > ; Xiaojuan Yang > ; Mark Cave-Ayland ayl...@ilande.co.uk>; Bin Meng ; Richard > Henderson ; Artyom Tarasenko > ;

[PATCH 5/5] target/s390x/tcg/excp_helper: Restrict system headers to sysemu

Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/tcg/excp_helper.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/s390x/tcg/excp_helper.c b/target/s390x/tcg/excp_helper.c index fe02d82201..e9eb7c455e 100644 --- a/target/s390x/tcg/excp_helper.c +++

[PATCH 02/10] target/hexagon: Declare hexagon_regnames[] in "cpu.h"

The hexagon_regnames array has TOTAL_PER_THREAD_REGS elements. TOTAL_PER_THREAD_REGS is defined in "cpu.h". Instead of pulling "cpu.h" in "internal.h", move the hexagon_regnames[] declaration to "cpu.h". Signed-off-by: Philippe Mathieu-Daudé --- target/hexagon/cpu.h | 2 ++

[PULL 20/36] target/mips: Convert to 3-phase reset

Convert the mips CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar

[PULL 23/36] target/ppc: Convert to 3-phase reset

Convert the ppc CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar

[PATCH 01/10] target/hppa/helper: Include missing "cpu.h" header

'dh_ctype_tr' is defined as 'target_ureg', itself declared in "cpu.h". Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/helper.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/hppa/helper.h b/target/hppa/helper.h index c7e35ce8c7..621bc9738e 100644 --- a/target/hppa/helper.h

Re: [PATCH 1/5] target/arm: only build psci for TCG

Hi Claudio, If the PSCI implementation becomes TCG only, can we also move to a tcg accel directory? It slowly gets super confusing to keep track of which files are supposed to be generic target code and which ones TCG specific. Alex > Am 16.12.2022 um 22:37 schrieb Fabiano Rosas : > > From:

[PULL 27/36] target/sparc: Convert to 3-phase reset

Convert the sparc CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar

[PATCH 5/5] hw/i386/x86: Reduce init_topo_info() scope

This function is not used anywhere outside this file, so we can delete the prototype from include/hw/i386/x86.h and make the function "static void". This fixes when building with -Wall and using Clang ("Apple clang version 14.0.0 (clang-1400.0.29.202)"): ../hw/i386/x86.c:70:24: error: static

[PULL 21/36] target/nios2: Convert to 3-phase reset

Convert the nios2 CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar

[PATCH 1/5] exec/memory: Expose memory_region_access_valid()

Instead of having hardware device poking into memory internal API, expose memory_region_access_valid(). Signed-off-by: Philippe Mathieu-Daudé --- hw/s390x/s390-pci-inst.c | 2 +- include/exec/memory-internal.h | 4 include/exec/memory.h | 4 3 files changed, 5

[PATCH v3 4/5] target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu

The 'hwaddr' type is only available / meaningful on system emulation. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/cpu.h | 2 +- target/arm/cpu.h| 2 +- target/cris/cpu.h | 3 +-- target/hppa/cpu.h | 2 +- target/i386/cpu.h

[PATCH 0/5] target/s390x: Header cleanups around "cpu.h"

These patches are part of a big refactor cleanup around "cpu.h". Most changes should be trivial IMHO. Philippe Mathieu-Daudé (5): exec/memory: Expose memory_region_access_valid() hw/s390x/pv: Un-inline s390_pv_init() hw/s390x/pv: Simplify s390_is_pv() for user emulation

[PATCH 4/5] target/s390x/tcg/misc_helper: Remove unused "memory.h" include

Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/tcg/misc_helper.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target/s390x/tcg/misc_helper.c b/target/s390x/tcg/misc_helper.c index 71388a7119..576157b1f3 100644 --- a/target/s390x/tcg/misc_helper.c +++

[PATCH] exec: Rename NEED_CPU_H -> CONFIG_TARGET

'NEED_CPU_H' guard target-specific code; it is defined by meson altogether with the 'CONFIG_TARGET' definition. Since the latter name is more meaningful, directly use it. Inspired-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- Based-on: <20221216220738.7355-1-phi...@linaro.org>

[PATCH 2/2] sysemu/kvm: Reduce target-specific declarations

Only the declarations using the target_ulong type are target specific. Signed-off-by: Philippe Mathieu-Daudé --- include/sysemu/kvm.h | 25 - 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index

[PULL 34/36] hw/intc/xics: Reset TYPE_ICS objects with device_cold_reset()

The realize method for the TYPE_ICS class uses qemu_register_reset() to register a reset handler, as a workaround for the fact that currently objects which directly inherit from TYPE_DEVICE don't get automatically reset. However, the reset function directly calls ics_reset(), which is the

[PULL 09/36] hw/misc/mos6522: Convert TYPE_MOS6522 to 3-phase reset

Convert the TYPE_MOS6522 parent class to use 3-phase reset. This is a prerequisite for converting its subclasses. Signed-off-by: Peter Maydell Acked-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-id:

[PATCH 3/5] hw/s390x/pv: Simplify s390_is_pv() for user emulation

Protected Virtualization is irrelevant in user emulation. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/s390x/pv.h | 8 1 file changed, 8 insertions(+) diff --git a/include/hw/s390x/pv.h b/include/hw/s390x/pv.h index 5bca5bcaf1..a4814ce303 100644 --- a/include/hw/s390x/pv.h +++

[PATCH 03/10] target/loongarch/cpu: Remove unused "sysbus.h" header

Nothing requires SysBus declarations here. Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.h | 1 - 1 file changed, 1 deletion(-) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index e15c633b0b..c8612f5466 100644 --- a/target/loongarch/cpu.h +++

[PATCH v2 0/2] hw/arm/smmu-common: Avoid using inlined functions with external linkage

Avoid inlined functions with external linkage, convert 'inline' header to 'static inline' in source. Supersedes: <20221208161152.28976-1-phi...@linaro.org> Philippe Mathieu-Daudé (2): hw/arm/smmu-common: Reduce smmu_inv_notifiers_mr() scope hw/arm/smmu-common: Avoid using inlined functions

[PULL 12/36] target/arm: Convert to 3-phase reset

Convert the Arm CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Message-id:

[PULL 03/36] hw/hyperv/vmbus: Use device_cold_reset() and bus_cold_reset()

In the vmbus code we currently use the legacy functions qdev_reset_all() and qbus_reset_all(). These perform a recursive reset, starting from either a qbus or a qdev. However they do not permit any of the devices in the tree to use three-phase reset, because device reset goes through the

[PATCH v3 0/5] target/cpu: System/User cleanups around hwaddr/vaddr

Missing review: #1 We are not supposed to use the 'hwaddr' type on user emulation. This series is a preparatory cleanup before few refactors to isolate further System vs User code. Since v1: - only restrict SavedIOTLB in header (Alex) - convert insert/remove_breakpoint implementations (Peter)

[PULL 33/36] pci: Convert child classes of TYPE_PCIE_ROOT_PORT to 3-phase reset

Convert the TYPE_CXL_ROOT_PORT and TYPE_PNV_PHB_ROOT_PORT classes to 3-phase reset, so they don't need to use the deprecated device_class_set_parent_reset() function any more. We have to do both in the same commit, because they keep the parent_reset field in their common parent class's class

[PULL 15/36] target/hexagon: Convert to 3-phase reset

Convert the hexagon CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by:

[PATCH 05/10] target/m68k/helper: Include missing "cpu.h" header

'dh_ctype_fp' is defined as 'FPReg *', itself declared in "cpu.h". Signed-off-by: Philippe Mathieu-Daudé --- target/m68k/helper.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/m68k/helper.h b/target/m68k/helper.h index c9bed2b884..aaf0e1668e 100644 --- a/target/m68k/helper.h +++

[PATCH 00/10] target/misc: Header cleanups around "cpu.h"

These patches are part of a big refactor cleanup around "cpu.h". Most changes should be trivial IMHO. Philippe Mathieu-Daudé (10): target/hppa/helper: Include missing "cpu.h" header target/hexagon: Declare hexagon_regnames[] in "cpu.h" target/loongarch/cpu: Remove unused "sysbus.h" header

[PULL 05/36] qdev: Remove qdev_reset_all() and qbus_reset_all()

Remove the qdev_reset_all() and qbus_reset_all() functions, now we have moved all the callers over to the new device_cold_reset() and bus_cold_reset() functions. Signed-off-by: Peter Maydell --- include/hw/qdev-core.h | 26 hw/core/qdev.c | 54

[PATCH 1/5] target/i386: Remove NEED_CPU_H guard from target-specific headers

NEED_CPU_H is always defined for these target-specific headers. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/hax/hax-i386.h | 2 -- target/i386/hvf/hvf-i386.h | 4 2 files changed, 6 deletions(-) diff --git a/target/i386/hax/hax-i386.h b/target/i386/hax/hax-i386.h index

[PULL 11/36] hw/core/cpu-common: Convert TYPE_CPU class to 3-phase reset

Convert the parent class TYPE_CPU to 3-phase reset. This is a necessary prerequisite to converting the subclasses. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-id:

[PATCH v2 1/2] hw/arm/smmu-common: Reduce smmu_inv_notifiers_mr() scope

This function is not used anywhere outside this file, so we can make the function "static void". Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/smmu-common.c | 2 +- include/hw/arm/smmu-common.h | 3 --- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git

[PATCH 1/2] sysemu/kvm: Remove CONFIG_USER_ONLY guard

User emulation shouldn't really include this header; if included these declarations are guarded by CONFIG_KVM_IS_POSSIBLE. Signed-off-by: Philippe Mathieu-Daudé --- include/sysemu/kvm.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index

[PATCH v3 3/5] gdbstub: Use vaddr type for generic insert/remove_breakpoint() API

Both insert/remove_breakpoint() handlers are used in system and user emulation. We can not use the 'hwaddr' type on user emulation, we have to use 'vaddr' which is defined as "wide enough to contain any #target_ulong virtual address". gdbstub.c doesn't require to include "exec/hwaddr.h" anymore.

[PATCH 10/10] target/xtensa/cpu: Include missing "memory.h" header

Under system emulation, xtensa_cpu_initfn() calls memory_region_init_io(), itself declared in "exec/memory.h". Signed-off-by: Philippe Mathieu-Daudé --- target/xtensa/cpu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index

[PATCH v3 1/5] dump: Include missing "cpu.h" header for tswap32/tswap64() declarations

Signed-off-by: Philippe Mathieu-Daudé --- dump/dump.c | 1 + 1 file changed, 1 insertion(+) diff --git a/dump/dump.c b/dump/dump.c index 279b07f09b..c62dc94213 100644 --- a/dump/dump.c +++ b/dump/dump.c @@ -29,6 +29,7 @@ #include "qemu/main-loop.h" #include "hw/misc/vmcoreinfo.h" #include

[PATCH 09/10] target/sparc/sysemu: Remove pointless CONFIG_USER_ONLY guard

Commit caac44a52a ("target/sparc: Make sparc_cpu_tlb_fill sysemu only") restricted mmu_helper.c to system emulation. Checking whether CONFIG_USER_ONLY is defined is now pointless. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/sparc/mmu_helper.c | 2 -- 1 file

[PATCH 2/5] hw/s390x/pv: Un-inline s390_pv_init()

There is no point in having s390_pv_init() inlined. Signed-off-by: Philippe Mathieu-Daudé --- hw/s390x/pv.c | 13 + include/hw/s390x/pv.h | 14 +- 2 files changed, 14 insertions(+), 13 deletions(-) diff --git a/hw/s390x/pv.c b/hw/s390x/pv.c index

[PATCH v3 2/5] cputlb: Restrict SavedIOTLB to system emulation

Commit 2f3a57ee47 ("cputlb: ensure we save the IOTLB data in case of reset") added the SavedIOTLB structure -- which is system emulation specific -- in the generic CPUState structure. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/cpu.h | 6 -- 1

[PULL 32/36] pci: Convert TYPE_PCIE_ROOT_PORT to 3-phase reset

Convert the TYPE_PCIE_ROOT_PORT device to 3-phase reset; this is a necessary precursor to converting any of its child classes. Signed-off-by: Peter Maydell Tested-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Message-id: 20221125115240.3005559-4-peter.mayd...@linaro.org ---

[PULL 30/36] hw/virtio: Convert TYPE_VIRTIO_PCI to 3-phase reset

Convert the TYPE_VIRTIO_PCI class to 3-phase reset. This is necessary so that we can convert the subclass TYPE_VIRTIO_VGA_BASE also to 3-phase reset. Signed-off-by: Peter Maydell Tested-by: Daniel Henrique Barboza Reviewed-by: Philippe Mathieu-Daudé Message-id:

[PULL 08/36] hw/input/ps2.c: Convert TYPE_PS2_{KBD, MOUSE}_DEVICE to 3-phase reset

Convert the child classes TYPE_PS2_KBD_DEVICE and TYPE_PS2_MOUSE_DEVICE to the 3-phase reset system. This allows us to stop using the old device_class_set_parent_reset() function. We don't need to register an 'exit' phase function for the subclasses, because they have no work to do in that

[PULL 31/36] hw/display/virtio-vga: Convert TYPE_VIRTIO_VGA_BASE to 3-phase reset

Convert the TYPE_VIRTIO_VGA_BASE class to 3-phase reset, so we don't need to use device_class_set_parent_reset() any more. Note that this is an abstract class itself; none of the subclasses override its reset method. Signed-off-by: Peter Maydell Tested-by: Daniel Henrique Barboza Reviewed-by:

Re: [PULL 0/8] QEMU Guest Agent misc patches

On Fri, 16 Dec 2022 at 13:54, Konstantin Kostiuk wrote: > > The following changes since commit edc93f455fa823a9a5fcb3a8da430104c7375a0a: > > Revert "hw/loongarch/virt: Add cfi01 pflash device" (2022-12-05 11:24:35 > -0500) > > are available in the Git repository at: > >

[PULL 29/36] target/xtensa: Convert to 3-phase reset

Convert the xtensa CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by:

[PATCH 04/10] target/loongarch/cpu: Restrict "memory.h" header to sysemu

Missed in 0093b9a5ee ("target/loongarch: Adjust functions and structure to support user-mode") while cleaning commit f84a2aacf5 ("target/loongarch: Add LoongArch IOCSR instruction"). Signed-off-by: Philippe Mathieu-Daudé --- target/loongarch/cpu.h | 2 ++ 1 file changed, 2 insertions(+) diff

[PATCH 2/5] target/i386/cpu: Remove dead helper_lock() declaration

Missed in commit 37b995f6e7 ("target-i386: remove helper_lock()"). Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index f729e0f09c..9824b7f8f2 100644 --- a/target/i386/cpu.h +++

[PATCH 0/5] target/i386: Header cleanups around "cpu.h"

These patches are part of a big refactor cleanup around "cpu.h". Most changes should be trivial IMHO. Philippe Mathieu-Daudé (5): target/i386: Remove NEED_CPU_H guard from target-specific headers target/i386/cpu: Remove dead helper_lock() declaration target/i386/ops_sse: Include missing

[PULL 04/36] Replace use of qdev_reset_all() with device_cold_reset()

The legacy function qdev_reset_all() performs a recursive reset, starting from a qdev. However, it does not permit any of the devices in the tree to use three-phase reset, because device reset goes through the device_legacy_reset() function that only calls the single DeviceClass::reset method.

[PATCH 3/5] target/i386/ops_sse: Include missing "cpu.h" header

'Reg' is defined as 'MMXReg', itself declared in "cpu.h". Signed-off-by: Philippe Mathieu-Daudé --- target/i386/ops_sse.h| 1 + target/i386/ops_sse_header.h | 3 +++ 2 files changed, 4 insertions(+) diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h index 3cbc36a59d..68c88c9ee3

[PULL 17/36] target/loongarch: Convert to 3-phase reset

Convert the loongarch CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by:

Re: [PULL v3 00/50] Block layer patches

On Thu, 15 Dec 2022 at 15:24, Kevin Wolf wrote: > > The following changes since commit 48804eebd4a327e4b11f902ba80a00876ee53a43: > > Merge tag 'pull-misc-2022-12-14' of https://repo.or.cz/qemu/armbru into > staging (2022-12-15 10:13:46 +) > > are available in the Git repository at: > >

[PATCH 07/10] target/ppc/internal: Restrict MMU declarations to sysemu

Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/internal.h | 5 + 1 file changed, 5 insertions(+) diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 337a362205..901bae6d39 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -242,9 +242,12 @@ static inline

[PULL 28/36] target/tricore: Convert to 3-phase reset

Convert the tricore CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by:

[PATCH 08/10] target/riscv/cpu: Restrict sysemu-specific fields from CPUArchState

The 'hwaddr' type is only available / meaningful on system emulation. Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/cpu.h | 34 ++ 1 file changed, 18 insertions(+), 16 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index

[PATCH v3 5/5] target/cpu: Restrict do_transaction_failed() handlers to sysemu

The 'hwaddr' type is only available / meaningful on system emulation. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/arm/internals.h | 2 ++ target/m68k/cpu.h | 2 ++ target/riscv/cpu.h | 10 +- 3 files changed, 9 insertions(+), 5

[PATCH 4/5] target/i386: Remove x86_cpu_dump_local_apic_state() dead stub

x86_cpu_dump_local_apic_state() is called from monitor.c which is only compiled for system emulation since commit bf95728400 ("monitor: remove target-specific code from monitor.c"). Interestingly this stub was added few weeks later in commit 1f871d49e3 ("hmp: added local apic dump state") and was

[PULL 19/36] target/microblaze: Convert to 3-phase reset

Convert the microblaze CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by:

[PULL 36/36] hw/pci-host/pnv_phb3_msi: Convert TYPE_PHB3_MSI to 3-phase reset

Convert the TYPE_PHB3_MSI class to 3-phase reset, so we can avoid using the device_class_set_parent_reset() function. Signed-off-by: Peter Maydell Tested-by: Daniel Henrique Barboza Reviewed-by: Cédric Le Goater Reviewed-by: Philippe Mathieu-Daudé Message-id:

[PATCH 0/2] sysemu/kvm: Header cleanups around "cpu.h"

These patches are part of a big refactor cleanup around "cpu.h". Most changes should be trivial IMHO. Philippe Mathieu-Daudé (2): sysemu/kvm: Remove CONFIG_USER_ONLY guard sysemu/kvm: Reduce target-specific declarations include/sysemu/kvm.h | 27 --- 1 file changed,

Re: [RFC PATCH-for-8.0] hw: Avoid using inlined functions with external linkage

On 8/12/22 17:27, Peter Maydell wrote: On Thu, 8 Dec 2022 at 16:11, Philippe Mathieu-Daudé wrote: When using Clang ("Apple clang version 14.0.0 (clang-1400.0.29.202)") and building with -Wall we get: hw/arm/smmu-common.c:173:33: warning: static function 'smmu_hash_remove_by_asid_iova' is

[PULL 18/36] target/m68k: Convert to 3-phase reset

Convert the m68k CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar

[PULL 10/36] hw/misc: Convert TYPE_MOS6522 subclasses to 3-phase reset

Convert the various subclasses of TYPE_MOS6522 to 3-phase reset. This removes some uses of device_class_set_parent_reset(), which we would eventually like to be able to get rid of. Signed-off-by: Peter Maydell Acked-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Reviewed-by: Philippe

[PATCH 06/10] target/ppc/helper: Include missing "cpu.h" header

'dh_ctype_*' are defined as 'ppc_avr_t/ppc_vsr_t/ppc_acc_t', themselves declared in "cpu.h". Signed-off-by: Philippe Mathieu-Daudé --- target/ppc/helper.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 8dd22a35e4..a02db8d893 100644 ---

[PULL 22/36] target/openrisc: Convert to 3-phase reset

Convert the openrisc CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by:

[PULL 26/36] target/sh4: Convert to 3-phase reset

Convert the sh4 CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater Reviewed-by: Edgar

[PULL 00/36] reset refactoring patches

-20221216 for you to fetch changes up to a0c2e80afc98a9771b109eb5ce0b47edd7c78155: hw/pci-host/pnv_phb3_msi: Convert TYPE_PHB3_MSI to 3-phase reset (2022-12-16 15:59:07 +) reset refactoring queue: * remove uses

[PULL 02/36] pci: Use device_cold_reset() and bus_cold_reset()

In the PCI subsystem we currently use the legacy function qdev_reset_all() and qbus_reset_all(). These perform a recursive reset, starting from either a qbus or a qdev. However they do not permit any of the devices in the tree to use three-phase reset, because device reset goes through the

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