Cc'ing maintainers:
$ ./scripts/get_maintainer.pl -f ui/qemu-pixman.c
Gerd Hoffmann (odd fixer:Graphics)
"Marc-André Lureau" (odd fixer:Graphics)
On 14/9/23 03:31, Ken Xue wrote:
Android uses XBGR and ABGR as default scanout buffer, But qemu
does not support them for
> On 12-Sep-2023, at 9:04 PM, David Hildenbrand wrote:
>
> [...]
>
>>> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
>>> index 54838c0c41..d187890675 100644
>>> --- a/hw/i386/pc.c
>>> +++ b/hw/i386/pc.c
>>> @@ -908,9 +908,12 @@ static hwaddr pc_max_used_gpa(PCMachineState *pcms,
>>> uint64_t
On 13/9/23 18:09, Thomas Huth wrote:
Thomas Huth (2):
hw/mips/jazz: Move the NIC init code into a separate function
hw/mips/jazz: Simplify the NIC setup code
Reviewed-by: Philippe Mathieu-Daudé
Hi Michael，
Really sorry for the delay, I was sick-leave for almost 2 months,
which caused the delay in the development of this feature. I will
continue working on this feature soon.
Thanks
Cindy
On Wed, Sep 13, 2023 at 9:31 PM Michael S. Tsirkin wrote:
>
> On Wed, May 03, 2023 at 05:13:30PM
On 13/9/23 17:05, Jonathan Cameron wrote:
Done to reduce line lengths where this is used.
Ext seems sufficiently obvious that it need not be spelt out
fully.
Signed-off-by: Jonathan Cameron
---
include/hw/cxl/cxl_pci.h | 6 ++---
hw/cxl/cxl-component-utils.c | 49
Android uses XBGR and ABGR as default scanout buffer, But qemu
does not support them for qemu_pixman_to_drm_format conversion within
virtio_gpu_create_dmabuf for virtio gpu.
so, add those 2 formats into drm_format_pixman_map.
Signed-off-by: Ken Xue
---
include/ui/qemu-pixman.h | 4
Hi.
I came across a case when OVPSim shamelessly outperforms QEMU. In 8 CPUs test,
OPVSim single-thread is faster than QEMU tcg-single 4 times, and faster than
QEMU mttcg by ~30%.
I constructed a simple test case that reproduces it.
When I profiled the test I saw that ~50% of all time QEMU
On Wed, Sep 13, 2023 at 4:58 AM Bernhard Beschow wrote:
>
>
> Am 23. August 2023 01:25:38 UTC schrieb Gurchetan Singh <
> gurchetansi...@chromium.org>:
> >This adds initial support for gfxstream and cross-domain. Both
> >features rely on virtio-gpu blob resources and context types, which
> >are
On Wed, Sep 13, 2023 at 6:49 AM Marc-André Lureau <
marcandre.lur...@gmail.com> wrote:
> Hi
>
> On Wed, Sep 13, 2023 at 5:08 AM Gurchetan Singh
> wrote:
> > On Tue, Sep 12, 2023 at 6:59 AM Marc-André Lureau <
> marcandre.lur...@gmail.com> wrote:
> >> Packaging aemu and gfxstream is a bit
pc_machine_kvm_type() was introduced by commit e21be724eaf5 ("i386/xen:
add pc_machine_kvm_type to initialize XEN_EMULATE mode") to do Xen
specific initialization by utilizing kvm_type method.
commit eeedfe6c6316 ("hw/xen: Simplify emulated Xen platform init")
moves the Xen specific
From: Isaku Yamahata
In mch_realize(), process PAM initialization before SMRAM initialization so
that later patch can skill all the SMRAM related with a single check.
Signed-off-by: Isaku Yamahata
Signed-off-by: Xiaoyao Li
---
hw/pci-host/q35.c | 19 ++-
1 file changed, 10
Register a memory listener for KVM_X86_SW_PROVTED_VM. It set RAM to
private by default.
Signed-off-by: Xiaoyao Li
---
include/exec/memory.h | 1 +
target/i386/kvm/sw-protected-vm.c | 18 ++
2 files changed, 19 insertions(+)
diff --git a/include/exec/memory.h
Signed-off-by: Xiaoyao Li
---
target/i386/kvm/kvm.c | 2 ++
target/i386/kvm/sw-protected-vm.c | 10 ++
target/i386/kvm/sw-protected-vm.h | 2 ++
3 files changed, 14 insertions(+)
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index fb1be16471b4..e126bf4e7ddd
From: Isaku Yamahata
Signed-off-by: Isaku Yamahata
Signed-off-by: Xiaoyao Li
---
accel/kvm/kvm-all.c| 1 +
accel/kvm/trace-events | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index c67aa66b0559..229b7038a4c2 100644
---
Extract the alignment check and sanity check out from
ram_block_discard_range() into a seperate function
ram_block_discard_range_fd(), which can be passed with an explicit fd as
input parameter.
ram_block_discard_range_fd() can be used to discard private memory range
from gmem fd with later
From: Isaku Yamahata
Add a q35 property to check whether or not SMM ranges, e.g. SMRAM, TSEG,
etc... exist for the target platform. TDX doesn't support SMM and doesn't
play nice with QEMU modifying related guest memory ranges.
Signed-off-by: Isaku Yamahata
Co-developed-by: Sean Christopherson
Signed-off-by: Xiaoyao Li
---
target/i386/kvm/sw-protected-vm.c | 8
1 file changed, 8 insertions(+)
diff --git a/target/i386/kvm/sw-protected-vm.c
b/target/i386/kvm/sw-protected-vm.c
index f47ac383e1dd..65347067aa03 100644
--- a/target/i386/kvm/sw-protected-vm.c
+++
It's used for discarding oppsite memory after memory conversion to
shared/private.
Note, private-shared page conversion is done at 4KB granularity. Don't
check alignment with rb->page_size, instead qemu_host_page_size, which
is 4K.
Originally-from: Isaku Yamahata
Signed-off-by: Xiaoyao Li
---
Introcude the helper functions to set the attributes of a range of
memory to private and shared.
Signed-off-by: Xiaoyao Li
---
accel/kvm/kvm-all.c | 43 +++
include/sysemu/kvm.h | 3 +++
2 files changed, 46 insertions(+)
diff --git
From: Chao Peng
Switch to KVM_SET_USER_MEMORY_REGION2 when supported by KVM.
With KVM_SET_USER_MEMORY_REGION2, QEMU can set up memory region that
backend'ed both by hva-based shared memory and gmem fd based private
memory.
Signed-off-by: Chao Peng
Codeveloped-by: Xiaoyao Li
Signed-off-by:
From: Chao Peng
Add KVM gmem support to RAMBlock so both normal hva based memory
and kvm gmem fd based private memory can be associated in one RAMBlock.
Introduce new flag RAM_KVM_GMEM. It calls KVM ioctl to create private
gmem for the RAMBlock when it's set.
Signed-off-by: Xiaoyao Li
---
From: Chao Peng
Currently only KVM_MEMORY_EXIT_FLAG_PRIVATE in flags is valid when
KVM_EXIT_MEMORY_FAULT happens. It indicates userspace needs to do
the memory conversion on the RAMBlock to turn the memory into desired
attribute, i.e., private/shared.
Note, KVM_EXIT_MEMORY_FAULT makes sense
Introduce new flag RAM_DEFAULT_PRIVATE for RAMBlock. It's used to
indicate the default attribute, private or not.
Set the RAM range to private explicitly when it's default private.
Originated-from: Isaku Yamahata
Signed-off-by: Xiaoyao Li
---
accel/kvm/kvm-all.c | 10 ++
This patch needs to be updated by script
scripts/update-linux-headers.sh
once gmem fd support is upstreamed in Linux kernel.
Signed-off-by: Xiaoyao Li
---
linux-headers/asm-x86/kvm.h | 3 +++
linux-headers/linux/kvm.h | 50 +
2 files changed, 53
Signed-off-by: Xiaoyao Li
---
softmmu/physmem.c | 34 +++---
1 file changed, 15 insertions(+), 19 deletions(-)
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index 2d98a88f41f0..34d580ec0d39 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -3440,16
Introduce a separate function kvm_confidential_guest_init(), which
dispatches specific confidential guest initialization function by
ms->cgs type.
Signed-off-by: Xiaoyao Li
Acked-by: Gerd Hoffmann
Reviewed-by: Philippe Mathieu-Daudé
---
target/i386/kvm/kvm.c | 11 ++-
Implement mc->kvm_type() for i386 machines. It provides a way for user
to create SW_PROTECTE_VM.
Also store the vm_type in machinestate to other code to query what the
VM type is.
Signed-off-by: Xiaoyao Li
---
hw/i386/x86.c | 12
include/hw/i386/x86.h | 1 +
From: Isaku Yamahata
Add a new property "private" to memory backends. When it's set to true,
it indicates the RAMblock of the backend also requires kvm gmem.
Signed-off-by: Isaku Yamahata
Signed-off-by: Xiaoyao Li
---
backends/hostmem-file.c | 1 +
backends/hostmem-memfd.c | 1 +
It's the v2 RFC of enabling KVM gmem[1] as the backend for private
memory.
For confidential-computing, KVM provides gmem/guest_mem interfaces for
userspace, like QEMU, to allocate user-unaccesible private memory. This
series aims to add gmem support in QEMU's RAMBlock so that each RAM can
have
Introduce sw-protected-vm object which implements the interface of
CONFIDENTIAL_GUEST_SUPPORT, and will be used to create
X86_SW_PROTECTED_VM via
$qemu -machine ...,confidential-guest-support=sp-vm0 \
-object sw-protected-vm,id=sp-vm0
Signed-off-by: Xiaoyao Li
---
qapi/qom.json
Introduce memory_region_has_gmem_fd() to query if the MemoryRegion has
KVM gmem fd allocated.
Signed-off-by: Xiaoyao Li
---
include/exec/memory.h | 10 ++
softmmu/memory.c | 5 +
2 files changed, 15 insertions(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
On Wed, Sep 13, 2023 at 3:47 PM Eric Auger wrote:
>
> In vhost_commit(), it may happen that dev->mem_sections and
> dev->tmp_sections are equal, in which case, unconditionally
> freeing old_sections at the end of the function will also free
> dev->mem_sections used on subsequent call leading to a
On Wed, Sep 13, 2023 at 8:34 PM Eugenio Pérez wrote:
>
> Not zeroing it causes a SIGSEGV if the live migration is cancelled, at
> net device restart.
>
> This is caused because CVQ tries to reuse the iova_tree that is present
> in the first vhost_vdpa device at the end of
On 9/13/23 19:26, Song Gao wrote:
+static bool gen_xvrepl128(DisasContext *ctx, arg_vv_i *a, MemOp mop)
{
-int ofs;
-TCGv_i64 desthigh, destlow, high, low;
+int index = LSX_LEN / (8 * (1 << mop));
-if (!avail_LSX(ctx)) {
-return false;
-}
-
-if
On Tue, Sep 12, 2023 at 8:27 PM Michael Tokarev wrote:
>
> 11.09.2023 09:42, Alistair Francis:>target/riscv: don't read CSR in
> riscv_csrrw_do64 (2023-09-11 11:45:55 +1000)
> 2 more questions about this pull-req and -stable.
>
>
> commit 50f9464962fb41f04fd5f42e7ee2cb60942aba89
> Author:
On 9/13/23 19:26, Song Gao wrote:
+static inline int vec_reg_offset(int regno, int index, MemOp mop)
+{
+const uint8_t size = 1 << mop;
+int offs = index * size;
+
+#if HOST_BIG_ENDIAN
+if (size < 8 ) {
+offs ^ = (8 - size);
+}
+#endif
+return offs +
On 9/13/23 19:25, Song Gao wrote:
Signed-off-by: Song Gao
---
target/loongarch/helper.h | 214 +-
target/loongarch/vec_helper.c | 444 +---
target/loongarch/insn_trans/trans_vec.c.inc | 19 +-
3 files changed, 326 insertions(+), 351
From: Anton Johansson
Makes ldst_atomicity.c.inc almost target-independent, with the exception
of TARGET_PAGE_MASK, which will be addressed in a future patch.
Signed-off-by: Anton Johansson
Message-Id: <20230912153428.17816-8-a...@rev.ng>
Reviewed-by: Richard Henderson
Signed-off-by: Richard
Accept that we will consume space in CPUState for CONFIG_USER_ONLY,
since we cannot test CONFIG_SOFTMMU within hw/core/cpu.h.
Signed-off-by: Richard Henderson
---
include/exec/cpu-defs.h | 150
include/hw/core/cpu.h | 141
Now that there is no padding between CPUNegativeOffsetState
and CPUArchState, this value is constant across all targets.
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 1 -
accel/tcg/translate-all.c | 2 --
tcg/tcg.c | 13 +++--
3 files changed, 7
Inherit the size and alignment from TYPE_ARM_CPU.
Signed-off-by: Richard Henderson
---
target/arm/cpu.c | 3 ---
target/arm/cpu64.c | 4
2 files changed, 7 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 906eb981b0..d0f279b87f 100644
--- a/target/arm/cpu.c
+++
Minimize the displacement to can_do_io, since it may
be touched at the start of each TranslationBlock.
It fits into other padding within the substructure.
Signed-off-by: Richard Henderson
---
include/hw/core/cpu.h| 2 +-
accel/dummy-cpus.c | 2 +-
From: Anton Johansson
The goal is to (in the future) allow for per-target compilation of
functions in atomic_template.h whilst atomic_mmu_lookup() and cputlb.c
are compiled once-per user- or system mode.
Signed-off-by: Anton Johansson
Message-Id: <20230912153428.17816-7-a...@rev.ng>
From: Anton Johansson
The prototype of do_[st|ld]*_mmu() is unified between system- and
user-mode allowing a large chunk of helper_[st|ld]*() and cpu_[st|ld]*()
functions to be expressed in same manner between both modes. These
functions will be moved to ldst_common.c.inc in a following commit.
Replace the single use within env_tlb() and remove.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 9db8544125..af9516654a 100644
---
This function is now empty, so remove it. In the case of
m68k and tricore, this empties the class instance initfn,
so remove those as well.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 10 --
target/alpha/cpu.c | 2 --
target/arm/cpu.c| 1 -
From: Anton Johansson
TARGET_PAGE_ENTRY_EXTRA is a macro that allows guests to specify additional
fields for caching with the full TLB entry. This macro is replaced with
a union in CPUTLBEntryFull, thus making CPUTLB target-agnostic at the
cost of slightly inflated CPUTLBEntryFull for non-arm
From: Anton Johansson
do_[ld|st]*() and mmu_lookup*() are changed to use CPUState over
CPUArchState, moving the target-dependence to the target-facing facing
cpu_[ld|st] functions.
Signed-off-by: Anton Johansson
Message-Id: <20230912153428.17816-6-a...@rev.ng>
Reviewed-by: Richard Henderson
From: Anton Johansson
Changes tlb_*() functions to take CPUState instead of CPUArchState, as
they don't require the full CPUArchState. This makes it easier to
decouple target-(in)dependent code.
Signed-off-by: Anton Johansson
Message-Id: <20230912153428.17816-4-a...@rev.ng>
Reviewed-by:
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 1 -
include/hw/core/cpu.h| 9 ++---
target/arm/common-semi-target.h | 2 +-
accel/tcg/cpu-exec.c | 8
accel/tcg/cputlb.c | 18 +-
The omission of alignment has technically been wrong since
269bd5d8f61, where QEMU_ALIGNED was added to CPUTLBDescFast.
Signed-off-by: Richard Henderson
---
target/alpha/cpu.c | 1 +
target/avr/cpu.c| 1 +
target/cris/cpu.c | 1 +
target/hexagon/cpu.c| 1 +
Now that CPUTLB has target-independent types, and a target-independent
number of mmu_idx, there's very little reason not to merge it into CPUState.
Once we've done that, all of the objections I had vs Anton's v1 go away.
Indeed even more cleanups are possible, like removing cpu->env_ptr,
because
Retain the separate structure to emphasize its importance.
Enforce CPUArchState always follows CPUState without padding.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h| 22 +-
include/hw/core/cpu.h | 14 --
target/alpha/cpu.h| 1 -
No functional change, just using a common spelling.
Signed-off-by: Richard Henderson
---
target/arm/cpu.c | 2 +-
target/ppc/cpu_init.c | 2 +-
target/s390x/cpu.c| 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index
Verify that the distance between CPUNegativeOffsetState and
CPUArchState is no greater than any alignment requirements.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index
From: Anton Johansson
probe_access_internal() is changed to instead take the generic CPUState
over CPUArchState, in order to lessen the target-specific coupling of
cputlb.c. Note: probe_access*() also don't need the full CPUArchState,
but aren't touched in this patch as they are target-facing.
From: Anton Johansson
A large chunk of ld/st functions are moved from cputlb.c and user-exec.c
to ldst_common.c.inc as their implementation is the same between both
modes.
Eventually, ldst_common.c.inc could be compiled into a separate
target-specific compilation unit, and be linked in with the
We can now access icount_decr directly.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 1 -
include/hw/core/cpu.h | 2 --
hw/core/cpu-common.c | 4 ++--
3 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index
Propagate alignment just like size. This is required in
order to get the correct alignment on most cpu subclasses
where the size and alignment is only specified for the
base cpu type.
Signed-off-by: Richard Henderson
---
qom/object.c | 14 ++
1 file changed, 14 insertions(+)
diff
Now that CPUNegativeOffsetState is part of CPUState,
we can reference it directly.
Signed-off-by: Richard Henderson
---
include/exec/cpu-all.h | 11 ---
include/exec/exec-all.h | 2 +-
accel/tcg/cpu-exec.c | 14 +++---
From: Anton Johansson
The function is no longer used to access the TLB,
and has been replaced by cpu->neg.tlb.
Signed-off-by: Anton Johansson
Message-Id: <20230912153428.17816-9-a...@rev.ng>
Reviewed-by: Richard Henderson
[rth: Merge comment update patch]
Signed-off-by: Richard Henderson
---
This patch includes:
- XVPACK{EV/OD}.{B/H/W/D};
- XVPICK{EV/OD}.{B/H/W/D};
- XVILV{L/H}.{B/H/W/D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 27
target/loongarch/disas.c| 27
This patch includes:
- XVADD.{B/H/W/D/Q};
- XVSUB.{B/H/W/D/Q}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 14 +++
target/loongarch/disas.c| 23 +
target/loongarch/translate.c| 4 +
This patch includes:
- XVEXTH.{H.B/W.H/D.W/Q.D};
- XVEXTH.{HU.BU/WU.HU/DU.WU/QU.DU}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 9 ++
target/loongarch/disas.c| 9 ++
target/loongarch/vec_helper.c
Reviewed-by: Richard Henderson
Signed-off-by: Song Gao
---
target/loongarch/cpu.h | 2 ++
target/loongarch/cpu.c | 2 ++
target/loongarch/insn_trans/trans_vec.c.inc | 6 ++
3 files changed, 10 insertions(+)
diff --git a/target/loongarch/cpu.h
This patch includes:
- XVSRLR[I].{B/H/W/D};
- XVSRAR[I].{B/H/W/D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 17 +
target/loongarch/disas.c| 18 ++
target/loongarch/vec_helper.c
This patch includes:
- XVLDI.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 2 ++
target/loongarch/disas.c| 7 +++
target/loongarch/insn_trans/trans_vec.c.inc | 13 ++---
3 files changed, 15
This patch includes:
- XVBITCLR[I].{B/H/W/D};
- XVBITSET[I].{B/H/W/D};
- XVBITREV[I].{B/H/W/D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 27 +
target/loongarch/disas.c| 25
Based-on:
https://patchew.org/QEMU/20230831030904.1194667-1-richard.hender...@linaro.org/
Hi,
This series adds LoongArch LASX instructions.
About test:
We use RISU test the LoongArch LASX instructions.
QEMU:
https://github.com/loongson/qemu/tree/tcg-old-abi-support-lasx
RISU:
Signed-off-by: Song Gao
---
target/loongarch/helper.h | 214 +-
target/loongarch/vec_helper.c | 444 +---
target/loongarch/insn_trans/trans_vec.c.inc | 19 +-
3 files changed, 326 insertions(+), 351 deletions(-)
diff --git
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/helper.h | 118 +++---
target/loongarch/vec_helper.c | 161 +++-
target/loongarch/insn_trans/trans_vec.c.inc | 129 +---
3 files changed, 219
This patch includes:
- XVF{ADD/SUB/MUL/DIV}.{S/D};
- XVF{MADD/MSUB/NMADD/NMSUB}.{S/D};
- XVF{MAX/MIN}.{S/D};
- XVF{MAXA/MINA}.{S/D};
- XVFLOGB.{S/D};
- XVFCLASS.{S/D};
- XVF{SQRT/RECIP/RSQRT}.{S/D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode
This patch includes:
- XVSHUF.{B/H/W/D};
- XVPERM.W;
- XVSHUF4i.{B/H/W/D};
- XVPERMI.{W/D/Q};
- XVEXTRINS.{B/H/W/D}.
Signed-off-by: Song Gao
---
target/loongarch/helper.h | 3 +
target/loongarch/insns.decode | 21 +++
target/loongarch/disas.c
This patch includes:
- XVINSGR2VR.{W/D};
- XVPICKVE2GR.{W/D}[U].
Signed-off-by: Song Gao
---
target/loongarch/insns.decode | 7 +
target/loongarch/disas.c| 17 ++
target/loongarch/translate.c| 13 ++
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.h | 24 --
target/loongarch/internals.h| 22
target/loongarch/vec.h | 33 ++
linux-user/loongarch64/signal.c | 1 +
This patch includes:
- XV{AND/OR/XOR/NOR/ANDN/ORN}.V;
- XV{AND/OR/XOR/NOR}I.B.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 12 +++
target/loongarch/disas.c| 12 +++
target/loongarch/vec_helper.c
This patch includes:
- XVFCMP.cond.{S/D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/helper.h | 8 +-
target/loongarch/insns.decode | 3 +
target/loongarch/disas.c| 93 +
This patch includes:
- XVNEG.{B/H/W/D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 5 +
target/loongarch/disas.c| 10 ++
target/loongarch/insn_trans/trans_vec.c.inc | 19 +++
3 files
This patch includes:
- XVSRLN.{B.H/H.W/W.D};
- XVSRAN.{B.H/H.W/W.D};
- XVSRLNI.{B.H/H.W/W.D/D.Q};
- XVSRANI.{B.H/H.W/W.D/D.Q}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 16 ++
target/loongarch/disas.c| 16 ++
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/helper.h | 58 -
target/loongarch/vec_helper.c | 124 ++--
target/loongarch/insn_trans/trans_vec.c.inc | 16 ++-
3 files changed, 101 insertions(+), 97
This patch includes:
- VPCNT.{B/H/W/D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 5 +
target/loongarch/disas.c| 5 +
target/loongarch/vec_helper.c | 3 ++-
This patch includes:
- XVADDI.{B/H/W/D}U;
- XVSUBI.{B/H/W/D}U.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 9 ++
target/loongarch/disas.c| 14
target/loongarch/insn_trans/trans_vec.c.inc | 36
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index a1d3f680d8..fc7f70fbe5 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -393,6 +393,7 @@
This patch includes:
- XVMADD.{B/H/W/D};
- XVMSUB.{B/H/W/D};
- XVMADDW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- XVMADDW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 34 ++
target/loongarch/disas.c
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/translate.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/loongarch/translate.h b/target/loongarch/translate.h
index 89b49a859e..195f53573a 100644
--- a/target/loongarch/translate.h
+++
This patch includes:
- XVMSKLTZ.{B/H/W/D};
- XVMSKGEZ.B;
- XVMSKNZ.B.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 7 ++
target/loongarch/disas.c| 7 ++
target/loongarch/vec_helper.c | 78
This patch includes:
- XVREPLVE.{B/H/W/D};
- XVREPL128VEI.{B/H/W/D};
- XVREPLVE0.{B/H/W/D/Q};
- XVINSVE0.{W/D};
- XVPICKVE.{W/D};
- XVBSLL.V, XVBSRL.V.
Signed-off-by: Song Gao
---
target/loongarch/helper.h | 5 +
target/loongarch/insns.decode | 25 +++
This patch includes:
- XVADDA.{B/H/W/D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 5
target/loongarch/disas.c| 5
target/loongarch/vec_helper.c | 30 +++--
This patch includes:
- XVLD[X], XVST[X];
- XVLDREPL.{B/H/W/D};
- XVSTELM.{B/H/W/D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 18 ++
target/loongarch/disas.c| 24 +++
This patch includes:
- XVSLL[I].{B/H/W/D};
- XVSRL[I].{B/H/W/D};
- XVSRA[I].{B/H/W/D};
- XVROTR[I].{B/H/W/D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 33 +++
target/loongarch/disas.c| 36
This patch includes:
- XVFCVT{L/H}.{S.H/D.S};
- XVFCVT.{H.S/S.D};
- XVFRINT[{RNE/RZ/RP/RM}].{S/D};
- XVFTINT[{RNE/RZ/RP/RM}].{W.S/L.D};
- XVFTINT[RZ].{WU.S/LU.D};
- XVFTINT[{RNE/RZ/RP/RM}].W.D;
- XVFTINT[{RNE/RZ/RP/RM}]{L/H}.L.S;
- XVFFINT.{S.W/D.L}[U];
- X[CVFFINT.S.L, VFFINT{L/H}.D.W.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/helper.h | 146 +++
target/loongarch/vec_helper.c | 445 +---
target/loongarch/insn_trans/trans_vec.c.inc | 18 +-
3 files changed, 291 insertions(+), 318
This patch includes:
- XVFRSTP[I].{B/H}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 5
target/loongarch/disas.c| 5
target/loongarch/vec_helper.c | 32 +
This patch includes:
- XVCLO.{B/H/W/D};
- XVCLZ.{B/H/W/D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 9 +
target/loongarch/disas.c| 9 +
target/loongarch/vec_helper.c | 3 ++-
This patch includes:
- XVSADD.{B/H/W/D}[U];
- XVSSUB.{B/H/W/D}[U].
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 18 ++
target/loongarch/disas.c| 17 +
This patch includes:
- XVDIV.{B/H/W/D}[U];
- XVMOD.{B/H/W/D}[U].
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 17 +
target/loongarch/disas.c| 17 +
target/loongarch/vec_helper.c
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/helper.h | 2 +-
target/loongarch/vec_helper.c | 11 +--
target/loongarch/insn_trans/trans_vec.c.inc | 22 -
3 files changed, 19 insertions(+), 16
This patch includes:
- XVSSRLN.{B.H/H.W/W.D};
- XVSSRAN.{B.H/H.W/W.D};
- XVSSRLN.{BU.H/HU.W/WU.D};
- XVSSRAN.{BU.H/HU.W/WU.D};
- XVSSRLNI.{B.H/H.W/W.D/D.Q};
- XVSSRANI.{B.H/H.W/W.D/D.Q};
- XVSSRLNI.{BU.H/HU.W/WU.D/DU.Q};
- XVSSRANI.{BU.H/HU.W/WU.D/DU.Q}.
Signed-off-by: Song Gao
Reviewed-by:
This patch includes:
- XVAVG.{B/H/W/D/}[U];
- XVAVGR.{B/H/W/D}[U].
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 17
target/loongarch/disas.c| 17
target/loongarch/vec_helper.c
This patch includes:
- XVMUL.{B/H/W/D};
- XVMUH.{B/H/W/D}[U];
- XVMULW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- XVMULW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}.
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/insns.decode | 38 +++
target/loongarch/disas.c
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