On 05/27/2015 05:30 AM, Paolo Bonzini wrote:
On 26/05/2015 23:25, Christopher Covington wrote:
On 05/25/2015 08:53 AM, Paolo Bonzini wrote:
On 22/05/2015 13:12, Daniel P. Berrange wrote:
In
particular I don't see why we need to have a SATA controller and ISA/LPC
bridge in every virt
On 05/25/2015 08:53 AM, Paolo Bonzini wrote:
On 22/05/2015 13:12, Daniel P. Berrange wrote:
In
particular I don't see why we need to have a SATA controller and ISA/LPC
bridge in every virt machine - root PCI bus only should be possible, as you
can provide disks via virtio-blk or virtio-scsi
On Thu, Apr 30, 2015 at 9:24 PM, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Thu, Apr 30, 2015 at 11:14 AM, Christopher Covington
christopher.coving...@linaro.org wrote:
Present a system with an instructions per cycle of exactly one.
This makes it less likely a user will mistake
The Linux kernel accesses this register early in its setup.
Signed-off-by: Christopher Covington christopher.coving...@linaro.org
---
target-arm/helper.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index d77c6de..6aeb77c 100644
--- a/target
The Linux kernel accesses this register early in its setup.
Signed-off-by: Christopher Covington christopher.coving...@linaro.org
---
target-arm/helper.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 6aeb77c..c9463cb 100644
--- a/target
The Linux kernel accesses this register early in its setup.
Signed-off-by: Christopher Covington christopher.coving...@linaro.org
---
target-arm/helper.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index c9463cb..863cfd0 100644
--- a/target
.
Signed-off-by: Christopher Covington christopher.coving...@linaro.org
---
target-arm/helper.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 3e6fb0b..a027a19 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
The previously missing registers are now present in QEMU.
Signed-off-by: Christopher Covington christopher.coving...@linaro.org
---
target-arm/helper.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 863cfd0..3e6fb0b
Hi Peter,
Thanks for taking a look.
On Apr 30, 2015 2:28 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 30 April 2015 at 19:14, Christopher Covington
christopher.coving...@linaro.org wrote:
Present a system with an instructions per cycle of exactly one.
This makes it less likely
Hi Alex,
On 04/27/2015 09:41 AM, Alexander Graf wrote:
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -131,6 +138,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_FW_CFG] = { 0x0902, 0x000a },
[VIRT_MMIO] = { 0x0a00, 0x0200 },
/* ...repeating for
Hi Brendan,
On 04/24/2015 03:50 PM, Brendan Dolan-Gavitt wrote:
One possible option that has come up in the past is disabling the TLB
for your testing. It is slower, though, and would only work on TCG,
not KVM.
The way I'm currently doing this is by changing the conditional jump
here to an
On 04/24/2015 08:46 AM, Peter Maydell wrote:
On 24 April 2015 at 12:26, Paolo Bonzini pbonz...@redhat.com wrote:
On 24/04/2015 04:10, Wenjie Liu wrote:
The thing I am trying to achieve is to get the data and guest physical
address of every guest memory access, so I need to known which API can
Hi Leon,
On 04/23/2015 07:00 AM, Leon Alrae wrote:
Hi Christopher,
On 09/04/2015 18:57, Peter Maydell wrote:
On 9 April 2015 at 18:23, Christopher Covington
christopher.coving...@linaro.org wrote:
On Fri, Mar 27, 2015 at 12:40 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
You need
Hi Mohan,
On 04/21/2015 02:23 AM, Mohan G wrote:
comments inline
- Original Message -
From: Marc Zyngier marc.zyng...@arm.com
To: Mohan G mohan...@yahoo.com; linux-arm-ker...@lists.infradead.org
linux-arm-ker...@lists.infradead.org
Cc:
Sent: Monday, April 20, 2015 4:32 PM
Hi Peter,
On Fri, Mar 27, 2015 at 12:40 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 0b192a1..3b5b875 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -1544,7 +1544,11 @@ static void
Hi Leon,
On 04/01/2015 09:18 AM, Leon Alrae wrote:
Signed-off-by: Leon Alrae leon.al...@imgtec.com
---
Hi,
Continuing the discussion related to extending QEMU's command line with new
argument allowing to pass semi-hosting input arguments to the guest program:
Hi Peter,
On Fri, Mar 27, 2015 at 12:40 PM, Peter Maydell
peter.mayd...@linaro.org wrote:
On 27 March 2015 at 16:22, Christopher Covington
christopher.coving...@linaro.org wrote:
In AArch64, Angel semihosting uses HLT instructions with a special
immediate value, 0xf000. Use a new exception
Print semihosting debugging information before the
do_arm_semihosting() call so that angel_SWIreason_ReportException,
which causes the function to not return, gets the same debug prints as
other semihosting calls. Also print out the semihosting call number.
Signed-off-by: Christopher Covington
Hi,
Here are a few patches preparing for and adding AArch64 Angel
semihosting support. I've been testing them with some simple tests from
the following repository. This series only adds support for exit, but
support for the rest of the calls will hopefully follow shortly.
with.
Signed-off-by: Christopher Covington christopher.coving...@linaro.org
---
target-arm/arm-semi.c | 14 +++---
target-arm/cpu.h | 3 ++-
target-arm/helper-a64.c| 11 +++
target-arm/internals.h | 1 +
target-arm/translate-a64.c | 6 +-
5 files
of the unsupported semihosting call error message so that
it will make sense on AArch64 as well.
Signed-off-by: Christopher Covington christopher.coving...@linaro.org
---
target-arm/arm-semi.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/target-arm/arm-semi.c b/target-arm
Hi Gerd,
This looks great, thanks for your work on this. Unfortunately, I'm seeing the
segfault below.
Alex, do you have any thoughts on how well this might be able to replace the
Goldfish Framebuffer on the Android Emulator?
On 03/13/2015 05:47 AM, Gerd Hoffmann wrote:
Hi,
Next round of
Hi Alex,
On 03/10/2015 09:12 PM, Alex Sun wrote:
I downloaded QEMU 2.2.0, and built a qemu-system-arm from there.
I loaded a versatile kernel 2.6.32.5 and my own file system.
#qemu-system-arm -pidfile /tmp/qemu_0_pids/0.pid -M versatilepb -option-rom
efi-rtl8139.rom -initrd newinitrd
Hi Gabriel,
Summary up top, why I like the approach below.
On 02/03/2015 02:09 PM, Gabriel L. Somlo wrote:
Hi,
For this functionality to really resemble the way environment variables
are used, environment information should be provided as part of the QEMU
command line, without the
Hi Christopher,
On 01/10/2015 11:42 AM, Christopher Horler wrote:
confirmed - not a bug, patching the kernel fixes the problem.
Mind pointing to your patch? I've been seeing the GIC CPU mask not found -
kernel will fail to boot. message for a long time but since it was apparently
spurious never
Hi Laszlo,
On 12/08/2014 09:01 AM, Laszlo Ersek wrote:
On 11/30/14 17:59, Laszlo Ersek wrote:
fw_cfg already supports exposure over MMIO (used in ppc/mac_newworld.c,
ppc/mac_oldworld.c, sparc/sun4m.c); we can easily add it to the virt
board.
The mmio register block of fw_cfg is advertized
Hi Chengyu,
On 12/03/2014 02:12 AM, Chengyu Song wrote:
In AA64 mode, certain system registers are access through MSR/MRS
instructions instead of MCR/MRC. This patch added more such registers:
If you don't mind sharing, I'm curious what motivated this patch. I have a
particular interest in
Hi Paolo,
On 07/31/2013 02:19 AM, Paolo Bonzini wrote:
1) The GPL says that if the Program does not specify a version number
of this License, you may choose any version ever published by the Free
Software Foundation. This is not true, QEMU includes parts that are
v2-only.
2) Provide a
Hi Liviu,
On 11/12/2014 02:17 PM, Liviu Ionescu wrote:
semihosting ... be runtime configurable on this, I think.
I took a quick look at the syntax of command options and monitor commands,
and I would suggest the following:
- extend the option -semihosting with an optional
On 11/12/2014 03:05 AM, Petr Tesarik wrote:
On Tue, 11 Nov 2014 12:27:44 -0500
Christopher Covington c...@codeaurora.org wrote:
On 11/11/2014 06:22 AM, Laszlo Ersek wrote:
(Note: I'm not subscribed to either qemu-devel or the kexec list; please
keep me CC'd.)
QEMU is able to dump
On 11/12/2014 08:26 AM, Petr Tesarik wrote:
On Wed, 12 Nov 2014 08:18:04 -0500
Christopher Covington c...@codeaurora.org wrote:
On 11/12/2014 03:05 AM, Petr Tesarik wrote:
On Tue, 11 Nov 2014 12:27:44 -0500
Christopher Covington c...@codeaurora.org wrote:
On 11/11/2014 06:22 AM, Laszlo
Thanks Petr and Laszlo for entertaining my questions. I've got one last one if
you have the time.
On 11/12/2014 09:10 AM, Laszlo Ersek wrote:
On 11/12/14 14:26, Petr Tesarik wrote:
On Wed, 12 Nov 2014 08:18:04 -0500
Christopher Covington c...@codeaurora.org wrote:
On 11/12/2014 03:05 AM
On 11/12/2014 10:03 AM, Laszlo Ersek wrote:
On 11/12/14 15:48, Christopher Covington wrote:
Thanks Petr and Laszlo for entertaining my questions. I've got one last one
if
you have the time.
On 11/12/2014 09:10 AM, Laszlo Ersek wrote:
On 11/12/14 14:26, Petr Tesarik wrote:
On Wed, 12 Nov
On 11/11/2014 06:22 AM, Laszlo Ersek wrote:
(Note: I'm not subscribed to either qemu-devel or the kexec list; please
keep me CC'd.)
QEMU is able to dump the guest's memory in KDUMP format (kdump-zlib,
kdump-lzo, kdump-snappy) with the dump-guest-memory QMP command.
The resultant vmcore is
Hi,
[snip--for full message see
https://groups.google.com/d/msg/android-emulator-dev/dltBnUW_HzU/2tSZNLaVzmQJ]
5) Relationship with upstream
In an ideal world, we would not need a fork, and all code would live on
the upstream QEMU git.
In reality, things are different: there is little
On 10/28/2014 01:08 PM, Peter Maydell wrote:
On 28 October 2014 16:38, Liviu Ionescu i...@livius.net wrote:
I'm not sure what the QEMU definition of '-machine' stands for, a device
or a board, but I think that the ARM definitions are good candidates for
QEMU emulation names.
-machine
On 10/21/2014 05:58 PM, Peter Maydell wrote:
On 21 October 2014 22:33, Peter Maydell peter.mayd...@linaro.org wrote:
Suggestions:
...you might also try asking on kvm...@lists.cs.columbia.edu, which
is where the KVM/ARM kernel devs hang out, to see if somebody
else has seen this.
It may be
reads correctly.
To avoid this regressing the behaviour of the user-mode
emulator, we must set the DZE bit in the SCTLR for that
config so that userspace continues to see DZP as zero (it
was getting the correct result by accident previously).
Reported-by: Christopher Covington c
Hi Peter,
On 04/17/2014 06:33 AM, Peter Maydell wrote:
Implement the DC ZVA instruction, which clears a block of memory.
The fast path obtains a pointer to the underlying RAM via the TCG TLB
data structure so we can do a direct memset(), with fallback to a
simple byte-store loop in the slow
Hi Martin,
On 10/01/2014 09:50 AM, Martin Townsend wrote:
Hi,
I'm looking into creating a virtualised test bed for an 802.15.4 network.
Currently I have QEMU running and emulating our HW which bridges the
Ethernet from the guest to the host. What I would like to do is something
similar
On 09/11/2014 11:43 AM, Gerd Hoffmann wrote:
On Do, 2014-09-11 at 16:20 +0100, Peter Maydell wrote:
On 11 September 2014 16:09, Gerd Hoffmann kra...@redhat.com wrote:
This patch adds the header file with structs and defines for
the virtio based gpu device. Covers 2d operations only.
Please
/osv/wiki/AArch64
Good luck,
Claudio
2014-09-04 21:15 GMT+03:00 Christopher Covington c...@codeaurora.org
mailto:c...@codeaurora.org:
Hi Semion,
On 09/04/2014 09:40 AM, Semion Prihodko wrote:
Still don't know how to build/run a simple
Hi Semion,
On 09/04/2014 09:40 AM, Semion Prihodko wrote:
Still don't know how to build/run a simple Hello World kernel on
qemu-system-aarch64?
Guys, this is a very basic thing, please provide concrete steps. Thanks.
Here you go. Start at the wget.
On 09/02/2014 04:42 PM, Xin Tong wrote:
where can i find most recent correctness and performance #s for QEMU ? are
there any organizations running these and making their data available online ?
There are a set of canned OS images [1] that are sometimes used for testing
and at least for ARM
Hi Dominique,
On 08/22/2014 02:27 AM, Dominique Martinet wrote:
Hi,
Christopher Covington wrote on Thu, Aug 21, 2014 at 03:50:58PM -0400:
With my 3.15.0+ kernel, qemu-system-x86_64 substituted for qemu-kvm, and the
path changed from your arguments I get:
9pnet_virtio: no channels
Hi Dominique,
On 08/22/2014 08:49 AM, Dominique Martinet wrote:
Hi,
Christopher Covington wrote on Fri, Aug 22, 2014 at 08:37:52AM -0400:
Thanks for the pointer to this patch. I think I started this kernel half way
through the 3.16 merge window. The last non-cherry-picked patch I have
On 08/21/2014 08:33 AM, Peter Maydell wrote:
On 21 August 2014 04:37, Peter Crosthwaite peter.crosthwa...@xilinx.com
wrote:
On Thu, Aug 21, 2014 at 11:40 AM, Alistair Francis alistai...@gmail.com
wrote:
On Thu, Aug 21, 2014 at 11:36 AM, Alistair Francis alistai...@gmail.com
wrote:
This
Hi Richard,
On 11/25/2013 10:49 AM, Richard Yao wrote:
I booted a Gentoo Linux installation in QEMU with a 9P rootfs as follows:
sudo qemu-kvm -cpu host -m 1024 -kernel
/mnt/test/usr/src/linux-3.13-rc1/arch/x86/boot/bzImage -append
'root=/dev/root rootfstype=9p
Hi Peter,
On 08/18/2014 08:54 PM, Peter Crosthwaite wrote:
Linux should boot in EL2 or EL1. If in EL3, jump down before handing
off to Linux.
Signed-off-by: Peter Crosthwaite peter.crosthwa...@xilinx.com
---
hw/arm/boot.c | 21 +
1 file changed, 21 insertions(+)
On 08/07/2014 08:03 AM, Peter Maydell wrote:
On 7 August 2014 12:43, Richard W.M. Jones rjo...@redhat.com wrote:
On Thu, Aug 07, 2014 at 12:35:27PM +0100, Peter Maydell wrote:
On 7 August 2014 12:29, Richard W.M. Jones rjo...@redhat.com wrote:
On Thu, Aug 07, 2014 at 12:18:49PM +0100, Peter
On 08/07/2014 09:53 AM, Peter Maydell wrote:
On 7 August 2014 14:43, Christopher Covington c...@codeaurora.org wrote:
On 08/07/2014 08:03 AM, Peter Maydell wrote:
No, because at the moment our AArch64 TCG implementation
(and the way we configure KVM) assumes that the highest
exception level
On 08/04/2014 06:32 AM, Peter Maydell wrote:
On 4 August 2014 11:23, Alex Bennée alex.ben...@linaro.org wrote:
Peter Maydell writes:
So:
* there's clearly a big perf win to be had here
* this patchset gives us that for 4K pages on AArch64
* but it doesn't help for 4K pages on AArch32
On 07/30/2014 11:20 AM, Alex Bennée wrote:
If you attempt to run a system image which uses 1k pages in the
qemu-system-aarch64 build it will fail thanks to the change to 12 bit
pages. The boards are still available for the qemu-system-arm build.
I fail to understand the correlation between
Hi,
I think the AArch64 port has a problem with a self-modifying code sequence
that appears to run fine on other simulators, but I can't get QEMU to run the
small bare metal test case I created to try to reproduce the issue. Any help
would be appreciated.
qemu-system-aarch64 -nodefaults
Hi Peter,
On 07/25/2014 10:07 AM, Peter Maydell wrote:
On 25 July 2014 15:01, Christopher Covington c...@codeaurora.org wrote:
Hi,
I think the AArch64 port has a problem with a self-modifying code sequence
that appears to run fine on other simulators, but I can't get QEMU to run the
small
Hi Peter,
On 07/25/2014 10:41 AM, Peter Maydell wrote:
On 25 July 2014 15:35, Christopher Covington c...@codeaurora.org wrote:
qemu-system-aarch64 -nodefaults -nographic -monitor none -M virt \
-cpu cortex-a57 -m 3G -semihosting -kernel hello
qemu: fatal: Trying to execute code outside RAM
at zero.
Thanks Peter! With this patch I can see the first few instructions being
executed.
Tested-by: Christopher Covington c...@codeaurora.org
(The default Newlib/libgloss wants to touch EL3 registers that QEMU doesn't
yet have, but I can probably make my test case work with -nostdlib
Hi Andrea,
On 07/02/2014 12:50 PM, Andrea Arcangeli wrote:
Hello everyone,
There's a large CC list for this RFC because this adds two new
syscalls (userfaultfd and remap_anon_pages) and
MADV_USERFAULT/MADV_NOUSERFAULT, so suggestions on changes to the API
or on a completely different API
Hi Alistair,
On 06/23/2014 09:12 PM, Alistair Francis wrote:
Include a helper function to determine if the CCNT counter
is enabled as well as the constants used to mask the pmccfiltr_el0
register.
Signed-off-by: Alistair Francis alistair.fran...@xilinx.com
---
target-arm/cpu.h | 19
On 06/23/2014 09:12 PM, Alistair Francis wrote:
This is used to synchronise the PMCCNTR counter and swap its
state between enabled and disabled if required. It must always
be called twice, both before and after any logic that could
change the state of the PMCCNTR counter.
diff --git
On 06/23/2014 09:12 PM, Alistair Francis wrote:
Call the new pmccntr_sync() function when there is a possibility
of swapping ELs (I.E. when there is an exception)
Signed-off-by: Alistair Francis alistair.fran...@xilinx.com
---
target-arm/helper-a64.c |5 +
target-arm/helper.c
On 06/24/2014 05:26 PM, Xiongzi Ge wrote:
Hi ,
This is just related to migration, but it may be not in the standard
migration. The cache device in different hosts can only be accessed by the vm
running in the host. The problem for me is to find the interface of the cache
in the guest or
It looks like this was introduced by the following commit:
commit 2115182f0c3125935b18ee788ef5b36c3c68d911
Author: Michael Tokarev m...@tls.msk.ru
Date: Thu May 8 14:56:58 2014 +0400
Makefile: strip tools and modules too
In my opinion, addprefix would be an even more readable approach,
On 06/12/2014 10:47 AM, Puneet Bakshi wrote:
Adding subject.
On Thu, Jun 12, 2014 at 8:15 PM, Puneet Bakshi bakshi.pun...@gmail.com
mailto:bakshi.pun...@gmail.com wrote:
Hi,
I want to be able to install RPM packages (available in host system at
some path) to the online
Hi Peter,
On 05/21/2014 10:46 AM, Peter Maydell wrote:
On 13 May 2014 17:15, Fabian Aggeler aggel...@ethz.ch wrote:
From: Svetlana Fedoseeva s.fedose...@samsung.com
Define Security Extensions CPU feature. Set that feature for relevant CPUs.
This is potentially tricky because it means that
Hi Sergey,
On 05/15/2014 05:45 AM, Sergey Fedorov wrote:
On 15.05.2014 13:28, Aggeler Fabian wrote:
Hi Greg
Thanks for your comments. I still have to work through them. I am using
OpenVirtualization in secure world, which then switches to a Linux kernel in
non-secure world to test the
On 04/17/2014 06:02 AM, Peter Maydell wrote:
On 2 April 2014 13:47, Peter Maydell peter.mayd...@linaro.org wrote:
On 2 April 2014 13:11, Peter Crosthwaite peter.crosthwa...@xilinx.com
wrote:
Like others, I have been carrying this change locally. Good to see it up!
Why are you all booting
On 04/16/2014 07:21 PM, Nicolas Pitre wrote:
On Wed, 16 Apr 2014, Christopher Covington wrote:
Thank you for the suggestion. This approach also came to mind, but it would
require new documentation and tooling in the JTAG scripts or simulator
equivalent. That's another aspect of the ELF-based
On 04/17/2014 03:48 PM, Nicolas Pitre wrote:
On Thu, 17 Apr 2014, Christopher Covington wrote:
On 04/16/2014 07:21 PM, Nicolas Pitre wrote:
On Wed, 16 Apr 2014, Christopher Covington wrote:
Thank you for the suggestion. This approach also came to mind, but it would
require new
On 04/15/2014 06:44 AM, Daniel Thompson wrote:
Hi Folks
I've just been rebasing some of my development branches against v3.15rc1
and observed some boot regressions due to TEXT_OFFSET changing from
0x8000 to 0x208000.
Now the boot regression turned out to be fault in the JTAG boot tools I
Hi Nicolas,
Thanks for your response.
On 04/16/2014 03:14 PM, Nicolas Pitre wrote:
On Wed, 16 Apr 2014, Christopher Covington wrote:
On 04/15/2014 06:44 AM, Daniel Thompson wrote:
Hi Folks
I've just been rebasing some of my development branches against v3.15rc1
and observed some boot
Hi Gerd,
On 04/10/2014 05:07 AM, Gerd Hoffmann wrote:
Signed-off-by: Gerd Hoffmann kra...@redhat.com
---
content.tex | 2 +
virtio-input.tex | 135
+++
2 files changed, 137 insertions(+)
create mode 100644 virtio-input.tex
[On 04/02/2014 08:47 AM, Peter Maydell wrote:
On 2 April 2014 13:11, Peter Crosthwaite peter.crosthwa...@xilinx.com wrote:
Like others, I have been carrying this change locally. Good to see it up!
Why are you all booting raw Images anyway (just out of curiosity)? All my
test cases boot
Hi Peter,
On 03/28/2014 12:09 PM, Peter Maydell wrote:
Suppress the ID_AA64DFR0_EL1 PMUVer field, even if the CPU specific
value claims that it exists. QEMU doesn't currently implement it,
and not advertising it prevents the guest from trying to use it
and getting UNDEFs on unimplemented
Hi Alex,
On 03/27/2014 07:44 AM, Alex Bennée wrote:
Christopher Covington c...@codeaurora.org writes:
Hi Alex,
snip
DEF(dfilter, HAS_ARG, QEMU_OPTION_DFILTER, \
-dfilter range,.. filter debug output to range of addresses (useful for
-d cpu,exec,etc..)\n,
QEMU_ARCH_ALL
Hi Alex,
Neat series.
On 03/26/2014 10:37 AM, alex.ben...@linaro.org wrote:
From: Alex Bennée alex.ben...@linaro.org
When debugging big programs or system emulation sometimes you want both
the verbosity of cpu,exec et all but don't want to generate lots of logs
for unneeded stuff. This
just been playing with my own version of this change. Glad to see it
going upstream.
Tested-by: Christopher Covington c...@codeaurora.org
Thanks,
Christopher
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by the Linux
On 02/06/2014 08:54 AM, Michael Matz wrote:
Hi,
On Thu, 6 Feb 2014, Peter Maydell wrote:
On 6 February 2014 13:45, Michael Matz m...@suse.de wrote:
Hmm, why aren't we simply using the binutils disassembler? It's also
(C) by ARM, so there shouldn't be any relicensing problems. And it
Hi Erik,
On 01/17/2014 01:33 AM, Erik de Castro Lopo wrote:
Hi all,
I'm currently working on implementing a missing part of a linux-user
syscall. This syscall includes a function pointer for a callback.
If one has a 64 bit user space emulation running on a 32 bit host,
how does one
On 12/16/2013 06:40 PM, Christoffer Dall wrote:
On Thu, Nov 28, 2013 at 01:33:22PM +, Peter Maydell wrote:
Add a config for aarch64-softmmu; this enables building of this target.
The resulting executable doesn't know about any 64 bit CPUs, but all
the 32 bit CPUs and board models work.
Hi Richard,
On 11/25/2013 04:50 PM, Richard Yao wrote:
I figured out the problem. There is zerocopy IO is being done via DMA to
a buffer allocated with valloc(). Right now, I am running a hack-fix
locally so I can get some other stuff done first. I will propose a
proper fix to the list in a
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