# 186.323 M/sec
> 8686 branch-misses#3.83% of all
> branches
>
>1.002492480 seconds time elapsed
>
>0.001752000 seconds user
>0.0 seconds sys
>
> As we can see, the cycle counter has been dis
e guest with virtio-iommu on a 64KB host.
However supporting 64kB guest on 64kB host with virtio-iommu and
VFIO looks a more important feature.
Signed-off-by: Eric Auger
---
hw/core/machine.c| 1 +
hw/virtio/virtio-iommu.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff
Introduce a new enum type property allowing to set an
IOMMU granule. Values are 4K, 8K, 16K, 64K and host.
This latter indicates the vIOMMU granule will match
the host page size.
A subsequent patch will add such a property to the
virtio-iommu device.
Signed-off-by: Eric Auger
---
v3 ->
- introduce a dedicated granule option to handle the compat
Eric Auger (3):
qdev: Add a granule_mode property
virtio-iommu: Add a granule property
virtio-iommu: Change the default granule to the host page size
include/hw/qdev-properties-system.h | 3 +++
include/hw/virtio/virtio-iom
This allows to choose which granule will be used by
default by the virtio-iommu. Current page size mask
default is qemu_target_page_mask so this translates
into a 4K granule.
Signed-off-by: Eric Auger
---
v3 -> v4:
- granule_mode introduction moved to that patch
---
include/hw/virtio/vir
>
> This limits the possibility of extending the SMMUv3 by inheritance and
> redefining the value of SMMU_IDR1.SIDSIZE because the check is hardcoded to
> the
> constant SMMU_IDR1_SIDSIZE rather than the register value.
>
> Signed-off-by: Roque Arcudia Hernandez
> Signed-o
Hi,
On 2/21/24 18:17, Nabih Estefan wrote:
> From: Roque Arcudia Hernandez
>
> According to the SMMU specification the StreamID construction and size is
> IMPLEMENTATION DEFINED, the size being between 0 and 32 bits.
>
> This patch creates virtual functions get_sid and get_iommu_mr to allow
> di
Hi Philippe,
On 2/23/24 08:52, Philippe Mathieu-Daudé wrote:
> Hi Eric,
>
> On 23/2/24 08:27, Eric Auger wrote:
>> Introduce a new enum type property allowing to set an
>> IOMMU granule. Values are 4K, 8K, 16K, 64K and host.
>> This latter indicates the vIOMMU granule
On 2/23/24 08:57, Philippe Mathieu-Daudé wrote:
> On 23/2/24 08:27, Eric Auger wrote:
>> This allows to choose which granule will be used by
>> default by the virtio-iommu. Current page size mask
>> default is qemu_target_page_mask so this translates
>> into a 4K g
On 2/23/24 09:08, Philippe Mathieu-Daudé wrote:
> Hi Eric,
>
> On 23/2/24 08:27, Eric Auger wrote:
>> We used to set the default granule to 4KB but with VFIO assignment
>> it makes more sense to use the actual host page size.
>>
>> Indeed when hotplugging a
alias for now, as it's tricky in
> using two different IOMMU MRs and Eric already sent a smarter fix.
For the series:
Reviewed-by: Eric Auger
Tested-by: Eric Auger
Thanks
Eric
>
>
> Thanks
> Zhenzhong
>
> Zhenzhong Duan (2):
> virtio_iommu: Clear IOMMUPciBus poin
Hi Jean-Philippe,
On 1/29/24 13:23, Jean-Philippe Brucker wrote:
> Hi Eric,
>
> On Tue, Jan 23, 2024 at 07:15:54PM +0100, Eric Auger wrote:
>> In [1] and [2] we attempted to fix a case where a VFIO-PCI device
>> protected with a virtio-iommu is assigned to an x86 guest. O
Hi Jean,
On 1/25/24 19:48, Jean-Philippe Brucker wrote:
> Hi,
>
> On Thu, Jan 18, 2024 at 10:43:55AM +0100, Eric Auger wrote:
>> Hi Zhenzhong,
>> On 1/18/24 08:10, Duan, Zhenzhong wrote:
>>> Hi Eric,
>>>
>>>> -Original Message-
Hi Jean,
On 1/29/24 18:42, Jean-Philippe Brucker wrote:
> On Mon, Jan 29, 2024 at 03:07:41PM +0100, Eric Auger wrote:
>> Hi Jean-Philippe,
>>
>> On 1/29/24 13:23, Jean-Philippe Brucker wrote:
>>> Hi Eric,
>>>
>>> On Tue, Jan 23, 2024 at 07:15:54PM
Hi Jean,
On 1/30/24 19:22, Jean-Philippe Brucker wrote:
> On Mon, Jan 29, 2024 at 05:38:55PM +0100, Eric Auger wrote:
>>> There may be a separate argument for clearing bypass. With a coldplugged
>>> VFIO device the flow is:
>>>
>>> 1. Map the whole guest
e use hw_compat_8_2 to handle the compatibility for machines
before 9.0 which used to have a virtio-iommu default input range
of 64 bits.
Of course if aw-bits is set from the command line, the default
is overriden.
Signed-off-by: Eric Auger
---
v1 -> v2:
- set aw-bits to 48b on ARM
- use hw_compa
aw-bits is a new option that allows to set the bit width of
the input address range. This value will be used as a default for
the device config input_range.end. By default it is set to 64 bits
which is the current value.
Signed-off-by: Eric Auger
---
v1 -> v2:
- Check the aw-bits value
Use %u format to trace domain_range limits.
Signed-off-by: Eric Auger
---
hw/virtio/trace-events | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
index 77905d1994..2350849fbd 100644
--- a/hw/virtio/trace-events
+++ b/hw/virtio
_mask
https://lore.kernel.org/all/20240117132039.332273-1-eric.au...@redhat.com/
History:
v1 -> v2
- Limit aw to 48b on ARM
- Check aw is within [32,64]
- Use hw_compat_8_2
Eric Auger (3):
virtio-iommu: Add an option to define the input range width
virtio-iommu: Trace domain range limits as
Hi Zhenzhong,
On 2/2/24 07:51, Duan, Zhenzhong wrote:
> Hi Eric,
>
>> -Original Message-----
>> From: Eric Auger
>> pc_q35_9.0 and arm virt
>>
>> Currently the default input range can extend to 64 bits. On x86,
>> when the virtio-iommu protects vfio
Hi,
On 2/2/24 11:51, Peter Maydell wrote:
> On Thu, 1 Feb 2024 at 23:50, Peter Xu wrote:
>> Fabiano, I think you forgot to reply-to-all.. adding back the list and
>> people in the loop.
>>
>> On Thu, Feb 01, 2024 at 10:12:44AM -0300, Fabiano Rosas wrote:
>>> Peter Xu writes:
>>>
On Wed, Jan
Hi Jean,
On 2/5/24 11:13, Jean-Philippe Brucker wrote:
> Hi Eric,
>
> On Thu, Feb 01, 2024 at 05:32:22PM +0100, Eric Auger wrote:
>> aw-bits is a new option that allows to set the bit width of
>> the input address range. This value will be used as a default for
On 2/5/24 10:33, Cédric Le Goater wrote:
> On 2/1/24 17:32, Eric Auger wrote:
>> Currently the default input range can extend to 64 bits. On x86,
>> when the virtio-iommu protects vfio devices, the physical iommu
>> may support only 39 bits. Let's set the default to 39
Hi Jean,
On 2/5/24 11:13, Jean-Philippe Brucker wrote:
> Hi Eric,
>
> On Thu, Feb 01, 2024 at 05:32:22PM +0100, Eric Auger wrote:
>> aw-bits is a new option that allows to set the bit width of
>> the input address range. This value will be used as a default for
Use %u format to trace domain_range limits.
Signed-off-by: Eric Auger
Reviewed-by: Zhenzhong Duan
Reviewed-by: Cédric Le Goater
---
hw/virtio/trace-events | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events
index 77905d1994
aw-bits is a new option that allows to set the bit width of
the input address range. This value will be used as a default for
the device config input_range.end. By default it is set to 64 bits
which is the current value.
Signed-off-by: Eric Auger
Reviewed-by: Zhenzhong Duan
Reviewed-by: Cédric
ject_property_get_uint() call (Cédric)
- use VTD_HOST_AW_39BIT (Cédric)
v1 -> v2
- Limit aw to 48b on ARM
- Check aw is within [32,64]
- Use hw_compat_8_2
Eric Auger (3):
virtio-iommu: Add an option to define the input range width
virtio-iommu: Trace domain range limits as unsigned int
hw:
e use hw_compat_8_2 to handle the compatibility for machines
before 9.0 which used to have a virtio-iommu default input range
of 64 bits.
Of course if aw-bits is set from the command line, the default
is overriden.
Signed-off-by: Eric Auger
Reviewed-by: Zhenzhong Duan
Tested-by: Yanghang Liu
---
v2
Hi Jean,
On 2/8/24 15:42, Jean-Philippe Brucker wrote:
> On Thu, Feb 08, 2024 at 11:10:16AM +0100, Eric Auger wrote:
>> In [1] and [2] we attempted to fix a case where a VFIO-PCI device
>> protected with a virtio-iommu is assigned to an x86 guest. On x86
>> the physical IOMM
Hi Miguel,
On 2/27/23 17:37, Miguel Luis wrote:
> This series adds ARMv8.3/8.4 nested virtualization support in KVM mode.
>
> To enable nested virtualization for a guest, the host must expose EL2
> support via QEMU command line switches:
>
> -machine virt,accel=kvm,virtualization=on
>
> Ins
Hi Miguel,
On 2/8/24 18:33, Miguel Luis wrote:
> Hi Eric,
>
>> On 8 Feb 2024, at 15:55, Eric Auger wrote:
>>
>> Hi Miguel,
>>
>> On 2/27/23 17:37, Miguel Luis wrote:
>>> This series adds ARMv8.3/8.4 nested virtualization support in KVM mode.
>&g
From: Haibo Xu
Allow virt arm machine to set the intid for the KVM GIC maintenance
interrupt.
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
Signed-off-by: Eric Auger
---
v1 -> v2:
- [Miguel] replaced the has_virt_extensions by the maintenance irq
intid property. [Eric] resto
igned-off-by: Eric Auger
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
---
linux-headers/asm-arm64/kvm.h | 1 +
linux-headers/linux/kvm.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h
index c59ea55cd8..d46839f1d9 1
From: Haibo Xu
Up to now virt support on guest has been only supported with TCG.
Now it becomes feasible to use it with KVM acceleration.
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
Signed-off-by: Eric Auger
---
v1 -> v2:
- fixed test ordering: virt && ((kvm &&am
From: Haibo Xu
Introduce query support for KVM_CAP_ARM_EL2.
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
Signed-off-by: Eric Auger
Reviewed-by: Richard Henderson
---
target/arm/kvm.c | 5 +
target/arm/kvm_arm.h | 12
2 files changed, 17 insertions(+)
diff --git
From: Haibo Xu
KVM_CAP_ARM_EL2 must be supported by the cpu to enable ARM_FEATURE_EL2.
In case the host does support NV, expose the feature.
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
Signed-off-by: Eric Auger
---
v1 -> v2:
- remove isar_feature_aa64_aa32_el2 modif in target/
This series adds ARM Nested Virtualization support in KVM mode.
This is a respin of previous contributions from Miguel [1] and Haibo [2].
This was tested with Marc's v11 [3] on Ampere HW with fedora L1 guest and
L2 guests booted without EDK2. However it does not work yet with
EDK2 but it looks unr
Hi Peter,
On 2/9/24 19:57, Peter Maydell wrote:
> On Fri, 9 Feb 2024 at 16:00, Eric Auger wrote:
>> This series adds ARM Nested Virtualization support in KVM mode.
>> This is a respin of previous contributions from Miguel [1] and Haibo [2].
>>
>> This was tested with
Hi Michael,
On 2/13/24 10:43, Michael S. Tsirkin wrote:
> On Wed, Jan 17, 2024 at 02:20:39PM +0100, Eric Auger wrote:
>> We used to set default page_size_mask to qemu_target_page_mask() but
>> with VFIO assignment it makes more sense to use the actual host page mask
>> inste
Hi Michael,
On 2/13/24 11:35, Michael S. Tsirkin wrote:
> On Thu, Feb 08, 2024 at 11:10:16AM +0100, Eric Auger wrote:
>> In [1] and [2] we attempted to fix a case where a VFIO-PCI device
>> protected with a virtio-iommu is assigned to an x86 guest. On x86
>> the physical IOMM
On 2/13/24 12:07, Michael S. Tsirkin wrote:
> On Tue, Feb 13, 2024 at 11:32:13AM +0100, Eric Auger wrote:
>> Hi Michael,
>>
>> On 2/13/24 10:43, Michael S. Tsirkin wrote:
>>> On Wed, Jan 17, 2024 at 02:20:39PM +0100, Eric Auger wrote:
>>>>
Hi Michael,
On 2/13/24 12:09, Michael S. Tsirkin wrote:
> On Tue, Feb 13, 2024 at 11:32:13AM +0100, Eric Auger wrote:
>> Do you have an other concern?
> I also worry a bit about migrating between hosts with different
> page sizes. Not with kvm I am guessing but with tcg it does
On 2/13/24 12:39, Michael S. Tsirkin wrote:
> On Tue, Feb 13, 2024 at 12:19:16PM +0100, Eric Auger wrote:
>>
>> On 2/13/24 12:07, Michael S. Tsirkin wrote:
>>> On Tue, Feb 13, 2024 at 11:32:13AM +0100, Eric Auger wrote:
>>>> Hi Michael,
>>>>
Hi Peter,
On 3/5/24 17:46, Peter Maydell wrote:
> On Fri, 9 Feb 2024 at 16:00, Eric Auger wrote:
>> From: Haibo Xu
>>
>> Allow virt arm machine to set the intid for the KVM GIC maintenance
>> interrupt.
>>
>> Signed-off-by: Haibo Xu
>> Signed-off-
Hi Peter,
On 3/5/24 17:49, Peter Maydell wrote:
> On Fri, 9 Feb 2024 at 16:00, Eric Auger wrote:
>> From: Haibo Xu
>>
>> KVM_CAP_ARM_EL2 must be supported by the cpu to enable ARM_FEATURE_EL2.
>> In case the host does support NV, expose the feature.
>>
>>
Hi Peter,
On 3/5/24 17:57, Peter Maydell wrote:
> On Fri, 9 Feb 2024 at 16:00, Eric Auger wrote:
>> This series adds ARM Nested Virtualization support in KVM mode.
>> This is a respin of previous contributions from Miguel [1] and Haibo [2].
>>
>> This was tested with
Hi Peter,
On 3/5/24 17:46, Peter Maydell wrote:
> On Fri, 9 Feb 2024 at 16:00, Eric Auger wrote:
>> From: Haibo Xu
>>
>> Allow virt arm machine to set the intid for the KVM GIC maintenance
>> interrupt.
>>
>> Signed-off-by: Haibo Xu
>> Signed-off-
16_t vmid);
> ^
> static
> hw/arm/smmu-common.c:139:17: note: 'smmu_hash_remove_by_vmid' declared here
> static gboolean smmu_hash_remove_by_vmid(gpointer key, gpointer value,
> ^
>
> Fixes: ccc3ee3871 ("hw/arm/smmuv3: Add CMDs related to stage-2")
&
This series adds ARM Nested Virtualization support in KVM mode.
This is a respin of previous contributions from Miguel [1] and Haibo [2].
This was tested with Marc's v11 [3] on Ampere HW with fedora L1 guest and
L2 guests booted without EDK2. However it does not work yet with
EDK2 but it looks unr
From: Haibo Xu
KVM_CAP_ARM_EL2 must be supported by the cpu to enable ARM_FEATURE_EL2.
In case the host does support NV, expose the feature.
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
Signed-off-by: Eric Auger
---
v2 -> v3:
- check pmu->has_el2 on kvm_arch_init_vcpu() when s
c1-sr-enforcement
Signed-off-by: Eric Auger
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
---
linux-headers/asm-arm64/kvm.h | 1 +
linux-headers/linux/kvm.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h
index c59ea55cd8..d4683
From: Haibo Xu
Up to now virt support on guest has been only supported with TCG.
Now it becomes feasible to use it with KVM acceleration.
Also check only in-kernel GICv3 is used along with KVM EL2.
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
Signed-off-by: Eric Auger
---
v2 ->
-off-by: Haibo Xu
Signed-off-by: Miguel Luis
Signed-off-by: Eric Auger
---
v2 -> v3:
- tweak the commit message and explain why we do not proceed
the same way as kvm_arm_pmu_set_irq (Peter)
v1 -> v2:
- [Miguel] replaced the has_virt_extensions by the maintenance irq
intid property.
From: Haibo Xu
Introduce query support for KVM_CAP_ARM_EL2.
Signed-off-by: Haibo Xu
Signed-off-by: Miguel Luis
Signed-off-by: Eric Auger
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
---
target/arm/kvm.c | 5 +
target/arm/kvm_arm.h | 12
2 files
s is useful for:
> - Doing tricks with bit masks, where BIT(0) is stage-1 and BIT(1) is
>stage-2 and both is nested.
> - Tracing, as stage is printed as int.
>
> Signed-off-by: Mostafa Saleh
Reviewed-by: Eric Auger
Eric
> ---
> hw/arm/smmu-common.c |
ass(const char *n, uint16_t sid, uint64_t addr, bool
> is_write) "%s sid=0x%x STE bypass iova:0x%"PRIx64" is_write=%d"
> smmuv3_translate_abort(const char *n, uint16_t sid, uint64_t addr, bool
> is_write) "%s sid=0x%x abort on iova:0x%"PRIx64" is_w
Hi Mostafa,
On 3/25/24 11:13, Mostafa Saleh wrote:
> TLBs for nesting will be extended to be combined, a new index is added
> "stage", with 2 valid values:
> - SMMU_STAGE_1: Meaning this translates VA to PADDR, this entry can
>be cached from fully nested configuration or from stage-1 only.
>
Hi Mostafa,
On 4/2/24 20:47, Mostafa Saleh wrote:
> Hi Eric,
>
> On Tue, Apr 02, 2024 at 07:15:20PM +0200, Eric Auger wrote:
>> Hi Mostafa,
>>
>> On 3/25/24 11:13, Mostafa Saleh wrote:
>>> TLBs for nesting will be extended to be combined, a new index is ad
On 3/7/24 13:06, Cédric Le Goater wrote:
> On 3/7/24 09:09, Eric Auger wrote:
>> Hi Cédric,
>>
>> On 3/6/24 14:34, Cédric Le Goater wrote:
>>> We will use the Error object to improve error reporting in the
>>> .log_global*() handlers of VFIO. Add documen
On 3/7/24 14:55, Cédric Le Goater wrote:
> On 3/7/24 10:13, Eric Auger wrote:
>>
>>
>> On 3/6/24 14:34, Cédric Le Goater wrote:
>>> Use vmstate_save_state_with_err() to improve error reporting in the
>>> callers and store a reported error under the migrat
On 3/7/24 14:36, Cédric Le Goater wrote:
> On 3/7/24 10:28, Eric Auger wrote:
>>
>>
>> On 3/6/24 14:34, Cédric Le Goater wrote:
>>> vfio_save_complete_precopy() currently returns before doing the trace
>>> event. Change that.
>>>
>>&g
ed [1].
>
> The iommufd_backend_set_fd() passes @errp to error_prepend(), to avoid
> the above issue, add missing ERRP_GUARD() at the beginning of this
> function.
>
> [1]: Issue description in the commit message of commit ae7c80a7bd73
> ("error: New macro ERRP
On 3/13/24 22:06, Cédric Le Goater wrote:
> Make sure variable contents is freed if scanf fails.
>
> Cc: Eric Auger
> Cc: Yi Liu
> Cc: Zhenzhong Duan
> Fixes: CID 1540007
> Fixes: 5ee3dc7af785 ("vfio/iommufd: Implement the iommufd backend")
> Signed-off
Hi Michael,
On 3/13/24 12:17, Michael S. Tsirkin wrote:
> On Wed, Mar 13, 2024 at 07:54:11AM +, Duan, Zhenzhong wrote:
>>
>>> -Original Message-
>>> From: Michael S. Tsirkin
>>> Subject: Re: [PATCH v1 3/6] intel_iommu: Add a framework to check and
>>> sync host IOMMU cap/ecap
>>>
>>>
On 2/28/24 04:58, Zhenzhong Duan wrote:
> This handle points to either IOMMULegacyDevice or IOMMUFDDevice variant,
> neither both.
I would reword into:
store an handle to the HostIOMMUDevice the VFIODevice is associated with
. Its actual nature depends on the backend in use (VFIO or IOMMUFD).
T
Hi ZHenzhong,
On 2/28/24 04:58, Zhenzhong Duan wrote:
> Introduce host_iommu_device_create callback and a wrapper for it.
>
> This callback is used to allocate a host iommu device instance and
> initialize it based on type.
>
> Signed-off-by: Zhenzhong Duan
> ---
> include/hw/vfio/vfio-common.h
Eric
>
> Introduce a helper function host_iommu_base_device_init to initialize it.
>
> Suggested-by: Eric Auger
> Signed-off-by: Zhenzhong Duan
> ---
> include/sysemu/host_iommu_device.h | 22 ++
> 1 file changed, 22 insertions(+)
> create mode 100644 i
On 3/18/24 14:52, Eric Auger wrote:
> Hi ZHenzhong,
>
> On 2/28/24 04:58, Zhenzhong Duan wrote:
>> Introduce host_iommu_device_create callback and a wrapper for it.
>>
>> This callback is used to allocate a host iommu device instance and
>> initialize it b
On 2/28/24 04:58, Zhenzhong Duan wrote:
> Signed-off-by: Zhenzhong Duan
> ---
> hw/vfio/pci.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
> index 4fa387f043..6cc7de5d10 100644
> --- a/hw/vfio/pci.c
> +++ b/hw/vfio/pci.c
> @@ -3006,6 +3006,9 @@ sta
On 2/28/24 04:58, Zhenzhong Duan wrote:
> Introduce host_iommu_device_create callback and a wrapper for it.
>
> This callback is used to allocate a host iommu device instance and
> initialize it based on type.
>
> Signed-off-by: Zhenzhong Duan
> ---
> include/hw/vfio/vfio-common.h | 1
Hi Zhenzhong,
On 2/28/24 04:58, Zhenzhong Duan wrote:
> From: Yi Liu
>
> This adds pci_device_set/unset_iommu_device() to set/unset
> HostIOMMUDevice for a given PCIe device. Caller of set
> should fail if set operation fails.
>
> Extract out pci_device_get_iommu_bus_devfn() to facilitate
> imple
Hi Zhenzhong,
On 2/28/24 04:59, Zhenzhong Duan wrote:
> Introduce a helper function iommufd_device_get_info() to get
> host IOMMU related information through iommufd uAPI.
Looks strange to have this patch in this series. I Would rather put it
in your second series alongs with its user.
Eric
>
> S
On 2/28/24 04:58, Zhenzhong Duan wrote:
> Hi,
>
> Based on Joao's suggestion, the iommufd nesting prerequisite series [1]
> is further splitted to host IOMMU device abstract part and vIOMMU
> check/sync part. This series implements the 1st part.
>
> This split also faciliates the dirty tracking
Hi Joao,
On 3/18/24 16:09, Joao Martins wrote:
> On 18/03/2024 07:54, Eric Auger wrote:
>> Hi Zhenzhong,
>>
>> On 2/28/24 04:59, Zhenzhong Duan wrote:
>>> Introduce a helper function iommufd_device_get_info() to get
>>> host IOMMU related information through
Hi Zhenzhong,
On 3/19/24 06:44, Duan, Zhenzhong wrote:
>
>> -Original Message-
>> From: Eric Auger
>> Subject: Re: [PATCH v1 05/11] vfio: Introduce host_iommu_device_create
>> callback
>>
>>
>>
>> On 2/28/24 04:58, Zhenzhong Duan wrote:
On 3/19/24 04:46, Duan, Zhenzhong wrote:
>
>> -Original Message-
>> From: Eric Auger
>> Subject: Re: [PATCH v1 08/11] vfio/pci: Allocate and initialize
>> HostIOMMUDevice after attachment
>>
>>
>>
>> On 2/28/24 04:58, Zhen
Hi Peter,
On 2/29/24 12:00, Peter Maydell wrote:
> On Thu, 29 Feb 2024 at 02:32, Shaoqin Huang wrote:
>>
>> Hi Peter,
>>
>> On 2/22/24 22:28, Peter Maydell wrote:
>>> On Wed, 21 Feb 2024 at 06:34, Shaoqin Huang wrote:
The KVM_ARM_VCPU_PMU_V3_FILTER provides the ability to let the VMM d
Hi Shaoqin,
On 3/12/24 08:48, Shaoqin Huang wrote:
> The KVM_ARM_VCPU_PMU_V3_FILTER provides the ability to let the VMM decide
> which PMU events are provided to the guest. Add a new option
> `kvm-pmu-filter` as -cpu sub-option to set the PMU Event Filtering.
> Without the filter, all PMU events a
Hi Daniel,
On 3/19/24 16:22, Daniel P. Berrangé wrote:
> On Wed, Feb 21, 2024 at 01:34:31AM -0500, Shaoqin Huang wrote:
>> The KVM_ARM_VCPU_PMU_V3_FILTER provides the ability to let the VMM decide
>> which PMU events are provided to the guest. Add a new option
>> `kvm-pmu-filter` as -cpu sub-optio
Hi,
On 3/19/24 19:07, Daniel P. Berrangé wrote:
> On Tue, Mar 19, 2024 at 06:58:33PM +0100, Eric Auger wrote:
>> Hi Daniel,
>>
>> On 3/19/24 16:22, Daniel P. Berrangé wrote:
>>> On Wed, Feb 21, 2024 at 01:34:31AM -0500, Shaoqin Huang wrote:
>>>> The KVM_A
d with ASID=-1 meaning stage-2.
> Represent ASID/VMID everywhere as int.
small conflict due to
0b796f3810 hw/arm/smmu: Avoid using inlined functions with external
linkage again
Besides
Reviewed-by: Eric Auger
Eric
>
> Signed-off-by: Mostafa Saleh
> ---
> hw/arm/smmu-common
Hi Mostafa,
On 4/8/24 16:08, Mostafa Saleh wrote:
> According to the user manual (ARM IHI 0070 F.b),
s/user manual/ARM SMMU architecture specification
> In "5.2 Stream Table Entry":
> [51:6] S1ContextPtr
> If Config[1] == 1 (stage 2 enabled), this pointer is an IPA translated by
> stage 2 and t
Hi Mostafa,
On 4/8/24 16:08, Mostafa Saleh wrote:
> When nested translation is requested, do the following:
>
> - Translate stage-1 IPA using stage-2 to a physical address.
> - Translate stage-1 PTW walks using stage-2.
> - Combine both to create a single TLB entry, for that we choose
> the smal
=%d leaf=%d stage=%d"
> smmuv3_cmdq_tlbi_nh(void) ""
> smmuv3_cmdq_tlbi_nh_asid(uint16_t asid) "asid=%d"
> smmuv3_cmdq_tlbi_s12_vmid(uint16_t vmid) "vmid=%d"
> diff --git a/include/hw/arm/smmu-common.h b/include/hw/arm/smmu-common.h
> index 03ff0f02ba..df166d8477 100644
> --- a/include/hw/arm/smmu-common.h
> +++ b/include/hw/arm/smmu-common.h
> @@ -230,7 +230,8 @@ void smmu_iotlb_inv_asid(SMMUState *s, int asid);
> void smmu_iotlb_inv_vmid(SMMUState *s, int vmid);
> void smmu_iotlb_inv_iova(SMMUState *s, int asid, int vmid, dma_addr_t iova,
> uint8_t tg, uint64_t num_pages, uint8_t ttl);
> -
> +void smmu_iotlb_inv_ipa(SMMUState *s, int vmid, dma_addr_t ipa, uint8_t tg,
> +uint64_t num_pages, uint8_t ttl);
> /* Unmap the range of all the notifiers registered to any IOMMU mr */
> void smmu_inv_notifiers_all(SMMUState *s);
Besides looks good to me
smmu_hash_remove_by_vmid_ipa
Reviewed-by: Eric Auger
Eric
>
Hi Mostafa,
On 4/8/24 16:08, Mostafa Saleh wrote:
> Some commands need rework for nesting, as they used to assume S1
> and S2 are mutually exclusive:
>
> - CMD_TLBI_NH_ASID: Consider VMID if stage-2 is supported
> - CMD_TLBI_NH_ALL: Consider VMID if stage-2 is supported, otherwise
> invalidate e
Hi Mostafa,
On 4/8/24 16:08, Mostafa Saleh wrote:
> Currently, QEMU supports emulating either stage-1 or stage-2 SMMUs
> but not nested instances.
> This patch series adds support for nested translation in SMMUv3,
> this is controlled by property “arm-smmuv3.stage=nested”, and
> advertised to gues
with VFIO (the device will not work properly)
but this shouldn't prevent the guest from booting.
Best Regards
Eric
Eric Auger (2):
hw/arm/smmuv3: Remove spurious error messages on IOVA invalidations
hw/arm/smmuv3: Implement dummy replay
hw/arm/smmuv3-internal.h | 1 +
hw/arm/smm
lement a void replay() which satisfies both cases.
Signed-off-by: Eric Auger
---
hw/arm/smmuv3.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index e2f07d2864..1f578365ef 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -1489,6 +14
tells whether
the detction of an invalid STE msut lead to an error report.
invalid_ste_allowed is set before doing the invalidations and
kept unset on actual translation.
Signed-off-by: Eric Auger
---
I also experimented to pass Error handles to all the subfunctions
and handle the Error at top
The code used to assign an interrupt index/subindex to an
eventfd is duplicated many times. Let's introduce an helper that
allows to set/unset the signaling for an ACTION_TRIGGER,
ACTION_MASK or ACTION_UNMASK action.
Signed-off-by: Eric Auger
---
v2 -> v3:
- irq_to_str() simply outputs
The code used to assign an interrupt index/subindex to an
eventfd is duplicated many times. Let's introduce an helper that
allows to set/unset the signaling for an ACTION_TRIGGER,
ACTION_MASK or ACTION_UNMASK action.
Signed-off-by: Eric Auger
---
v3 -> v4:
- renamed irq_to_
ioctl failure.
Signed-off-by: Eric Auger
---
v4 -> v5:
- output errno instead of ioctl returned value. Issue
reported by Li
- vfio_set_irq_signaling now returns -errno in case
of failure
- update the commit message
v3 -> v4:
- renamed irq_to_str into index_to_str
- avoid usage of g_st
ember.
Best regards
Eric
https://github.com/eauger/qemu/tree/nvdimms_state_v3
Eric Auger (2):
nvdimm: Rename AcpiNVDIMMState into NVDIMMState
machine: Move nvdimms state into struct MachineState
hw/acpi/nvdimm.c| 18 ++--
hw/core/machine.c
They become guarded by a nvdimm_supported machine class member.
We also add a description for those options.
Signed-off-by: Eric Auger
Suggested-by: Igor Mammedov
---
v2 -> v3
- nvdimms_state becomes a pointer
- add machine class nvdimm_supported
v1 -> v2:
- s/acpi_nvdimm_state/nv
As we intend to migrate the acpi_nvdimm_state into
the base machine with a new dimms_state name, let's
also rename the datatype.
Signed-off-by: Eric Auger
Suggested-by: Igor Mammedov
---
hw/acpi/nvdimm.c| 18 +-
hw/i386/pc.c| 2 +-
include/hw/i386
ember.
Best regards
Eric
https://github.com/eauger/qemu/tree/nvdimms_state_v4
Eric Auger (2):
nvdimm: Rename AcpiNVDIMMState into NVDIMMState
machine: Move nvdimms state into struct MachineState
hw/acpi/nvdimm.c| 18 ++--
hw/core/machine.c
As we intend to migrate the acpi_nvdimm_state into
the base machine with a new dimms_state name, let's
also rename the datatype.
Signed-off-by: Eric Auger
Suggested-by: Igor Mammedov
Reviewed-by: Philippe Mathieu-Daudé
---
hw/acpi/nvdimm.c| 18 +-
hw/i386
They become guarded by a nvdimm_supported machine class member.
We also add a description for those options.
Signed-off-by: Eric Auger
Suggested-by: Igor Mammedov
---
v3 -> v4:
- s/object_class_property_*/object_property_*
v2 -> v3
- nvdimms_state becomes a pointer
- add ma
The GSIV numbers of the SPI based interrupts is not correct as
ARM_SPI_BASE was not added to the irqmap[VIRT_SMMU] value. So
this may collide with VIRTIO_MMIO irq window.
Signed-off-by: Eric Auger
---
hw/arm/virt-acpi-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
Support QLIST migration using the same principle as QTAILQ:
94869d5c52 ("migration: migrate QTAILQ").
The VMSTATE_QLIST_V macro has the same proto as VMSTATE_QTAILQ_V.
The change mainly resides in QLIST_RAW_INSERT_TAIL implementation.
Tests also are provided.
Signed-off-by: Eric Auger
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