On 2024-02-16 12:03, Philippe Mathieu-Daudé wrote:
When the QOM parent is available, prefer object_initialize_child()
over object_initialize(), since it create the parent relationship.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Francisco Iglesias
---
hw/net/can/xlnx-versal
On [2023 Dec 05] Tue 15:22:25, Sai Pavan Boddu wrote:
> Add Micro 2Gb OSPI flash part with sfdp data.
>
> Signed-off-by: Sai Pavan Boddu
Reviewed-by: Francisco Iglesias
> ---
> hw/block/m25p80_sfdp.h | 1 +
> hw/block/m25p80.c | 3 +++
> hw/blo
On [2023 Dec 05] Tue 15:22:26, Sai Pavan Boddu wrote:
> This property allows users to change flash model on command line as
> below.
>
>ex: "-M xlnx-versal-virt,ospi-flash=mt35xu02gbba"
>
> Signed-off-by: Sai Pavan Boddu
Reviewed-by: Francisco Iglesias
> -
> the memory region.
>
> Signed-off-by: Sai Pavan Boddu
Reviewed-by: Francisco Iglesias
Tested-by: Francisco Iglesias
> ---
> hw/ssi/xlnx-versal-ospi.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/hw/ssi/xlnx-versal-ospi.c b/hw/ssi/xlnx-versal-ospi.c
>
to the SIZE register, so remove the LOG_GUEST_ERROR in that case.
While at it remove the comment marking the SIZE register as write-only.
See:
https://docs.xilinx.com/r/en-US/ug1087-zynq-ultrascale-registers/CSUDMA_SRC_SIZE-CSUDMA-Register
Signed-off-by: Frederic Konrad
Reviewed-by: Francisco Iglesias
On 2023-11-24 15:35, Frederic Konrad wrote:
It seems that the url changed a bit, and it triggers an error. Fix the URLs so
the documentation can be reached again.
Signed-off-by: Frederic Konrad
Reviewed-by: Francisco Iglesias
---
hw/dma/xlnx_csu_dma.c | 2
bytes for zynqmp-qspips) thus it is possible to write
out of s->regs[addr] in xilinx_spips_write for spips and qspips.
This fixes that wrong behavior.
Reviewed-by: Luc Michel
Signed-off-by: Frederic Konrad
Reviewed-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c
https://gitlab.com/qemu-project/qemu/-/issues/1427
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Francisco Iglesias
> ---
> hw/net/can/xlnx-zynqmp-can.c | 17 +
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/hw/net/can/xlnx-zynqmp-can.c b
g Liu
> Fixes: 98e5d7a2b7 ("hw/net/can: Introduce Xilinx ZynqMP CAN controller")
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1425
> Signed-off-by: Philippe Mathieu-Daudé
> Francisco Iglesias
-above line
+below line
Reviewed-by: Francisco Iglesias
> ---
&
Hi Philippe,
On 2023-11-16 16:44, Philippe Mathieu-Daudé wrote:
Hi Francisco,
On 16/11/23 15:17, Francisco Iglesias wrote:
Hi Philippe, good catch!
Well this was fuzzed by Qiang Liu.
On 2023-11-15 16:17, Philippe Mathieu-Daudé wrote:
Per
https://docs.xilinx.com/r/en-US/ug1085-zynq
modification:
Reviewed-by: Francisco Iglesias
Best regards,
Francisco
+bool is_txhpb = fifo == >txhpb_fifo;
+
+assert(used > 0);
+used %= CAN_FRAME_SIZE;
+
+/*
+ * Frame Message Format
+ *
+ * Each frame includes four words (16 bytes). Software must read and write
+
mmit e178113ff64 did.
Reported-by: Thomas Huth
Signed-off-by: Markus Armbruster
Reviewed-by: Francisco Iglesias
---
docs/system/arm/xlnx-versal-virt.rst | 2 +-
include/hw/misc/xlnx-versal-cframe-reg.h | 2 +-
include/hw/misc/xlnx-versal-cfu.h| 6 +++---
include/hw/misc/xlnx-ver
On 2023-11-13 14:43, Markus Armbruster wrote:
Fixes: b65b4b7ae3c8 (xlnx-bbram: hw/nvram: Use dot in device type name)
Signed-off-by: Markus Armbruster
Reviewed-by: Francisco Iglesias
---
docs/system/arm/xlnx-versal-virt.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
On [2023 Oct 02] Mon 22:21:39, Tong Ho wrote:
> This replaces the comma (,) to dot (.) in the device type name
> so the name can be used with the 'driver=' command line option.
>
> Signed-off-by: Tong Ho
Reviewed-by: Francisco Iglesias
> ---
> include/hw/nvram/xlnx-bbram.
On [2023 Oct 03] Tue 22:57:13, Tong Ho wrote:
> This change implements the ResettableClass interface for the device.
>
> Signed-off-by: Tong Ho
Reviewed-by: Francisco Iglesias
> ---
> hw/nvram/xlnx-zynqmp-efuse.c | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(
On [2023 Oct 03] Tue 22:53:39, Tong Ho wrote:
> This change implements the ResettableClass interface for the device.
>
> Signed-off-by: Tong Ho
Reviewed-by: Francisco Iglesias
> ---
> hw/nvram/xlnx-versal-efuse-ctrl.c | 8 +---
> 1 file changed, 5 insertions(+), 3 dele
nd is not intended for use cases when
> cryptograpically strong TRNG is needed.
>
> Signed-off-by: Tong Ho
Reviewed-by: Francisco Iglesias
> ---
> hw/arm/Kconfig | 1 +
> hw/arm/xlnx-versal.c | 16
> include/hw/arm/xlnx-versal.h | 5
On [2023 Oct 04] Wed 07:27:46, Tong Ho wrote:
> Signed-off-by: Tong Ho
Reviewed-by: Francisco Iglesias
> ---
> tests/qtest/meson.build | 2 +-
> tests/qtest/xlnx-versal-trng-test.c | 490
> 2 files changed, 491 insertions(+), 1 deleti
trng_load(R_TRNG_PER_STRNG_0, NULL);
> +trng_reseed(prng_seed);
> +
> +trng_generate(true);
> +n = trng_collect(rng, cnt);
> +g_assert_cmpuint(n, ==, cnt);
> +
> +if (memcmp(rng, prng, sizeof(rng))) {
> +FAILED("Failed: PER_DISABLE != PE
On [2023 Sep 05] Tue 16:56:51, Philippe Mathieu-Daudé wrote:
> Simplify gicv3_class_name() logic. No functional change intended.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Francisco Iglesias
> ---
> hw/intc/arm_gicv3_common.c | 9 -
> 1 file changed,
Connect the Configuration Frame Unit (CFU_APB, CFU_FDRO and CFU_SFR) to
the Versal machine.
Signed-off-by: Francisco Iglesias
Acked-by: Edgar E. Iglesias
Reviewed-by: Peter Maydell
---
hw/arm/xlnx-versal.c | 42
include/hw/arm/xlnx-versal.h | 16
Introduce a model of Xilinx Versal's Configuration Frame Unit's Single
Frame Read port (CFU_SFR).
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/misc/xlnx-versal-cfu.c | 87 +++
include/hw/misc/xlnx-versal-cfu.h | 15 ++
2 files
Introduce a model of the software programming interface (CFU_APB) of
Xilinx Versal's Configuration Frame Unit.
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
MAINTAINERS | 2 +
hw/misc/meson.build | 1 +
hw/misc/xlnx-versal-cfu.c
Introduce a model of Xilinx Versal's Configuration Frame broadcast
controller (CFRAME_BCAST_REG).
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/misc/xlnx-versal-cframe-reg.c | 161 +++
include/hw/misc/xlnx-versal-cframe-reg.h | 17 +++
2 files
Introduce a model of Xilinx Versal's Configuration Frame controller
(CFRAME_REG).
Signed-off-by: Francisco Iglesias
---
MAINTAINERS | 2 +
hw/misc/meson.build | 1 +
hw/misc/xlnx-versal-cframe-reg.c | 697
Connect the Configuration Frame controller (CFRAME_REG) and the
Configuration Frame broadcast controller (CFRAME_BCAST_REG) to the
Versal machine.
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/arm/xlnx-versal.c | 113 ++-
include/hw
Introduce a model of Xilinx Versal's Configuration Frame Unit's data out
port (CFU_FDRO).
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/misc/xlnx-versal-cfu.c | 96 +++
include/hw/misc/xlnx-versal-cfu.h | 12
2 files changed, 108
emulating bitstream programming and readback).
Signed-off-by: Francisco Iglesias
Reviewed-by: Sai Pavan Boddu
Acked-by: Edgar E. Iglesias
---
MAINTAINERS | 6
hw/misc/meson.build | 1 +
hw/misc/xlnx-cfi-if.c | 34
include/hw/misc/xlnx
with connecting the models to Xilinx Versal
machine.
Best regards,
Francisco Iglesias
References:
[1] https://docs.xilinx.com/r/en-US/am011-versal-acap-trm/PSM-Local-Registers
Changelog:
v4->v5:
* Identical to v4 (resend of v4 due to an smtp problem)
v3->v4:
[PATCH 5]
* Swap to p
Introduce a model of Xilinx Versal's Configuration Frame broadcast
controller (CFRAME_BCAST_REG).
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/misc/xlnx-versal-cframe-reg.c | 161 +++
include/hw/misc/xlnx-versal-cframe-reg.h | 17 +++
2 files
Connect the Configuration Frame controller (CFRAME_REG) and the
Configuration Frame broadcast controller (CFRAME_BCAST_REG) to the
Versal machine.
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/arm/xlnx-versal.c | 113 ++-
include/hw
Introduce a model of Xilinx Versal's Configuration Frame controller
(CFRAME_REG).
Signed-off-by: Francisco Iglesias
---
MAINTAINERS | 2 +
hw/misc/meson.build | 1 +
hw/misc/xlnx-versal-cframe-reg.c | 697
Connect the Configuration Frame Unit (CFU_APB, CFU_FDRO and CFU_SFR) to
the Versal machine.
Signed-off-by: Francisco Iglesias
Acked-by: Edgar E. Iglesias
Reviewed-by: Peter Maydell
---
hw/arm/xlnx-versal.c | 42
include/hw/arm/xlnx-versal.h | 16
emulating bitstream programming and readback).
Signed-off-by: Francisco Iglesias
Reviewed-by: Sai Pavan Boddu
Acked-by: Edgar E. Iglesias
---
MAINTAINERS | 6
hw/misc/meson.build | 1 +
hw/misc/xlnx-cfi-if.c | 34
include/hw/misc/xlnx
Introduce a model of the software programming interface (CFU_APB) of
Xilinx Versal's Configuration Frame Unit.
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
MAINTAINERS | 2 +
hw/misc/meson.build | 1 +
hw/misc/xlnx-versal-cfu.c
Introduce a model of Xilinx Versal's Configuration Frame Unit's data out
port (CFU_FDRO).
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/misc/xlnx-versal-cfu.c | 96 +++
include/hw/misc/xlnx-versal-cfu.h | 12
2 files changed, 108
Introduce a model of Xilinx Versal's Configuration Frame Unit's Single
Frame Read port (CFU_SFR).
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/misc/xlnx-versal-cfu.c | 87 +++
include/hw/misc/xlnx-versal-cfu.h | 15 ++
2 files
with connecting the models to Xilinx Versal
machine.
Best regards,
Francisco Iglesias
References:
[1] https://docs.xilinx.com/r/en-US/am011-versal-acap-trm/PSM-Local-Registers
Changelog:
v3->v4:
[PATCH 5]
* Swap to pop out the fifo32 data instead of using memcpy
* Use g_tree_nnodes inst
Hi Peter,
On 2023-08-29 18:44, Peter Maydell wrote:
On Thu, 24 Aug 2023 at 19:35, Francisco Iglesias
wrote:
Introduce a model of Xilinx Versal's Configuration Frame controller
(CFRAME_REG).
Signed-off-by: Francisco Iglesias
+static void cfrm_fdri_post_write(RegisterInfo *reg, uint64_t
is a defensive
> measure against security bugs where an on-stack dynamic allocation
> isn't correctly size-checked (e.g. CVE-2021-3527).
>
> Signed-off-by: Peter Maydell
Reviewed-by: Francisco Iglesias
> ---
> net/dump.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-
t; measure against security bugs where an on-stack dynamic allocation
> isn't correctly size-checked (e.g. CVE-2021-3527).
>
> Signed-off-by: Peter Maydell
Reviewed-by: Francisco Iglesias
> ---
> net/tap.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
>
is a defensive
> measure against security bugs where an on-stack dynamic allocation
> isn't correctly size-checked (e.g. CVE-2021-3527).
>
> Signed-off-by: Peter Maydell
Reviewed-by: Francisco Iglesias
> ---
> hw/net/rocker/rocker_of_dpa.c | 2 +-
> 1 file changed, 1 inserti
Introduce a model of Xilinx Versal's Configuration Frame Unit's Single
Frame Read port (CFU_SFR).
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/misc/xlnx-versal-cfu.c | 87 +++
include/hw/misc/xlnx-versal-cfu.h | 15 ++
2 files
Connect the Configuration Frame Unit (CFU_APB, CFU_FDRO and CFU_SFR) to
the Versal machine.
Signed-off-by: Francisco Iglesias
Acked-by: Edgar E. Iglesias
Reviewed-by: Peter Maydell
---
hw/arm/xlnx-versal.c | 42
include/hw/arm/xlnx-versal.h | 16
emulating bitstream programming and readback).
Signed-off-by: Francisco Iglesias
Reviewed-by: Sai Pavan Boddu
Acked-by: Edgar E. Iglesias
---
MAINTAINERS | 6
hw/misc/meson.build | 1 +
hw/misc/xlnx-cfi-if.c | 34
include/hw/misc/xlnx
Introduce a model of Xilinx Versal's Configuration Frame controller
(CFRAME_REG).
Signed-off-by: Francisco Iglesias
---
MAINTAINERS | 2 +
hw/misc/meson.build | 1 +
hw/misc/xlnx-versal-cframe-reg.c | 685
Hi Peter,
On 2023-08-21 15:34, Peter Maydell wrote:
On Thu, 10 Aug 2023 at 20:16, Francisco Iglesias
wrote:
Introduce a model of Xilinx Versal's Configuration Frame controller
(CFRAME_REG).
Signed-off-by: Francisco Iglesias
---
MAINTAINERS | 2 +
hw/misc
Introduce a model of Xilinx Versal's Configuration Frame broadcast
controller (CFRAME_BCAST_REG).
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/misc/xlnx-versal-cframe-reg.c | 161 +++
include/hw/misc/xlnx-versal-cframe-reg.h | 17 +++
2 files
with connecting the models to Xilinx Versal
machine.
Best regards,
Francisco Iglesias
References:
[1] https://docs.xilinx.com/r/en-US/am011-versal-acap-trm/PSM-Local-Registers
Changelog:
v2->v3:
[PATCH 5]
* Swap to store the CFrames in a GTree instead of GArray
* Rename new_f to new_f_d
Introduce a model of the software programming interface (CFU_APB) of
Xilinx Versal's Configuration Frame Unit.
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
MAINTAINERS | 2 +
hw/misc/meson.build | 1 +
hw/misc/xlnx-versal-cfu.c
Introduce a model of Xilinx Versal's Configuration Frame Unit's data out
port (CFU_FDRO).
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/misc/xlnx-versal-cfu.c | 96 +++
include/hw/misc/xlnx-versal-cfu.h | 12
2 files changed, 108
Connect the Configuration Frame controller (CFRAME_REG) and the
Configuration Frame broadcast controller (CFRAME_BCAST_REG) to the
Versal machine.
Signed-off-by: Francisco Iglesias
Reviewed-by: Peter Maydell
---
hw/arm/xlnx-versal.c | 113 ++-
include/hw
s very few VLAs, and if we can get rid of them all we
> can make the compiler error on new additions. This is a defensive
> measure against security bugs where an on-stack dynamic allocation
> isn't correctly size-checked (e.g. CVE-2021-3527).
>
> Signed-off-by: Peter Maydell
R
rror on new additions. This is a defensive
> measure against security bugs where an on-stack dynamic allocation
> isn't correctly size-checked (e.g. CVE-2021-3527).
>
> Signed-off-by: Philippe Mathieu-Daudé
> [PMM: expanded commit message]
> Signed-off-by: Peter Maydell
Reviewed-by: F
correctly size-checked (e.g. CVE-2021-3527).
>
> Signed-off-by: Peter Maydell
Reviewed-by: Francisco Iglesias
> ---
> audio/jackaudio.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/audio/jackaudio.c b/audio/jackaudio.c
> index 5bdf3d7a
e.g. CVE-2021-3527).
>
> Signed-off-by: Philippe Mathieu-Daudé
> [PMM: expanded commit message]
> Signed-off-by: Peter Maydell
Reviewed-by: Francisco Iglesias
> ---
> block/vpc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/block
Hi Peter,
On 2023-08-03 15:48, Peter Maydell wrote:
On Mon, 10 Jul 2023 at 15:03, Francisco Iglesias
wrote:
Introduce a model of Xilinx Versal's Configuration Frame Unit's data out
port (CFU_FDRO).
Signed-off-by: Francisco Iglesias
---
hw/misc/xlnx-versal-cfu.c | 105
Introduce a model of Xilinx Versal's Configuration Frame controller
(CFRAME_REG).
Signed-off-by: Francisco Iglesias
---
MAINTAINERS | 2 +
hw/misc/meson.build | 1 +
hw/misc/xlnx-versal-cframe-reg.c | 753
Introduce a model of Xilinx Versal's Configuration Frame Unit's data out
port (CFU_FDRO).
Signed-off-by: Francisco Iglesias
---
hw/misc/xlnx-versal-cfu.c | 96 +++
include/hw/misc/xlnx-versal-cfu.h | 12
2 files changed, 108 insertions(+)
diff --git
Connect the Configuration Frame controller (CFRAME_REG) and the
Configuration Frame broadcast controller (CFRAME_BCAST_REG) to the
Versal machine.
Signed-off-by: Francisco Iglesias
---
hw/arm/xlnx-versal.c | 113 ++-
include/hw/arm/xlnx-versal.h | 69
Connect the Configuration Frame Unit (CFU_APB, CFU_FDRO and CFU_SFR) to
the Versal machine.
Signed-off-by: Francisco Iglesias
Acked-by: Edgar E. Iglesias
Reviewed-by: Peter Maydell
---
hw/arm/xlnx-versal.c | 42
include/hw/arm/xlnx-versal.h | 16
Introduce a model of Xilinx Versal's Configuration Frame broadcast
controller (CFRAME_BCAST_REG).
Signed-off-by: Francisco Iglesias
---
hw/misc/xlnx-versal-cframe-reg.c | 161 +++
include/hw/misc/xlnx-versal-cframe-reg.h | 17 +++
2 files changed, 178 insertions
Introduce a model of the software programming interface (CFU_APB) of
Xilinx Versal's Configuration Frame Unit.
Signed-off-by: Francisco Iglesias
---
MAINTAINERS | 2 +
hw/misc/meson.build | 1 +
hw/misc/xlnx-versal-cfu.c | 380
Introduce a model of Xilinx Versal's Configuration Frame Unit's Single
Frame Read port (CFU_SFR).
Signed-off-by: Francisco Iglesias
---
hw/misc/xlnx-versal-cfu.c | 87 +++
include/hw/misc/xlnx-versal-cfu.h | 15 ++
2 files changed, 102 insertions(+)
diff
emulating bitstream programming and readback).
Signed-off-by: Francisco Iglesias
Reviewed-by: Sai Pavan Boddu
Acked-by: Edgar E. Iglesias
---
MAINTAINERS | 6
hw/misc/meson.build | 1 +
hw/misc/xlnx-cfi-if.c | 34
include/hw/misc/xlnx
with connecting the models to Xilinx Versal
machine.
Best regards,
Francisco Iglesias
References:
[1] https://docs.xilinx.com/r/en-US/am011-versal-acap-trm/PSM-Local-Registers
Changelog:
v1->v2:
[PATCH 2]
* Use KiB when defining KEYHOLE_STREAM_4K/KEYHOLE_STREAM_256K
* Updated to be a
+PMM (I think this one might have fallen throught the cracks)
Best regards,
Francisco Iglesias
On [2023 Jun 18] Sun 00:50:47, Philippe Mathieu-Daudé wrote:
> On 16/6/23 16:38, Kinsey Moore wrote:
> > The Cadence GEM peripherals as configured for Zynq MPSoC and Versal
> > pla
with connecting the models to Xilinx Versal
machine.
Best regards,
Francisco Iglesias
References:
[1] https://docs.xilinx.com/r/en-US/am011-versal-acap-trm/PSM-Local-Registers
Francisco Iglesias (8):
hw/misc: Introduce the Xilinx CFI interface
hw/misc: Introduce a model of Xilinx Versal's
Introduce a model of Xilinx Versal's Configuration Frame Unit's data out
port (CFU_FDRO).
Signed-off-by: Francisco Iglesias
---
hw/misc/xlnx-versal-cfu.c | 105 ++
include/hw/misc/xlnx-versal-cfu.h | 11
2 files changed, 116 insertions(+)
diff --git
Connect the Configuration Frame Unit (CFU_APB, CFU_FDRO and CFU_SFR) to
the Versal machine.
Signed-off-by: Francisco Iglesias
---
hw/arm/xlnx-versal.c | 42
include/hw/arm/xlnx-versal.h | 16 ++
2 files changed, 58 insertions(+)
diff
Introduce a model of Xilinx Versal's Configuration Frame controller
(CFRAME_REG).
Signed-off-by: Francisco Iglesias
---
MAINTAINERS | 2 +
hw/misc/meson.build | 1 +
hw/misc/xlnx-versal-cframe-reg.c | 714
emulating bitstream programming and readback).
Signed-off-by: Francisco Iglesias
---
MAINTAINERS | 6
hw/misc/meson.build | 1 +
hw/misc/xlnx-cfi-if.c | 34
include/hw/misc/xlnx-cfi-if.h | 59 +++
4 files
Connect the Configuration Frame controller (CFRAME_REG) and the
Configuration Frame broadcast controller (CFRAME_BCAST_REG) to the
Versal machine.
Signed-off-by: Francisco Iglesias
---
hw/arm/xlnx-versal.c | 116 ++-
include/hw/arm/xlnx-versal.h | 69
Introduce a model of the software programming interface (CFU_APB) of
Xilinx Versal's Configuration Frame Unit.
Signed-off-by: Francisco Iglesias
---
MAINTAINERS | 2 +
hw/misc/meson.build | 1 +
hw/misc/xlnx-versal-cfu.c | 373
Introduce a model of Xilinx Versal's Configuration Frame broadcast
controller (CFRAME_BCAST_REG).
Signed-off-by: Francisco Iglesias
---
hw/misc/xlnx-versal-cframe-reg.c | 173 +++
include/hw/misc/xlnx-versal-cframe-reg.h | 17 +++
2 files changed, 190 insertions
Introduce a model of Xilinx Versal's Configuration Frame Unit's Single
Frame Read port (CFU_SFR).
Signed-off-by: Francisco Iglesias
---
hw/misc/xlnx-versal-cfu.c | 88 +++
include/hw/misc/xlnx-versal-cfu.h | 15 ++
2 files changed, 103 insertions(+)
diff
k in polling mode only. This change connects the
> second interrupt source for platforms where it is available. This patch
> has been tested using the lwIP stack with a Xilinx-supplied driver from
> their embeddedsw repository.
>
> Signed-off-by: Kinsey Moore
Reviewed-by: Francisco
Hi Kinsey,
On [2023 Jun 15] Thu 08:48:47, Kinsey Moore wrote:
> The Cadence GEM peripherals as configured for Zynq MPSoC and Versal
> platforms have two priority queues with separate interrupt sources for
> each. If the interrupt source for the second priority queue is not
> connected, they work
he following error afterwards, as Qemu will try to
> instantiate some additional RPUs.
> | $ qemu-system-aarch64 --smp 1 -M xlnx-zcu102
> | **
> | ERROR:../src/tcg/tcg.c:777:tcg_register_thread:
> | assertion failed: (n < tcg_max_ctxs)
>
> Signed-off-by: Clément Chigot
HANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> FROM,
> + * OUT OF OR IN CO
On [2023 May 19] Fri 13:36:57, Vikram Garhwal wrote:
> Connect CANFD0 and CANFD1 on the Versal-virt machine and update
> xlnx-versal-virt
> document with CANFD command line examples.
>
> Signed-off-by: Vikram Garhwal
> Reviewed-by: Peter Maydell
Reviewed-by: Francisco Iglesi
* @numptr: pointer filled with number of bytes returned (can be NULL)
> + *
> + * Pop a number of elements from the FIFO up to a maximum of max. The buffer
s/Pop/Peek into/
> + * containing the popped data is returned. This buffer points directly into
s/popped data/data peeked into/
If
audé
Reviewed-by: Francisco Iglesias
> ---
> include/qemu/fifo8.h | 10 +-
> util/fifo8.c | 12
> 2 files changed, 13 insertions(+), 9 deletions(-)
>
> diff --git a/include/qemu/fifo8.h b/include/qemu/fifo8.h
> index 16be02f361..d0d02bc73d
On [2023 May 22] Mon 17:31:33, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Francisco Iglesias
> ---
> include/qemu/fifo8.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/qemu/fifo8.h b/include/qe
Huth
Reviewed-by: Francisco Iglesias
> ---
> hw/net/xilinx_ethlite.c | 2 +-
> hw/net/meson.build | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c
> index 99c22819ea..89f4f3b254 100644
> -
e-Id: <20230421131547.2177449-1-...@kaod.org>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Francisco Iglesias
> ---
> hw/misc/aspeed_hace.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
&
On [2023 May 08] Mon 09:58:49, Cédric Le Goater wrote:
> This should also avoid Coverity to report a memory leak warning when
> the QEMU process exits. See CID 1508061.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Francisco Iglesias
> ---
> hw/arm/aspeed.c | 12
Hi Vikram,
A few comments below and some suggestions!
On [2023 Apr 24] Mon 23:34:31, Vikram Garhwal wrote:
> The Xilinx Versal CANFD controller is developed based on SocketCAN, QEMU CAN
> bus
> implementation. Bus connection and socketCAN connection for each CAN module
> can be set through
igned-off-by: Tong Ho
Reviewed-by: Francisco Iglesias
> ---
> hw/nvram/xlnx-efuse.c | 11 +--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/hw/nvram/xlnx-efuse.c b/hw/nvram/xlnx-efuse.c
> index fdfffaab99..655c40b8d1 100644
> --- a/hw/nvram/
fdt_setprop_string(s->fdt, name, "compatible",
> +"xlnx,versal-canfd");
And here we can swap above line with (kernel compatible):
"xlnx,canfd-2.0");
After changing above the linux kern
On [2023 Apr 24] Mon 23:34:30, Vikram Garhwal wrote:
> Signed-off-by: Vikram Garhwal
> Reviewed-by: Peter Maydell
Reviewed-by: Francisco Iglesias
> ---
> MAINTAINERS | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINE
On 2023-03-10 19:03, Alex Bennée wrote:
AMD recently acquired Xilinx and contributors have been transitioning
their emails across.
> Signed-off-by: Alex Bennée
Reviewed-by: Francisco Iglesias
Cc: Vikram Garhwal
Cc: Francisco Iglesias
Cc: Stefano Stabellini
Cc: Sai Pavan Boddu
by adding the missing Kconfig dependency.
Fixes: acc0b8b05a ("hw/arm/xlnx-zynqmp: Connect ZynqMP's USB controllers")
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Francisco Iglesias
---
hw/arm/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/arm/Kconfig b/hw/a
> This is confusing for the user.
>
> Use blk_check_size_and_read_all() instead of blk_pread() to improve
> the reported error.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Francisco Iglesias
> ---
> hw/block/m25p80.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletio
Hi Vikram,
In the git summary s/zynqmp/versal/.
On [2022 Oct 21] Fri 22:47:44, Vikram Garhwal wrote:
> Connect CANFD0 and CANFD1 on the Versal-virt machine and update
> xlnx-versal-virt
> document with CANFD command line examples.
>
> Signed-off-by: Vikram Garhwal
> ---
>
e with CANFD frame.
>
> Signed-off-by: Vikram Garhwal
> Acked-by: Thomas Huth
Reviewed-by: Francisco Iglesias
> ---
> tests/qtest/meson.build | 1 +
> tests/qtest/xlnx-canfd-test.c | 422 ++
> 2 files changed, 423 insertions(+)
>
On [2022 Oct 21] Fri 22:47:46, Vikram Garhwal wrote:
> Signed-off-by: Vikram Garhwal
> Reviewed-by: Peter Maydell
Reviewed-by: Francisco Iglesias
> ---
> MAINTAINERS | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/MAINTAINERS b/MAINTAINE
On [2022 Oct 13] Thu 18:12:34, Cédric Le Goater wrote:
> Signed-off-by: Cédric Le Goater
Reviewed-by: Francisco Iglesias
> ---
> hw/block/m25p80.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
&g
Hi Cedric,
On [2022 Oct 10] Mon 11:58:40, Michael Walle wrote:
> Am 2022-10-10 08:23, schrieb Cédric Le Goater:
> > On 10/7/22 16:44, Francisco Iglesias wrote:
>
> > > > --- a/hw/block/m25p80.c
> > > > +++ b/hw/block/m25p80.c
> > > > @@ -234,6 +2
cd3f8a 100644
> --- a/hw/block/m25p80_sfdp.h
> +++ b/hw/block/m25p80_sfdp.h
> @@ -24,4 +24,6 @@ extern uint8_t m25p80_sfdp_mx66l1g45g(uint32_t addr);
> extern uint8_t m25p80_sfdp_w25q256(uint32_t addr);
> extern uint8_t m25p80_sfdp_w25q512jv(uint32_t addr);
>
> +extern uint8_t m25p80_sfdp_w25q01jvq(uint32_t addr);
(optional -extern)
Reviewed-by: Francisco Iglesias
> +
> #endif
> --
> 2.35.1
>
1 - 100 of 502 matches
Mail list logo
