generalize initialization to make vendir/device id
customizable.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/usb-uhci.c | 87 -
1 files changed, 43 insertions(+), 44 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
On Wed, Mar 16, 2011 at 01:12:27PM +0300, Michael Tokarev wrote:
16.03.2011 12:29, Isaku Yamahata wrote:
This patch series adds basic q35 chipset support for native pci express
support. Some bios related patches are still needed.
For those who want to try it, the following repo is avaiable
On Wed, Mar 16, 2011 at 11:34:42PM +0200, Michael S. Tsirkin wrote:
On Wed, Mar 16, 2011 at 06:29:18PM +0900, Isaku Yamahata wrote:
Create generic pci p2p bridge device which can be customized
via properties like vendor id/device id and so on.
With this, we can avoid to create many pci p2p
The behavior seems reasonable. So I cleaned it up for upstream merge.
thanks,
From cd336e50ebda63ecd84f8172dcf4d4456059d615 Mon Sep 17 00:00:00 2001
Message-Id:
cd336e50ebda63ecd84f8172dcf4d4456059d615.1300332741.git.yamah...@valinux.co.jp
From: Isaku Yamahata yamah...@valinux.co.jp
Date: Thu
Ouch. You already clean it up.
Here is my diff from your patch. Can you please merged into the patch?
changes are
- eliminate unaligned access
- error report
- replace magic number with symbolic constants
- unconverted strtol(base=10)
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
On Thu, Mar 17, 2011 at 07:17:18AM +0200, Michael S. Tsirkin wrote:
Anyway this patch isn't very critical. I think the available choice is
- this patch
- modify the patch to use 14 arguments function.
Thus we can save much more lines.
- Add one more p2p bridge code which q35 uses,
On Thu, Mar 17, 2011 at 07:29:09AM +0200, Michael S. Tsirkin wrote:
On Wed, Mar 16, 2011 at 06:29:15PM +0900, Isaku Yamahata wrote:
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Isaku Yamahata (3):
pci: add accessor function to get irq levels
piix_pci: eliminate PIIX3State::pci_irq_levels
piix_pci: optimize set irq path
hw/pci.c
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/piix_pci.c | 31 +--
1 files changed, 21 insertions(+), 10
optimize irq routing in piix_pic.c which has been a TODO.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/piix_pci.c | 103 +---
1 files changed, 90 insertions(+), 13 deletions(-)
diff --git
On Thu, Mar 17, 2011 at 04:43:36PM +0200, Michael S. Tsirkin wrote:
On Wed, Mar 16, 2011 at 06:29:14PM +0900, Isaku Yamahata wrote:
introduce pci_swizzle_map_irq_fn() for interrupt pin swizzle which is
standardized. PCI bridge swizzle is common logic, by introducing
this function duplicated
is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Changes v1 - v2:
- addressed review comments.
Isaku Yamahata (3):
pci: add accessor function to get irq levels
piix_pci: eliminate PIIX3State
, the bitmap is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/piix_pci.c | 94
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/piix_pci.c | 31 +--
1 files changed, 21 insertions(+), 10
On Thu, Mar 17, 2011 at 04:41:08PM +0200, Michael S. Tsirkin wrote:
+static int piix3_post_load(void *opaque, int version_id)
+{
+PIIX3State *piix3 = opaque;
+piix3_rebuild_irq_levels(piix3);
Don't we need to set_irq_pic here as well?
And in that case, just make the for loop
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
It looks good, except the unnecessary black line after return 0;
Reviewed-by: Isaku Yamahata yamah...@valinux.co.jp
On Thu, Mar 17, 2011 at 01:00:54PM +0300, Michael Tokarev wrote:
This patch almost rewrites acpi_table_add() function
(but still leaves it using old get_param_value() interface
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Juan Quintela quint...@redhat.com
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v2 - v3:
- rename member s/dummy_for_save_load_compat
, the bitmap is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v1 - v2:
- some minor clean ups
- commit log message
efficiency
Changes v1 - v2:
- addressed review comments.
Isaku Yamahata (3):
pci: add accessor function to get irq levels
piix_pci: eliminate PIIX3State::pci_irq_levels
piix_pci: optimize set irq path
hw/pci.c |7 +++
hw/pci.h |1 +
hw/piix_pci.c | 119
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
On Mon, Mar 21, 2011 at 01:37:07PM +0200, Michael S. Tsirkin wrote:
+static int piix3_post_load(void *opaque, int version_id)
+{
+PIIX3State *piix3 = opaque;
+piix3_update_irq_levels(piix3);
Couldn't figure out why would we not want to
propagate the interrupts here.
Could you
On Mon, Mar 21, 2011 at 01:37:07PM +0200, Michael S. Tsirkin wrote:
+/* irq routing is changed. so rebuild bitmap */
+static void piix3_update_irq_levels(PIIX3State *piix3)
+{
+int pirq;
+
+piix3-pic_levels = 0;
+for (pirq = 0; pirq PIIX_NUM_PIRQS; pirq++) {
+
On Mon, Mar 21, 2011 at 02:31:11PM +0200, Michael S. Tsirkin wrote:
On Mon, Mar 21, 2011 at 09:10:32PM +0900, Isaku Yamahata wrote:
On Mon, Mar 21, 2011 at 01:37:07PM +0200, Michael S. Tsirkin wrote:
+static int piix3_post_load(void *opaque, int version_id)
+{
+PIIX3State *piix3
On Mon, Mar 21, 2011 at 04:10:22PM +0200, Michael S. Tsirkin wrote:
@@ -37,8 +37,27 @@
typedef PCIHostState I440FXState;
+#define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */
+#define PIIX_NUM_PIRQS 4ULL/* PIRQ[A-D] */
I've changed this to
On Tue, Mar 22, 2011 at 03:40:16PM +0200, Michael S. Tsirkin wrote:
On Tue, Mar 22, 2011 at 09:50:37AM +0900, Isaku Yamahata wrote:
On Mon, Mar 21, 2011 at 04:10:22PM +0200, Michael S. Tsirkin wrote:
@@ -37,8 +37,27 @@
typedef PCIHostState I440FXState;
+#define
/g
- move down unused member of pci_irq_levels_vmstate in the structure
for cache efficiency
Changes v1 - v2:
- addressed review comments.
Isaku Yamahata (4):
pci: add accessor function to get irq levels
piix_pci: eliminate PIIX3State::pci_irq_levels
piix_pci: optimize set irq path
reassert interrupts on load.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- newly introduced
- TODO: test more OSes, stress test with save/load, live-migration
---
hw/piix_pci.c | 12
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/piix_pci.c
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Juan Quintela quint...@redhat.com
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- use PCI_NUM_PINS instead of magic number 4
, the bitmap is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- replace irq_num with pirq or pci_intx
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
a bit.
Changes v2 - v3:
- s/dummy_for_save_load_compat/pci_irq_levels_vmstate/g
- move down unused member of pci_irq_levels_vmstate in the structure
for cache efficiency
Changes v1 - v2:
- addressed review comments.
Isaku Yamahata (4):
pci: add accessor function to get irq levels
piix_pci
reassert interrupts on load.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- newly introduced
- TODO: test more OSes, stress test with save/load, live-migration
---
hw/piix_pci.c | 12
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/piix_pci.c
, the bitmap is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- replace irq_num with pirq or pci_intx
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Juan Quintela quint...@redhat.com
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- use PCI_NUM_PINS instead of magic number 4
part independent patch series to make the merge easy.
Isaku Yamahata (4):
acpi, acpi_piix, vt82c686: factor out PM_TMR logic
acpi, acpi_piix, vt82c686: factor out PM1a EVT logic
acpi, acpi_piix, vt82c686: factor out PM1_CNT logic
acpi, acpi_piix: factor out GPE logic
hw/acpi.c | 197
factor out ACPI PM1a EVT logic.
Later this will be used by ich9 acpi.
Cc: Blue Swirl blauwir...@gmail.com
Cc: Huacai Chen zltjiang...@gmail.com
Cc: Aurelien Jarno aurel...@aurel32.net
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v7 - v8:
- vt82c686
---
hw/acpi.c | 37
factor out ACPI GPE logic. Later it will be used by ICH9 ACPI.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/acpi.c | 66 ++
hw/acpi.h | 17 ++
hw/acpi_piix4.c | 95
factor out ACPI PM1_CNT logic. This will be used by ich9 acpi.
Cc: Blue Swirl blauwir...@gmail.com
Cc: Huacai Chen zltjiang...@gmail.com
Cc: Aurelien Jarno aurel...@aurel32.net
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v7 - v8:
- vt82c686
---
hw/acpi.c | 49
Swirl blauwir...@gmail.com
Cc: Huacai Chen zltjiang...@gmail.com
Cc: Aurelien Jarno aurel...@aurel32.net
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Change v8 - v9:
- qemu_get_clock_ns() and so on.
Changes v7 - v8:
- vt82c686.c
---
hw/acpi.c | 45
Hi. cirrus_init_common() is used by both isa and pci cirrus.
and isa cirrus isn't qdevfied yet.
So what you want is
- remove qemu_register_reset() and cirrus_reset() from cirrus_init_common()
- add to PCIDeviceInfo cirrus_vga_info
.qdev.reset = cirrus_reset()
in order to use pci reset
On Mon, Mar 28, 2011 at 07:18:04AM +0200, Stefan Weil wrote:
Am 28.03.2011 04:17, schrieb Isaku Yamahata:
Hi. cirrus_init_common() is used by both isa and pci cirrus.
and isa cirrus isn't qdevfied yet.
So what you want is
- remove qemu_register_reset() and cirrus_reset() from
On Mon, Mar 28, 2011 at 11:21:23AM +0200, Markus Armbruster wrote:
Isaku Yamahata yamah...@valinux.co.jp writes:
On Mon, Mar 28, 2011 at 07:18:04AM +0200, Stefan Weil wrote:
Am 28.03.2011 04:17, schrieb Isaku Yamahata:
[...]
On Sat, Mar 26, 2011 at 10:53:09PM +0100, Stefan Weil wrote
On Sun, Mar 27, 2011 at 04:56:29PM +0200, Michael S. Tsirkin wrote:
On Wed, Mar 23, 2011 at 11:17:19AM +0900, Isaku Yamahata wrote:
v4 has minor typo. I sent it too early. Here's fixed one.
v3 - v4 Main changes are
- use pirq, pci_intx instead of irq_num in piix_pci.c
- patch 4/4
On Mon, Mar 28, 2011 at 01:34:02PM +0200, Michael S. Tsirkin wrote:
On Mon, Mar 28, 2011 at 08:19:56PM +0900, Isaku Yamahata wrote:
On Sun, Mar 27, 2011 at 04:56:29PM +0200, Michael S. Tsirkin wrote:
On Wed, Mar 23, 2011 at 11:17:19AM +0900, Isaku Yamahata wrote:
v4 has minor typo. I
- move down unused member of pci_irq_levels_vmstate in the structure
for cache efficiency
Changes v1 - v2:
- addressed review comments.
Isaku Yamahata (4):
pci: add accessor function to get irq levels
piix_pci: eliminate PIIX3State::pci_irq_levels
piix_pci: optimize set irq path
piix_pci
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Juan Quintela quint...@redhat.com
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- use PCI_NUM_PINS instead of magic number 4
reassert interrupts on load.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- newly introduced
- TODO: test more OSes, stress test with save/load, live-migration
---
hw/piix_pci.c | 12
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/piix_pci.c
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
, the bitmap is set and see if the pic pins is
asserted by checking the bitmaps.
When irq routing is changed, rebuild the bitmap and re-assert pic pins.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v4 - v5:
- fix piix_set_irq_pic()
Changes v3 - v4
Hi. SLIC table can be fed dynamically by utilize the existing fw_cfg interface.
Something like this. (This requires your qemu patch.)
This is just for showing the idea.
thanks,
diff --git a/src/acpi.c b/src/acpi.c
index 6428d9c..e0815bd 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -627,6 +627,7
supports NAPI.
TODO: test more OSes, stress test with save/load, live-migration
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- newly introduced
---
hw/piix_pci.c | 12
1 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/hw/piix_pci.c b/hw
Introduce accessor function to know INTx levels.
It will be used later by q35.
Although piix_pci tracks the intx line levels, it can be eliminated
by this helper function.
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/pci.c |7 +++
hw
PIIX3State::pci_irq_levels are redundant which is already tracked by
PCIBus layer. So eliminate them.
Cc: Juan Quintela quint...@redhat.com
Cc: Michael S. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v3 - v4:
- use PCI_NUM_PINS instead of magic number 4
/dummy_for_save_load_compat/pci_irq_levels_vmstate/g
- move down unused member of pci_irq_levels_vmstate in the structure
for cache efficiency
Changes v1 - v2:
- addressed review comments.
Isaku Yamahata (4):
pci: add accessor function to get irq levels
piix_pci: eliminate PIIX3State::pci_irq_levels
piix_pci
. Tsirkin m...@redhat.com
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
Changes v4 - v5:
- fix piix_set_irq_pic()
Changes v3 - v4:
- replace irq_num with pirq or pci_intx
Changes v1 - v2:
- some minor clean ups
- commit log message
---
hw/piix_pci.c | 101
Added -p option to migrate command for postcopy mode and
introduce postcopy parameter for migration to indicate that postcopy mode is
enabled.
Add -n option for postcopy migration which indicates disabling background
transfer.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hmp
This is a character device to hook page access.
The page fault in the area is reported to another user process by
this chardriver. Then, the process fills the page contents and
resolves the page fault.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
drivers/char/Kconfig |9
Introduce MigrationParams for parameters of migration.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
block-migration.c |8
hw/hw.h |2 +-
migration.c | 16 +---
migration.h |8 ++--
qemu-common.h |1 +
savevm.c
On Thu, Dec 29, 2011 at 10:26:16AM +0900, Isaku Yamahata wrote:
UMEM_DEV_LIST: list created umem devices
UMEM_DEV_REATTACH: re-attach the created umem device
UMEM_DEV_LIST and UMEM_DEV_REATTACH are used when
the process that services page fault disappears
This will be used later by postcopy migration.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/hw.h |1 +
savevm.c |5 +
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/hw/hw.h b/hw/hw.h
index 0b481ba..d508b4e 100644
--- a/hw/hw.h
+++ b/hw/hw.h
@@ -80,6
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
linux-headers/linux/umem.h | 83
1 files changed, 83 insertions(+), 0 deletions(-)
create mode 100644 linux-headers/linux/umem.h
diff --git a/linux-headers/linux/umem.h b/linux-headers/linux
This will be used by postcopy migration.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
migration.c |4 ++--
migration.h |2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/migration.c b/migration.c
index 412fdfe..057dde7 100644
--- a/migration.c
+++ b
This patch prepares for postcopy livemigration.
It introduces -postcopy option and its internal flag, migration_postcopy.
It introduces -postcopy-flags for chaging the behavior of incoming postcopy
mainly for benchmark/debug.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
postcopy
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
cpu-all.h |2 ++
exec.c| 51 +--
2 files changed, 31 insertions(+), 22 deletions(-)
diff --git a/cpu-all.h b/cpu-all.h
index 9d78715..0244f7a 100644
--- a/cpu-all.h
+++ b/cpu-all.h
not sure if this can be implemented or not)
| |
V V
migration completesexit()
Isaku Yamahata (21):
arch_init: export sort_ram_list() and ram_save_block
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
arch_init.c | 82 +++---
arch_init.h |1 +
2 files changed, 45 insertions(+), 38 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 9bc313e..982c846 100644
--- a/arch_init.c
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
exec-obsolete.h |1 +
exec.c |4 ++--
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/exec-obsolete.h b/exec-obsolete.h
index 34b9fc5..8f69f1c 100644
--- a/exec-obsolete.h
+++ b/exec-obsolete.h
@@ -25,6 +25,7
Those constants will be also used by postcopy.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
arch_init.c |7 ---
arch_init.h |7 +++
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 1947396..4ede5ad 100644
--- a/arch_init.c
yet.
anonymous I'm not sure whether this can be implemented
or not.
---
Changes version 1 - 2:
- make ioctl structures padded to align
- un-KVM
KVM_VMEM - UMEM
- dropped some ioctl commands as Avi requested
Isaku Yamahata (2):
export necessary
This will be used by postcopy.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
arch_init.c |4 ++--
migration.h |2 ++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index d4c92b0..1947396 100644
--- a/arch_init.c
+++ b/arch_init.c
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
mm/memcontrol.c |1 +
mm/shmem.c |1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index b63f5f7..85530fc 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -2807,6
Introduce RAM_SAVE_VERSION_ID to represent version_id for ram save format.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
arch_init.c |2 +-
arch_init.h |2 ++
vl.c|4 ++--
3 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch_init.c b/arch_init.c
Introduce a new method to drain the buffer of QEMUBufferedFile.
When postcopy migration, buffer size can increase unboundedly.
To keep the buffer size reasonably small, introduce the method to
wait for buffer to drain.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
buffered_file.c
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
arch_init.c | 67 +-
arch_init.h |1 +
2 files changed, 39 insertions(+), 29 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 249b440..bc53092 100644
--- a/arch_init.c
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
scripts/update-linux-headers.sh |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh
index 9d2a4bc..2afdd54 100755
--- a/scripts/update-linux-headers.sh
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
arch_init.c | 21 ++---
migration.h |1 +
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index d55e39c..9bc313e 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -243,6 +243,19
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
arch_init.c | 28 +---
migration.h |1 +
2 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 982c846..249b440 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -261,9
Add enable/disable postcopy mode. No dynamic test yet.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
configure | 12
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/configure b/configure
index 640e815..440fa9e 100755
--- a/configure
+++ b/configure
Those will be used by postcopy.
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
hw/hw.h |3 +++
savevm.c |6 +++---
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/hw/hw.h b/hw/hw.h
index efa04d1..0b481ba 100644
--- a/hw/hw.h
+++ b/hw/hw.h
@@ -77,6 +77,9 @@ void
Signed-off-by: Isaku Yamahata yamah...@valinux.co.jp
---
arch_init.c | 25 ++---
arch_init.h |9 +
2 files changed, 27 insertions(+), 7 deletions(-)
diff --git a/arch_init.c b/arch_init.c
index 5ad6956..d55e39c 100644
--- a/arch_init.c
+++ b/arch_init.c
On Thu, Dec 29, 2011 at 04:55:11PM +0200, Avi Kivity wrote:
On 12/29/2011 04:49 PM, Isaku Yamahata wrote:
Great, then we agreed with list/reattach basically.
(Maybe identity scheme needs reconsideration.)
I guess we miscommunicated. Why is reattach needed? If you have the
fd
On Thu, Dec 29, 2011 at 01:24:32PM +0200, Avi Kivity wrote:
On 12/29/2011 03:26 AM, Isaku Yamahata wrote:
This is Linux kernel driver for qemu/kvm postcopy live migration.
This is used by qemu/kvm postcopy live migration patch.
TODO:
- Consider FUSE/CUSE option
So far several mmap
Thank you for review.
On Thu, Dec 29, 2011 at 01:17:51PM +0200, Avi Kivity wrote:
+ default n
+ help
+ User process backed memory driver provides /dev/umem device.
+ The /dev/umem device is designed for some sort of distributed
+ shared memory. Especially post-copy live
On Thu, Dec 29, 2011 at 03:52:58PM +0200, Avi Kivity wrote:
On 12/29/2011 03:49 PM, Isaku Yamahata wrote:
qemu can have an extra thread that wait4()s the daemon, and relaunch
it. This extra thread would not be blocked by the page fault. It can
keep the fd so it isn't lost
On Thu, Dec 29, 2011 at 04:35:36PM +0200, Avi Kivity wrote:
On 12/29/2011 04:18 PM, Isaku Yamahata wrote:
The issue is how to solve the page fault, not whether
TASK_INTERRUPTIBLE or
TASK_UNINTERRUPTIBLE.
I can think of several options.
- When daemon X is dead, all page
On Thu, Dec 29, 2011 at 02:55:42PM +0200, Avi Kivity wrote:
On 12/29/2011 02:39 PM, Isaku Yamahata wrote:
ioctl commands:
UMEM_DEV_CRATE_UMEM: create umem device for qemu
UMEM_DEV_LIST: list created umem devices
UMEM_DEV_REATTACH: re-attach the created umem device
17 00:00:00 2001
Message-Id:
e8bfda16a845eef4381872a331c6f0f200c3f7d7.1325055066.git.yamah...@valinux.co.jp
In-Reply-To: cover.1325055065.git.yamah...@valinux.co.jp
References: cover.1325055065.git.yamah...@valinux.co.jp
From: Isaku Yamahata yamah...@valinux.co.jp
Date: Thu, 11 Aug 2011 20:05:28
On Thu, Dec 29, 2011 at 06:06:10PM +0200, Avi Kivity wrote:
On 12/29/2011 03:26 AM, Isaku Yamahata wrote:
This patch implements postcopy livemigration.
+/* RAM is allocated via umem for postcopy incoming mode */
+#define RAM_POSTCOPY_UMEM_MASK (1 1)
+
typedef struct RAMBlock
On Thu, Dec 29, 2011 at 04:39:52PM -0600, Anthony Liguori wrote:
TODO
- benchmark/evaluation. Especially how async page fault affects the result.
I'll review this series next week (Mike/Juan, please also review when you
can).
But we really need to think hard about whether this is the
On Thu, Jan 05, 2012 at 12:08:50PM +0800, thfbjyddx wrote:
hi,
I've tried to use this patch,
Oh great! Can we share your results?
but it doesn't work for compiling error on
page = alloc_page_vma(GFP_HIGHUSER_MOVABLE, vma, vmf-address);//vmf-
virtual_address?
I guess it's for the
to the umem
part
I'm not sure about the problem
do you have some suggestion?
━━━
Tommy
From: Isaku Yamahata
Date: 2012-01-05 18:48
To: thfbjyddx
CC: t.hirofuchi; qemu-devel; kvm; satoshi.itoh
Subject: Re: [Qemu-devel] ??: [PATCH 2/2] umem: chardevice for kvm
From: Isaku Yamahata
Date: 2012-01-05 20:18
To: Tommy
CC: t.hirofuchi; qemu-devel; kvm; satoshi.itoh
Subject: Re: [Qemu-devel]回??: [PATCH 2/2] umem: chardevice for kvm postcopy
Hmm, this sounds like you haven't specified -postcopy option at the
incoming qemu.
How did you start incoming qemu
on the problem?
Thanks very much~
━━━
Tommy
From: Isaku Yamahata
Date: 2011-12-29 09:25
To: kvm; qemu-devel
CC: yamahata; t.hirofuchi; satoshi.itoh
Subject: [Qemu-devel] [PATCH 00/21][RFC] postcopy live migration
Intro
=
This patch series implements
loop
and at the same time , the destination node didn't show the EOS
so I still can't solve the stuck problem
Thanks for your help~!
━━━
Tommy
From: Isaku Yamahata
Date: 2012-01-11 10:45
To: thfbjyddx
CC: t.hirofuchi; qemu-devel; kvm; satoshi.itoh
On 12 January 2012 13:59, Avi Kivity a...@redhat.com wrote:
On 01/04/2012 05:03 AM, Isaku Yamahata wrote:
Yes, it's quite doable in user space(qemu) with a kernel-enhancement.
And it would be easy to convert a separated daemon process into a thread
in qemu.
I think it should
One more question.
Does your architecture/implementation (in theory) allow KVM memory
features like swap, KSM, THP?
On Fri, Jan 13, 2012 at 11:03:23AM +0900, Isaku Yamahata wrote:
Very interesting. We can cooperate for better (postcopy) live migration.
The code doesn't seem available yet, I'm
━━━
Tommy
From: Isaku Yamahata
Date: 2012-01-12 16:54
To: thfbjyddx
CC: t.hirofuchi; qemu-devel; kvm; satoshi.itoh
Subject: Re: [Qemu-devel]回??: [PATCH 00/21][RFC] postcopy live?migration
On Thu, Jan 12, 2012 at 04:29:44PM +0800, thfbjyddx wrote:
Hi , I've dug more
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