2015-10-08 13:22 GMT+02:00 Thomas Huth :
> On 07/10/15 20:32, mar.krzeminski wrote:
> > Hello,
> >
> > I am working on u-boot under qemu. Debugging before u-boots relocate
> > itself works just fine.
> > After relocation and reloading elf in gdb, qemu does no stop on
>
Thanks Peter,
Now I am know where I need to start digging and reading so it really helped!
Regards,
Marcin
2015-09-01 22:12 GMT+02:00 Peter Crosthwaite :
> On Tue, Sep 1, 2015 at 11:27 AM, mar.krzeminski
> wrote:
> > W dniu 01.09.2015 o
2015-09-30 0:59 GMT+02:00 Peter Maydell :
> On 29 September 2015 at 23:40, Alistair Francis
> wrote:
> > On Thu, Sep 24, 2015 at 11:58 AM, mar.krzeminski
> > wrote:
> >>
> >>
> >> W dniu 24.09.2015 o 20:38, Peter
2015-09-30 12:44 GMT+02:00 Peter Maydell <peter.mayd...@linaro.org>:
> On 30 September 2015 at 06:18, Marcin Krzemiński
> <mar.krzemin...@gmail.com> wrote:
> > I have at 0xfff0 real memory now (with aliasing to lower memory
> > address).
> > Does it mean
Hello,
I am closer to finish, but still I found some problems this time booting
from A9 cores from M3.
Use case is that I M3 core loads firmware to SDRAM then A9 should begin to
execute this firmware.
I am starting M3 from elf, I see from debuger (gbd backend) that data are
in SDRAM memory. Then
t me where the loading is done in the code?
Regards,
Marcin Krzemiński
2016-07-04 8:58 GMT+02:00 Cédric Le Goater :
> Hello Marcin,
>
> On 07/02/2016 07:00 PM, mar.krzeminski wrote:
> >>
> >> +
> >> +/* CE Control Register */
> >> +#define R_CE_CTRL(0x04 / 4)
> >> +#define CTRL_EXTENDED4 4 /* 32 bit addressing for SPI */
> >>
2016-12-05 10:36 GMT+01:00 Cédric Le Goater :
> Hello Marcin,
>
> On 12/04/2016 06:00 PM, mar.krzeminski wrote:
> > Hi Cedric,
> >
> > it looks like good idea for now to handle boot from flash.
> > As I understand you are trying to omit bootrom code in Qemu model?
>
> I suppose you
2017-01-09 12:10 GMT+01:00 Edgar E. Iglesias :
> On Sun, Jan 08, 2017 at 09:38:53AM +0100, Marcin Krzeminski wrote:
>> Modern big flash nor devices consist from more than one die.
>> Some of them do not support chip erase and instead have die
>> erase command that can