Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
arch_init.c | 2 +
configure | 5 +
default-configs/avr-softmmu.mak | 1 +
disas/Makefile.objs | 1 +
disas/avr.c | 10 ++
include/disas/bfd.h
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 64 -
1 file changed, 63 insertions(+), 1 deletion(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index aec37af..ed22b37 100644
--- a/target-avr/he
I am aware of bad portability of bit fields as compilers
for LE and BE hosts lists bit fields in different order
However they won't "parse" in target memory but a data prepared by me
Signed-off-by: Michael Rolnik <mrol...@gmail.co>
---
target-avr/
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 103
target-avr/helper.h | 5 +++
2 files changed, 108 insertions(+)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index ed22b37..450f598
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/decode.c | 732
1 file changed, 732 insertions(+)
create mode 100644 target-avr/decode.c
diff --git a/target-avr/decode.c b/target-avr/decode.c
new file mode 100644
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
hw/Makefile.objs | 1 +
hw/avr/Makefile.objs | 1 +
hw/avr/sample-io.c | 246 +++
hw/avr/sample.c | 120 +
4 files changed, 368 insertions(+)
creat
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/Makefile.objs | 4 ++-
target-avr/translate.c | 91 +++-
2 files changed, 86 insertions(+), 9 deletions(-)
diff --git a/target-avr/Makefile.objs b/target-avr/Makefile.objs
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu.c | 326 ++-
target-avr/cpu.h | 59 ++
2 files changed, 383 insertions(+), 2 deletions(-)
diff --git a/target-avr/cpu.c b/target-avr/cpu.c
index ff26018..9
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/translate.c.inc | 2546
1 file changed, 2546 insertions(+)
create mode 100644 target-avr/translate.c.inc
diff --git a/target-avr/translate.c.inc b/target-avr/translate.c.inc
ne
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
MAINTAINERS | 6 ++
hw/avr/Makefile.objs | 21 +
hw/avr/sample-io.c | 227 +++
hw/avr/sample.c | 116 ++
4 files changed, 370 insertions(+)
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
arch_init.c | 2 +
configure | 5 +
default-configs/avr-softmmu.mak | 21 +++
include/disas/bfd.h | 6 +
include/sysemu/arch_init.h | 1 +
target-avr/Makefil
sting on
a. Mac, Apple LLVM version 7.0.0
b. Ubuntu 12.04, gcc 4.9.2
c. Fedora 23, gcc 5.3.1
4. folding back some patches
5. translation bug fixes for ADIW, SBIW, XOR instructions
6. propper handling of cpu register writes though memory
Michael Rolnik (10):
target-avr: AVR cores support
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 59 -
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index 3e23646..060b2f0 100644
--- a/target-avr/he
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/Makefile.objs | 4 +-
target-avr/translate.c | 142 ---
2 files changed, 64 insertions(+), 82 deletions(-)
diff --git a/target-avr/Makefile.objs b/target-avr/Makefile.objs
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpugen/CMakeLists.txt | 38 +++
target-avr/cpugen/README.md| 17 ++
target-avr/cpugen/cpu/avr.yaml | 214 ++
target-avr/cpugen/src/CMakeLists.txt | 62
targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/translate-inst.h | 762
1 file changed, 762 insertions(+)
create mode 100644 target-avr/translate-inst.h
diff --git a/target-avr/translate-inst.h b/target-avr/translate-inst.h
ne
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 222 +---
target-avr/helper.h | 6 ++
2 files changed, 215 insertions(+), 13 deletions(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index 060b2f0..1
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/translate-inst.c | 2636 +++
target-avr/translate.h | 119 ++
2 files changed, 2755 insertions(+)
create mode 100644 target-avr/translate-inst.c
create mode 100644 targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu.c | 307 ++-
target-avr/cpu.h | 53 +
target-avr/machine.c | 1 +
3 files changed, 360 insertions(+), 1 deletion(-)
diff --git a/target-avr/cpu.c b/targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/decode.c | 693
1 file changed, 693 insertions(+)
create mode 100644 target-avr/decode.c
diff --git a/target-avr/decode.c b/target-avr/decode.c
new file mode 100644
it did compile for me.
how do you compile? what machine?
On Sun, Jun 19, 2016 at 8:45 PM, Richard Henderson <r...@twiddle.net> wrote:
> On 06/18/2016 12:55 PM, Michael Rolnik wrote:
>
>> This series of patches adds 8bit AVR cores to QEMU.
>> All instruction, e
I am building on MAC.
I just do
./configure --target-list=avr-softmmu
build
no errors
On Sun, Jun 19, 2016 at 8:50 PM, Michael Rolnik <mrol...@gmail.com> wrote:
> it did compile for me.
> how do you compile? what machine?
>
> On Sun, Jun 19, 2016 at 8:45 PM, Richard Henderson
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/decode.c | 693
1 file changed, 693 insertions(+)
create mode 100644 target-avr/decode.c
diff --git a/target-avr/decode.c b/target-avr/decode.c
new file mode 100644
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/translate-inst.h | 762
1 file changed, 762 insertions(+)
create mode 100644 target-avr/translate-inst.h
diff --git a/target-avr/translate-inst.h b/target-avr/translate-inst.h
ne
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 147
target-avr/helper.h | 5 ++
2 files changed, 142 insertions(+), 10 deletions(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index f96fa27..4
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
arch_init.c | 2 +
configure | 5 +
default-configs/avr-softmmu.mak | 21 +++
include/disas/bfd.h | 6 +
include/sysemu/arch_init.h | 1 +
target-avr/Makefil
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu.c | 307 ++-
target-avr/cpu.h | 53 ++
2 files changed, 359 insertions(+), 1 deletion(-)
diff --git a/target-avr/cpu.c b/target-avr/cpu.c
index 99bd788..1
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpugen/CMakeLists.txt | 38 +++
target-avr/cpugen/README.md| 17 ++
target-avr/cpugen/cpu/avr.yaml | 214 ++
target-avr/cpugen/src/CMakeLists.txt | 62
targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index fe2279e..6a4e398 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -110,6 +110,12 @@ F: disas/arm.c
F: disas/arm-a64.cc
F: disas/l
esting gen_push_ret/gen_pop_ret
changes since v7
1. folding back v6
2. logging at helper_outb and helper_inb are done for non supported yet
registers only
3. MAINTAINERS updated
Michael Rolnik (12):
target-avr: AVR cores support is added. 1. basic CPU
structure 2.
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
hw/Makefile.objs | 1 +
hw/avr/Makefile.objs | 21 +
hw/avr/sample-io.c | 215 +++
hw/avr/sample.c | 118
4 files changed, 355 insertions(+)
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/Makefile.objs | 4 +-
target-avr/translate.c | 137 ---
2 files changed, 61 insertions(+), 80 deletions(-)
diff --git a/target-avr/Makefile.objs b/target-avr/Makefile.objs
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 59 -
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index ad8f83e..f96fa27 100644
--- a/target-avr/he
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu-qom.h | 2 +-
target-avr/cpu.c | 2 +-
target-avr/machine.c | 107 ---
3 files changed, 87 insertions(+), 24 deletions(-)
diff --git a/target-avr/cpu-qom.h b/targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/translate-inst.c | 2629 +++
target-avr/translate.h | 119 ++
2 files changed, 2748 insertions(+)
create mode 100644 target-avr/translate-inst.c
create mode 100644 targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/translate-inst.h | 805
1 file changed, 805 insertions(+)
create mode 100644 target-avr/translate-inst.h
diff --git a/target-avr/translate-inst.h b/target-avr/translate-inst.h
ne
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
MAINTAINERS | 6 +++
hw/avr/Makefile.objs | 21 +
hw/avr/sample.c | 117 +++
3 files changed, 144 insertions(+)
create mode 100644 hw/avr/Makefile.objs
creat
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu.c | 319 +--
target-avr/cpu.h | 52 -
target-avr/machine.c | 28 ++---
3 files changed, 373 insertions(+), 26 deletions(-)
diff --git a/target-avr/cpu.c b/
per ram allocation
9. fixing breakpoint functionality.
10.env1 -> env
11.fixing avr_cpu_gdb_write_register & avr_cpu_gdb_read_register functions
12.any cpu is removed
12.feature bits are not saved into vm state
Michael Rolnik (9):
target-avr: AVR cores support is added.
target-avr
1. basic CPU structure
2. registers
3. no instructions
4. saving sreg, rampD, rampX, rampY, rampD, eind in HW representation
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
arch_init.c | 2 +
configure | 5 +
default-confi
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 59 -
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index 3984fc8..1e5d97d 100644
--- a/target-avr/he
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/Makefile.objs|2 +-
target-avr/translate-inst.c | 2622 +++
target-avr/translate.c |1 -
target-avr/translate.h |1 +
4 files changed, 2624 insertions(+), 2 del
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpugen/CMakeLists.txt | 38 +++
target-avr/cpugen/README.md| 17 ++
target-avr/cpugen/cpu/avr.yaml | 214 ++
target-avr/cpugen/src/CMakeLists.txt | 63
targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu.h | 13 ++-
target-avr/helper.c| 288 ++---
target-avr/helper.h| 8 +-
target-avr/translate.c | 9 ++
4 files changed, 300 insertions(+), 18 deletions(-)
diff
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/Makefile.objs | 1 +
target-avr/decode.c | 693 +++
target-avr/helper.c | 2 +
target-avr/helper.h | 1 +
target-avr/translate.c | 12 -
5 files change
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu.c | 313 ++-
target-avr/cpu.h | 48
target-avr/machine.c | 1 +
3 files changed, 361 insertions(+), 1 deletion(-)
diff --git a/target-avr/cpu.c b/targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/Makefile.objs|2 +-
target-avr/translate-inst.c | 2622 +++
target-avr/translate.c |1 -
target-avr/translate.h |1 +
4 files changed, 2624 insertions(+), 2 del
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 59 -
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index ffc9378..3e61193 100644
--- a/target-avr/he
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu.h | 13 ++-
target-avr/helper.c| 284 ++---
target-avr/helper.h| 8 +-
target-avr/translate.c | 9 ++
4 files changed, 299 insertions(+), 15 deletions(-)
diff
1. basic CPU structure
2. registers
3. no instructions
4. saving sreg, rampD, rampX, rampY, rampD, eind in HW representation
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
arch_init.c | 2 +
configure | 5 +
default-confi
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpugen/CMakeLists.txt | 38 +++
target-avr/cpugen/README.md| 17 ++
target-avr/cpugen/cpu/avr.yaml | 214 ++
target-avr/cpugen/src/CMakeLists.txt | 63
targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
MAINTAINERS | 6 ++
hw/avr/Makefile.objs | 21 ++
hw/avr/sample-io.c | 176 +++
hw/avr/sample.c | 137 +++
4 files change
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/translate-inst.h | 805
1 file changed, 805 insertions(+)
create mode 100644 target-avr/translate-inst.h
diff --git a/target-avr/translate-inst.h b/target-avr/translate-inst.h
ne
ssignment to env->fullacc from gen_intermediate_code
Michael Rolnik (9):
target-avr: AVR cores support is added.
target-avr: adding AVR CPU features/flavors
target-avr: adding a sample AVR board
target-avr: adding instructions encodings
target-avr: adding AVR interrupt handling
targe
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/translate-inst.h | 805
1 file changed, 805 insertions(+)
create mode 100644 target-avr/translate-inst.h
diff --git a/target-avr/translate-inst.h b/target-avr/translate-inst.h
ne
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
MAINTAINERS | 6 +++
hw/avr/Makefile.objs | 21 +
hw/avr/sample.c | 117 +++
3 files changed, 144 insertions(+)
create mode 100644 hw/avr/Makefile.objs
creat
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 59 -
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index 3984fc8..1e5d97d 100644
--- a/target-avr/he
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu.h | 13 ++-
target-avr/helper.c| 288 ++---
target-avr/helper.h| 8 +-
target-avr/translate.c | 9 ++
4 files changed, 300 insertions(+), 18 deletions(-)
diff
1. basic CPU structure
2. registers
3. no instructions
4. saving sreg, rampD, rampX, rampY, rampD, eind in HW representation
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
arch_init.c | 2 +
configure | 5 +
default-confi
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu.c | 319 +--
target-avr/cpu.h | 52 -
target-avr/machine.c | 28 ++---
3 files changed, 373 insertions(+), 26 deletions(-)
diff --git a/target-avr/cpu.c b/
per ram allocation
9. fixing breakpoint functionality.
10.env1 -> env
11.fixing avr_cpu_gdb_write_register & avr_cpu_gdb_read_register functions
12.any cpu is removed
12.feature bits are not saved into vm state
changes since v13
1. rebasing to v2.7.0-rc1
Michael Rolnik (9):
target-avr: AV
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpugen/CMakeLists.txt | 38 +++
target-avr/cpugen/README.md| 17 ++
target-avr/cpugen/cpu/avr.yaml | 214 ++
target-avr/cpugen/src/CMakeLists.txt | 63
targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/Makefile.objs|2 +-
target-avr/translate-inst.c | 2622 +++
target-avr/translate.c |1 -
target-avr/translate.h |1 +
4 files changed, 2624 insertions(+), 2 del
do you mean that I should remove the board and/or device? I use them for
testing.
*char const** and *const char** are the same.
On Mon, Jul 25, 2016 at 9:50 PM, Peter Maydell <peter.mayd...@linaro.org>
wrote:
> On 24 July 2016 at 01:02, Michael Rolnik <mrol...@gmail.com> wrote:
if I fold this patch into previous ones, they will become non buildable,
because this patch assumes existance of functions from the preceding patch.
Is this acceptable?
On Tue, Jul 12, 2016 at 10:30 AM, Richard Henderson <r...@twiddle.net> wrote:
> On 07/06/2016 03:33 PM, Michael Rol
Hi Richard,
Please explain why I am not accessing fullacc correctly.
On Tue, Jul 12, 2016 at 10:19 AM, Richard Henderson <r...@twiddle.net> wrote:
> On 07/06/2016 03:33 PM, Michael Rolnik wrote:
> > +static bool avr_cpu_has_work(CPUState *cs)
> > +{
> > +
between functions
4. adding newline on the last line of the file
5. using tb->flags to generae full access ST/LD instructions
6. fixing SBRC bug
7. folding back 10th commit
8. whenever a new file is introduced it's added to Makefile.objs
Michael Rolnik (9):
target-avr: AVR cores support is a
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 59 -
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index ffc9378..3e61193 100644
--- a/target-avr/he
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/translate-inst.h | 805
1 file changed, 805 insertions(+)
create mode 100644 target-avr/translate-inst.h
diff --git a/target-avr/translate-inst.h b/target-avr/translate-inst.h
ne
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/Makefile.objs | 1 +
target-avr/decode.c | 693 +++
target-avr/helper.c | 2 +
target-avr/helper.h | 1 +
target-avr/translate.c | 12 -
5 files change
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu.c | 313 ++-
target-avr/cpu.h | 48
target-avr/machine.c | 1 +
3 files changed, 361 insertions(+), 1 deletion(-)
diff --git a/target-avr/cpu.c b/targ
1. basic CPU structure
2. registers
3. no instructions
4. saving sreg, rampD, rampX, rampY, rampD, eind in HW representation
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
arch_init.c | 2 +
configure | 5 +
default-confi
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/Makefile.objs|2 +-
target-avr/translate-inst.c | 2622 +++
target-avr/translate.h |1 +
3 files changed, 2624 insertions(+), 1 deletion(-)
create mode 100644 targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu.h | 13 ++-
target-avr/helper.c| 284 ++---
target-avr/helper.h| 8 +-
target-avr/translate.c | 9 ++
4 files changed, 299 insertions(+), 15 deletions(-)
diff
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
MAINTAINERS | 6 ++
hw/avr/Makefile.objs | 21 ++
hw/avr/sample-io.c | 176 +++
hw/avr/sample.c | 137 +++
4 files change
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpugen/CMakeLists.txt | 38 +++
target-avr/cpugen/README.md| 17 ++
target-avr/cpugen/cpu/avr.yaml | 214 ++
target-avr/cpugen/src/CMakeLists.txt | 63
targ
Hello,
I fixed all the issue, the patches were sent last week (July 6th). Please
have a look.
regards,
Michael
On Wed, Jul 13, 2016 at 12:21 AM, Richard Henderson <r...@twiddle.net> wrote:
> On 07/12/2016 08:49 PM, Michael Rolnik wrote:
>
>> if I fold this patch
So how do I get this flag unset?
On Wed, Jul 13, 2016, 12:17 AM Richard Henderson <r...@twiddle.net> wrote:
> On 07/12/2016 08:32 PM, Michael Rolnik wrote:
> > Hi Richard,
> >
> > Please explain why I am not accessing fullacc correctly.
>
> You can't examine
a. a helper function sets a flag within env
b. cpu_get_tb_cpu_state introduces this flag, though tb.flags, for code
generation by gen_intermediate_code
c. the code is generated
d. the flag remains to be set within env. Who clear it?
On Wed, Jul 13, 2016 at 3:54 AM, Michael Rolnik <m
Hi Richard,
Are there more pending issues with my code?
Thanks,
Michael
On Sat, Jul 2, 2016 at 10:56 PM, Michael Rolnik <mrol...@gmail.com> wrote:
> for ADIW, SBIW instructions I modified address calculation.
>
> On Sat, Jul 2, 2016 at 9:20 PM, Michael Rolnik <mrol...@gmail.c
but this is the architecture.
Regards,
Michael
On Tue, Jul 5, 2016 at 10:54 PM, Peter Maydell <peter.mayd...@linaro.org>
wrote:
> On 5 July 2016 at 19:15, Michael Rolnik <mrol...@gmail.com> wrote:
> > Hi Richard,
> >
> > Are there more pending issues with my code?
>
> Mos
uot; table you can see that some registers have both
memory address and io address and some only io address.
as for static, I will fix it.
On Tue, Jul 5, 2016 at 11:39 PM, Peter Maydell <peter.mayd...@linaro.org>
wrote:
> On 5 July 2016 at 21:31, Michael Rolnik <mrol...@gmail.co
t; On 5 July 2016 at 21:31, Michael Rolnik <mrol...@gmail.com> wrote:
> >
> > As Richard says you have problems with trying to write
> > CPU registers from a device anyway, but please consider
> > trying to have some level of abstraction rather than
at 10:36, Michael Rolnik <mrol...@gmail.com> wrote:
> > Peter,
> >
> > I think I will do the following
> > 1. helper fullwr will modify CPU owned registers by itself and call
> cpu_outb
> > for non owned registers
>
> This doesn't sound right -- if helper_fu
how to create io space device and how to map it?
thanks,
Michael
On Wed, Jul 6, 2016 at 1:03 PM, Peter Maydell <peter.mayd...@linaro.org>
wrote:
> On 6 July 2016 at 10:55, Michael Rolnik <mrol...@gmail.com> wrote:
> > helper_fullwr will call memory_write if it does not go
Wed, Jul 6, 2016 at 12:43 PM, Peter Maydell <peter.mayd...@linaro.org>
wrote:
> On 6 July 2016 at 10:36, Michael Rolnik <mrol...@gmail.com> wrote:
> > Peter,
> >
> > I think I will do the following
> > 1. helper fullwr will modify CPU owned registers by i
the whole range [0x
- 0x0100), or we can create io device.
On Wed, Jul 6, 2016 at 12:54 PM, Peter Maydell <peter.mayd...@linaro.org>
wrote:
> On 6 July 2016 at 10:49, Michael Rolnik <mrol...@gmail.com> wrote:
> > in the range [0x - 0x0100)
> > some registers ar
thanks
On Wed, Jul 6, 2016 at 1:10 PM, Peter Maydell <peter.mayd...@linaro.org>
wrote:
> On 6 July 2016 at 11:04, Michael Rolnik <mrol...@gmail.com> wrote:
> > how to create io space device and how to map it?
>
> Conceptually it's no different to handling memory mapp
thanks. this is a good idea.
env->fullwr is reseted after the TB is retranslated.
On Wed, Jul 6, 2016 at 2:55 AM, Richard Henderson <r...@twiddle.net> wrote:
> On 07/05/2016 02:41 PM, Michael Rolnik wrote:
>
>> right it accesses CPU registers but from helper context.
>
Hi Peter,
what is the smallest range that can be allocated in io space? in the memory
space, it's a page, right?
Michael
On Wed, Jul 6, 2016 at 1:11 PM, Michael Rolnik <mrol...@gmail.com> wrote:
> thanks
>
> On Wed, Jul 6, 2016 at 1:10 PM, Peter Maydell <peter.mayd...@l
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpu.c | 307 ++-
target-avr/cpu.h | 49
target-avr/machine.c | 1 +
3 files changed, 356 insertions(+), 1 deletion(-)
diff --git a/target-avr/cpu.c b/targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/translate-inst.h | 762
1 file changed, 762 insertions(+)
create mode 100644 target-avr/translate-inst.h
diff --git a/target-avr/translate-inst.h b/target-avr/translate-inst.h
ne
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 222 +---
target-avr/helper.h | 6 ++
2 files changed, 215 insertions(+), 13 deletions(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index 060b2f0..1
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/Makefile.objs | 4 +-
target-avr/translate.c | 142 ---
2 files changed, 64 insertions(+), 82 deletions(-)
diff --git a/target-avr/Makefile.objs b/target-avr/Makefile.objs
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/cpugen/CMakeLists.txt | 38 +++
target-avr/cpugen/README.md| 17 ++
target-avr/cpugen/cpu/avr.yaml | 214 ++
target-avr/cpugen/src/CMakeLists.txt | 62
targ
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/decode.c | 693
1 file changed, 693 insertions(+)
create mode 100644 target-avr/decode.c
diff --git a/target-avr/decode.c b/target-avr/decode.c
new file mode 100644
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 118 +-
target-avr/helper.h |1 +
target-avr/translate-inst.c | 2621 +++
target-avr/translate.c |2 +-
target-avr/translate.h | 119 ++
5
1. basic CPU structure
2. registers
3. no instructions
4. saving sreg, rampD, rampX, rampY, rampD, eind in HW representation
saving cpu features
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
arch_init.c | 2 +
configure
e descriptive now
7. memory_region_allocate_system_memory is used to create RAM
8. now there are helper_fullrd & helper_fullwr when LD/ST try to access
registers
Michael Rolnik (10):
target-avr: AVR cores support is added.
target-avr: adding AVR CPU features/flavors
target-avr: adding a sample AVR board
target-a
Signed-off-by: Michael Rolnik <mrol...@gmail.com>
---
target-avr/helper.c | 59 -
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git a/target-avr/helper.c b/target-avr/helper.c
index 3e23646..060b2f0 100644
--- a/target-avr/he
101 - 200 of 783 matches
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