[PATCH v3 0/2] target/ppc: Implement Dynamic Execution Control Registers

/linuxppc-dev/20221128024458.46121-1-bg...@linux.ibm.com/ v3: - Fix typos v2: - Clearing of upper 32 bits of userspace registers is now performed on register read rather than register write. Nicholas Miehlbradt (2): target/ppc: Implement the DEXCR and HDEXCR target/ppc: Check DEXCR

[PATCH v3 1/2] target/ppc: Implement the DEXCR and HDEXCR

the abbreviation UDEXCR in two different contexts: the userspace DEXCR, the SPR index which can be read from userspace (implemented in this patch), and the ultravisor DEXCR, the equivalent register for the ultravisor state (not implemented). Signed-off-by: Nicholas Miehlbradt --- v2: Clearing

[PATCH v3 2/2] target/ppc: Check DEXCR on hash{st, chk} instructions

-by: Nicholas Miehlbradt --- target/ppc/excp_helper.c | 58 +--- 1 file changed, 43 insertions(+), 15 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 94adcb766b..add4d54ae7 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc

[PATCH v2 0/2] target/ppc: Implement Dynamic Execution Control Registers

/linuxppc-dev/20221128024458.46121-1-bg...@linux.ibm.com/ Nicholas Miehlbradt (2): target/ppc: Implement the DEXCR and HDEXCR target/ppc: Check DEXCR on hash{st, chk} instructions target/ppc/cpu.h | 19 + target/ppc/cpu_init.c| 25 + target/ppc

[PATCH v2 1/2] target/ppc: Implement the DEXCR and HDEXCR

the abbreviation UDEXCR in two different contexts: the userspace DEXCR, the SPR index which can be read from userspace (implemented in this patch), and the ultravisor DEXCR, the equivalent register for the ultravisor state (not implemented). Signed-off-by: Nicholas Miehlbradt --- v2: Clearing

[PATCH v2 2/2] target/ppc: Check DEXCR on hash{st, chk} instructions

-by: Nicholas Miehlbradt --- target/ppc/excp_helper.c | 58 +--- 1 file changed, 43 insertions(+), 15 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 94adcb766b..add4d54ae7 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc

[PATCH 1/2] target/ppc: Implement the DEXCR and HDEXCR

the abbreviation UDEXCR in two different contexts: the userspace DEXCR, the SPR index which can be read from userspace (implemented in this patch), and the ultravisor DEXCR, the equivalent register for the ultravisor state (not implemented). Signed-off-by: Nicholas Miehlbradt --- target/ppc/cpu.h

[PATCH 2/2] target/ppc: Check DEXCR on hash{st, chk} instructions

Adds checks to the hashst and hashchk instructions to only execute if enabled by the relevant aspect in the DEXCR and HDEXCR. This behaviour is guarded behind TARGET_PPC64 since Power10 is currently the only implementation which has the DEXCR. Signed-off-by: Nicholas Miehlbradt --- target/ppc

[PATCH 0/2] target/ppc: Implement Dynamic Execution Control Registers

aspects can be manipulated but have no effect on execution. Adds checks to these registers in the hashst and hashchk instructions so that they are executed as nops when not enabled. Nicholas Miehlbradt (2): target/ppc: Implement the DEXCR and HDEXCR target/ppc: Check DEXCR on hash{st, chk