Split the bits that have some duplication with disas_insn_new, from
those that should be the main topic of the conversion. This is the
first step towards removing duplicate decoding of prefixes between
disas_insn and disas_insn_new.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 2 +-
target/i386/tcg/decode-new.c.inc | 120 ++
target/i386/tcg/emit.c.inc | 202 +++
3 files changed, 323 insertions(+), 1 deletion(-)
diff
Extract the code into new functions, and swap T0/T1 so that T0 corresponds
to the first immediate in the instruction stream.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 93 +
1 file changed, 53 insertions
The new conditions obviously come in handy when testing individual bits
of EFLAGS, and they make it possible to remove the .mask field of
CCPrepare.
Lowering to shift+and is done by the optimizer if necessary.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg
i386_tr_translate_insn.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 259 +++
target/i386/tcg/decode-new.c.inc | 63 ++--
2 files changed, 103 insertions(+), 219 deletions(-)
diff --git a/target/i386/tcg
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 27 +++
target/i386/tcg/decode-new.c.inc | 3 +++
2 files changed, 30 insertions(+)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index
-dependent cc_op could
be observed.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 3f1d2858fc9..466fee38c0e 100644
--- a/target/i386
A few two-byte opcodes are simple extensions of existing one-byte opcodes;
they are easy to decode and need no change to emit.c.inc. Port them to
the new decoder.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 4
target/i386/tcg/decode
: Paolo Bonzini
---
target/i386/tcg/translate.c | 1120 ++-
1 file changed, 566 insertions(+), 554 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index f4e5843d5f5..973bf07ef27 100644
--- a/target/i386/tcg/translate.c
+++ b/target
While keeping decode->immediate for convenience and for 4-operand instructions,
store the immediate in X86DecodedOp as well. This enables instructions
with more than one immediate such as ENTER. It can also be used for far
calls and jumps.
Reviewed-by: Richard Henderson
Signed-off-by: Pa
prevents gen_prepare_cc from returning s->cc_srcT.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 9aecd415b38..3f1d285
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 4 +++-
target/i386/tcg/decode-new.c.inc | 9 +
target/i386/tcg/emit.c.inc | 11 +++
3 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/target/i386/tcg
In the new decoder it is sometimes easier to put the segment
in T1 instead of T0, usually because another operand was loaded
by common code in T0. Genrealize gen_movl_seg_T0 to allow
using any source.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c
Create a new wrapper for syscall/sysret, and do not go through multiple
layers of wrappers.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 25 -
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/target/i386
Since new opcodes are not going to be added in translate.c, round the
case labels that call to disas_insn_new(), including whole sets of
eight opcodes when possible.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 5 ++---
1 file changed, 2
With the introduction of TSTEQ and TSTNE the .mask field is always -1,
so remove all the now-unnecessary code.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 81 +
1 file changed, 27 insertions(+), 54 deletions
Instead of using s->tmp0 or s->tmp4 as the result, just extend the cc_*
registers in place. It is harmless and, if multiple setcc instructions
are used, the optimizer will be able to remove the redundant ones.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i3
Instead of using s->T0 or s->T1, create a scratch register
when computing the C, NC, L or LE conditions.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index dae9553fcaa..8e0289ca414 100644
--- a/target/i386/tcg
carry
shr cc_dst, cc_src2, length - 1
and cc_dst, cc_dst, 1
// compute overflow
xor cc_src2, cc_src2, T0
extract cc_src2, cc_src2, length - 1, 1
32-bit MUL and IMUL are also slightly more efficient on 64-bit hosts.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Move long-displacement Jcc, SETcc and CMOVcc to the new decoder.
While filling in the tables makes the code seem longer, the new
emitters are all just one line of code.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 1 +
target/i386/tcg
Compared to the old decoder, the main differences in translation
are for the little-used ARPL instruction. IMUL is adjusted a bit
to share more code to produce flags, but is otherwise very similar.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h
ed decoder
Babu Moger (1):
target/i386: Fix CPUID encoding of Fn8000001E_ECX
Paolo Bonzini (25):
target/i386: use TSTEQ/TSTNE to test low bits
target/i386: use TSTEQ/TSTNE to check flags
target/i386: remove mask from CCPrepare
t;Simplify CPUID_8000_001E for AMD")
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Reviewed-by: Zhao Liu
Signed-off-by: Babu Moger
Message-ID:
<0ee4b0a8293188a53970a2b0e4f4ef713425055e.1714757834.git.babu.mo...@amd.com>
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.h | 6 +++
Ensure that they go through unmodified, instead of removing one layer
of quoting.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Paolo Bonzini
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index bd85377a6ae..10fbe10ad9c 100755
--- a/configure
On Tue, May 7, 2024 at 9:48 AM Philippe Mathieu-Daudé wrote:
>
> On 7/5/24 09:19, Paolo Bonzini wrote:
> > Now that boards are enabled by default and the "CONFIG_FOO=y"
> > entries are gone from configs/devices/, there cannot be any more
> > a conflicts betwe
--target-list, those emulators will be skipped if
libfdt is not present.
Signed-off-by: Paolo Bonzini
---
configs/targets/aarch64-softmmu.mak | 1 +
configs/targets/arm-softmmu.mak | 1 +
configs/targets/i386-softmmu.mak | 1 -
configs/targets/loongarch64-softmmu.mak | 1
bfdt available.
Signed-off-by: Paolo Bonzini
---
meson.build | 1 +
Kconfig.host | 3 +++
hw/arm/Kconfig| 5 +
hw/arm/meson.build| 2 +-
hw/core/Kconfig | 9 -
hw/core/meson.build | 2 +-
hw/i386/Kconfig
All other boards require libfdt if it can be used (including for example
i386/x86_64), so change the "imply" to "select" and always allow -dtb
in qemu-system-xtensa.
Signed-off-by: Paolo Bonzini
---
hw/xtensa/xtfpga.c | 9 -
hw/xtensa/Kconfig | 4 ++--
2 files c
dt altogether. In a normal build without
--target-list or --enable-libfdt, these binaries will be disabled with a
message printed by meson.
Paolo
Paolo Bonzini (4):
meson: remove system/internal distinction for libfdt
kconfig: express dependency of individual boards on libfdt
hw/xtensa: requ
Treat libfdt like slirp and the other dependencies that use --enable-download;
remove the ability to force usage of the subproject.
Signed-off-by: Paolo Bonzini
---
meson.build | 69 +++
meson_options.txt | 6 +--
scripts/meson
On Mon, May 6, 2024 at 6:08 PM Richard Henderson
wrote:
> > -gen_update_cc_op(s);
> > l2 = gen_jz_ecx_string(s);
> > +/*
> > + * Only one iteration is done at a time, so there is
> > + * no control flow junction here and cc_op is never dynamic.
> > + */
> > fn(s, ot
On Thu, Apr 25, 2024 at 8:43 PM Thomas Huth wrote:
> OTOH, it seems
> to work fine, and the FDC is only disabled when it is not available
> in the binary, so I hope this patch is fine, too.
We do the same for parallel so i think it should be fine---definitely
for -nodefaults, and I'd say in gener
On Mon, May 6, 2024 at 1:21 PM Thomas Huth wrote:
>
> The old "-runas" option has the disadvantage that it is not visible
> in the QAPI schema, so it is not available via the normal introspection
> mechanisms. We've recently introduced the "-run-with" option for exactly
> this purpose, which is me
###
KVM Forum 2024
September 22-23, 2024
Brno, Czech Republic
https://kvm-forum.qemu.org/
###
KVM Forum is an annual event that presents a rare opportunity for
developers and users to discuss the state of Linux virtualization
technology and plan for
Add a new post linking to the KVM Forum 2024 Call for Presentations.
Thanks to Stefan Hajnoczi for providing a draft of this post!
Cc: Stefan Hajnoczi
Signed-off-by: Paolo Bonzini
---
_posts/2024-05-06-kvm-forum-cfp.md | 36 ++
1 file changed, 36 insertions
carry
shr cc_dst, cc_src2, length - 1
and cc_dst, cc_dst, 1
// compute overflow
xor cc_src2, cc_src2, T0
extract cc_src2, cc_src2, length - 1, 1
32-bit MUL and IMUL are also slightly more efficient on 64-bit hosts.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode
Compared to the old decoder, the main differences in translation
are for the little-used ARPL instruction. IMUL is adjusted a bit
to share more code to produce flags, but is otherwise very similar.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 3 +
target/i386/tcg
-dependent cc_op could
be observed.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 3f1d2858fc9..6b766f5dd3f 100644
--- a/target/i386/tcg
A few two-byte opcodes are simple extensions of existing one-byte opcodes;
they are easy to decode and need no change to emit.c.inc. Port them to
the new decoder.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 1 +
target/i386/tcg
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 2cd7868d596..7efd12cbe7e 100644
--- a/target/i386/tcg/translate.c
+++ b/target/i386/tcg
Move long-displacement Jcc, SETcc and CMOVcc to the new decoder.
While filling in the tables makes the code seem longer, the new
emitters are all just one line of code.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.h | 1 +
target/i386/tcg
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 4 +++-
target/i386/tcg/decode-new.c.inc | 9 +
target/i386/tcg/emit.c.inc | 11 +++
3 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/target/i386/tcg
Extract the code into new functions, and swap T0/T1 so that T0 corresponds
to the first immediate in the instruction stream.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 93 +
1 file changed, 53 insertions
Since new opcodes are not going to be added in translate.c, round the
case labels that call to disas_insn_new(), including whole sets of
eight opcodes when possible.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 5 ++---
1 file changed, 2
should have done it.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 6b766f5dd3f..17bf85da0ce 100644
--- a/target/i386/tcg/translate.c
+++ b/target
Instead of using s->T0 or s->T1, create a scratch register
when computing the C, NC, L or LE conditions.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 17 ++---
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/target/i386/tcg/translate.c b/targe
Send all converted opcodes to disas_insn_new() directly from the big
decoding switch statement; once more, the debugging/bisecting logic
disappears.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/helper.h| 11 -
target/i386/tcg
Instead of using s->tmp0 or s->tmp4 as the result, just extend the cc_*
registers in place. It is harmless and, if multiple setcc instructions
are used, the optimizer will be able to remove the redundant ones.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.
i386_tr_translate_insn.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 259 +++
target/i386/tcg/decode-new.c.inc | 60 +--
2 files changed, 100 insertions(+), 219 deletions(-)
diff --git a/target/i386/tcg
: Paolo Bonzini
---
target/i386/tcg/translate.c | 1120 ++-
1 file changed, 566 insertions(+), 554 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 634b162ae97..e077fdd8c71 100644
--- a/target/i386/tcg/translate.c
+++ b/target
In the new decoder it is sometimes easier to put the segment
in T1 instead of T0, usually because another operand was loaded
by common code in T0. Genrealize gen_movl_seg_T0 to allow
using any source.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c
While keeping decode->immediate for convenience and for 4-operand instructions,
store the immediate in X86DecodedOp as well. This enables instructions
with more than one immediate such as ENTER. It can also be used for far
calls and jumps.
Reviewed-by: Richard Henderson
Signed-off-by: Pa
Split the bits that have some duplication with disas_insn_new, from
those that should be the main topic of the conversion. This is the
first step towards removing duplicate decoding of prefixes between
disas_insn and disas_insn_new.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
Create a new wrapper for syscall/sysret, and do not go through multiple
layers of wrappers.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 25 -
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 27 +++
target/i386/tcg/decode-new.c.inc | 3 +++
2 files changed, 30 insertions(+)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index e36ed4dcc10..705e8f3ef49 100644
--- a
The new conditions obviously come in handy when testing individual bits
of EFLAGS, and they make it possible to remove the .mask field of
CCPrepare.
Lowering to shift+and is done by the optimizer if necessary.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg
With the introduction of TSTEQ and TSTNE the .mask field is always -1,
so remove all the now-unnecessary code.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 81 +
1 file changed, 27 insertions(+), 54 deletions
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 2 +-
target/i386/tcg/decode-new.c.inc | 120 ++
target/i386/tcg/emit.c.inc | 202 +++
3 files changed, 323 insertions(+), 1 deletion(-)
diff
prevents gen_prepare_cc from returning s->cc_srcT.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 9aecd415b38..3f1d2858fc9 100644
--- a/targ
comparison against zero anyway, and it avoids shifts by 64
which are undefined behavior.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 28
target/i386/tcg/emit.c.inc | 5 ++---
2 files changed, 22 insertions(+), 11
o not generate temporaries until after all early return cases
- compute carry of rotation operations with extract instead of
setcond(TSTNE)
- gen_shift_dynamic_flags() uses cc_op_live[] to generate movcond
operations
- a few alignment changes to decoding tables and removals of TABs
Paolo B
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with AVR.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/avr-softmmu/defau
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with CRIS.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/cris-softmmu/defau
QemuOpt is basically an internal data structure. It has no business
being defined except if you need functions from include/qemu/option.h.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/qemu/option.h | 2 ++
include/qemu/typedefs.h | 1 -
2 files changed, 2
Basically all uses of GraphicHwOps are defining an instance of it, which
requires the
full definition of the struct. It is pointless to have it in typedefs.h.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
hw/display/vga_int.h| 1 +
include/qemu/typedefs.h | 1 -
2
For ARM targets, boards that require TCG are already using "default y".
Switch ARM_VIRT to the same selection mechanism.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/arm-softmmu/default.mak | 3 ++-
.gitlab-ci.d/bui
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with Loongarch.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/loongarch
For types that are embedded in structs defined by pci.h, the definition
is pretty much required to be available. Remove them from typedefs.h.
Signed-off-by: Paolo Bonzini
---
include/hw/pci/pcie.h | 3 +++
include/hw/pci/pcie_aer.h | 38 ++---
include
Migration code needs no private fields of the coroutine backend.
Include the "regular" coroutine.h header.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
migration/migration.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/migration/migration.h b
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with Xtensa.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/xtensa-softmmu/d
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with RX.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/rx-softmmu/defau
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with SH.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/sh4-softmmu/defau
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with PARISC.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/hppa-softmmu/defau
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with MIPS.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/mips-softmmu/
Let hw/hyperv/hyperv.c and hw/intc/s390_flic.c handle (respectively)
SynIC and adapter routes, removing the code from target-independent
files. This also removes the only occurrence of AdapterInfo outside
s390 code, so remove that from typedefs.h.
Signed-off-by: Paolo Bonzini
---
include/hw
They are needed in very few places, which already depends on other generated
QAPI
files. The benefit of having these types in typedefs.h is small.
Signed-off-by: Paolo Bonzini
---
include/hw/core/cpu.h | 1 +
include/qemu/typedefs.h | 2 --
2 files changed, 1 insertion(+), 2 deletions
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with Microblaze.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/microbla
-off-by: Paolo Bonzini
---
accel/tcg/tb-jmp-cache.h | 4 ++--
include/hw/core/cpu.h| 10 --
include/qemu/typedefs.h | 3 ---
system/physmem.c | 4 ++--
4 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/accel/tcg/tb-jmp-cache.h b/accel/tcg/tb-jmp-cache.h
index
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with OpenRISC.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/or1k-softmmu/d
qga/commands-posix.c does not compile on FreeBSD due to a confusion
between "chpasswdata" (wrong) and "chpasswddata" (used in the #else
branch).
Fixes: 0e5b75a390 ("qga/commands-posix: qmp_guest_set_user_password: use
ga_run_command helper")
Reviewed-by: Thomas Huth
ned-off-by: Paolo Bonzini
---
configs/devices/ppc-softmmu/default.mak | 26 ---
configs/devices/ppc64-softmmu/default.mak | 8 +++
.gitlab-ci.d/buildtest.yml| 2 +-
hw/ppc/Kconfig| 26 +++
target/p
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Start with Alpha.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/alpha-softmmu/defau
quot;depends on" clause.
Signed-off-by: Paolo Bonzini
---
meson.build| 12 +++-
target/Kconfig | 3 +++
2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/meson.build b/meson.build
index 5db2dbc12ec..43da4923721 100644
--- a/meson.build
+++ b/meson.build
@@ -3005,7 +3005
From: Lei Wang
Add the missing features(ss, tsc-adjust, cldemote, movdiri, movdir64b) in
the SapphireRapids-v3 CPU model.
Signed-off-by: Lei Wang
Message-ID: <20240424072912.43188-1-lei4.w...@intel.com>
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 11 +++
1 file chang
Exactly nobody needs it there. Place the typedef in the header
that defines the struct.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/net/announce.h | 4 ++--
include/qemu/typedefs.h | 1 -
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/include
Together with the series at
https://patchew.org/QEMU/20240423131612.28362-1-pbonz...@redhat.com/,
this allows adding sparc-softmmu to the target list of the
build-without-defaults CI job.
Reviewed-by: Richard Henderson
Signed-off-by: Paolo Bonzini
---
tests/qtest/m48t59-test.c | 11
It is defined and referred to exclusively from a .c file.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/qemu/typedefs.h | 1 -
migration/postcopy-ram.c | 4 ++--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/include/qemu/typedefs.h b/include
() has
worse diagnostics than g_new0, which uses g_error to report the actual
allocation size that failed.
Cc: qemu-triv...@nongnu.org
Cc: Roman Kiryanov
Reviewed-by: Daniel Berrange
Signed-off-by: Paolo Bonzini
---
include/qemu/bitmap.h | 19 ---
1 file changed, 8 insertions(+), 11
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with TriCore.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/tricore-softmmu/d
Boards have been switched to use "default y" and are now listed
in default-configs/*.mak only for convenience.
Document this change and the new possibilities that it allows.
Signed-off-by: Paolo Bonzini
---
docs/devel/kconfig.rst | 14 --
1 file changed, 12 insert
Move it to the existing "PIC related things" header, hw/intc/i8259.h.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/hw/intc/i8259.h | 2 ++
include/qemu/typedefs.h | 1 -
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/hw/intc
Only FWCfgState is used as part of APIs such as acpi_ghes_add_fw_cfg.
Everything else need not be in typedefs.h.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/hw/nvram/fw_cfg.h | 2 ++
include/qemu/typedefs.h | 3 ---
2 files changed, 2 insertions(+), 3
It is needed in very few places, which already depend on other parts of
qdev-core.h files. The benefit of having it in typedefs.h is small.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/hw/qdev-core.h | 1 +
include/qemu/typedefs.h | 1 -
2 files changed, 1
*
using QemuLockable as a part of the CoQueue API).
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/qemu/coroutine.h | 4 ++--
include/qemu/lockable.h | 4 ++--
include/qemu/typedefs.h | 1 -
3 files changed, 4 insertions(+), 5 deletions(-)
diff --git a/include/qemu
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with RISC-V.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/riscv32-softmmu/d
If virgl and opengl are not available, the build process creates a useless
libvirtio-vga-gl module that does not have any device in it. Follow the
example of virtio-vga-rutabaga and do not build the module at all in that
case.
Signed-off-by: Paolo Bonzini
---
hw/display/meson.build | 14
Exactly nobody needs them there. Place the typedef in the header
that defines the struct.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/qemu/typedefs.h | 2 --
include/sysemu/numa.h | 8
2 files changed, 4 insertions(+), 6 deletions(-)
diff --git a
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with m68k.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/m68k-softmmu/defaul
Some targets use "default y" for boards to filter out those that require
TCG. For consistency we are switching all other targets to do the same.
Continue with s390.
No changes to generated config-devices.mak file.
Signed-off-by: Paolo Bonzini
---
configs/devices/s390x-softmmu/defau
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