[Qemu-devel] [PATCH] hw/watchdog/wdt_i6300esb : remove a unnecessary comment
The registered memory region of i6300esb is not suitable for coalesced mmio, because a write for the region may trigger an immediate action and can't be delayed. Signed-off-by: Peng Hao --- hw/watchdog/wdt_i6300esb.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/watchdog/wdt_i6300esb.c b/hw/watchdog/wdt_i6300esb.c index 7b59469..1c6eddf 100644 --- a/hw/watchdog/wdt_i6300esb.c +++ b/hw/watchdog/wdt_i6300esb.c @@ -449,7 +449,6 @@ static void i6300esb_realize(PCIDevice *dev, Error **errp) memory_region_init_io(>io_mem, OBJECT(d), _ops, d, "i6300esb", 0x10); pci_register_bar(>dev, 0, 0, >io_mem); -/* qemu_register_coalesced_mmio (addr, 0x10); ? */ } static void i6300esb_exit(PCIDevice *dev) -- 1.8.3.1
[Qemu-devel] [PATCH V12 2/5] hw/misc/pvpanic: Cosmetic renaming
From: Philippe Mathieu-Daudé
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC_ISA_DEVICE.
- MemoryRegion io -> mr.
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..0f23a67 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,8 +25,8 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj)\
-OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
+#define PVPANIC_ISA_DEVICE(obj)\
+OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
{
@@ -45,12 +45,16 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
+/* PVPanicISAState for ISA device and
+ * use ioport.
+ */
+typedef struct PVPanicISAState {
ISADevice parent_obj;
-
-MemoryRegion io;
+/*< private>*/
uint16_t ioport;
-} PVPanicState;
+/**/
+MemoryRegion mr;
+} PVPanicISAState;
/* return supported events on read */
static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
@@ -75,15 +79,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(obj);
-memory_region_init_io(>io, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,11 +100,11 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
-isa_register_ioport(d, >io, s->ioport);
+isa_register_ioport(d, >mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
-DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -116,7 +120,7 @@ static void pvpanic_isa_class_init(ObjectClass *klass, void
*data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent= TYPE_ISA_DEVICE,
-.instance_size = sizeof(PVPanicState),
+.instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init= pvpanic_isa_class_init,
};
--
1.8.3.1
[Qemu-devel] [PATCH V12 3/5] hw/misc/pvpanic: Add the PCI interface
Add pvpanic new type "TYPE_PVPANIC_PCI"
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 62 ---
include/hw/misc/pvpanic.h | 1 +
include/hw/pci/pci.h | 1 +
3 files changed, 60 insertions(+), 4 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 0f23a67..9fb9168 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang
* Hu Tao
+ * Peng Hao
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -18,6 +20,7 @@
#include "hw/nvram/fw_cfg.h"
#include "hw/misc/pvpanic.h"
+#include "hw/pci/pci.h"
/* The bit of supported pv event */
#define PVPANIC_F_PANICKED 0
@@ -27,6 +30,8 @@
#define PVPANIC_ISA_DEVICE(obj)\
OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+#define PVPANIC_PCI_DEVICE(obj)\
+OBJECT_CHECK(PVPanicPCIState, (obj), TYPE_PVPANIC_PCI)
static void handle_event(int event)
{
@@ -56,21 +61,31 @@ typedef struct PVPanicISAState {
MemoryRegion mr;
} PVPanicISAState;
+/* PVPanicPCIState for PCI device and
+ * use mmio.
+ */
+typedef struct PVPanicPCIState {
+/*< private>*/
+PCIDevice dev;
+
+/**/
+MemoryRegion mr;
+} PVPanicPCIState;
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
-.read = pvpanic_ioport_read,
-.write = pvpanic_ioport_write,
+.read = pvpanic_read,
+.write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -125,9 +140,48 @@ static TypeInfo pvpanic_isa_info = {
.class_init= pvpanic_isa_class_init,
};
+/* pvpanic pci device*/
+
+static void pvpanic_pci_realizefn(PCIDevice *dev, Error **errp)
+{
+PVPanicPCIState *s = DO_UPCAST(PVPanicPCIState, dev, dev);
+
+memory_region_init_io(>mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC_PCI, 2);
+pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, >mr);
+}
+
+static void pvpanic_pci_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass);
+
+pc->realize = pvpanic_pci_realizefn;
+pc->vendor_id = PCI_VENDOR_ID_REDHAT;
+pc->device_id = PCI_DEVICE_ID_REDHAT_PVPANIC;
+pc->revision = 1;
+pc->class_id = PCI_CLASS_SYSTEM_OTHER;
+
+set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_pci_info = {
+.name = TYPE_PVPANIC_PCI,
+.parent= TYPE_PCI_DEVICE,
+.instance_size = sizeof(PVPanicPCIState),
+.class_init= pvpanic_pci_class_init,
+.interfaces = (InterfaceInfo[]) {
+{ INTERFACE_PCIE_DEVICE },
+{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
+{ }
+}
+};
+
+
static void pvpanic_register_types(void)
{
type_register_static(_isa_info);
+type_register_static(_pci_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..477cc36 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -15,6 +15,7 @@
#define HW_MISC_PVPANIC_H
#define TYPE_PVPANIC "pvpanic"
+#define TYPE_PVPANIC_PCI "pvpanic-pci"
#define PVPANIC_IOPORT_PROP "ioport"
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index e6514bb..92622f7 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -103,6 +103,7 @@ extern bool pci_available;
#define PCI_DEVICE_ID_REDHAT_PCIE_BRIDGE 0x000e
#define PCI_DEVICE_ID_REDHAT_MDPY0x000f
#define PCI_DEVICE_ID_REDHAT_QXL 0x0100
+#define PCI_DEVICE_ID_REDHAT_PVPANIC 0x0101
#define FMT_PCIBUS PRIx64
--
1.8.3.1
[Qemu-devel] [PATCH V12 4/5] hw/arm/virt: Use the pvpanic pci device
Add pvpanic device in arm virt machine config file. Signed-off-by: Peng Hao --- default-configs/arm-softmmu.mak | 1 + 1 file changed, 1 insertion(+) diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak index 2420491..50345df 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -159,3 +159,4 @@ CONFIG_PCI_DESIGNWARE=y CONFIG_STRONGARM=y CONFIG_HIGHBANK=y CONFIG_MUSICPAL=y +CONFIG_PVPANIC=y -- 1.8.3.1
[Qemu-devel] [PATCH V12 1/5] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
From: Philippe Mathieu-Daudé The 'pvpanic' ISA device can be use by any machine with an ISA bus. Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Peng Hao --- hw/misc/Makefile.objs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 680350b..c387ce4 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o common-obj-$(CONFIG_EDU) += edu.o common-obj-$(CONFIG_PCA9552) += pca9552.o +common-obj-$(CONFIG_PVPANIC) += pvpanic.o common-obj-y += unimp.o common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o @@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o -obj-$(CONFIG_PVPANIC) += pvpanic.o obj-$(CONFIG_AUX) += auxbus.o obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o obj-$(CONFIG_MSF2) += msf2-sysreg.o -- 1.8.3.1
[Qemu-devel] [PATCH] pvpanic : update pvpanic document
Add mmio mode as a pci device support info in docs/specs/pvpanic.txt. Signed-off-by: Peng Hao --- docs/specs/pvpanic.txt | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt index c7bbacc..6d62d72 100644 --- a/docs/specs/pvpanic.txt +++ b/docs/specs/pvpanic.txt @@ -1,7 +1,7 @@ PVPANIC DEVICE == -pvpanic device is a simulated ISA device, through which a guest panic +pvpanic device is a simulated device, through which a guest panic event is sent to qemu, and a QMP event is generated. This allows management apps (e.g. libvirt) to be notified and respond to the event. @@ -9,6 +9,10 @@ The management app has the option of waiting for GUEST_PANICKED events, and/or polling for guest-panicked RunState, to learn when the pvpanic device has fired a panic event. +The pvpanic device can be implemented as an ISA device (using IOPORT), +or, since qemu 4.0, as a PCI device (using MMIO address space of pci +device). + ISA Interface - @@ -19,6 +23,13 @@ Software should set only bits both itself and the device recognize. Currently, only bit 0 is recognized, setting it indicates a guest panic has happened. +PCI Interface +- + +The PCI interface is similar to the ISA interface except that it uses +MMIO. For example, the arm virt machine could enable pvpanic-pci device +according to adding "-device pvpanic-pci" in qemu command. + ACPI Interface -- -- 1.8.3.1
[Qemu-devel] [PATCH V12 0/5] add pvpanic mmio support
The first patches are simple cleanups: - patch 1 move the pvpanic device with the 'ocmmon objects' so we compile it once for the x86/arm/aarch64 archs, - patch 2 simply renames ISA fields/definitions to generic ones. Then instead of add/use the MMIO pvpanic device in the virt machine in an unique patch, I split it in two distinct patches: - patch 3 uses Peng Hao's work, but add the MMIO interface to the existing device (no logical change). - patch 4 is Peng Hao's work in the virt machine (no logical change). - patch 5 add pvpanic device in acpi table in virt machine v2 from Peng Hao is: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03433.html v3 --> v4 patch 1,2 no modification. patch 3, add TYPE_PANIC_MMIO for distinguishing different bus device, virt + isa_pvpanic will abnormally terminate virtual machine. patch 4, "pvpanic,mmio" --> "qemu,pvpanic-mmio". patch 5, newly added. v4 --> v5 patch 1,2 no modification. patch 3 delete PvpanicCommonState structure. patch 4 VIRT_PVPANIC_MMIO --> VIRT_PVPANIC correct VIRT_PVPANIC's overlap start address patch 5 no modification. v5 --> v6 add document. v6 --> v7 patch 5 modify device name from "PANC" to "PEVT". patch 6 modify document description. v7 --> v8 add configure interface for pvpanic-mmio v8 --> v9 revert "moving structure definition to header file" because of compile error in x86. v9 --> v10 Modify document. Repair missing header files. v10 --> v11 change configure interface in virt machine configure parameters. v11 --> v12 realize pvpanic as a pci device and use the mmio of pci device. Philippe Mathieu-Daudé (2): hw/misc/pvpanic: Build the pvpanic device in $(common-obj) hw/misc/pvpanic: Cosmetic renaming Peng Hao (3): pvpanic : update pvpanic document hw/arm/virt: Use the pvpanic device pvpanic: add mmio interface as a pci device default-configs/arm-softmmu.mak | 1 + docs/specs/pvpanic.txt | 13 +- hw/misc/Makefile.objs | 2 +- hw/misc/pvpanic.c | 91 + include/hw/misc/pvpanic.h | 1 + include/hw/pci/pci.h| 1 + 6 files changed, 91 insertions(+), 18 deletions(-) -- 1.8.3.1
[Qemu-devel] [PATCH V11 2/8] hw/misc/pvpanic: Cosmetic renaming
From: Philippe Mathieu-Daudé
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC_ISA_DEVICE.
- MemoryRegion io -> mr.
Reviewed-by: Peter Maydell
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..0f23a67 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,8 +25,8 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj)\
-OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
+#define PVPANIC_ISA_DEVICE(obj)\
+OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
{
@@ -45,12 +45,16 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
+/* PVPanicISAState for ISA device and
+ * use ioport.
+ */
+typedef struct PVPanicISAState {
ISADevice parent_obj;
-
-MemoryRegion io;
+/*< private>*/
uint16_t ioport;
-} PVPanicState;
+/**/
+MemoryRegion mr;
+} PVPanicISAState;
/* return supported events on read */
static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
@@ -75,15 +79,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(obj);
-memory_region_init_io(>io, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,11 +100,11 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
-isa_register_ioport(d, >io, s->ioport);
+isa_register_ioport(d, >mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
-DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -116,7 +120,7 @@ static void pvpanic_isa_class_init(ObjectClass *klass, void
*data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent= TYPE_ISA_DEVICE,
-.instance_size = sizeof(PVPanicState),
+.instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init= pvpanic_isa_class_init,
};
--
1.8.3.1
[Qemu-devel] [PATCH V11 0/8] add pvpanic mmio support
The first patches are simple cleanups: - patch 1 move the pvpanic device with the 'ocmmon objects' so we compile it once for the x86/arm/aarch64 archs, - patch 2 simply renames ISA fields/definitions to generic ones. Then instead of add/use the MMIO pvpanic device in the virt machine in an unique patch, I split it in two distinct patches: - patch 3 uses Peng Hao's work, but add the MMIO interface to the existing device (no logical change). - patch 4 is Peng Hao's work in the virt machine (no logical change). - patch 5 add pvpanic device in acpi table in virt machine v2 from Peng Hao is: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03433.html v3 --> v4 patch 1,2 no modification. patch 3, add TYPE_PANIC_MMIO for distinguishing different bus device, virt + isa_pvpanic will abnormally terminate virtual machine. patch 4, "pvpanic,mmio" --> "qemu,pvpanic-mmio". patch 5, newly added. v4 --> v5 patch 1,2 no modification. patch 3 delete PvpanicCommonState structure. patch 4 VIRT_PVPANIC_MMIO --> VIRT_PVPANIC correct VIRT_PVPANIC's overlap start address patch 5 no modification. v5 --> v6 add document. v6 --> v7 patch 5 modify device name from "PANC" to "PEVT". patch 6 modify document description. v7 --> v8 add configure interface for pvpanic-mmio v8 --> v9 revert "moving structure definition to header file" because of compile error in x86. v9 --> v10 Modify document. Repair missing header files. v10 --> v11 change configure interface in virt machine configure parameters. the kernel part of the series: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git/log/?h=char-misc-testing misc/pvpanic: remove a redundant comma misc/pvpanic: convert to SPDX license tags misc/pvpanic: change header file sort style misc/pvpanic: remove unnecessary header file misc/pvpanic : break dependency on ACPI misc/pvpanic : grouping ACPI related stuff misc/pvpanic: add support to get pvpanic device info FDT dt-bindings: misc/pvpanic: add document for pvpanic-mmio misc/pvpanic: add MMIO support misc/pvpanic: simplify the code using acpi_dev_resource_io pvpanic: move pvpanic to misc as common driver Philippe Mathieu-Daudé (2): hw/misc/pvpanic: Build the pvpanic device in $(common-obj) hw/misc/pvpanic: Cosmetic renaming Peng Hao (6): hw/misc/pvpanic: Add the MMIO interface hw/arm/virt: Use the pvpanic device hw/arm/virt: add pvpanic device in virt acpi table hw/misc/pvpanic: add configure interface for pvpanic-mmio hw/misc/pvpanic: realize the configure interface pvpanic : update pvpanic document default-configs/arm-softmmu.mak | 1 + docs/specs/pvpanic.txt | 15 ++- hw/arm/virt-acpi-build.c| 17 hw/arm/virt.c | 23 ++- hw/misc/Makefile.objs | 2 +- hw/misc/pvpanic.c | 87 + include/hw/arm/virt.h | 1 + include/hw/misc/pvpanic.h | 6 +++ 9 files changed, 134 insertions(+), 20 deletions(-) -- 1.8.3.1
[Qemu-devel] [PATCH V11 1/8] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
From: Philippe Mathieu-Daudé The 'pvpanic' ISA device can be use by any machine with an ISA bus. Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Peng Hao --- hw/misc/Makefile.objs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 680350b..c387ce4 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o common-obj-$(CONFIG_EDU) += edu.o common-obj-$(CONFIG_PCA9552) += pca9552.o +common-obj-$(CONFIG_PVPANIC) += pvpanic.o common-obj-y += unimp.o common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o @@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o -obj-$(CONFIG_PVPANIC) += pvpanic.o obj-$(CONFIG_AUX) += auxbus.o obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o obj-$(CONFIG_MSF2) += msf2-sysreg.o -- 1.8.3.1
[Qemu-devel] [PATCH V11 3/8] hw/misc/pvpanic: Add the MMIO interface
Add pvpanic new type "TYPE_PVPANIC_MMIO"
Reviewed-by: Peter Maydell
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 50 +++
include/hw/misc/pvpanic.h | 1 +
2 files changed, 47 insertions(+), 4 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 0f23a67..c9382a8 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang
* Hu Tao
+ * Peng Hao
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -28,6 +30,9 @@
#define PVPANIC_ISA_DEVICE(obj)\
OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+#define PVPANIC_MMIO_DEVICE(obj)\
+OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
+
static void handle_event(int event)
{
static bool logged;
@@ -56,21 +61,32 @@ typedef struct PVPanicISAState {
MemoryRegion mr;
} PVPanicISAState;
+/* PVPanicMMIOState for sysbus device and
+ * use mmio.
+ */
+typedef struct PVPanicMMIOState {
+SysBusDevice parent_obj;
+/**/
+
+/* public */
+MemoryRegion mr;
+} PVPanicMMIOState;
+
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
-.read = pvpanic_ioport_read,
-.write = pvpanic_ioport_write,
+.read = pvpanic_read,
+.write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -125,9 +141,35 @@ static TypeInfo pvpanic_isa_info = {
.class_init= pvpanic_isa_class_init,
};
+static void pvpanic_mmio_initfn(Object *obj)
+{
+PVPanicMMIOState *s = PVPANIC_MMIO_DEVICE(obj);
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+memory_region_init_io(>mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC_MMIO, 2);
+sysbus_init_mmio(sbd, >mr);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+.name = TYPE_PVPANIC_MMIO,
+.parent= TYPE_SYS_BUS_DEVICE,
+.instance_size = sizeof(PVPanicMMIOState),
+.instance_init = pvpanic_mmio_initfn,
+.class_init= pvpanic_mmio_class_init,
+};
+
static void pvpanic_register_types(void)
{
type_register_static(_isa_info);
+type_register_static(_mmio_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..f1a05b2 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -15,6 +15,7 @@
#define HW_MISC_PVPANIC_H
#define TYPE_PVPANIC "pvpanic"
+#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
#define PVPANIC_IOPORT_PROP "ioport"
--
1.8.3.1
[Qemu-devel] [PATCH V11 7/8] hw/arm/virt: use the configure interface
Use the configure interface for pvpanic-mmio.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 5 -
hw/arm/virt.c| 3 +++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 4215ca6..4990a0d 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -785,7 +785,10 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
-acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
+
+if (vms->pvpanic) {
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
+}
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
(irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS);
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index fdd3f20..a63e9e1 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -198,6 +198,9 @@ static void create_pvpanic_device(const VirtMachineState
*vms)
hwaddr base = vms->memmap[VIRT_PVPANIC].base;
hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+if (!vms->pvpanic) {
+return;
+}
sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
--
1.8.3.1
[Qemu-devel] [PATCH V11 5/8] hw/arm/virt: add pvpanic device in virt acpi table
Add pvpanic device in virt acpi table, so when kernel command line
uses acpi=force, kernel can get info from acpi table.
Reviewed-by: Andrew Jones
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..4215ca6 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -84,6 +84,20 @@ static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry
*uart_memmap,
aml_append(scope, dev);
}
+static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry
*pvpanic_memmap)
+{
+Aml *dev = aml_device("PEVT");
+aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+Aml *crs = aml_resource_template();
+aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
+ pvpanic_memmap->size, AML_READ_WRITE));
+
+aml_append(dev, aml_name_decl("_CRS", crs));
+aml_append(scope, dev);
+}
+
static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap)
{
Aml *dev = aml_device("FWCF");
@@ -771,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
(irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS);
--
1.8.3.1
[Qemu-devel] [PATCH V11 4/8] hw/arm/virt: Use the pvpanic device
Add pvpanic device in arm virt machine.
Signed-off-by: Peng Hao
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/virt.c | 22 ++
include/hw/arm/virt.h | 1 +
3 files changed, 24 insertions(+)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2420491..50345df 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -159,3 +159,4 @@ CONFIG_PCI_DESIGNWARE=y
CONFIG_STRONGARM=y
CONFIG_HIGHBANK=y
CONFIG_MUSICPAL=y
+CONFIG_PVPANIC=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a2b8d8f..a4541fa 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -59,6 +59,7 @@
#include "qapi/visitor.h"
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
+#include "hw/misc/pvpanic.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -143,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_GPIO] = { 0x0903, 0x1000 },
[VIRT_SECURE_UART] ={ 0x0904, 0x1000 },
[VIRT_SMMU] = { 0x0905, 0x0002 },
+[VIRT_PVPANIC] ={ 0x0907, 0x0002 },
[VIRT_MMIO] = { 0x0a00, 0x0200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c00, 0x0200 },
@@ -190,6 +192,24 @@ static bool cpu_type_valid(const char *cpu)
return false;
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+char *nodename;
+hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
+
+nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+qemu_fdt_add_subnode(vms->fdt, nodename);
+qemu_fdt_setprop_string(vms->fdt, nodename,
+"compatible", "qemu,pvpanic-mmio");
+qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+
+g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
void *fdt = create_device_tree(>fdt_size);
@@ -1531,6 +1551,8 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
+create_pvpanic_device(vms);
+
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..937c124 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -66,6 +66,7 @@ enum {
VIRT_GIC_REDIST,
VIRT_GIC_REDIST2,
VIRT_SMMU,
+VIRT_PVPANIC,
VIRT_UART,
VIRT_MMIO,
VIRT_RTC,
--
1.8.3.1
[Qemu-devel] [PATCH V11 6/8] hw/arm/virt: add configure interface for pvpanic-mmio
Add configure interface for pvpanic-mmio device in virt machine.
Signed-off-by: Peng Hao
---
hw/arm/virt.c | 23 +++
include/hw/arm/virt.h | 1 +
2 files changed, 24 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a4541fa..fdd3f20 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1655,6 +1655,20 @@ static void virt_set_its(Object *obj, bool value, Error
**errp)
vms->its = value;
}
+static bool virt_get_pvpanic(Object *obj, Error **errp)
+{
+VirtMachineState *vms = VIRT_MACHINE(obj);
+
+return vms->pvpanic;
+}
+
+static void virt_set_pvpanic(Object *obj, bool value, Error **errp)
+{
+VirtMachineState *vms = VIRT_MACHINE(obj);
+
+vms->pvpanic = value;
+}
+
static char *virt_get_gic_version(Object *obj, Error **errp)
{
VirtMachineState *vms = VIRT_MACHINE(obj);
@@ -1884,6 +1898,15 @@ static void virt_3_1_instance_init(Object *obj)
"Valid values are none and smmuv3",
NULL);
+/* Default disallows pvpanic-mmio instantiation */
+vms->pvpanic = false;
+object_property_add_bool(obj, "pvpanic", virt_get_pvpanic,
+ virt_set_pvpanic, NULL);
+object_property_set_description(obj, "pvpanic",
+"Set on/off to enable/disable "
+"PVPANIC MMIO device",
+NULL);
+
vms->memmap = a15memmap;
vms->irqmap = a15irqmap;
}
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 937c124..7d6d1c0 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -113,6 +113,7 @@ typedef struct {
bool highmem;
bool highmem_ecam;
bool its;
+bool pvpanic;
bool virt;
int32_t gic_version;
VirtIOMMUType iommu;
--
1.8.3.1
[Qemu-devel] [PATCH V11 8/8] pvpanic : update pvpanic document
Add mmio support info in docs/specs/pvpanic.txt. Reviewed-by: Andrew Jones Signed-off-by: Peng Hao --- docs/specs/pvpanic.txt | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt index c7bbacc..994f080 100644 --- a/docs/specs/pvpanic.txt +++ b/docs/specs/pvpanic.txt @@ -1,7 +1,7 @@ PVPANIC DEVICE == -pvpanic device is a simulated ISA device, through which a guest panic +pvpanic device is a simulated device, through which a guest panic event is sent to qemu, and a QMP event is generated. This allows management apps (e.g. libvirt) to be notified and respond to the event. @@ -9,6 +9,9 @@ The management app has the option of waiting for GUEST_PANICKED events, and/or polling for guest-panicked RunState, to learn when the pvpanic device has fired a panic event. +The pvpanic device can be implemented as an ISA device (using IOPORT), +or, since qemu 4.0, as a SYSBUS device (using MMIO). + ISA Interface - @@ -19,6 +22,13 @@ Software should set only bits both itself and the device recognize. Currently, only bit 0 is recognized, setting it indicates a guest panic has happened. +SYSBUS Interface + + +The SYSBUS interface is similar to the ISA interface except that it uses +MMIO. For example, the arm virt machine could put the pvpanic device at +[0x907, 0x9070001], where currently only the first byte is used. + ACPI Interface -- -- 1.8.3.1
[Qemu-devel] [PATCH V10 7/9] hw/misc/pvpanic: preparing for adding configure interface
Prepare for pvpanic-mmio configure interface.
Signed-off-by: Peng Hao
---
hw/arm/sysbus-fdt.c | 2 ++
hw/arm/virt.c | 2 ++
hw/misc/pvpanic.c | 11 +--
3 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/hw/arm/sysbus-fdt.c b/hw/arm/sysbus-fdt.c
index ad698d4..34577f3 100644
--- a/hw/arm/sysbus-fdt.c
+++ b/hw/arm/sysbus-fdt.c
@@ -38,6 +38,7 @@
#include "hw/vfio/vfio-amd-xgbe.h"
#include "hw/display/ramfb.h"
#include "hw/arm/fdt.h"
+#include "hw/misc/pvpanic.h"
/*
* internal struct that contains the information to create dynamic
@@ -459,6 +460,7 @@ static const BindingEntry bindings[] = {
VFIO_PLATFORM_BINDING("amd,xgbe-seattle-v1a", add_amd_xgbe_fdt_node),
#endif
TYPE_BINDING(TYPE_RAMFB_DEVICE, no_fdt_node),
+TYPE_BINDING(TYPE_PVPANIC_MMIO, no_fdt_node),
TYPE_BINDING("", NULL), /* last element */
};
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index f2cb5de..1fd5941 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -59,6 +59,7 @@
#include "qapi/visitor.h"
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
+#include "hw/misc/pvpanic.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -1783,6 +1784,7 @@ static void virt_machine_class_init(ObjectClass *oc, void
*data)
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_CALXEDA_XGMAC);
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_AMD_XGBE);
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE);
+machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PVPANIC_MMIO);
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_PLATFORM);
mc->block_default_type = IF_VIRTIO;
mc->no_cdrom = 1;
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index c9382a8..b6b5c89 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -67,7 +67,7 @@ typedef struct PVPanicISAState {
typedef struct PVPanicMMIOState {
SysBusDevice parent_obj;
/**/
-
+uint32_t base;
/* public */
MemoryRegion mr;
} PVPanicMMIOState;
@@ -151,10 +151,17 @@ static void pvpanic_mmio_initfn(Object *obj)
sysbus_init_mmio(sbd, >mr);
}
+static Property pvpanic_mmio_properties[] = {
+DEFINE_PROP_UINT32("mmio", PVPanicMMIOState, base, 0x0907),
+DEFINE_PROP_END_OF_LIST(),
+};
+
static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
-
+
+dc->user_creatable = true;
+dc->props = pvpanic_mmio_properties;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}
--
1.8.3.1
[Qemu-devel] [PATCH V10 8/9] hw/misc/pvpanic: realize the configure interface
Add configure interface for pvpanic-mmio. In qemu command line
use -device pvpanic-mmio to enable the device.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 5 -
hw/arm/virt.c| 7 +++
hw/misc/pvpanic.c| 1 +
3 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 2adba60..d29d229 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -45,6 +45,7 @@
#include "hw/arm/virt.h"
#include "sysemu/numa.h"
#include "kvm_arm.h"
+#include "hw/misc/pvpanic.h"
#define ARM_SPI_BASE 32
#define ACPI_POWER_BUTTON_DEVICE "PWRB"
@@ -785,7 +786,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
-acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
+if (pvpanic_mmio()) {
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
+}
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
(irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS);
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 1fd5941..9cddf36 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -198,8 +198,6 @@ static void create_pvpanic_device(const VirtMachineState
*vms)
hwaddr base = vms->memmap[VIRT_PVPANIC].base;
hwaddr size = vms->memmap[VIRT_PVPANIC].size;
- sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
-
nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
qemu_fdt_add_subnode(vms->fdt, nodename);
qemu_fdt_setprop_string(vms->fdt, nodename,
@@ -1330,6 +1328,9 @@ void virt_machine_done(Notifier *notifier, void *data)
struct arm_boot_info *info = >bootinfo;
AddressSpace *as = arm_boot_address_space(cpu, info);
+if (pvpanic_mmio()) {
+create_pvpanic_device(vms);
+}
/*
* If the user provided a dtb, we assume the dynamic sysbus nodes
* already are integrated there. This corresponds to a use case where
@@ -1551,8 +1552,6 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
-create_pvpanic_device(vms);
-
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index b6b5c89..6c4a79f 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -149,6 +149,7 @@ static void pvpanic_mmio_initfn(Object *obj)
memory_region_init_io(>mr, OBJECT(s), _ops, s,
TYPE_PVPANIC_MMIO, 2);
sysbus_init_mmio(sbd, >mr);
+sysbus_mmio_map(sbd, 0, s->base);
}
static Property pvpanic_mmio_properties[] = {
--
1.8.3.1
[Qemu-devel] [PATCH V10 0/9] add pvpanic mmio support
The first patches are simple cleanups: - patch 1 move the pvpanic device with the 'ocmmon objects' so we compile it once for the x86/arm/aarch64 archs, - patch 2 simply renames ISA fields/definitions to generic ones. Then instead of add/use the MMIO pvpanic device in the virt machine in an unique patch, I split it in two distinct patches: - patch 3 uses Peng Hao's work, but add the MMIO interface to the existing device (no logical change). - patch 4 is Peng Hao's work in the virt machine (no logical change). - patch 5 add pvpanic device in acpi table in virt machine v2 from Peng Hao is: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03433.html v3 --> v4 patch 1,2 no modification. patch 3, add TYPE_PANIC_MMIO for distinguishing different bus device, virt + isa_pvpanic will abnormally terminate virtual machine. patch 4, "pvpanic,mmio" --> "qemu,pvpanic-mmio". patch 5, newly added. v4 --> v5 patch 1,2 no modification. patch 3 delete PvpanicCommonState structure. patch 4 VIRT_PVPANIC_MMIO --> VIRT_PVPANIC correct VIRT_PVPANIC's overlap start address patch 5 no modification. v5 --> v6 add document. v6 --> v7 patch 5 modify device name from "PANC" to "PEVT". patch 6 modify document description. v7 --> v8 add configure interface for pvpanic-mmio v8 --> v9 revert "moving structure definition to header file" because of compile error in x86. v9 --> v10 Modify document. Repair missing header files. the kernel part of the series: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git/log/?h=char-misc-testing misc/pvpanic: remove a redundant comma misc/pvpanic: convert to SPDX license tags misc/pvpanic: change header file sort style misc/pvpanic: remove unnecessary header file misc/pvpanic : break dependency on ACPI misc/pvpanic : grouping ACPI related stuff misc/pvpanic: add support to get pvpanic device info FDT dt-bindings: misc/pvpanic: add document for pvpanic-mmio misc/pvpanic: add MMIO support misc/pvpanic: simplify the code using acpi_dev_resource_io pvpanic: move pvpanic to misc as common driver Philippe Mathieu-Daudé (2): hw/misc/pvpanic: Build the pvpanic device in $(common-obj) hw/misc/pvpanic: Cosmetic renaming Peng Hao (7): hw/misc/pvpanic: Add the MMIO interface hw/arm/virt: Use the pvpanic device hw/arm/virt: add pvpanic device in virt acpi table hw/misc/pvpanic: add configure query interface hw/misc/pvpanic: preparing for adding configure interface hw/misc/pvpanic: realize the configure interface pvpanic : update pvpanic document default-configs/arm-softmmu.mak | 1 + docs/specs/pvpanic.txt | 15 ++- hw/arm/sysbus-fdt.c | 2 + hw/arm/virt-acpi-build.c| 17 hw/arm/virt.c | 23 ++- hw/misc/Makefile.objs | 2 +- hw/misc/pvpanic.c | 87 + include/hw/arm/virt.h | 1 + include/hw/misc/pvpanic.h | 6 +++ 9 files changed, 134 insertions(+), 20 deletions(-) -- 1.8.3.1
[Qemu-devel] [PATCH V10 6/9] hw/misc/pvpanic: add configure query interface
Add configure query interface for pvpanic-mmio.
Signed-off-by: Peng Hao
---
include/hw/misc/pvpanic.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index f1a05b2..dc042cf 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright ZTE Ltd. 2018
*
* Authors:
* Wen Congyang
* Hu Tao
+ * Peng Hao
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -28,4 +30,9 @@ static inline uint16_t pvpanic_port(void)
return object_property_get_uint(o, PVPANIC_IOPORT_PROP, NULL);
}
+static inline Object *pvpanic_mmio(void)
+{
+return object_resolve_path_type("", TYPE_PVPANIC_MMIO, NULL);
+}
+
#endif
--
1.8.3.1
[Qemu-devel] [PATCH V10 4/9] hw/arm/virt: Use the pvpanic device
Add pvpanic device in arm virt machine.
Signed-off-by: Peng Hao
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/virt.c | 21 +
include/hw/arm/virt.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2420491..50345df 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -159,3 +159,4 @@ CONFIG_PCI_DESIGNWARE=y
CONFIG_STRONGARM=y
CONFIG_HIGHBANK=y
CONFIG_MUSICPAL=y
+CONFIG_PVPANIC=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a2b8d8f..f2cb5de 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -143,6 +143,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_GPIO] = { 0x0903, 0x1000 },
[VIRT_SECURE_UART] ={ 0x0904, 0x1000 },
[VIRT_SMMU] = { 0x0905, 0x0002 },
+[VIRT_PVPANIC] ={ 0x0907, 0x0002 },
[VIRT_MMIO] = { 0x0a00, 0x0200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c00, 0x0200 },
@@ -190,6 +191,24 @@ static bool cpu_type_valid(const char *cpu)
return false;
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+ char *nodename;
+ hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+ hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+ sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
+
+ nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+ qemu_fdt_add_subnode(vms->fdt, nodename);
+ qemu_fdt_setprop_string(vms->fdt, nodename,
+ "compatible", "qemu,pvpanic-mmio");
+ qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+
+ g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
void *fdt = create_device_tree(>fdt_size);
@@ -1531,6 +1550,8 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
+create_pvpanic_device(vms);
+
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..937c124 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -66,6 +66,7 @@ enum {
VIRT_GIC_REDIST,
VIRT_GIC_REDIST2,
VIRT_SMMU,
+VIRT_PVPANIC,
VIRT_UART,
VIRT_MMIO,
VIRT_RTC,
--
1.8.3.1
[Qemu-devel] [PATCH V10 9/9] pvpanic : update pvpanic document
Add mmio support info in docs/specs/pvpanic.txt. Signed-off-by: Peng Hao --- docs/specs/pvpanic.txt | 14 -- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt index c7bbacc..b1beea3 100644 --- a/docs/specs/pvpanic.txt +++ b/docs/specs/pvpanic.txt @@ -1,14 +1,17 @@ PVPANIC DEVICE == -pvpanic device is a simulated ISA device, through which a guest panic -event is sent to qemu, and a QMP event is generated. This allows +pvpanic device is a simulated ISA/SYSBUS device, through which a guest +panic event is sent to qemu, and a QMP event is generated. This allows management apps (e.g. libvirt) to be notified and respond to the event. The management app has the option of waiting for GUEST_PANICKED events, and/or polling for guest-panicked RunState, to learn when the pvpanic device has fired a panic event. +The pvpanic device can be implemented as an ISA device (using IOPORT), +or, since qemu 4.0, as a SYSBUS device (using MMIO). + ISA Interface - @@ -19,6 +22,13 @@ Software should set only bits both itself and the device recognize. Currently, only bit 0 is recognized, setting it indicates a guest panic has happened. +SYSBUS Interface + + +The SYSBUS interface is similar to the ISA interface except that it uses +MMIO. For example, the arm virt machine could put the pvpanic device at +[0x907, 0x9070001] and currently only the first byte is used. + ACPI Interface -- -- 1.8.3.1
[Qemu-devel] [PATCH V10 5/9] hw/arm/virt: add pvpanic device in virt acpi table
Add pvpanic device in virt acpi table, so when kenrel command line
uses acpi=force, kernel can get info from acpi table.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..2adba60 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -84,6 +84,20 @@ static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry
*uart_memmap,
aml_append(scope, dev);
}
+static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry
*pvpanic_memmap)
+{
+Aml *dev = aml_device("PEVT");
+aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+Aml *crs = aml_resource_template();
+aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
+ pvpanic_memmap->size, AML_READ_WRITE));
+
+aml_append(dev, aml_name_decl("_CRS", crs));
+aml_append(scope, dev);
+}
+
static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap)
{
Aml *dev = aml_device("FWCF");
@@ -771,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
(irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS);
--
1.8.3.1
[Qemu-devel] [PATCH V10 3/9] hw/misc/pvpanic: Add the MMIO interface
Add pvpanic new type "TYPE_PVPANIC_MMIO"
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 50 +++
include/hw/misc/pvpanic.h | 1 +
2 files changed, 47 insertions(+), 4 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 0f23a67..c9382a8 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang
* Hu Tao
+ * Peng Hao
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -28,6 +30,9 @@
#define PVPANIC_ISA_DEVICE(obj)\
OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+#define PVPANIC_MMIO_DEVICE(obj)\
+OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
+
static void handle_event(int event)
{
static bool logged;
@@ -56,21 +61,32 @@ typedef struct PVPanicISAState {
MemoryRegion mr;
} PVPanicISAState;
+/* PVPanicMMIOState for sysbus device and
+ * use mmio.
+ */
+typedef struct PVPanicMMIOState {
+SysBusDevice parent_obj;
+/**/
+
+/* public */
+MemoryRegion mr;
+} PVPanicMMIOState;
+
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
-.read = pvpanic_ioport_read,
-.write = pvpanic_ioport_write,
+.read = pvpanic_read,
+.write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -125,9 +141,35 @@ static TypeInfo pvpanic_isa_info = {
.class_init= pvpanic_isa_class_init,
};
+static void pvpanic_mmio_initfn(Object *obj)
+{
+PVPanicMMIOState *s = PVPANIC_MMIO_DEVICE(obj);
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+memory_region_init_io(>mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC_MMIO, 2);
+sysbus_init_mmio(sbd, >mr);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+.name = TYPE_PVPANIC_MMIO,
+.parent= TYPE_SYS_BUS_DEVICE,
+.instance_size = sizeof(PVPanicMMIOState),
+.instance_init = pvpanic_mmio_initfn,
+.class_init= pvpanic_mmio_class_init,
+};
+
static void pvpanic_register_types(void)
{
type_register_static(_isa_info);
+type_register_static(_mmio_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..f1a05b2 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -15,6 +15,7 @@
#define HW_MISC_PVPANIC_H
#define TYPE_PVPANIC "pvpanic"
+#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
#define PVPANIC_IOPORT_PROP "ioport"
--
1.8.3.1
[Qemu-devel] [PATCH V10 2/9] hw/misc/pvpanic: Cosmetic renaming
From: Philippe Mathieu-Daudé
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC_ISA_DEVICE.
- MemoryRegion io -> mr.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..0f23a67 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,8 +25,8 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj)\
-OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
+#define PVPANIC_ISA_DEVICE(obj)\
+OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
{
@@ -45,12 +45,16 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
+/* PVPanicISAState for ISA device and
+ * use ioport.
+ */
+typedef struct PVPanicISAState {
ISADevice parent_obj;
-
-MemoryRegion io;
+/*< private>*/
uint16_t ioport;
-} PVPanicState;
+/**/
+MemoryRegion mr;
+} PVPanicISAState;
/* return supported events on read */
static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
@@ -75,15 +79,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(obj);
-memory_region_init_io(>io, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,11 +100,11 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
-isa_register_ioport(d, >io, s->ioport);
+isa_register_ioport(d, >mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
-DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -116,7 +120,7 @@ static void pvpanic_isa_class_init(ObjectClass *klass, void
*data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent= TYPE_ISA_DEVICE,
-.instance_size = sizeof(PVPanicState),
+.instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init= pvpanic_isa_class_init,
};
--
1.8.3.1
[Qemu-devel] [PATCH V10 1/9] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
From: Philippe Mathieu-Daudé The 'pvpanic' ISA device can be use by any machine with an ISA bus. Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Peng Hao --- hw/misc/Makefile.objs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 680350b..c387ce4 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o common-obj-$(CONFIG_EDU) += edu.o common-obj-$(CONFIG_PCA9552) += pca9552.o +common-obj-$(CONFIG_PVPANIC) += pvpanic.o common-obj-y += unimp.o common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o @@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o -obj-$(CONFIG_PVPANIC) += pvpanic.o obj-$(CONFIG_AUX) += auxbus.o obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o obj-$(CONFIG_MSF2) += msf2-sysreg.o -- 1.8.3.1
[Qemu-devel] [PATCH V9 8/9] hw/misc/pvpanic: realize the configure interface
Add configure interface for pvpanic-mmio. In qemu command line
use -device pvpanic-mmio to enable the device.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 4 +++-
hw/arm/virt.c| 9 -
hw/misc/pvpanic.c| 1 +
3 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 2adba60..50cea23 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -785,7 +785,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
-acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
+if (pvpanic_mmio()) {
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
+}
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
(irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS);
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index bb756a6..fcaa597 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -197,8 +197,6 @@ static void create_pvpanic_device(const VirtMachineState
*vms)
hwaddr base = vms->memmap[VIRT_PVPANIC].base;
hwaddr size = vms->memmap[VIRT_PVPANIC].size;
- sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
-
nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
qemu_fdt_add_subnode(vms->fdt, nodename);
qemu_fdt_setprop_string(vms->fdt, nodename,
@@ -1329,6 +1327,9 @@ void virt_machine_done(Notifier *notifier, void *data)
struct arm_boot_info *info = >bootinfo;
AddressSpace *as = arm_boot_address_space(cpu, info);
+if (pvpanic_mmio()) {
+create_pvpanic_device(vms);
+}
/*
* If the user provided a dtb, we assume the dynamic sysbus nodes
* already are integrated there. This corresponds to a use case where
@@ -1548,9 +1549,7 @@ static void machvirt_init(MachineState *machine)
machine->ram_size);
memory_region_add_subregion(sysmem, vms->memmap[VIRT_MEM].base, ram);
-create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
-
-create_pvpanic_device(vms);
+create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
create_gic(vms, pic);
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 08263ed..f199173 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -149,6 +149,7 @@ static void pvpanic_mmio_initfn(Object *obj)
memory_region_init_io(>mr, OBJECT(s), _ops, s,
TYPE_PVPANIC_MMIO, 2);
sysbus_init_mmio(sbd, >mr);
+sysbus_mmio_map(sbd, 0, s->base);
}
static Property pvpanic_mmio_properties[] = {
--
1.8.3.1
[Qemu-devel] [PATCH V9 9/9] pvpanic : update pvpanic document
Add mmio support info in docs/specs/pvpanic.txt. Signed-off-by: Peng Hao --- docs/specs/pvpanic.txt | 15 +-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt index c7bbacc..67f5591 100644 --- a/docs/specs/pvpanic.txt +++ b/docs/specs/pvpanic.txt @@ -1,14 +1,18 @@ PVPANIC DEVICE == -pvpanic device is a simulated ISA device, through which a guest panic -event is sent to qemu, and a QMP event is generated. This allows +pvpanic device is a simulated ISA/SysBus device, through which a guest +panic event is sent to qemu, and a QMP event is generated. This allows management apps (e.g. libvirt) to be notified and respond to the event. The management app has the option of waiting for GUEST_PANICKED events, and/or polling for guest-panicked RunState, to learn when the pvpanic device has fired a panic event. +When pvpanic device is implemented as a ISA device, it supports IOPORT +mode. Since QEMU v3.2 pvpanic also supports MMIO mode, it will be +implemented as a SYSBUS device. + ISA Interface - @@ -19,6 +23,13 @@ Software should set only bits both itself and the device recognize. Currently, only bit 0 is recognized, setting it indicates a guest panic has happened. +SYSBUS Interface + + +The SYSBUS interface is similar to the ISA interface except that it uses +MMIO. For example, the arm virt machine could put the pvpanic device at +[0x907, 0x9070001] and currently only the first byte is used. + ACPI Interface -- -- 1.8.3.1
[Qemu-devel] [PATCH V9 6/9] hw/misc/pvpanic: add configure query interface
Add configure query interface for pvpanic-mmio.
Signed-off-by: Peng Hao
---
include/hw/misc/pvpanic.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index f1a05b2..2f0e9f4 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -28,4 +28,9 @@ static inline uint16_t pvpanic_port(void)
return object_property_get_uint(o, PVPANIC_IOPORT_PROP, NULL);
}
+static inline Object *pvpanic_mmio(void)
+{
+return object_resolve_path_type("", TYPE_PVPANIC_MMIO, NULL);
+}
+
#endif
--
1.8.3.1
[Qemu-devel] [PATCH V9 5/9] hw/arm/virt: add pvpanic device in virt acpi table
Add pvpanic device in virt acpi table, so when kenrel command line
uses acpi=force, kernel can get info from acpi table.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..2adba60 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -84,6 +84,20 @@ static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry
*uart_memmap,
aml_append(scope, dev);
}
+static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry
*pvpanic_memmap)
+{
+Aml *dev = aml_device("PEVT");
+aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+Aml *crs = aml_resource_template();
+aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
+ pvpanic_memmap->size, AML_READ_WRITE));
+
+aml_append(dev, aml_name_decl("_CRS", crs));
+aml_append(scope, dev);
+}
+
static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMapEntry *fw_cfg_memmap)
{
Aml *dev = aml_device("FWCF");
@@ -771,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
(irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS);
--
1.8.3.1
[Qemu-devel] [PATCH V9 7/9] hw/misc/pvpanic: preparing for adding configure interface
Prepare for pvpanic-mmio configure interface.
Signed-off-by: Peng Hao
---
hw/arm/sysbus-fdt.c | 2 ++
hw/arm/virt.c | 1 +
hw/misc/pvpanic.c | 10 +-
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/hw/arm/sysbus-fdt.c b/hw/arm/sysbus-fdt.c
index ad698d4..34577f3 100644
--- a/hw/arm/sysbus-fdt.c
+++ b/hw/arm/sysbus-fdt.c
@@ -38,6 +38,7 @@
#include "hw/vfio/vfio-amd-xgbe.h"
#include "hw/display/ramfb.h"
#include "hw/arm/fdt.h"
+#include "hw/misc/pvpanic.h"
/*
* internal struct that contains the information to create dynamic
@@ -459,6 +460,7 @@ static const BindingEntry bindings[] = {
VFIO_PLATFORM_BINDING("amd,xgbe-seattle-v1a", add_amd_xgbe_fdt_node),
#endif
TYPE_BINDING(TYPE_RAMFB_DEVICE, no_fdt_node),
+TYPE_BINDING(TYPE_PVPANIC_MMIO, no_fdt_node),
TYPE_BINDING("", NULL), /* last element */
};
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index f2cb5de..bb756a6 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1783,6 +1783,7 @@ static void virt_machine_class_init(ObjectClass *oc, void
*data)
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_CALXEDA_XGMAC);
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_AMD_XGBE);
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE);
+machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PVPANIC_MMIO);
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_PLATFORM);
mc->block_default_type = IF_VIRTIO;
mc->no_cdrom = 1;
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index c9382a8..08263ed 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -67,7 +67,7 @@ typedef struct PVPanicISAState {
typedef struct PVPanicMMIOState {
SysBusDevice parent_obj;
/**/
-
+uint32_t base;
/* public */
MemoryRegion mr;
} PVPanicMMIOState;
@@ -151,10 +151,18 @@ static void pvpanic_mmio_initfn(Object *obj)
sysbus_init_mmio(sbd, >mr);
}
+static Property pvpanic_mmio_properties[] = {
+DEFINE_PROP_UINT32("mmio", PVPanicMMIOState, base, 0x0907),
+DEFINE_PROP_END_OF_LIST(),
+};
+
+
static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+dc->user_creatable = true;
+dc->props = pvpanic_mmio_properties;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}
--
1.8.3.1
[Qemu-devel] [PATCH V9 3/9] hw/misc/pvpanic: Add the MMIO interface
Add pvpanic new type "TYPE_PVPANIC_MMIO"
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 50 +++
include/hw/misc/pvpanic.h | 1 +
2 files changed, 47 insertions(+), 4 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 0f23a67..c9382a8 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang
* Hu Tao
+ * Peng Hao
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -28,6 +30,9 @@
#define PVPANIC_ISA_DEVICE(obj)\
OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+#define PVPANIC_MMIO_DEVICE(obj)\
+OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
+
static void handle_event(int event)
{
static bool logged;
@@ -56,21 +61,32 @@ typedef struct PVPanicISAState {
MemoryRegion mr;
} PVPanicISAState;
+/* PVPanicMMIOState for sysbus device and
+ * use mmio.
+ */
+typedef struct PVPanicMMIOState {
+SysBusDevice parent_obj;
+/**/
+
+/* public */
+MemoryRegion mr;
+} PVPanicMMIOState;
+
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
-.read = pvpanic_ioport_read,
-.write = pvpanic_ioport_write,
+.read = pvpanic_read,
+.write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -125,9 +141,35 @@ static TypeInfo pvpanic_isa_info = {
.class_init= pvpanic_isa_class_init,
};
+static void pvpanic_mmio_initfn(Object *obj)
+{
+PVPanicMMIOState *s = PVPANIC_MMIO_DEVICE(obj);
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+memory_region_init_io(>mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC_MMIO, 2);
+sysbus_init_mmio(sbd, >mr);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+.name = TYPE_PVPANIC_MMIO,
+.parent= TYPE_SYS_BUS_DEVICE,
+.instance_size = sizeof(PVPanicMMIOState),
+.instance_init = pvpanic_mmio_initfn,
+.class_init= pvpanic_mmio_class_init,
+};
+
static void pvpanic_register_types(void)
{
type_register_static(_isa_info);
+type_register_static(_mmio_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..f1a05b2 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -15,6 +15,7 @@
#define HW_MISC_PVPANIC_H
#define TYPE_PVPANIC "pvpanic"
+#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
#define PVPANIC_IOPORT_PROP "ioport"
--
1.8.3.1
[Qemu-devel] [PATCH V9 1/9] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
From: Philippe Mathieu-Daudé The 'pvpanic' ISA device can be use by any machine with an ISA bus. Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Peng Hao --- hw/misc/Makefile.objs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 680350b..c387ce4 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o common-obj-$(CONFIG_EDU) += edu.o common-obj-$(CONFIG_PCA9552) += pca9552.o +common-obj-$(CONFIG_PVPANIC) += pvpanic.o common-obj-y += unimp.o common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o @@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o -obj-$(CONFIG_PVPANIC) += pvpanic.o obj-$(CONFIG_AUX) += auxbus.o obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o obj-$(CONFIG_MSF2) += msf2-sysreg.o -- 1.8.3.1
[Qemu-devel] [PATCH V9 2/9] hw/misc/pvpanic: Cosmetic renaming
From: Philippe Mathieu-Daudé
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC_ISA_DEVICE.
- MemoryRegion io -> mr.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..0f23a67 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,8 +25,8 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj)\
-OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
+#define PVPANIC_ISA_DEVICE(obj)\
+OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
{
@@ -45,12 +45,16 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
+/* PVPanicISAState for ISA device and
+ * use ioport.
+ */
+typedef struct PVPanicISAState {
ISADevice parent_obj;
-
-MemoryRegion io;
+/*< private>*/
uint16_t ioport;
-} PVPanicState;
+/**/
+MemoryRegion mr;
+} PVPanicISAState;
/* return supported events on read */
static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
@@ -75,15 +79,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(obj);
-memory_region_init_io(>io, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,11 +100,11 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
-isa_register_ioport(d, >io, s->ioport);
+isa_register_ioport(d, >mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
-DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -116,7 +120,7 @@ static void pvpanic_isa_class_init(ObjectClass *klass, void
*data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent= TYPE_ISA_DEVICE,
-.instance_size = sizeof(PVPanicState),
+.instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init= pvpanic_isa_class_init,
};
--
1.8.3.1
[Qemu-devel] [PATCH V9 0/9] add pvpanic mmio support
The first patches are simple cleanups: - patch 1 move the pvpanic device with the 'ocmmon objects' so we compile it once for the x86/arm/aarch64 archs, - patch 2 simply renames ISA fields/definitions to generic ones. Then instead of add/use the MMIO pvpanic device in the virt machine in an unique patch, I split it in two distinct patches: - patch 3 uses Peng Hao's work, but add the MMIO interface to the existing device (no logical change). - patch 4 is Peng Hao's work in the virt machine (no logical change). - patch 5 add pvpanic device in acpi table in virt machine v2 from Peng Hao is: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03433.html v3 --> v4 patch 1,2 no modification. patch 3, add TYPE_PANIC_MMIO for distinguishing different bus device, virt + isa_pvpanic will abnormally terminate virtual machine. patch 4, "pvpanic,mmio" --> "qemu,pvpanic-mmio". patch 5, newly added. v4 --> v5 patch 1,2 no modification. patch 3 delete PvpanicCommonState structure. patch 4 VIRT_PVPANIC_MMIO --> VIRT_PVPANIC correct VIRT_PVPANIC's overlap start address patch 5 no modification. v5 --> v6 add document. v6 --> v7 patch 5 modify device name from "PANC" to "PEVT". patch 6 modify document description. v7 --> v8 add configure interface for pvpanic-mmio v8 --> v9 revert "moving structure definition to header file" because of compile error in x86. the kernel part of the series: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git/log/?h=char-misc-testing misc/pvpanic: remove a redundant comma misc/pvpanic: convert to SPDX license tags misc/pvpanic: change header file sort style misc/pvpanic: remove unnecessary header file misc/pvpanic : break dependency on ACPI misc/pvpanic : grouping ACPI related stuff misc/pvpanic: add support to get pvpanic device info FDT dt-bindings: misc/pvpanic: add document for pvpanic-mmio misc/pvpanic: add MMIO support misc/pvpanic: simplify the code using acpi_dev_resource_io pvpanic: move pvpanic to misc as common driver Philippe Mathieu-Daudé (2): hw/misc/pvpanic: Build the pvpanic device in $(common-obj) hw/misc/pvpanic: Cosmetic renaming Peng Hao (7): hw/misc/pvpanic: Add the MMIO interface hw/arm/virt: Use the pvpanic device hw/arm/virt: add pvpanic device in virt acpi table hw/misc/pvpanic: add configure query interface hw/misc/pvpanic: preparing for adding configure interface hw/misc/pvpanic: realize the configure interface pvpanic : update pvpanic document default-configs/arm-softmmu.mak | 1 + docs/specs/pvpanic.txt | 15 ++- hw/arm/sysbus-fdt.c | 2 + hw/arm/virt-acpi-build.c| 17 hw/arm/virt.c | 23 ++- hw/misc/Makefile.objs | 2 +- hw/misc/pvpanic.c | 87 + include/hw/arm/virt.h | 1 + include/hw/misc/pvpanic.h | 6 +++ 9 files changed, 134 insertions(+), 20 deletions(-) -- 1.8.3.1
[Qemu-devel] [PATCH V9 4/9] hw/arm/virt: Use the pvpanic device
Add pvpanic device in arm virt machine.
Signed-off-by: Peng Hao
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/virt.c | 21 +
include/hw/arm/virt.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2420491..50345df 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -159,3 +159,4 @@ CONFIG_PCI_DESIGNWARE=y
CONFIG_STRONGARM=y
CONFIG_HIGHBANK=y
CONFIG_MUSICPAL=y
+CONFIG_PVPANIC=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a2b8d8f..f2cb5de 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -143,6 +143,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_GPIO] = { 0x0903, 0x1000 },
[VIRT_SECURE_UART] ={ 0x0904, 0x1000 },
[VIRT_SMMU] = { 0x0905, 0x0002 },
+[VIRT_PVPANIC] ={ 0x0907, 0x0002 },
[VIRT_MMIO] = { 0x0a00, 0x0200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c00, 0x0200 },
@@ -190,6 +191,24 @@ static bool cpu_type_valid(const char *cpu)
return false;
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+ char *nodename;
+ hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+ hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+ sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
+
+ nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+ qemu_fdt_add_subnode(vms->fdt, nodename);
+ qemu_fdt_setprop_string(vms->fdt, nodename,
+ "compatible", "qemu,pvpanic-mmio");
+ qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+
+ g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
void *fdt = create_device_tree(>fdt_size);
@@ -1531,6 +1550,8 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
+create_pvpanic_device(vms);
+
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..937c124 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -66,6 +66,7 @@ enum {
VIRT_GIC_REDIST,
VIRT_GIC_REDIST2,
VIRT_SMMU,
+VIRT_PVPANIC,
VIRT_UART,
VIRT_MMIO,
VIRT_RTC,
--
1.8.3.1
[Qemu-devel] [PATCH V8 00/10] add pvpanic mmio support
The first patches are simple cleanups: - patch 1 move the pvpanic device with the 'ocmmon objects' so we compile it once for the x86/arm/aarch64 archs, - patch 2 simply renames ISA fields/definitions to generic ones. Then instead of add/use the MMIO pvpanic device in the virt machine in an unique patch, I split it in two distinct patches: - patch 3 uses Peng Hao's work, but add the MMIO interface to the existing device (no logical change). - patch 4 is Peng Hao's work in the virt machine (no logical change). - patch 5 add pvpanic device in acpi table in virt machine v2 from Peng Hao is: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03433.html v3 --> v4 patch 1,2 no modification. patch 3, add TYPE_PANIC_MMIO for distinguishing different bus device, virt + isa_pvpanic will abnormally terminate virtual machine. patch 4, "pvpanic,mmio" --> "qemu,pvpanic-mmio". patch 5, newly added. v4 --> v5 patch 1,2 no modification. patch 3 delete PvpanicCommonState structure. patch 4 VIRT_PVPANIC_MMIO --> VIRT_PVPANIC correct VIRT_PVPANIC's overlap start address patch 5 no modification. v5 --> v6 add document. v6 --> v7 patch 5 modify device name from "PANC" to "PEVT". patch 6 modify document description. v7 --> v8 add configure interface for pvpanic-mmio the kernel part of the series: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git/log/?h=char-misc-testing misc/pvpanic: remove a redundant comma misc/pvpanic: convert to SPDX license tags misc/pvpanic: change header file sort style misc/pvpanic: remove unnecessary header file misc/pvpanic : break dependency on ACPI misc/pvpanic : grouping ACPI related stuff misc/pvpanic: add support to get pvpanic device info FDT dt-bindings: misc/pvpanic: add document for pvpanic-mmio misc/pvpanic: add MMIO support misc/pvpanic: simplify the code using acpi_dev_resource_io pvpanic: move pvpanic to misc as common driver Philippe Mathieu-Daudé (2): hw/misc/pvpanic: Build the pvpanic device in $(common-obj) hw/misc/pvpanic: Cosmetic renaming Peng Hao (8): hw/misc/pvpanic: Add the MMIO interface hw/misc/pvpanic: moving structure definition to header file hw/arm/virt: Use the pvpanic device hw/arm/virt: add pvpanic device in virt acpi table hw/misc/pvpanic: add configure query interface hw/misc/pvpanic: preparing for adding configure interface hw/misc/pvpanic: realize the configure interface pvpanic : update pvpanic document default-configs/arm-softmmu.mak | 1 + docs/specs/pvpanic.txt | 18 +-- hw/arm/sysbus-fdt.c | 2 ++ hw/arm/virt-acpi-build.c| 18 +++ hw/arm/virt.c | 22 + hw/misc/Makefile.objs | 2 +- hw/misc/pvpanic.c | 68 - include/hw/arm/virt.h | 1 + include/hw/misc/pvpanic.h | 34 + 9 files changed, 140 insertions(+), 26 deletions(-) -- 1.8.3.1
[Qemu-devel] [PATCH V8 03/10] hw/misc/pvpanic: Add the MMIO interface
Add pvpanic new type "TYPE_PVPANIC_MMIO"
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 36
include/hw/misc/pvpanic.h | 15 +++
2 files changed, 47 insertions(+), 4 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 0f23a67..2bcbfc5 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang
* Hu Tao
+ * Peng Hao
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -57,20 +59,20 @@ typedef struct PVPanicISAState {
} PVPanicISAState;
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
-.read = pvpanic_ioport_read,
-.write = pvpanic_ioport_write,
+.read = pvpanic_read,
+.write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -125,9 +127,35 @@ static TypeInfo pvpanic_isa_info = {
.class_init= pvpanic_isa_class_init,
};
+static void pvpanic_mmio_initfn(Object *obj)
+{
+PVPanicMMIOState *s = PVPANIC_MMIO_DEVICE(obj);
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+memory_region_init_io(>mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC_MMIO, 2);
+sysbus_init_mmio(sbd, >mr);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+.name = TYPE_PVPANIC_MMIO,
+.parent= TYPE_SYS_BUS_DEVICE,
+.instance_size = sizeof(PVPanicMMIOState),
+.instance_init = pvpanic_mmio_initfn,
+.class_init= pvpanic_mmio_class_init,
+};
+
static void pvpanic_register_types(void)
{
type_register_static(_isa_info);
+type_register_static(_mmio_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..66dbdfe 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -15,9 +15,24 @@
#define HW_MISC_PVPANIC_H
#define TYPE_PVPANIC "pvpanic"
+#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
#define PVPANIC_IOPORT_PROP "ioport"
+/* PVPanicMMIOState for sysbus device and
+ * use mmio.
+ */
+typedef struct PVPanicMMIOState {
+SysBusDevice parent_obj;
+/**/
+
+/* public */
+MemoryRegion mr;
+} PVPanicMMIOState;
+
+#define PVPANIC_MMIO_DEVICE(obj)\
+OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
+
static inline uint16_t pvpanic_port(void)
{
Object *o = object_resolve_path_type("", TYPE_PVPANIC, NULL);
--
1.8.3.1
[Qemu-devel] [PATCH V8 07/10] hw/misc/pvpanic: add configure query interface
Add configure query interface for pvpanic-mmio.
Signed-off-by: Peng Hao
---
include/hw/misc/pvpanic.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 066c707..1f20775 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -57,4 +57,8 @@ static inline uint16_t pvpanic_port(void)
return object_property_get_uint(o, PVPANIC_IOPORT_PROP, NULL);
}
+static inline Object *pvpanic_mmio(void)
+{
+return object_resolve_path_type("", TYPE_PVPANIC_MMIO, NULL);
+}
#endif
--
1.8.3.1
[Qemu-devel] [PATCH V8 05/10] hw/arm/virt: Use the pvpanic device
Add pvpanic device in arm virt machine.
Signed-off-by: Peng Hao
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/virt.c | 22 ++
include/hw/arm/virt.h | 1 +
3 files changed, 24 insertions(+)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2420491..50345df 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -159,3 +159,4 @@ CONFIG_PCI_DESIGNWARE=y
CONFIG_STRONGARM=y
CONFIG_HIGHBANK=y
CONFIG_MUSICPAL=y
+CONFIG_PVPANIC=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a2b8d8f..899131a 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -59,6 +59,7 @@
#include "qapi/visitor.h"
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
+#include "hw/misc/pvpanic.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -143,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_GPIO] = { 0x0903, 0x1000 },
[VIRT_SECURE_UART] ={ 0x0904, 0x1000 },
[VIRT_SMMU] = { 0x0905, 0x0002 },
+[VIRT_PVPANIC] ={ 0x0907, 0x0002 },
[VIRT_MMIO] = { 0x0a00, 0x0200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c00, 0x0200 },
@@ -190,6 +192,24 @@ static bool cpu_type_valid(const char *cpu)
return false;
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+ char *nodename;
+ hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+ hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+ sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
+
+ nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+ qemu_fdt_add_subnode(vms->fdt, nodename);
+ qemu_fdt_setprop_string(vms->fdt, nodename,
+ "compatible", "qemu,pvpanic-mmio");
+ qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+
+ g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
void *fdt = create_device_tree(>fdt_size);
@@ -1531,6 +1551,8 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
+create_pvpanic_device(vms);
+
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..937c124 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -66,6 +66,7 @@ enum {
VIRT_GIC_REDIST,
VIRT_GIC_REDIST2,
VIRT_SMMU,
+VIRT_PVPANIC,
VIRT_UART,
VIRT_MMIO,
VIRT_RTC,
--
1.8.3.1
[Qemu-devel] [PATCH V8 9/10] hw/misc/pvpanic: realize the configure interface
Add configure interface for pvpanic-mmio. In qemu command line
use -device pvpanic-mmio to enable the device.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 5 -
hw/arm/virt.c| 7 +++
hw/misc/pvpanic.c| 1 +
3 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 4208e46..cbc415e 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -45,6 +45,7 @@
#include "hw/arm/virt.h"
#include "sysemu/numa.h"
#include "kvm_arm.h"
+#include "hw/misc/pvpanic.h"
#define ARM_SPI_BASE 32
#define ACPI_POWER_BUTTON_DEVICE "PWRB"
@@ -785,7 +786,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
-acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
+if (pvpanic_mmio()) {
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
+}
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
(irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS);
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 921220a..aeedc43 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -198,8 +198,6 @@ static void create_pvpanic_device(const VirtMachineState
*vms)
hwaddr base = vms->memmap[VIRT_PVPANIC].base;
hwaddr size = vms->memmap[VIRT_PVPANIC].size;
- sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
-
nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
qemu_fdt_add_subnode(vms->fdt, nodename);
qemu_fdt_setprop_string(vms->fdt, nodename,
@@ -1330,6 +1328,9 @@ void virt_machine_done(Notifier *notifier, void *data)
struct arm_boot_info *info = >bootinfo;
AddressSpace *as = arm_boot_address_space(cpu, info);
+if (pvpanic_mmio()) {
+create_pvpanic_device(vms);
+}
/*
* If the user provided a dtb, we assume the dynamic sysbus nodes
* already are integrated there. This corresponds to a use case where
@@ -1551,8 +1552,6 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
-create_pvpanic_device(vms);
-
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 6fea162..ce6f5cb 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -119,6 +119,7 @@ static void pvpanic_mmio_initfn(Object *obj)
memory_region_init_io(>mr, OBJECT(s), _ops, s,
TYPE_PVPANIC_MMIO, 2);
sysbus_init_mmio(sbd, >mr);
+sysbus_mmio_map(sbd, 0, s->base);
}
static Property pvpanic_mmio_properties[] = {
--
1.8.3.1
[Qemu-devel] [PATCH V8 02/10] hw/misc/pvpanic: Cosmetic renaming
From: Philippe Mathieu-Daudé
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC_ISA_DEVICE.
- MemoryRegion io -> mr.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..0f23a67 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,8 +25,8 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj)\
-OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
+#define PVPANIC_ISA_DEVICE(obj)\
+OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
{
@@ -45,12 +45,16 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
+/* PVPanicISAState for ISA device and
+ * use ioport.
+ */
+typedef struct PVPanicISAState {
ISADevice parent_obj;
-
-MemoryRegion io;
+/*< private>*/
uint16_t ioport;
-} PVPanicState;
+/**/
+MemoryRegion mr;
+} PVPanicISAState;
/* return supported events on read */
static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
@@ -75,15 +79,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(obj);
-memory_region_init_io(>io, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,11 +100,11 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
-isa_register_ioport(d, >io, s->ioport);
+isa_register_ioport(d, >mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
-DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -116,7 +120,7 @@ static void pvpanic_isa_class_init(ObjectClass *klass, void
*data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent= TYPE_ISA_DEVICE,
-.instance_size = sizeof(PVPanicState),
+.instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init= pvpanic_isa_class_init,
};
--
1.8.3.1
[Qemu-devel] [PATCH V8 10/10] pvpanic : update pvpanic document
Add mmio support info in docs/specs/pvpanic.txt. Signed-off-by: Peng Hao --- docs/specs/pvpanic.txt | 18 +++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt index c7bbacc..2d06ee5 100644 --- a/docs/specs/pvpanic.txt +++ b/docs/specs/pvpanic.txt @@ -1,14 +1,18 @@ PVPANIC DEVICE == -pvpanic device is a simulated ISA device, through which a guest panic -event is sent to qemu, and a QMP event is generated. This allows +pvpanic device is a simulated ISA/SysBus device, through which a guest +panic event is sent to qemu, and a QMP event is generated. This allows management apps (e.g. libvirt) to be notified and respond to the event. -The management app has the option of waiting for GUEST_PANICKED events, +The ma:wqnagement app has the option of waiting for GUEST_PANICKED events, and/or polling for guest-panicked RunState, to learn when the pvpanic device has fired a panic event. +When pvpanic device is implemented as a ISA device, it supports IOPORT +mode. Since QEMU v3.2 pvpanic also supports MMIO mode, it will be +implemented as a SYSBUS device. + ISA Interface - @@ -19,6 +23,14 @@ Software should set only bits both itself and the device recognize. Currently, only bit 0 is recognized, setting it indicates a guest panic has happened. +SYSBUS Interface + + +The SYSBUS interface is similar to the ISA interface except that it uses +MMIO. For example, the arm virt machine could put the pvpanic device at +[0x907, 0x9070001] and currently only the first byte is used. + + ACPI Interface -- -- 1.8.3.1
[Qemu-devel] [PATCH V8 04/10] hw/misc/pvpanic: moving structure definition to header file
Move structure definition to header file uniformly
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 16
include/hw/misc/pvpanic.h | 15 +++
2 files changed, 15 insertions(+), 16 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 2bcbfc5..aaa8b0c 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -27,9 +27,6 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define PVPANIC_ISA_DEVICE(obj)\
-OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
-
static void handle_event(int event)
{
static bool logged;
@@ -45,19 +42,6 @@ static void handle_event(int event)
}
}
-#include "hw/isa/isa.h"
-
-/* PVPanicISAState for ISA device and
- * use ioport.
- */
-typedef struct PVPanicISAState {
-ISADevice parent_obj;
-/*< private>*/
-uint16_t ioport;
-/**/
-MemoryRegion mr;
-} PVPanicISAState;
-
/* return supported events on read */
static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 66dbdfe..066c707 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -13,12 +13,24 @@
*/
#ifndef HW_MISC_PVPANIC_H
#define HW_MISC_PVPANIC_H
+#include "hw/isa/isa.h"
#define TYPE_PVPANIC "pvpanic"
#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
#define PVPANIC_IOPORT_PROP "ioport"
+/* PVPanicISAState for ISA device and
+ * use ioport.
+ */
+typedef struct PVPanicISAState {
+ISADevice parent_obj;
+/*< private>*/
+uint16_t ioport;
+/**/
+MemoryRegion mr;
+} PVPanicISAState;
+
/* PVPanicMMIOState for sysbus device and
* use mmio.
*/
@@ -30,6 +42,9 @@ typedef struct PVPanicMMIOState {
MemoryRegion mr;
} PVPanicMMIOState;
+#define PVPANIC_ISA_DEVICE(obj)\
+OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+
#define PVPANIC_MMIO_DEVICE(obj)\
OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
--
1.8.3.1
[Qemu-devel] [PATCH V8 08/10] hw/misc/pvpanic: preparing for adding configure interface
Prepare for pvpanic-mmio configure interface.
Signed-off-by: Peng Hao
---
hw/arm/sysbus-fdt.c | 2 ++
hw/arm/virt.c | 1 +
hw/misc/pvpanic.c | 7 +++
include/hw/misc/pvpanic.h | 2 +-
4 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/hw/arm/sysbus-fdt.c b/hw/arm/sysbus-fdt.c
index ad698d4..34577f3 100644
--- a/hw/arm/sysbus-fdt.c
+++ b/hw/arm/sysbus-fdt.c
@@ -38,6 +38,7 @@
#include "hw/vfio/vfio-amd-xgbe.h"
#include "hw/display/ramfb.h"
#include "hw/arm/fdt.h"
+#include "hw/misc/pvpanic.h"
/*
* internal struct that contains the information to create dynamic
@@ -459,6 +460,7 @@ static const BindingEntry bindings[] = {
VFIO_PLATFORM_BINDING("amd,xgbe-seattle-v1a", add_amd_xgbe_fdt_node),
#endif
TYPE_BINDING(TYPE_RAMFB_DEVICE, no_fdt_node),
+TYPE_BINDING(TYPE_PVPANIC_MMIO, no_fdt_node),
TYPE_BINDING("", NULL), /* last element */
};
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 899131a..921220a 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1785,6 +1785,7 @@ static void virt_machine_class_init(ObjectClass *oc, void
*data)
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_AMD_XGBE);
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE);
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_PLATFORM);
+machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PVPANIC_MMIO);
mc->block_default_type = IF_VIRTIO;
mc->no_cdrom = 1;
mc->pci_allow_0_address = true;
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index aaa8b0c..6fea162 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -121,10 +121,17 @@ static void pvpanic_mmio_initfn(Object *obj)
sysbus_init_mmio(sbd, >mr);
}
+static Property pvpanic_mmio_properties[] = {
+DEFINE_PROP_UINT32("mmio", PVPanicMMIOState, base, 0x0907),
+DEFINE_PROP_END_OF_LIST(),
+};
+
static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+dc->user_creatable = true;
+dc->props = pvpanic_mmio_properties;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1f20775..e733e1e 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -37,7 +37,7 @@ typedef struct PVPanicISAState {
typedef struct PVPanicMMIOState {
SysBusDevice parent_obj;
/**/
-
+uint32_t base;
/* public */
MemoryRegion mr;
} PVPanicMMIOState;
--
1.8.3.1
[Qemu-devel] [PATCH V8 06/10] hw/arm/virt: add pvpanic device in virt acpi table
Add pvpanic device in virt acpi table, so when kenrel command line
uses acpi=force, kernel can get info from acpi table.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..4208e46 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -61,6 +61,20 @@ static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
}
}
+static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry
*pvpanic_memmap)
+{
+Aml *dev = aml_device("PEVT");
+aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+Aml *crs = aml_resource_template();
+aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
+ pvpanic_memmap->size, AML_READ_WRITE));
+
+aml_append(dev, aml_name_decl("_CRS", crs));
+aml_append(scope, dev);
+}
+
static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
uint32_t uart_irq)
{
@@ -771,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
(irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS);
--
1.8.3.1
[Qemu-devel] [PATCH V8 01/10] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
From: Philippe Mathieu-Daudé The 'pvpanic' ISA device can be use by any machine with an ISA bus. Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Peng Hao --- hw/misc/Makefile.objs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 680350b..c387ce4 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o common-obj-$(CONFIG_EDU) += edu.o common-obj-$(CONFIG_PCA9552) += pca9552.o +common-obj-$(CONFIG_PVPANIC) += pvpanic.o common-obj-y += unimp.o common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o @@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o -obj-$(CONFIG_PVPANIC) += pvpanic.o obj-$(CONFIG_AUX) += auxbus.o obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o obj-$(CONFIG_MSF2) += msf2-sysreg.o -- 1.8.3.1
[Qemu-devel] [PATCH 06/10] hw/arm/virt: add pvpanic device in virt acpi table
Add pvpanic device in virt acpi table, so when kenrel command line
uses acpi=force, kernel can get info from acpi table.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..4208e46 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -61,6 +61,20 @@ static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
}
}
+static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry
*pvpanic_memmap)
+{
+Aml *dev = aml_device("PEVT");
+aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+Aml *crs = aml_resource_template();
+aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
+ pvpanic_memmap->size, AML_READ_WRITE));
+
+aml_append(dev, aml_name_decl("_CRS", crs));
+aml_append(scope, dev);
+}
+
static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
uint32_t uart_irq)
{
@@ -771,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
(irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS);
--
1.8.3.1
[Qemu-devel] [PATCH 08/10] hw/misc/pvpanic: preparing for adding configure interface
Prepare for pvpanic-mmio configure interface.
Signed-off-by: Peng Hao
---
hw/arm/sysbus-fdt.c | 2 ++
hw/arm/virt.c | 1 +
hw/misc/pvpanic.c | 7 +++
include/hw/misc/pvpanic.h | 2 +-
4 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/hw/arm/sysbus-fdt.c b/hw/arm/sysbus-fdt.c
index ad698d4..34577f3 100644
--- a/hw/arm/sysbus-fdt.c
+++ b/hw/arm/sysbus-fdt.c
@@ -38,6 +38,7 @@
#include "hw/vfio/vfio-amd-xgbe.h"
#include "hw/display/ramfb.h"
#include "hw/arm/fdt.h"
+#include "hw/misc/pvpanic.h"
/*
* internal struct that contains the information to create dynamic
@@ -459,6 +460,7 @@ static const BindingEntry bindings[] = {
VFIO_PLATFORM_BINDING("amd,xgbe-seattle-v1a", add_amd_xgbe_fdt_node),
#endif
TYPE_BINDING(TYPE_RAMFB_DEVICE, no_fdt_node),
+TYPE_BINDING(TYPE_PVPANIC_MMIO, no_fdt_node),
TYPE_BINDING("", NULL), /* last element */
};
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 899131a..921220a 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1785,6 +1785,7 @@ static void virt_machine_class_init(ObjectClass *oc, void
*data)
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_AMD_XGBE);
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_RAMFB_DEVICE);
machine_class_allow_dynamic_sysbus_dev(mc, TYPE_VFIO_PLATFORM);
+machine_class_allow_dynamic_sysbus_dev(mc, TYPE_PVPANIC_MMIO);
mc->block_default_type = IF_VIRTIO;
mc->no_cdrom = 1;
mc->pci_allow_0_address = true;
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index aaa8b0c..6fea162 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -121,10 +121,17 @@ static void pvpanic_mmio_initfn(Object *obj)
sysbus_init_mmio(sbd, >mr);
}
+static Property pvpanic_mmio_properties[] = {
+DEFINE_PROP_UINT32("mmio", PVPanicMMIOState, base, 0x0907),
+DEFINE_PROP_END_OF_LIST(),
+};
+
static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+dc->user_creatable = true;
+dc->props = pvpanic_mmio_properties;
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
}
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1f20775..e733e1e 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -37,7 +37,7 @@ typedef struct PVPanicISAState {
typedef struct PVPanicMMIOState {
SysBusDevice parent_obj;
/**/
-
+uint32_t base;
/* public */
MemoryRegion mr;
} PVPanicMMIOState;
--
1.8.3.1
[Qemu-devel] [PATCH 02/10] hw/misc/pvpanic: Cosmetic renaming
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC_ISA_DEVICE.
- MemoryRegion io -> mr.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..0f23a67 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,8 +25,8 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj)\
-OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
+#define PVPANIC_ISA_DEVICE(obj)\
+OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
{
@@ -45,12 +45,16 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
+/* PVPanicISAState for ISA device and
+ * use ioport.
+ */
+typedef struct PVPanicISAState {
ISADevice parent_obj;
-
-MemoryRegion io;
+/*< private>*/
uint16_t ioport;
-} PVPanicState;
+/**/
+MemoryRegion mr;
+} PVPanicISAState;
/* return supported events on read */
static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
@@ -75,15 +79,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(obj);
-memory_region_init_io(>io, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,11 +100,11 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
-isa_register_ioport(d, >io, s->ioport);
+isa_register_ioport(d, >mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
-DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -116,7 +120,7 @@ static void pvpanic_isa_class_init(ObjectClass *klass, void
*data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent= TYPE_ISA_DEVICE,
-.instance_size = sizeof(PVPanicState),
+.instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init= pvpanic_isa_class_init,
};
--
1.8.3.1
[Qemu-devel] [PATCH 04/10] hw/misc/pvpanic: moving structure definition to header file
Move structure definition to header file uniformly
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 16
include/hw/misc/pvpanic.h | 15 +++
2 files changed, 15 insertions(+), 16 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 2bcbfc5..aaa8b0c 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -27,9 +27,6 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define PVPANIC_ISA_DEVICE(obj)\
-OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
-
static void handle_event(int event)
{
static bool logged;
@@ -45,19 +42,6 @@ static void handle_event(int event)
}
}
-#include "hw/isa/isa.h"
-
-/* PVPanicISAState for ISA device and
- * use ioport.
- */
-typedef struct PVPanicISAState {
-ISADevice parent_obj;
-/*< private>*/
-uint16_t ioport;
-/**/
-MemoryRegion mr;
-} PVPanicISAState;
-
/* return supported events on read */
static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 66dbdfe..066c707 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -13,12 +13,24 @@
*/
#ifndef HW_MISC_PVPANIC_H
#define HW_MISC_PVPANIC_H
+#include "hw/isa/isa.h"
#define TYPE_PVPANIC "pvpanic"
#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
#define PVPANIC_IOPORT_PROP "ioport"
+/* PVPanicISAState for ISA device and
+ * use ioport.
+ */
+typedef struct PVPanicISAState {
+ISADevice parent_obj;
+/*< private>*/
+uint16_t ioport;
+/**/
+MemoryRegion mr;
+} PVPanicISAState;
+
/* PVPanicMMIOState for sysbus device and
* use mmio.
*/
@@ -30,6 +42,9 @@ typedef struct PVPanicMMIOState {
MemoryRegion mr;
} PVPanicMMIOState;
+#define PVPANIC_ISA_DEVICE(obj)\
+OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+
#define PVPANIC_MMIO_DEVICE(obj)\
OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
--
1.8.3.1
[Qemu-devel] [PATCH 01/10] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
The 'pvpanic' ISA device can be use by any machine with an ISA bus. Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Peng Hao --- hw/misc/Makefile.objs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 680350b..c387ce4 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o common-obj-$(CONFIG_EDU) += edu.o common-obj-$(CONFIG_PCA9552) += pca9552.o +common-obj-$(CONFIG_PVPANIC) += pvpanic.o common-obj-y += unimp.o common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o @@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o -obj-$(CONFIG_PVPANIC) += pvpanic.o obj-$(CONFIG_AUX) += auxbus.o obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o obj-$(CONFIG_MSF2) += msf2-sysreg.o -- 1.8.3.1
[Qemu-devel] [PATCH 10/10] pvpanic : update pvpanic document
Add mmio support info in docs/specs/pvpanic.txt. Signed-off-by: Peng Hao --- docs/specs/pvpanic.txt | 18 +++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt index c7bbacc..2d06ee5 100644 --- a/docs/specs/pvpanic.txt +++ b/docs/specs/pvpanic.txt @@ -1,14 +1,18 @@ PVPANIC DEVICE == -pvpanic device is a simulated ISA device, through which a guest panic -event is sent to qemu, and a QMP event is generated. This allows +pvpanic device is a simulated ISA/SysBus device, through which a guest +panic event is sent to qemu, and a QMP event is generated. This allows management apps (e.g. libvirt) to be notified and respond to the event. -The management app has the option of waiting for GUEST_PANICKED events, +The ma:wqnagement app has the option of waiting for GUEST_PANICKED events, and/or polling for guest-panicked RunState, to learn when the pvpanic device has fired a panic event. +When pvpanic device is implemented as a ISA device, it supports IOPORT +mode. Since QEMU v3.2 pvpanic also supports MMIO mode, it will be +implemented as a SYSBUS device. + ISA Interface - @@ -19,6 +23,14 @@ Software should set only bits both itself and the device recognize. Currently, only bit 0 is recognized, setting it indicates a guest panic has happened. +SYSBUS Interface + + +The SYSBUS interface is similar to the ISA interface except that it uses +MMIO. For example, the arm virt machine could put the pvpanic device at +[0x907, 0x9070001] and currently only the first byte is used. + + ACPI Interface -- -- 1.8.3.1
[Qemu-devel] [PATCH 05/10] hw/arm/virt: Use the pvpanic device
Add pvpanic device in arm virt machine.
Signed-off-by: Peng Hao
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/virt.c | 22 ++
include/hw/arm/virt.h | 1 +
3 files changed, 24 insertions(+)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2420491..50345df 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -159,3 +159,4 @@ CONFIG_PCI_DESIGNWARE=y
CONFIG_STRONGARM=y
CONFIG_HIGHBANK=y
CONFIG_MUSICPAL=y
+CONFIG_PVPANIC=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a2b8d8f..899131a 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -59,6 +59,7 @@
#include "qapi/visitor.h"
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
+#include "hw/misc/pvpanic.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -143,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_GPIO] = { 0x0903, 0x1000 },
[VIRT_SECURE_UART] ={ 0x0904, 0x1000 },
[VIRT_SMMU] = { 0x0905, 0x0002 },
+[VIRT_PVPANIC] ={ 0x0907, 0x0002 },
[VIRT_MMIO] = { 0x0a00, 0x0200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c00, 0x0200 },
@@ -190,6 +192,24 @@ static bool cpu_type_valid(const char *cpu)
return false;
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+ char *nodename;
+ hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+ hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+ sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
+
+ nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+ qemu_fdt_add_subnode(vms->fdt, nodename);
+ qemu_fdt_setprop_string(vms->fdt, nodename,
+ "compatible", "qemu,pvpanic-mmio");
+ qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+
+ g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
void *fdt = create_device_tree(>fdt_size);
@@ -1531,6 +1551,8 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
+create_pvpanic_device(vms);
+
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..937c124 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -66,6 +66,7 @@ enum {
VIRT_GIC_REDIST,
VIRT_GIC_REDIST2,
VIRT_SMMU,
+VIRT_PVPANIC,
VIRT_UART,
VIRT_MMIO,
VIRT_RTC,
--
1.8.3.1
[Qemu-devel] [PATCH] hw/misc/pvpanic: realize the configure interface
Add configure interface for pvpanic-mmio. In qemu command line
use -device pvpanic-mmio to enable the device.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 5 -
hw/arm/virt.c| 7 +++
hw/misc/pvpanic.c| 1 +
3 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 4208e46..cbc415e 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -45,6 +45,7 @@
#include "hw/arm/virt.h"
#include "sysemu/numa.h"
#include "kvm_arm.h"
+#include "hw/misc/pvpanic.h"
#define ARM_SPI_BASE 32
#define ACPI_POWER_BUTTON_DEVICE "PWRB"
@@ -785,7 +786,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
-acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
+if (pvpanic_mmio()) {
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
+}
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
(irqmap[VIRT_MMIO] + ARM_SPI_BASE), NUM_VIRTIO_TRANSPORTS);
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 921220a..aeedc43 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -198,8 +198,6 @@ static void create_pvpanic_device(const VirtMachineState
*vms)
hwaddr base = vms->memmap[VIRT_PVPANIC].base;
hwaddr size = vms->memmap[VIRT_PVPANIC].size;
- sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
-
nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
qemu_fdt_add_subnode(vms->fdt, nodename);
qemu_fdt_setprop_string(vms->fdt, nodename,
@@ -1330,6 +1328,9 @@ void virt_machine_done(Notifier *notifier, void *data)
struct arm_boot_info *info = >bootinfo;
AddressSpace *as = arm_boot_address_space(cpu, info);
+if (pvpanic_mmio()) {
+create_pvpanic_device(vms);
+}
/*
* If the user provided a dtb, we assume the dynamic sysbus nodes
* already are integrated there. This corresponds to a use case where
@@ -1551,8 +1552,6 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
-create_pvpanic_device(vms);
-
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 6fea162..ce6f5cb 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -119,6 +119,7 @@ static void pvpanic_mmio_initfn(Object *obj)
memory_region_init_io(>mr, OBJECT(s), _ops, s,
TYPE_PVPANIC_MMIO, 2);
sysbus_init_mmio(sbd, >mr);
+sysbus_mmio_map(sbd, 0, s->base);
}
static Property pvpanic_mmio_properties[] = {
--
1.8.3.1
[Qemu-devel] [PATCH 03/10] hw/misc/pvpanic: Add the MMIO interface
Add pvpanic new type "TYPE_PVPANIC_MMIO"
Signed-off-by: Peng Hao
---
hw/misc/pvpanic.c | 36
include/hw/misc/pvpanic.h | 15 +++
2 files changed, 47 insertions(+), 4 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 0f23a67..2bcbfc5 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang
* Hu Tao
+ * Peng Hao
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -57,20 +59,20 @@ typedef struct PVPanicISAState {
} PVPanicISAState;
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
-.read = pvpanic_ioport_read,
-.write = pvpanic_ioport_write,
+.read = pvpanic_read,
+.write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -125,9 +127,35 @@ static TypeInfo pvpanic_isa_info = {
.class_init= pvpanic_isa_class_init,
};
+static void pvpanic_mmio_initfn(Object *obj)
+{
+PVPanicMMIOState *s = PVPANIC_MMIO_DEVICE(obj);
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+memory_region_init_io(>mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC_MMIO, 2);
+sysbus_init_mmio(sbd, >mr);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+.name = TYPE_PVPANIC_MMIO,
+.parent= TYPE_SYS_BUS_DEVICE,
+.instance_size = sizeof(PVPanicMMIOState),
+.instance_init = pvpanic_mmio_initfn,
+.class_init= pvpanic_mmio_class_init,
+};
+
static void pvpanic_register_types(void)
{
type_register_static(_isa_info);
+type_register_static(_mmio_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..66dbdfe 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -15,9 +15,24 @@
#define HW_MISC_PVPANIC_H
#define TYPE_PVPANIC "pvpanic"
+#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
#define PVPANIC_IOPORT_PROP "ioport"
+/* PVPanicMMIOState for sysbus device and
+ * use mmio.
+ */
+typedef struct PVPanicMMIOState {
+SysBusDevice parent_obj;
+/**/
+
+/* public */
+MemoryRegion mr;
+} PVPanicMMIOState;
+
+#define PVPANIC_MMIO_DEVICE(obj)\
+OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
+
static inline uint16_t pvpanic_port(void)
{
Object *o = object_resolve_path_type("", TYPE_PVPANIC, NULL);
--
1.8.3.1
[Qemu-devel] [PATCH 07/10] hw/misc/pvpanic: add configure query interface
Add configure query interface for pvpanic-mmio.
Signed-off-by: Peng Hao
---
include/hw/misc/pvpanic.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 066c707..1f20775 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -57,4 +57,8 @@ static inline uint16_t pvpanic_port(void)
return object_property_get_uint(o, PVPANIC_IOPORT_PROP, NULL);
}
+static inline Object *pvpanic_mmio(void)
+{
+return object_resolve_path_type("", TYPE_PVPANIC_MMIO, NULL);
+}
#endif
--
1.8.3.1
[Qemu-devel] [PATCH] hw/arm/sysbus-fdt: fix assert in match function
In match function it should not call OBJECK_CHECK. When there is
a mismatch, we should continue to match rather than assert().
Signed-off-by: Peng Hao
---
hw/arm/sysbus-fdt.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/hw/arm/sysbus-fdt.c b/hw/arm/sysbus-fdt.c
index 0e24c80..41b962d 100644
--- a/hw/arm/sysbus-fdt.c
+++ b/hw/arm/sysbus-fdt.c
@@ -419,10 +419,15 @@ static int add_amd_xgbe_fdt_node(SysBusDevice *sbdev,
void *opaque)
static bool vfio_platform_match(SysBusDevice *sbdev,
const BindingEntry *entry)
{
-VFIOPlatformDevice *vdev = VFIO_PLATFORM_DEVICE(sbdev);
+VFIOPlatformDevice *vdev;
const char *compat;
unsigned int n;
+vdev = (VFIOPlatformDevice *) object_dynamic_cast(OBJECT(sbdev),
+TYPE_VFIO_PLATFORM);
+if (!vdev)
+return false;
+
for (n = vdev->num_compat, compat = vdev->compat; n > 0;
n--, compat += strlen(compat) + 1) {
if (!strcmp(entry->compat, compat)) {
--
1.8.3.1
[Qemu-devel] [PATCH V7 6/6] pvpanic : update pvpanic document
Add mmio support info in docs/specs/pvpanic.txt. Signed-off-by: Peng Hao --- docs/specs/pvpanic.txt | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt index c7bbacc..4e1f69d 100644 --- a/docs/specs/pvpanic.txt +++ b/docs/specs/pvpanic.txt @@ -1,7 +1,7 @@ PVPANIC DEVICE == -pvpanic device is a simulated ISA device, through which a guest panic +pvpanic device is a simulated device, through which a guest panic event is sent to qemu, and a QMP event is generated. This allows management apps (e.g. libvirt) to be notified and respond to the event. @@ -9,6 +9,13 @@ The management app has the option of waiting for GUEST_PANICKED events, and/or polling for guest-panicked RunState, to learn when the pvpanic device has fired a panic event. +Some architectures do not support ioport, just like arm. So add mmio +support. + +When pvpanic device is implemented as a ISA device, it supports IOPORT +mode. If pvpanic device supports MMIO mode, it will be implemented as +a SYSBUS device. + ISA Interface - @@ -19,6 +26,13 @@ Software should set only bits both itself and the device recognize. Currently, only bit 0 is recognized, setting it indicates a guest panic has happened. +SYSBUS Interface +-- + +The SYSBUS interface is similar to the ISA interface except that it uses +MMIO. Pvpanic exposes a address space region 0x0907--0x09070001 in +arm virt machine. Currently only the first byte is used. + ACPI Interface -- -- 1.8.3.1
[Qemu-devel] [PATCH V7 4/6] hw/arm/virt: Use the pvpanic device
Add pvpanic device in arm virt machine.
Signed-off-by: Peng Hao
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/virt.c | 21 +
include/hw/arm/virt.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2420491..50345df 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -159,3 +159,4 @@ CONFIG_PCI_DESIGNWARE=y
CONFIG_STRONGARM=y
CONFIG_HIGHBANK=y
CONFIG_MUSICPAL=y
+CONFIG_PVPANIC=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9f67782..c4f29c8 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -59,6 +59,7 @@
#include "qapi/visitor.h"
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
+#include "hw/misc/pvpanic.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -143,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_GPIO] = { 0x0903, 0x1000 },
[VIRT_SECURE_UART] ={ 0x0904, 0x1000 },
[VIRT_SMMU] = { 0x0905, 0x0002 },
+[VIRT_PVPANIC] ={ 0x0907, 0x0002 },
[VIRT_MMIO] = { 0x0a00, 0x0200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c00, 0x0200 },
@@ -190,6 +192,23 @@ static bool cpu_type_valid(const char *cpu)
return false;
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+char *nodename;
+hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
+
+nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+qemu_fdt_add_subnode(vms->fdt, nodename);
+qemu_fdt_setprop_string(vms->fdt, nodename,
+"compatible", "qemu,pvpanic-mmio");
+qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
void *fdt = create_device_tree(>fdt_size);
@@ -1531,6 +1550,8 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
+create_pvpanic_device(vms);
+
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..937c124 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -66,6 +66,7 @@ enum {
VIRT_GIC_REDIST,
VIRT_GIC_REDIST2,
VIRT_SMMU,
+VIRT_PVPANIC,
VIRT_UART,
VIRT_MMIO,
VIRT_RTC,
--
1.8.3.1
[Qemu-devel] [PATCH V7 1/6] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
From: Philippe Mathieu-Daudé The 'pvpanic' ISA device can be use by any machine with an ISA bus. Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/Makefile.objs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 6d50b03..24997d6 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o common-obj-$(CONFIG_EDU) += edu.o common-obj-$(CONFIG_PCA9552) += pca9552.o +common-obj-$(CONFIG_PVPANIC) += pvpanic.o common-obj-y += unimp.o common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o @@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o -obj-$(CONFIG_PVPANIC) += pvpanic.o obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o obj-$(CONFIG_AUX) += auxbus.o obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o -- 1.8.3.1
[Qemu-devel] [PATCH V7 5/6] hw/arm/virt: add pvpanic device in virt acpi table
add pvpanic device in virt acpi table, so when kenrel command line uses
acpi=force, kernel can get info from acpi table in aarch64.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 16
1 file changed, 16 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..d126cee 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -61,6 +61,21 @@ static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
}
}
+static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry
*pvpanic_memmap)
+{
+Aml *dev = aml_device("PEVT");
+aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+Aml *crs = aml_resource_template();
+aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
+ pvpanic_memmap->size, AML_READ_WRITE));
+
+aml_append(dev, aml_name_decl("_CRS", crs));
+
+aml_append(scope, dev);
+}
+
static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
uint32_t uart_irq)
{
@@ -770,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_cpus(scope, vms->smp_cpus);
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
--
1.8.3.1
[Qemu-devel] [PATCH V7 3/6] hw/misc/pvpanic: Add the MMIO interface
Add pvpanic new type "TYPE_PVPANIC_MMIO"
Signed-off-by: Peng Hao
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/pvpanic.c | 81 +--
include/hw/misc/pvpanic.h | 1 +
2 files changed, 65 insertions(+), 17 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index dd3aef2..5d0fbc6 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang
* Hu Tao
+ * Peng Hao
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -25,9 +27,6 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define PVPANIC(obj)\
-OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
-
static void handle_event(int event)
{
static bool logged;
@@ -45,30 +44,50 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
-/* private */
-ISADevice isadev;
+/* PVPanicISAState for ISA device and
+ * use ioport.
+ */
+typedef struct PVPanicISAState {
+ /* private */
+ ISADevice isadev;
+ uint16_t ioport;
/* public */
MemoryRegion mr;
-uint16_t ioport;
-} PVPanicState;
+} PVPanicISAState;
+
+/* PVPanicMMIOState for sysbus device and
+ * use mmio.
+ */
+typedef struct PVPanicMMIOState {
+/* private */
+SysBusDevice busdev;
+
+ /* public */
+MemoryRegion mr;
+} PVPanicMMIOState;
+
+#define PVPANIC_ISA(obj)\
+OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+
+#define PVPANIC_MMIO(obj)\
+OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
-.read = pvpanic_ioport_read,
-.write = pvpanic_ioport_write,
+.read = pvpanic_read,
+.write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -77,15 +96,16 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = PVPANIC(obj);
+PVPanicISAState *s = PVPANIC_ISA(obj);
-memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC, 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = PVPANIC(dev);
+PVPanicISAState *s = PVPANIC_ISA(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -102,7 +122,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
}
static Property pvpanic_isa_properties[] = {
-DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -118,14 +138,41 @@ static void pvpanic_isa_class_init(ObjectClass *klass,
void *data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent= TYPE_ISA_DEVICE,
-.instance_size = sizeof(PVPanicState),
+.instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init= pvpanic_isa_class_init,
};
+
+static void pvpanic_mmio_initfn(Object *obj)
+{
+PVPanicMMIOState *s = PVPANIC_MMIO(obj);
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+memory_region_init_io(>mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC_MMIO, 2);
+sysbus_init_mmio(sbd, >mr);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+.name = TYPE_PVPANIC_MMIO,
+.parent= TYPE_SYS_BUS_DEVICE,
+.instance_size = sizeof(PVPanicMMIOState),
+.instance_init = pvpanic_mmio_initfn,
+.class_init= pvpanic_mmio_class_init,
+};
+
static void pvpanic_register_types(void)
{
type_register_static(_isa_info);
+type_register_static(_mmio_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..19c0fbb 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -17,6 +17,7 @@
#define TYPE_PVPANIC "p
[Qemu-devel] [PATCH V7 0/5] add pvpanic mmio support
The first patches are simple cleanups: - patch 1 move the pvpanic device with the 'ocmmon objects' so we compile it once for the x86/arm/aarch64 archs, - patch 2 simply renames ISA fields/definitions to generic ones. Then instead of add/use the MMIO pvpanic device in the virt machine in an unique patch, I split it in two distinct patches: - patch 3 uses Peng Hao's work, but add the MMIO interface to the existing device (no logical change). - patch 4 is Peng Hao's work in the virt machine (no logical change). - patch 5 add pvpanic device in acpi table in virt machine v2 from Peng Hao is: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03433.html v3 --> v4 patch 1,2 no modification. patch 3, add TYPE_PANIC_MMIO for distinguishing different bus device, virt + isa_pvpanic will abnormally terminate virtual machine. patch 4, "pvpanic,mmio" --> "qemu,pvpanic-mmio". patch 5, newly added. v4 --> v5 patch 1,2 no modification. patch 3 delete PvpanicCommonState structure. patch 4 VIRT_PVPANIC_MMIO --> VIRT_PVPANIC correct VIRT_PVPANIC's overlap start address patch 5 no modification. v5 --> v6 add document. v6 --> v7 patch 5 modify device name from "PANC" to "PEVT". patch 6 modify document description. the kernel part of the series: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git/log/?h=char-misc-testing misc/pvpanic: remove a redundant comma misc/pvpanic: convert to SPDX license tags misc/pvpanic: change header file sort style misc/pvpanic: remove unnecessary header file misc/pvpanic : break dependency on ACPI misc/pvpanic : grouping ACPI related stuff misc/pvpanic: add support to get pvpanic device info FDT dt-bindings: misc/pvpanic: add document for pvpanic-mmio misc/pvpanic: add MMIO support misc/pvpanic: simplify the code using acpi_dev_resource_io pvpanic: move pvpanic to misc as common driver Philippe Mathieu-Daudé (2): hw/misc/pvpanic: Build the pvpanic device in $(common-obj) hw/misc/pvpanic: Cosmetic renaming Peng Hao (3): hw/misc/pvpanic: Add the MMIO interface hw/arm/virt: Use the pvpanic device hw/arm/virt: add pvpanic device in virt acpi table pvpanic : update pvpanic document default-configs/aarch64-softmmu.mak | 1 + hw/arm/virt-acpi-build.c| 16 hw/arm/virt.c | 21 ++ hw/misc/Makefile.objs | 2 +- hw/misc/pvpanic.c | 78 ++--- include/hw/arm/virt.h | 1 + include/hw/misc/pvpanic.h | 2 + docs/specs/pvpanic.txt | 13 - 8 files changed, 118 insertions(+), 17 deletions(-) -- 1.8.3.1
[Qemu-devel] [PATCH V7 2/6] hw/misc/pvpanic: Cosmetic renaming
From: Philippe Mathieu-Daudé
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC (this just returns a generic Object),
- ISADevice parent_obj -> isadev,
- MemoryRegion io -> mr.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/pvpanic.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..dd3aef2 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,7 +25,7 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj)\
+#define PVPANIC(obj)\
OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
@@ -46,9 +46,11 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
typedef struct PVPanicState {
-ISADevice parent_obj;
+/* private */
+ISADevice isadev;
-MemoryRegion io;
+/* public */
+MemoryRegion mr;
uint16_t ioport;
} PVPanicState;
@@ -75,15 +77,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+PVPanicState *s = PVPANIC(obj);
-memory_region_init_io(>io, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+PVPanicState *s = PVPANIC(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,7 +98,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
-isa_register_ioport(d, >io, s->ioport);
+isa_register_ioport(d, >mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
--
1.8.3.1
[Qemu-devel] [PATCH V6 6/6] pvpanic : update pvpanic document
Add mmio support info in docs/specs/pvpanic.txt. Signed-off-by: Peng Hao --- docs/specs/pvpanic.txt | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt index c7bbacc..5d8e9dc 100644 --- a/docs/specs/pvpanic.txt +++ b/docs/specs/pvpanic.txt @@ -1,7 +1,7 @@ PVPANIC DEVICE == -pvpanic device is a simulated ISA device, through which a guest panic +pvpanic device is a simulated device, through which a guest panic event is sent to qemu, and a QMP event is generated. This allows management apps (e.g. libvirt) to be notified and respond to the event. @@ -9,6 +9,10 @@ The management app has the option of waiting for GUEST_PANICKED events, and/or polling for guest-panicked RunState, to learn when the pvpanic device has fired a panic event. +When pvpanic device is implemented as a ISA device, it supports IOPORT +mode. If pvpanic device supports MMIO mode, it will be implemented as +a SYSBUS device. + ISA Interface - @@ -19,6 +23,13 @@ Software should set only bits both itself and the device recognize. Currently, only bit 0 is recognized, setting it indicates a guest panic has happened. +SYSBUS Interface +-- + +It is basically the same as ISA interface except that it uses MMIO. Pvpanic exposes +a address space region 0x0906--0x09060001 in arm virt machine. +Currently only the first byte is used. + ACPI Interface -- -- 1.8.3.1
[Qemu-devel] [PATCH V6 4/6] hw/arm/virt: Use the pvpanic device
Add pvpanic device in arm virt machine.
Signed-off-by: Peng Hao
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/arm-softmmu.mak | 1 +
hw/arm/virt.c | 21 +
include/hw/arm/virt.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2420491..50345df 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -159,3 +159,4 @@ CONFIG_PCI_DESIGNWARE=y
CONFIG_STRONGARM=y
CONFIG_HIGHBANK=y
CONFIG_MUSICPAL=y
+CONFIG_PVPANIC=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9f67782..c4f29c8 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -59,6 +59,7 @@
#include "qapi/visitor.h"
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
+#include "hw/misc/pvpanic.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -143,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_GPIO] = { 0x0903, 0x1000 },
[VIRT_SECURE_UART] ={ 0x0904, 0x1000 },
[VIRT_SMMU] = { 0x0905, 0x0002 },
+[VIRT_PVPANIC] ={ 0x0907, 0x0002 },
[VIRT_MMIO] = { 0x0a00, 0x0200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c00, 0x0200 },
@@ -190,6 +192,23 @@ static bool cpu_type_valid(const char *cpu)
return false;
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+char *nodename;
+hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
+
+nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+qemu_fdt_add_subnode(vms->fdt, nodename);
+qemu_fdt_setprop_string(vms->fdt, nodename,
+"compatible", "qemu,pvpanic-mmio");
+qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
void *fdt = create_device_tree(>fdt_size);
@@ -1531,6 +1550,8 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
+create_pvpanic_device(vms);
+
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..937c124 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -66,6 +66,7 @@ enum {
VIRT_GIC_REDIST,
VIRT_GIC_REDIST2,
VIRT_SMMU,
+VIRT_PVPANIC,
VIRT_UART,
VIRT_MMIO,
VIRT_RTC,
--
1.8.3.1
[Qemu-devel] [PATCH V6 5/6] hw/arm/virt: add pvpanic device in virt acpi table
add pvpanic device in virt acpi table, so when kenrel command line uses
acpi=force, kernel can get info from acpi table in aarch64.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 16
1 file changed, 16 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..d126cee 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -61,6 +61,21 @@ static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
}
}
+static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry
*pvpanic_memmap)
+{
+Aml *dev = aml_device("PANC");
+aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+Aml *crs = aml_resource_template();
+aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
+ pvpanic_memmap->size, AML_READ_WRITE));
+
+aml_append(dev, aml_name_decl("_CRS", crs));
+
+aml_append(scope, dev);
+}
+
static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
uint32_t uart_irq)
{
@@ -770,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_cpus(scope, vms->smp_cpus);
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
--
1.8.3.1
[Qemu-devel] [PATCH V6 0/5] add pvpanic mmio support
The first patches are simple cleanups: - patch 1 move the pvpanic device with the 'ocmmon objects' so we compile it once for the x86/arm/aarch64 archs, - patch 2 simply renames ISA fields/definitions to generic ones. Then instead of add/use the MMIO pvpanic device in the virt machine in an unique patch, I split it in two distinct patches: - patch 3 uses Peng Hao's work, but add the MMIO interface to the existing device (no logical change). - patch 4 is Peng Hao's work in the virt machine (no logical change). - patch 5 add pvpanic device in acpi table in virt machine v2 from Peng Hao is: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03433.html v3 --> v4 patch 1,2 no modification. patch 3, add TYPE_PANIC_MMIO for distinguishing different bus device, virt + isa_pvpanic will abnormally terminate virtual machine. patch 4, "pvpanic,mmio" --> "qemu,pvpanic-mmio". patch 5, newly added. v4 --> v5 patch 1,2 no modification. patch 3 delete PvpanicCommonState structure. patch 4 VIRT_PVPANIC_MMIO --> VIRT_PVPANIC correct VIRT_PVPANIC's overlap start address patch 5 no modification. v5 --> v6 add document. the kernel part of the series: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git/log/?h=char-misc-testing misc/pvpanic: remove a redundant comma misc/pvpanic: convert to SPDX license tags misc/pvpanic: change header file sort style misc/pvpanic: remove unnecessary header file misc/pvpanic : break dependency on ACPI misc/pvpanic : grouping ACPI related stuff misc/pvpanic: add support to get pvpanic device info FDT dt-bindings: misc/pvpanic: add document for pvpanic-mmio misc/pvpanic: add MMIO support misc/pvpanic: simplify the code using acpi_dev_resource_io pvpanic: move pvpanic to misc as common driver Philippe Mathieu-Daudé (2): hw/misc/pvpanic: Build the pvpanic device in $(common-obj) hw/misc/pvpanic: Cosmetic renaming Peng Hao (3): hw/misc/pvpanic: Add the MMIO interface hw/arm/virt: Use the pvpanic device hw/arm/virt: add pvpanic device in virt acpi table pvpanic : update pvpanic document default-configs/aarch64-softmmu.mak | 1 + hw/arm/virt-acpi-build.c| 16 hw/arm/virt.c | 21 ++ hw/misc/Makefile.objs | 2 +- hw/misc/pvpanic.c | 78 ++--- include/hw/arm/virt.h | 1 + include/hw/misc/pvpanic.h | 2 + docs/specs/pvpanic.txt | 13 - 8 files changed, 118 insertions(+), 17 deletions(-) -- 1.8.3.1
[Qemu-devel] [PATCH V6 1/6] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
From: Philippe Mathieu-Daudé The 'pvpanic' ISA device can be use by any machine with an ISA bus. Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/Makefile.objs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 6d50b03..24997d6 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o common-obj-$(CONFIG_EDU) += edu.o common-obj-$(CONFIG_PCA9552) += pca9552.o +common-obj-$(CONFIG_PVPANIC) += pvpanic.o common-obj-y += unimp.o common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o @@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o -obj-$(CONFIG_PVPANIC) += pvpanic.o obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o obj-$(CONFIG_AUX) += auxbus.o obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o -- 1.8.3.1
[Qemu-devel] [PATCH V6 3/6] hw/misc/pvpanic: Add the MMIO interface
Add pvpanic new type "TYPE_PVPANIC_MMIO"
Signed-off-by: Peng Hao
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/pvpanic.c | 81 +--
include/hw/misc/pvpanic.h | 1 +
2 files changed, 65 insertions(+), 17 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index dd3aef2..5d0fbc6 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang
* Hu Tao
+ * Peng Hao
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -25,9 +27,6 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define PVPANIC(obj)\
-OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
-
static void handle_event(int event)
{
static bool logged;
@@ -45,30 +44,50 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
-/* private */
-ISADevice isadev;
+/* PVPanicISAState for ISA device and
+ * use ioport.
+ */
+typedef struct PVPanicISAState {
+ /* private */
+ ISADevice isadev;
+ uint16_t ioport;
/* public */
MemoryRegion mr;
-uint16_t ioport;
-} PVPanicState;
+} PVPanicISAState;
+
+/* PVPanicMMIOState for sysbus device and
+ * use mmio.
+ */
+typedef struct PVPanicMMIOState {
+/* private */
+SysBusDevice busdev;
+
+ /* public */
+MemoryRegion mr;
+} PVPanicMMIOState;
+
+#define PVPANIC_ISA(obj)\
+OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+
+#define PVPANIC_MMIO(obj)\
+OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
-.read = pvpanic_ioport_read,
-.write = pvpanic_ioport_write,
+.read = pvpanic_read,
+.write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -77,15 +96,16 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = PVPANIC(obj);
+PVPanicISAState *s = PVPANIC_ISA(obj);
-memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC, 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = PVPANIC(dev);
+PVPanicISAState *s = PVPANIC_ISA(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -102,7 +122,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
}
static Property pvpanic_isa_properties[] = {
-DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -118,14 +138,41 @@ static void pvpanic_isa_class_init(ObjectClass *klass,
void *data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent= TYPE_ISA_DEVICE,
-.instance_size = sizeof(PVPanicState),
+.instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init= pvpanic_isa_class_init,
};
+
+static void pvpanic_mmio_initfn(Object *obj)
+{
+PVPanicMMIOState *s = PVPANIC_MMIO(obj);
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+memory_region_init_io(>mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC_MMIO, 2);
+sysbus_init_mmio(sbd, >mr);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+.name = TYPE_PVPANIC_MMIO,
+.parent= TYPE_SYS_BUS_DEVICE,
+.instance_size = sizeof(PVPanicMMIOState),
+.instance_init = pvpanic_mmio_initfn,
+.class_init= pvpanic_mmio_class_init,
+};
+
static void pvpanic_register_types(void)
{
type_register_static(_isa_info);
+type_register_static(_mmio_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..19c0fbb 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -17,6 +17,7 @@
#define TYPE_PVPANIC "p
[Qemu-devel] [PATCH V6 2/6] hw/misc/pvpanic: Cosmetic renaming
From: Philippe Mathieu-Daudé
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC (this just returns a generic Object),
- ISADevice parent_obj -> isadev,
- MemoryRegion io -> mr.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/pvpanic.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..dd3aef2 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,7 +25,7 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj)\
+#define PVPANIC(obj)\
OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
@@ -46,9 +46,11 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
typedef struct PVPanicState {
-ISADevice parent_obj;
+/* private */
+ISADevice isadev;
-MemoryRegion io;
+/* public */
+MemoryRegion mr;
uint16_t ioport;
} PVPanicState;
@@ -75,15 +77,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+PVPanicState *s = PVPANIC(obj);
-memory_region_init_io(>io, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+PVPanicState *s = PVPANIC(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,7 +98,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
-isa_register_ioport(d, >io, s->ioport);
+isa_register_ioport(d, >mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
--
1.8.3.1
[Qemu-devel] [PATCH V5 0/5] add pvpanic mmio support
The first patches are simple cleanups: - patch 1 move the pvpanic device with the 'ocmmon objects' so we compile it once for the x86/arm/aarch64 archs, - patch 2 simply renames ISA fields/definitions to generic ones. Then instead of add/use the MMIO pvpanic device in the virt machine in an unique patch, I split it in two distinct patches: - patch 3 uses Peng Hao's work, but add the MMIO interface to the existing device (no logical change). - patch 4 is Peng Hao's work in the virt machine (no logical change). - patch 5 add pvpanic device in acpi table in virt machine v2 from Peng Hao is: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03433.html v3 --> v4 patch 1,2 no modification. patch 3, add TYPE_PANIC_MMIO for distinguishing different bus device, virt + isa_pvpanic will abnormally terminate virtual machine. patch 4, "pvpanic,mmio" --> "qemu,pvpanic-mmio". patch 5, newly added. v4 --> v5 patch 1,2 no modification. patch 3 delete PvpanicCommonState structure. patch 4 VIRT_PVPANIC_MMIO --> VIRT_PVPANIC correct VIRT_PVPANIC's overlap start address patch 5 no modification. Philippe Mathieu-Daudé (2): hw/misc/pvpanic: Build the pvpanic device in $(common-obj) hw/misc/pvpanic: Cosmetic renaming Peng Hao (3): hw/misc/pvpanic: Add the MMIO interface hw/arm/virt: Use the pvpanic device hw/arm/virt: add pvpanic device in virt acpi table default-configs/aarch64-softmmu.mak | 1 + hw/arm/virt-acpi-build.c| 16 hw/arm/virt.c | 21 ++ hw/misc/Makefile.objs | 2 +- hw/misc/pvpanic.c | 78 ++--- include/hw/arm/virt.h | 1 + include/hw/misc/pvpanic.h | 2 + 7 files changed, 105 insertions(+), 16 deletions(-) -- 1.8.3.1
[Qemu-devel] [PATCH V5 3/5] hw/misc/pvpanic: Add the MMIO interface
Signed-off-by: Peng Hao
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/pvpanic.c | 81 +--
include/hw/misc/pvpanic.h | 1 +
2 files changed, 65 insertions(+), 17 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index dd3aef2..5d0fbc6 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang
* Hu Tao
+ * Peng Hao
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -25,9 +27,6 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define PVPANIC(obj)\
-OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
-
static void handle_event(int event)
{
static bool logged;
@@ -45,30 +44,50 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
-/* private */
-ISADevice isadev;
+/* PVPanicISAState for ISA device and
+ * use ioport.
+ */
+typedef struct PVPanicISAState {
+ /* private */
+ ISADevice isadev;
+ uint16_t ioport;
/* public */
MemoryRegion mr;
-uint16_t ioport;
-} PVPanicState;
+} PVPanicISAState;
+
+/* PVPanicMMIOState for sysbus device and
+ * use mmio.
+ */
+typedef struct PVPanicMMIOState {
+/* private */
+SysBusDevice busdev;
+
+ /* public */
+MemoryRegion mr;
+} PVPanicMMIOState;
+
+#define PVPANIC_ISA(obj)\
+OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+
+#define PVPANIC_MMIO(obj)\
+OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
-.read = pvpanic_ioport_read,
-.write = pvpanic_ioport_write,
+.read = pvpanic_read,
+.write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -77,15 +96,16 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = PVPANIC(obj);
+PVPanicISAState *s = PVPANIC_ISA(obj);
-memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC, 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = PVPANIC(dev);
+PVPanicISAState *s = PVPANIC_ISA(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -102,7 +122,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
}
static Property pvpanic_isa_properties[] = {
-DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -118,14 +138,41 @@ static void pvpanic_isa_class_init(ObjectClass *klass,
void *data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent= TYPE_ISA_DEVICE,
-.instance_size = sizeof(PVPanicState),
+.instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init= pvpanic_isa_class_init,
};
+
+static void pvpanic_mmio_initfn(Object *obj)
+{
+PVPanicMMIOState *s = PVPANIC_MMIO(obj);
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+memory_region_init_io(>mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC_MMIO, 2);
+sysbus_init_mmio(sbd, >mr);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+.name = TYPE_PVPANIC_MMIO,
+.parent= TYPE_SYS_BUS_DEVICE,
+.instance_size = sizeof(PVPanicMMIOState),
+.instance_init = pvpanic_mmio_initfn,
+.class_init= pvpanic_mmio_class_init,
+};
+
static void pvpanic_register_types(void)
{
type_register_static(_isa_info);
+type_register_static(_mmio_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..19c0fbb 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -17,6 +17,7 @@
#define TYPE_PVPANIC "pvpanic"
#define PVPANIC_IOPORT_PROP "iop
[Qemu-devel] [PATCH V5 1/5] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
From: Philippe Mathieu-Daudé The 'pvpanic' ISA device can be use by any machine with an ISA bus. Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/Makefile.objs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 6d50b03..24997d6 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o common-obj-$(CONFIG_EDU) += edu.o common-obj-$(CONFIG_PCA9552) += pca9552.o +common-obj-$(CONFIG_PVPANIC) += pvpanic.o common-obj-y += unimp.o common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o @@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o -obj-$(CONFIG_PVPANIC) += pvpanic.o obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o obj-$(CONFIG_AUX) += auxbus.o obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o -- 1.8.3.1
[Qemu-devel] [PATCH V5 2/5] hw/misc/pvpanic: Cosmetic renaming
From: Philippe Mathieu-Daudé
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC (this just returns a generic Object),
- ISADevice parent_obj -> isadev,
- MemoryRegion io -> mr.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/pvpanic.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..dd3aef2 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,7 +25,7 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj)\
+#define PVPANIC(obj)\
OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
@@ -46,9 +46,11 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
typedef struct PVPanicState {
-ISADevice parent_obj;
+/* private */
+ISADevice isadev;
-MemoryRegion io;
+/* public */
+MemoryRegion mr;
uint16_t ioport;
} PVPanicState;
@@ -75,15 +77,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+PVPanicState *s = PVPANIC(obj);
-memory_region_init_io(>io, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+PVPanicState *s = PVPANIC(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,7 +98,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
-isa_register_ioport(d, >io, s->ioport);
+isa_register_ioport(d, >mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
--
1.8.3.1
[Qemu-devel] [PATCH V5 4/5] hw/arm/virt: Use the pvpanic device
add pvpanic device in aarch64 virt machine.
Signed-off-by: Peng Hao
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/aarch64-softmmu.mak | 1 +
hw/arm/virt.c | 21 +
include/hw/arm/virt.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/default-configs/aarch64-softmmu.mak
b/default-configs/aarch64-softmmu.mak
index 6f790f0..57c6ca5 100644
--- a/default-configs/aarch64-softmmu.mak
+++ b/default-configs/aarch64-softmmu.mak
@@ -9,3 +9,4 @@ CONFIG_DPCD=y
CONFIG_XLNX_ZYNQMP=y
CONFIG_XLNX_ZYNQMP_ARM=y
CONFIG_ARM_SMMUV3=y
+CONFIG_PVPANIC=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9f67782..ffe8d00 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -59,6 +59,7 @@
#include "qapi/visitor.h"
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
+#include "hw/misc/pvpanic.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -143,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_GPIO] = { 0x0903, 0x1000 },
[VIRT_SECURE_UART] ={ 0x0904, 0x1000 },
[VIRT_SMMU] = { 0x0905, 0x0002 },
+[VIRT_PVPANIC] ={ 0x0907, 0x0002 },
[VIRT_MMIO] = { 0x0a00, 0x0200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c00, 0x0200 },
@@ -190,6 +192,23 @@ static bool cpu_type_valid(const char *cpu)
return false;
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+char *nodename;
+hwaddr base = vms->memmap[VIRT_PVPANIC].base;
+hwaddr size = vms->memmap[VIRT_PVPANIC].size;
+
+sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
+
+nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+qemu_fdt_add_subnode(vms->fdt, nodename);
+qemu_fdt_setprop_string(vms->fdt, nodename,
+"compatible", "qemu,pvpanic-mmio");
+qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
void *fdt = create_device_tree(>fdt_size);
@@ -1531,6 +1550,8 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
+create_pvpanic_device(vms);
+
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..ba54b84 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -66,6 +66,7 @@ enum {
VIRT_GIC_REDIST,
VIRT_GIC_REDIST2,
VIRT_SMMU,
+VIRT_PVPANIC,
VIRT_UART,
VIRT_MMIO,
VIRT_RTC,
--
1.8.3.1
[Qemu-devel] [PATCH V5 5/5] hw/arm/virt: add pvpanic device in virt acpi table
add pvpanic device in virt acpi table, so when kenrel command line uses
acpi=force, kernel can get info from acpi table in aarch64.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 16
1 file changed, 16 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..d126cee 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -61,6 +61,21 @@ static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
}
}
+static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry
*pvpanic_memmap)
+{
+Aml *dev = aml_device("PANC");
+aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+Aml *crs = aml_resource_template();
+aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
+ pvpanic_memmap->size, AML_READ_WRITE));
+
+aml_append(dev, aml_name_decl("_CRS", crs));
+
+aml_append(scope, dev);
+}
+
static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
uint32_t uart_irq)
{
@@ -770,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_cpus(scope, vms->smp_cpus);
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC]);
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
--
1.8.3.1
[Qemu-devel] [PATCH V4 5/5] hw/arm/virt: add pvpanic device in virt acpi table
add pvpanic device in virt acpi table, so when kenrel command line uses
acpi=force, kernel can get info from acpi table in aarch64.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 16
1 file changed, 16 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..d126cee 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -61,6 +61,21 @@ static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
}
}
+static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry
*pvpanic_memmap)
+{
+Aml *dev = aml_device("PANC");
+aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+Aml *crs = aml_resource_template();
+aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
+ pvpanic_memmap->size, AML_READ_WRITE));
+
+aml_append(dev, aml_name_decl("_CRS", crs));
+
+aml_append(scope, dev);
+}
+
static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
uint32_t uart_irq)
{
@@ -770,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
VirtMachineState *vms)
acpi_dsdt_add_cpus(scope, vms->smp_cpus);
acpi_dsdt_add_uart(scope, [VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
+acpi_dsdt_add_pvpanic(scope, [VIRT_PVPANIC_MMIO]);
acpi_dsdt_add_flash(scope, [VIRT_FLASH]);
acpi_dsdt_add_fw_cfg(scope, [VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, [VIRT_MMIO],
--
1.8.3.1
[Qemu-devel] [PATCH V4 4/5] hw/arm/virt: Use the pvpanic device
add pvpanic device in aarch64 virt machine.
Signed-off-by: Peng Hao
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/aarch64-softmmu.mak | 1 +
hw/arm/virt.c | 21 +
include/hw/arm/virt.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/default-configs/aarch64-softmmu.mak
b/default-configs/aarch64-softmmu.mak
index 6f790f0..57c6ca5 100644
--- a/default-configs/aarch64-softmmu.mak
+++ b/default-configs/aarch64-softmmu.mak
@@ -9,3 +9,4 @@ CONFIG_DPCD=y
CONFIG_XLNX_ZYNQMP=y
CONFIG_XLNX_ZYNQMP_ARM=y
CONFIG_ARM_SMMUV3=y
+CONFIG_PVPANIC=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9f67782..ffe8d00 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -59,6 +59,7 @@
#include "qapi/visitor.h"
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
+#include "hw/misc/pvpanic.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -143,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_GPIO] = { 0x0903, 0x1000 },
[VIRT_SECURE_UART] ={ 0x0904, 0x1000 },
[VIRT_SMMU] = { 0x0905, 0x0002 },
+[VIRT_PVPANIC_MMIO] = { 0x0906, 0x0002 },
[VIRT_MMIO] = { 0x0a00, 0x0200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c00, 0x0200 },
@@ -190,6 +192,23 @@ static bool cpu_type_valid(const char *cpu)
return false;
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+char *nodename;
+hwaddr base = vms->memmap[VIRT_PVPANIC_MMIO].base;
+hwaddr size = vms->memmap[VIRT_PVPANIC_MMIO].size;
+
+sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
+
+nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+qemu_fdt_add_subnode(vms->fdt, nodename);
+qemu_fdt_setprop_string(vms->fdt, nodename,
+"compatible", "qemu,pvpanic-mmio");
+qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
void *fdt = create_device_tree(>fdt_size);
@@ -1531,6 +1550,8 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
+create_pvpanic_device(vms);
+
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..ba54b84 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -66,6 +66,7 @@ enum {
VIRT_GIC_REDIST,
VIRT_GIC_REDIST2,
VIRT_SMMU,
+VIRT_PVPANIC_MMIO,
VIRT_UART,
VIRT_MMIO,
VIRT_RTC,
--
1.8.3.1
[Qemu-devel] [PATCH V4 2/5] hw/misc/pvpanic: Cosmetic renaming
From: Philippe Mathieu-Daudé
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC (this just returns a generic Object),
- ISADevice parent_obj -> isadev,
- MemoryRegion io -> mr.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/pvpanic.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..dd3aef2 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,7 +25,7 @@
/* The pv event value */
#define PVPANIC_PANICKED(1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj)\
+#define PVPANIC(obj)\
OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
@@ -46,9 +46,11 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
typedef struct PVPanicState {
-ISADevice parent_obj;
+/* private */
+ISADevice isadev;
-MemoryRegion io;
+/* public */
+MemoryRegion mr;
uint16_t ioport;
} PVPanicState;
@@ -75,15 +77,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+PVPanicState *s = PVPANIC(obj);
-memory_region_init_io(>io, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+PVPanicState *s = PVPANIC(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,7 +98,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
-isa_register_ioport(d, >io, s->ioport);
+isa_register_ioport(d, >mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
--
1.8.3.1
[Qemu-devel] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface
Signed-off-by: Peng Hao
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/pvpanic.c | 74 ++-
include/hw/misc/pvpanic.h | 2 ++
2 files changed, 62 insertions(+), 14 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index dd3aef2..b575e01 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang
* Hu Tao
+ * Peng Hao
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -45,30 +47,48 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
+typedef struct PVPanicCommonState {
+MemoryRegion mr;
+} PVPanicCommonState;
+
+typedef struct PVPanicISAState {
/* private */
ISADevice isadev;
+uint16_t ioport;
+/* public */
+PVPanicCommonState common;
+} PVPanicISAState;
+
+typedef struct PVPanicMMIOState {
+/* private */
+SysBusDevice busdev;
/* public */
-MemoryRegion mr;
-uint16_t ioport;
-} PVPanicState;
+PVPanicCommonState common;
+} PVPanicMMIOState;
+
+#define PVPANIC_ISA(obj)\
+OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+
+#define PVPANIC_MMIO(obj)\
+OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
+
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
-.read = pvpanic_ioport_read,
-.write = pvpanic_ioport_write,
+.read = pvpanic_read,
+.write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -77,15 +97,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
-PVPanicState *s = PVPANIC(obj);
+PVPanicISAState *s = PVPANIC_ISA(obj);
-memory_region_init_io(>mr, OBJECT(s), _ops, s, "pvpanic", 1);
+memory_region_init_io(>common.mr, OBJECT(s), _ops, s,
TYPE_PVPANIC, 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
-PVPanicState *s = PVPANIC(dev);
+PVPanicISAState *s = PVPANIC_ISA(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -98,11 +118,11 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error
**errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
-isa_register_ioport(d, >mr, s->ioport);
+isa_register_ioport(d, >common.mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
-DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -118,14 +138,40 @@ static void pvpanic_isa_class_init(ObjectClass *klass,
void *data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent= TYPE_ISA_DEVICE,
-.instance_size = sizeof(PVPanicState),
+.instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init= pvpanic_isa_class_init,
};
+static void pvpanic_mmio_initfn(Object *obj)
+{
+PVPanicMMIOState *s = PVPANIC_MMIO(obj);
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+memory_region_init_io(>common.mr, OBJECT(s), _ops, s,
+ TYPE_PVPANIC_MMIO, 2);
+sysbus_init_mmio(sbd, >common.mr);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+.name = TYPE_PVPANIC_MMIO,
+.parent= TYPE_SYS_BUS_DEVICE,
+.instance_size = sizeof(PVPanicMMIOState),
+.instance_init = pvpanic_mmio_initfn,
+.class_init= pvpanic_mmio_class_init,
+};
+
static void pvpanic_register_types(void)
{
type_register_static(_isa_info);
+type_register_static(_mmio_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..c0d2d38 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -16,6 +16,8 @@
#define TYPE_PVPANIC "pvpanic"
+#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
+
#define PVPANIC_IOPORT_PROP "ioport"
static inline uint16_t pvpanic_port(void)
--
1.8.3.1
[Qemu-devel] [PATCH V4 0/5]
The first patches are simple cleanups: - patch 1 move the pvpanic device with the 'ocmmon objects' so we compile it once for the x86/arm/aarch64 archs, - patch 2 simply renames ISA fields/definitions to generic ones. Then instead of add/use the MMIO pvpanic device in the virt machine in an unique patch, I split it in two distinct patches: - patch 3 uses Peng Hao's work, but add the MMIO interface to the existing device (no logical change). - patch 4 is Peng Hao's work in the virt machine (no logical change). - patch 5 add pvpanic device in acpi table in virt machine v2 from Peng Hao is: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03433.html v3 --> v4 patch 1,2 no modification. patch 3, add TYPE_PANIC_MMIO for distinguishing different bus device, virt + isa_pvpanic will abnormally terminate virtual machine. patch 4, "pvpanic,mmio" --> "qemu,pvpanic-mmio". patch 5, newly added. Philippe Mathieu-Daudé (2): hw/misc/pvpanic: Build the pvpanic device in $(common-obj) hw/misc/pvpanic: Cosmetic renaming Peng Hao (3): hw/misc/pvpanic: Add the MMIO interface hw/arm/virt: Use the pvpanic device hw/arm/virt: add pvpanic device in virt acpi table default-configs/aarch64-softmmu.mak | 1 + hw/arm/virt-acpi-build.c| 16 hw/arm/virt.c | 21 ++ hw/misc/Makefile.objs | 2 +- hw/misc/pvpanic.c | 78 ++--- include/hw/arm/virt.h | 1 + include/hw/misc/pvpanic.h | 2 + 7 files changed, 105 insertions(+), 16 deletions(-) -- 1.8.3.1
[Qemu-devel] [PATCH V4 1/5] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
From: Philippe Mathieu-Daudé The 'pvpanic' ISA device can be use by any machine with an ISA bus. Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/Makefile.objs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index 6d50b03..24997d6 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o common-obj-$(CONFIG_EDU) += edu.o common-obj-$(CONFIG_PCA9552) += pca9552.o +common-obj-$(CONFIG_PVPANIC) += pvpanic.o common-obj-y += unimp.o common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o @@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o -obj-$(CONFIG_PVPANIC) += pvpanic.o obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o obj-$(CONFIG_AUX) += auxbus.o obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o -- 1.8.3.1
[Qemu-devel] [PATCH V6 1/5] target/i386 : add coalesced pio support
add coalesced_pio's struct and KVM_CAP_COALESCED_PIO header.
Signed-off-by: Peng Hao
---
accel/kvm/kvm-all.c | 4 ++--
linux-headers/linux/kvm.h | 9 -
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index de12f78..29d208d 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -537,7 +537,7 @@ static void kvm_coalesce_mmio_region(MemoryListener
*listener,
zone.addr = start;
zone.size = size;
-zone.pad = 0;
+zone.pio = 0;
(void)kvm_vm_ioctl(s, KVM_REGISTER_COALESCED_MMIO, );
}
@@ -554,7 +554,7 @@ static void kvm_uncoalesce_mmio_region(MemoryListener
*listener,
zone.addr = start;
zone.size = size;
-zone.pad = 0;
+zone.pio = 0;
(void)kvm_vm_ioctl(s, KVM_UNREGISTER_COALESCED_MMIO, );
}
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 83ba4eb..b5d4289 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -420,13 +420,19 @@ struct kvm_run {
struct kvm_coalesced_mmio_zone {
__u64 addr;
__u32 size;
- __u32 pad;
+ union {
+ __u32 pad;
+ __u32 pio;
+ };
};
struct kvm_coalesced_mmio {
__u64 phys_addr;
__u32 len;
+ unino {
__u32 pad;
+ __u32 pio;
+ };
__u8 data[8];
};
@@ -953,6 +959,7 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_NESTED_STATE 157
#define KVM_CAP_ARM_INJECT_SERROR_ESR 158
#define KVM_CAP_MSR_PLATFORM_INFO 159
+#define KVM_CAP_COALESCED_PIO 160
#ifdef KVM_CAP_IRQ_ROUTING
--
1.8.3.1
[Qemu-devel] [PATCH V6 2/5] target-i386 : add coalesced_pio API
the primary API realization.
Signed-off-by: Peng Hao
Reviewed-by: Eduardo Habkost
---
accel/kvm/kvm-all.c | 56 ---
include/exec/memory.h | 4 ++--
memory.c | 4 ++--
3 files changed, 57 insertions(+), 7 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 29d208d..7724055 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -79,6 +79,7 @@ struct KVMState
int fd;
int vmfd;
int coalesced_mmio;
+int coalesced_pio;
struct kvm_coalesced_mmio_ring *coalesced_mmio_ring;
bool coalesced_flush_in_progress;
int vcpu_events;
@@ -560,6 +561,45 @@ static void kvm_uncoalesce_mmio_region(MemoryListener
*listener,
}
}
+static void kvm_coalesce_pio_add(MemoryListener *listener,
+MemoryRegionSection *section,
+hwaddr start, hwaddr size)
+{
+KVMState *s = kvm_state;
+
+if (s->coalesced_pio) {
+struct kvm_coalesced_mmio_zone zone;
+
+zone.addr = start;
+zone.size = size;
+zone.pio = 1;
+
+(void)kvm_vm_ioctl(s, KVM_REGISTER_COALESCED_MMIO, );
+}
+}
+
+static void kvm_coalesce_pio_del(MemoryListener *listener,
+MemoryRegionSection *section,
+hwaddr start, hwaddr size)
+{
+KVMState *s = kvm_state;
+
+if (s->coalesced_pio) {
+struct kvm_coalesced_mmio_zone zone;
+
+zone.addr = start;
+zone.size = size;
+zone.pio = 1;
+
+(void)kvm_vm_ioctl(s, KVM_UNREGISTER_COALESCED_MMIO, );
+ }
+}
+
+static MemoryListener kvm_coalesced_pio_listener = {
+.coalesced_io_add = kvm_coalesce_pio_add,
+.coalesced_io_del = kvm_coalesce_pio_del,
+};
+
int kvm_check_extension(KVMState *s, unsigned int extension)
{
int ret;
@@ -1616,6 +1656,8 @@ static int kvm_init(MachineState *ms)
}
s->coalesced_mmio = kvm_check_extension(s, KVM_CAP_COALESCED_MMIO);
+s->coalesced_pio = s->coalesced_mmio &&
+ kvm_check_extension(s, KVM_CAP_COALESCED_PIO);
#ifdef KVM_CAP_VCPU_EVENTS
s->vcpu_events = kvm_check_extension(s, KVM_CAP_VCPU_EVENTS);
@@ -1686,13 +1728,15 @@ static int kvm_init(MachineState *ms)
s->memory_listener.listener.eventfd_add = kvm_mem_ioeventfd_add;
s->memory_listener.listener.eventfd_del = kvm_mem_ioeventfd_del;
}
-s->memory_listener.listener.coalesced_mmio_add = kvm_coalesce_mmio_region;
-s->memory_listener.listener.coalesced_mmio_del =
kvm_uncoalesce_mmio_region;
+s->memory_listener.listener.coalesced_io_add = kvm_coalesce_mmio_region;
+s->memory_listener.listener.coalesced_io_del = kvm_uncoalesce_mmio_region;
kvm_memory_listener_register(s, >memory_listener,
_space_memory, 0);
memory_listener_register(_io_listener,
_space_io);
+memory_listener_register(_coalesced_pio_listener,
+ _space_io);
s->many_ioeventfds = kvm_check_many_ioeventfds();
@@ -1778,7 +1822,13 @@ void kvm_flush_coalesced_mmio_buffer(void)
ent = >coalesced_mmio[ring->first];
-cpu_physical_memory_write(ent->phys_addr, ent->data, ent->len);
+if (ent->pio == 1) {
+address_space_rw(_space_io, ent->phys_addr,
+ MEMTXATTRS_UNSPECIFIED, ent->data,
+ ent->len, true);
+} else {
+cpu_physical_memory_write(ent->phys_addr, ent->data, ent->len);
+}
smp_wmb();
ring->first = (ring->first + 1) % KVM_COALESCED_MMIO_MAX;
}
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 3a427aa..667466b 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -419,9 +419,9 @@ struct MemoryListener {
bool match_data, uint64_t data, EventNotifier *e);
void (*eventfd_del)(MemoryListener *listener, MemoryRegionSection *section,
bool match_data, uint64_t data, EventNotifier *e);
-void (*coalesced_mmio_add)(MemoryListener *listener, MemoryRegionSection
*section,
+void (*coalesced_io_add)(MemoryListener *listener, MemoryRegionSection
*section,
hwaddr addr, hwaddr len);
-void (*coalesced_mmio_del)(MemoryListener *listener, MemoryRegionSection
*section,
+void (*coalesced_io_del)(MemoryListener *listener, MemoryRegionSection
*section,
hwaddr addr, hwaddr len);
/* Lower = earlier (during add), later (during del) */
unsigned priority;
diff --git a/memory.c b/memory.c
index d852f11..51204aa 100644
--- a/memory.c
+++ b/memory.c
@@ -2129,7 +2129,7 @@ static void
memory_region_u
[Qemu-devel] [PATCH V6 3/5] target-i386: add rtc 0x70 port as coalesced_pio
Signed-off-by: Peng Hao
---
hw/timer/mc146818rtc.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c
index acee47d..808a212 100644
--- a/hw/timer/mc146818rtc.c
+++ b/hw/timer/mc146818rtc.c
@@ -70,6 +70,7 @@ typedef struct RTCState {
ISADevice parent_obj;
MemoryRegion io;
+MemoryRegion coalesced_io;
uint8_t cmos_data[128];
uint8_t cmos_index;
int32_t base_year;
@@ -990,6 +991,13 @@ static void rtc_realizefn(DeviceState *dev, Error **errp)
memory_region_init_io(>io, OBJECT(s), _ops, s, "rtc", 2);
isa_register_ioport(isadev, >io, base);
+/* register rtc 0x70 port as coalesced_pio */
+memory_region_set_flush_coalesced(>io);
+memory_region_init_io(>coalesced_io, OBJECT(s), _ops,
+ s, "rtc1", 1);
+isa_register_ioport(isadev, >coalesced_io, base);
+memory_region_add_coalescing(>coalesced_io, 0, 1);
+
qdev_set_legacy_instance_id(dev, base, 3);
qemu_register_reset(rtc_reset, s);
--
1.8.3.1
[Qemu-devel] [PATCH V6 4/5] target-i386: add i440fx 0xcf8 port as coalesced_pio
Signed-off-by: Peng Hao --- hw/pci-host/piix.c | 4 1 file changed, 4 insertions(+) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 0e60834..da73743 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -327,6 +327,10 @@ static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) sysbus_add_io(sbd, 0xcfc, >data_mem); sysbus_init_ioports(sbd, 0xcfc, 4); + +/* register i440fx 0xcf8 port as coalesced pio */ +memory_region_set_flush_coalesced(>data_mem); +memory_region_add_coalescing(>conf_mem, 0, 4); } static void i440fx_realize(PCIDevice *dev, Error **errp) -- 1.8.3.1
[Qemu-devel] [PATCH V6 5/5] target-i386: add q35 0xcf8 port as coalesced_pio
Signed-off-by: Peng Hao --- hw/pci-host/q35.c | 4 1 file changed, 4 insertions(+) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 02f9576..8ce1e09 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -51,6 +51,10 @@ static void q35_host_realize(DeviceState *dev, Error **errp) sysbus_add_io(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, >data_mem); sysbus_init_ioports(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, 4); +/* register q35 0xcf8 port as coalesced pio */ +memory_region_set_flush_coalesced(>data_mem); +memory_region_add_coalescing(>conf_mem, 0, 4); + pci->bus = pci_root_bus_new(DEVICE(s), "pcie.0", s->mch.pci_address_space, s->mch.address_space_io, -- 1.8.3.1
[Qemu-devel] [PATCH 0/5] target/i386: introduce coalesced pio
Coalesced pio is base on coalesced mmio and can be used for some port
like rtc port, pci-host config port and so on.
Specially in case of rtc as coalesced pio, some versions of windows guest
access rtc frequently because of rtc as system tick. guest access rtc like
this: write register index to 0x70, then write or read data from 0x71.
writing 0x70 port is just as index and do nothing else. So we can use
coalesced pio to handle this scene to reduce VM-EXIT time.
When it starts and closes the virtual machine, it will access pci-host config
port or virtio-pci config port frequently. So setting these port as
coalesced pio can reduce startup and shutdown time. In qemu I just realize
piixfx's pci-host, it is convenient for other pci-host type implementations.
without my patch, get the vm-exit time of accessing rtc 0x70 and piix 0xcf8
using perf tools: (guest OS : windows 7 64bit)
IO Port Access Samples Samples% Time% Min Time Max Time Avg time
0x70:POUT86 30.99%74.59% 9us 29us10.75us (+- 3.41%)
0xcf8:POUT 1119 2.60% 2.12% 2.79us56.83us 3.41us (+- 2.23%)
with my patch
IO Port Access Samples Samples% Time% Min Time Max Time Avg time
0x70:POUT 10632.02%29.47%0us 10us 1.57us (+- 7.38%)
0xcf8:POUT 10651.67% 0.28% 0.41us65.44us 0.66us (+- 10.55%)
These are just qemu's patches, another patches are for kernel.
Changes v4 --> v5:
update kvm header, improve compatibility.
Changes v3 --> v4
modify coalesced_mmio_{add|del} to coalesced_io_{add|del}
delete unnecessary macro define
Peng Hao (5):
target-i386: add rtc 0x70 port as coalesced_pio
target-i386: add i440fx 0xcf8 port as coalesced_pio
target-i386: add q35 0xcf8 port as coalesced_pio
target/i386: add coalesced pio support
target-i386: add coalesced_pio API
accel/kvm/kvm-all.c | 60 +++
hw/pci-host/piix.c| 4
hw/pci-host/q35.c | 4
hw/timer/mc146818rtc.c| 8 +++
include/exec/memory.h | 4 ++--
linux-headers/linux/kvm.h | 9 ++-
memory.c | 4 ++--
7 files changed, 83 insertions(+), 10 deletions(-)
--
1.8.3.1
[Qemu-devel] [PATCH v2] target/arm : add pvpanic mmio device
Add pvpanic mmio device that is similar to x86's pvpanic device.
v1 ---> v2 add copyright and license for new files.
Signed-off-by: Peng Hao
---
default-configs/arm-softmmu.mak | 2 +-
hw/arm/virt.c | 21 +
hw/misc/Makefile.objs | 1 +
hw/misc/pvpanic-mmio.c | 97 +
include/hw/arm/virt.h | 1 +
include/hw/misc/pvpanic-mmio.h | 33 ++
6 files changed, 154 insertions(+), 1 deletion(-)
create mode 100644 hw/misc/pvpanic-mmio.c
create mode 100644 include/hw/misc/pvpanic-mmio.h
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2420491..4713c92 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -43,7 +43,7 @@ CONFIG_USB_MUSB=y
CONFIG_USB_EHCI_SYSBUS=y
CONFIG_PLATFORM_BUS=y
CONFIG_VIRTIO_MMIO=y
-
+CONFIG_PVPANIC_MMIO=y
CONFIG_ARM11MPCORE=y
CONFIG_A9MPCORE=y
CONFIG_A15MPCORE=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a472566..ab41128 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -140,6 +140,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_UART] = { 0x0900, 0x1000 },
[VIRT_RTC] ={ 0x0901, 0x1000 },
[VIRT_FW_CFG] = { 0x0902, 0x0018 },
+[VIRT_PVPANIC_MMIO] = { 0x09020018, 0x0002 },
[VIRT_GPIO] = { 0x0903, 0x1000 },
[VIRT_SECURE_UART] ={ 0x0904, 0x1000 },
[VIRT_SMMU] = { 0x0905, 0x0002 },
@@ -798,6 +799,24 @@ static void create_gpio(const VirtMachineState *vms,
qemu_irq *pic)
g_free(nodename);
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+char *nodename;
+hwaddr base = vms->memmap[VIRT_PVPANIC_MMIO].base;
+hwaddr size = vms->memmap[VIRT_PVPANIC_MMIO].size;
+
+sysbus_create_simple("pvpanic-mmio", base, NULL);
+
+nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+qemu_fdt_add_subnode(vms->fdt, nodename);
+qemu_fdt_setprop_string(vms->fdt, nodename,
+"compatible", "pvpanic,mmio");
+qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+g_free(nodename);
+
+}
+
static void create_virtio_devices(const VirtMachineState *vms, qemu_irq *pic)
{
int i;
@@ -1544,6 +1563,8 @@ static void machvirt_init(MachineState *machine)
create_pcie(vms, pic);
+create_pvpanic_device(vms);
+
create_gpio(vms, pic);
/* Create mmio transports, so the user can create virtio backends
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 6d50b03..6326260 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -71,6 +71,7 @@ obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o
obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o
obj-$(CONFIG_PVPANIC) += pvpanic.o
+obj-$(CONFIG_PVPANIC_MMIO) += pvpanic-mmio.o
obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o
obj-$(CONFIG_AUX) += auxbus.o
obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o
diff --git a/hw/misc/pvpanic-mmio.c b/hw/misc/pvpanic-mmio.c
new file mode 100644
index 000..bcb9791
--- /dev/null
+++ b/hw/misc/pvpanic-mmio.c
@@ -0,0 +1,97 @@
+/*
+ * pvpanic mmio device emulation
+ *
+ * Copyright (c) 2018 ZTE Ltd.
+ *
+ * Author:
+ * Peng Hao
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "sysemu/sysemu.h"
+#include "qemu/log.h"
+#include "hw/misc/pvpanic-mmio.h"
+
+#define PVPANIC_MMIO_FEAT_CRASHED 0
+
+#define PVPANIC_MMIO_CRASHED(1 << PVPANIC_MMIO_FEAT_CRASHED)
+
+static void handle_mmio_event(int event)
+{
+static bool logged;
+
+if (event & ~PVPANIC_MMIO_CRASHED && !logged) {
+qemu_log_mask(LOG_GUEST_ERROR, "pvpanic-mmio: unknown event %#x.\n",
event);
+logged = true;
+}
+
+if (event & PVPANIC_MMIO_CRASHED) {
+qemu_system_guest_panicked(NULL);
+return;
+}
+}
+
+static uint64_t pvpanic_mmio_read(void *opaque, hwaddr addr, unsigned size)
+{
+return -1;
+}
+
+static void pvpanic_mmio_write(void *opaque, hwaddr addr, uint64_t value,
+ unsigned size)
+{
+ handle_mmio_
[Qemu-devel] [PATCH] target/arm : add pvpanic mmio device
Add pvpanic mmio device that is similar to x86's pvpanic device.
Signed-off-by: Peng Hao
---
default-configs/arm-softmmu.mak | 2 +-
hw/arm/virt.c | 21
hw/misc/Makefile.objs | 1 +
hw/misc/pvpanic-mmio.c | 76 +
include/hw/arm/virt.h | 1 +
include/hw/misc/pvpanic-mmio.h | 12 +++
6 files changed, 112 insertions(+), 1 deletion(-)
create mode 100644 hw/misc/pvpanic-mmio.c
create mode 100644 include/hw/misc/pvpanic-mmio.h
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2420491..4713c92 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -43,7 +43,7 @@ CONFIG_USB_MUSB=y
CONFIG_USB_EHCI_SYSBUS=y
CONFIG_PLATFORM_BUS=y
CONFIG_VIRTIO_MMIO=y
-
+CONFIG_PVPANIC_MMIO=y
CONFIG_ARM11MPCORE=y
CONFIG_A9MPCORE=y
CONFIG_A15MPCORE=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a472566..ab41128 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -140,6 +140,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_UART] = { 0x0900, 0x1000 },
[VIRT_RTC] ={ 0x0901, 0x1000 },
[VIRT_FW_CFG] = { 0x0902, 0x0018 },
+[VIRT_PVPANIC_MMIO] = { 0x09020018, 0x0002 },
[VIRT_GPIO] = { 0x0903, 0x1000 },
[VIRT_SECURE_UART] ={ 0x0904, 0x1000 },
[VIRT_SMMU] = { 0x0905, 0x0002 },
@@ -798,6 +799,24 @@ static void create_gpio(const VirtMachineState *vms,
qemu_irq *pic)
g_free(nodename);
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+char *nodename;
+hwaddr base = vms->memmap[VIRT_PVPANIC_MMIO].base;
+hwaddr size = vms->memmap[VIRT_PVPANIC_MMIO].size;
+
+sysbus_create_simple("pvpanic-mmio", base, NULL);
+
+nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+qemu_fdt_add_subnode(vms->fdt, nodename);
+qemu_fdt_setprop_string(vms->fdt, nodename,
+"compatible", "pvpanic,mmio");
+qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+g_free(nodename);
+
+}
+
static void create_virtio_devices(const VirtMachineState *vms, qemu_irq *pic)
{
int i;
@@ -1544,6 +1563,8 @@ static void machvirt_init(MachineState *machine)
create_pcie(vms, pic);
+create_pvpanic_device(vms);
+
create_gpio(vms, pic);
/* Create mmio transports, so the user can create virtio backends
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 6d50b03..6326260 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -71,6 +71,7 @@ obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o
obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o
obj-$(CONFIG_PVPANIC) += pvpanic.o
+obj-$(CONFIG_PVPANIC_MMIO) += pvpanic-mmio.o
obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o
obj-$(CONFIG_AUX) += auxbus.o
obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o
diff --git a/hw/misc/pvpanic-mmio.c b/hw/misc/pvpanic-mmio.c
new file mode 100644
index 000..c7f373e
--- /dev/null
+++ b/hw/misc/pvpanic-mmio.c
@@ -0,0 +1,76 @@
+#include "qemu/osdep.h"
+#include "sysemu/sysemu.h"
+#include "qemu/log.h"
+#include "hw/misc/pvpanic-mmio.h"
+
+#define PVPANIC_MMIO_FEAT_CRASHED 0
+
+#define PVPANIC_MMIO_CRASHED(1 << PVPANIC_MMIO_FEAT_CRASHED)
+
+static void handle_mmio_event(int event)
+{
+static bool logged;
+
+if (event & ~PVPANIC_MMIO_CRASHED && !logged) {
+qemu_log_mask(LOG_GUEST_ERROR, "pvpanic-mmio: unknown event %#x.\n",
event);
+logged = true;
+}
+
+if (event & PVPANIC_MMIO_CRASHED) {
+qemu_system_guest_panicked(NULL);
+return;
+}
+}
+
+static uint64_t pvpanic_mmio_read(void *opaque, hwaddr addr, unsigned size)
+{
+return -1;
+}
+
+static void pvpanic_mmio_write(void *opaque, hwaddr addr, uint64_t value,
+ unsigned size)
+{
+ handle_mmio_event(value);
+}
+
+static const MemoryRegionOps pvpanic_mmio_ops = {
+.read = pvpanic_mmio_read,
+.write = pvpanic_mmio_write,
+.impl = {
+.min_access_size = 1,
+.max_access_size = 2,
+},
+};
+
+
+static void pvpanic_mmio_initfn(Object *obj)
+{
+PVPanicState *s = PVPANIC_MMIO_DEVICE(obj);
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+memory_region_init_io(>mmio, OBJECT(s), _mmio_ops, s,
+ "pvpanic-mmio", 2);
+sysbus_init_mmio(sbd, >mmio);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+.name = TYPE_PVPA
[Qemu-devel] [PATCH] target/arm : add pvpanic mmio device
From: root
Add pvpanic mmio device that is similar to x86's pvpanic device.
Signed-off-by: Peng Hao
---
default-configs/arm-softmmu.mak | 2 +-
hw/arm/virt.c | 21
hw/misc/Makefile.objs | 1 +
hw/misc/pvpanic-mmio.c | 76 +
include/hw/arm/virt.h | 1 +
include/hw/misc/pvpanic-mmio.h | 12 +++
6 files changed, 112 insertions(+), 1 deletion(-)
create mode 100644 hw/misc/pvpanic-mmio.c
create mode 100644 include/hw/misc/pvpanic-mmio.h
diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 2420491..4713c92 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -43,7 +43,7 @@ CONFIG_USB_MUSB=y
CONFIG_USB_EHCI_SYSBUS=y
CONFIG_PLATFORM_BUS=y
CONFIG_VIRTIO_MMIO=y
-
+CONFIG_PVPANIC_MMIO=y
CONFIG_ARM11MPCORE=y
CONFIG_A9MPCORE=y
CONFIG_A15MPCORE=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index a472566..ab41128 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -140,6 +140,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_UART] = { 0x0900, 0x1000 },
[VIRT_RTC] ={ 0x0901, 0x1000 },
[VIRT_FW_CFG] = { 0x0902, 0x0018 },
+[VIRT_PVPANIC_MMIO] = { 0x09020018, 0x0002 },
[VIRT_GPIO] = { 0x0903, 0x1000 },
[VIRT_SECURE_UART] ={ 0x0904, 0x1000 },
[VIRT_SMMU] = { 0x0905, 0x0002 },
@@ -798,6 +799,24 @@ static void create_gpio(const VirtMachineState *vms,
qemu_irq *pic)
g_free(nodename);
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+char *nodename;
+hwaddr base = vms->memmap[VIRT_PVPANIC_MMIO].base;
+hwaddr size = vms->memmap[VIRT_PVPANIC_MMIO].size;
+
+sysbus_create_simple("pvpanic-mmio", base, NULL);
+
+nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+qemu_fdt_add_subnode(vms->fdt, nodename);
+qemu_fdt_setprop_string(vms->fdt, nodename,
+"compatible", "pvpanic,mmio");
+qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+g_free(nodename);
+
+}
+
static void create_virtio_devices(const VirtMachineState *vms, qemu_irq *pic)
{
int i;
@@ -1544,6 +1563,8 @@ static void machvirt_init(MachineState *machine)
create_pcie(vms, pic);
+create_pvpanic_device(vms);
+
create_gpio(vms, pic);
/* Create mmio transports, so the user can create virtio backends
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 6d50b03..6326260 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -71,6 +71,7 @@ obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o
obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o
obj-$(CONFIG_PVPANIC) += pvpanic.o
+obj-$(CONFIG_PVPANIC_MMIO) += pvpanic-mmio.o
obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o
obj-$(CONFIG_AUX) += auxbus.o
obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o
diff --git a/hw/misc/pvpanic-mmio.c b/hw/misc/pvpanic-mmio.c
new file mode 100644
index 000..c7f373e
--- /dev/null
+++ b/hw/misc/pvpanic-mmio.c
@@ -0,0 +1,76 @@
+#include "qemu/osdep.h"
+#include "sysemu/sysemu.h"
+#include "qemu/log.h"
+#include "hw/misc/pvpanic-mmio.h"
+
+#define PVPANIC_MMIO_FEAT_CRASHED 0
+
+#define PVPANIC_MMIO_CRASHED(1 << PVPANIC_MMIO_FEAT_CRASHED)
+
+static void handle_mmio_event(int event)
+{
+static bool logged;
+
+if (event & ~PVPANIC_MMIO_CRASHED && !logged) {
+qemu_log_mask(LOG_GUEST_ERROR, "pvpanic-mmio: unknown event %#x.\n",
event);
+logged = true;
+}
+
+if (event & PVPANIC_MMIO_CRASHED) {
+qemu_system_guest_panicked(NULL);
+return;
+}
+}
+
+static uint64_t pvpanic_mmio_read(void *opaque, hwaddr addr, unsigned size)
+{
+return -1;
+}
+
+static void pvpanic_mmio_write(void *opaque, hwaddr addr, uint64_t value,
+ unsigned size)
+{
+ handle_mmio_event(value);
+}
+
+static const MemoryRegionOps pvpanic_mmio_ops = {
+.read = pvpanic_mmio_read,
+.write = pvpanic_mmio_write,
+.impl = {
+.min_access_size = 1,
+.max_access_size = 2,
+},
+};
+
+
+static void pvpanic_mmio_initfn(Object *obj)
+{
+PVPanicState *s = PVPANIC_MMIO_DEVICE(obj);
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+memory_region_init_io(>mmio, OBJECT(s), _mmio_ops, s,
+ "pvpanic-mmio", 2);
+sysbus_init_mmio(sbd, >mmio);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+.name
[Qemu-devel] [PATCH] target-i386: add q35 0xcf8 port as coalesced_pio
after coalesced pio series patches, the patch is a supplement to q35 pci-host config port. Signed-off-by: Peng Hao --- hw/pci-host/q35.c | 4 1 file changed, 4 insertions(+) diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 02f9576..8ce1e09 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -51,6 +51,10 @@ static void q35_host_realize(DeviceState *dev, Error **errp) sysbus_add_io(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, >data_mem); sysbus_init_ioports(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, 4); +/* register q35 0xcf8 port as coalesced pio */ +memory_region_set_flush_coalesced(>data_mem); +memory_region_add_coalescing(>conf_mem, 0, 4); + pci->bus = pci_root_bus_new(DEVICE(s), "pcie.0", s->mch.pci_address_space, s->mch.address_space_io, -- 1.8.3.1
[Qemu-devel] [PATCH V5 0/4] introduce coalesced pio support
Coalesced pio is base on coalesced mmio and can be used for some port
like rtc port, pci-host config port, virtio-pci config port and so on.
Specially in case of rtc as coalesced pio, some versions of windows guest
access rtc frequently because of rtc as system tick. guest access rtc like
this: write register index to 0x70, then write or read data from 0x71.
writing 0x70 port is just as index and do nothing else. So we can use
coalesced pio to handle this scene to reduce VM-EXIT time.
When it starts and closes the virtual machine, it will access pci-host config
port or virtio-pci config port frequently. So setting these port as
coalesced pio can reduce startup and shutdown time. In qemu I just realize
piixfx's pci-host, it is convenient for other pci-host type implementations.
without my patch, get the vm-exit time of accessing rtc 0x70 and piix 0xcf8
using perf tools: (guest OS : windows 7 64bit)
IO Port Access Samples Samples% Time% Min Time Max Time Avg time
0x70:POUT86 30.99%74.59% 9us 29us10.75us (+- 3.41%)
0xcf8:POUT 1119 2.60% 2.12% 2.79us56.83us 3.41us (+- 2.23%)
with my patch
IO Port Access Samples Samples% Time% Min Time Max Time Avg time
0x70:POUT 10632.02%29.47%0us 10us 1.57us (+- 7.38%)
0xcf8:POUT 10651.67% 0.28% 0.41us65.44us 0.66us (+- 10.55%)
These are just qemu's patches, another patches are for kernel.
Changes v4 --> v5:
update kvm header, improve compatibility.
Changes v3 --> v4
modify coalesced_mmio_{add|del} to coalesced_io_{add|del}
delete unnecessary macro define
Peng Hao (4):
target-i386: introduce coalesced_pio kvm header update
target-i386: add coalesced_pio API
target-i386: add rtc 0x70 port as coalesced_pio
target-i386: add i440fx 0xcf8 port as coalesced_pio
accel/kvm/kvm-all.c | 61 ++-
hw/pci-host/piix.c| 4
hw/timer/mc146818rtc.c| 8 +++
include/exec/memory.h | 4 ++--
linux-headers/linux/kvm.h | 11 +++--
memory.c | 4 ++--
6 files changed, 80 insertions(+), 12 deletions(-)
--
1.8.3.1
[Qemu-devel] [PATCH V5 1/4] target-i386: introduce coalesced_pio kvm header update
add coalesced_pio's struct and KVM_CAP_COALESCED_PIO header.
Signed-off-by: Peng Hao
---
accel/kvm/kvm-all.c | 4 ++--
linux-headers/linux/kvm.h | 11 +--
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index eb7db92..4a3909d 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -536,7 +536,7 @@ static void kvm_coalesce_mmio_region(MemoryListener
*listener,
zone.addr = start;
zone.size = size;
-zone.pad = 0;
+zone.pio = 0;
(void)kvm_vm_ioctl(s, KVM_REGISTER_COALESCED_MMIO, );
}
@@ -553,7 +553,7 @@ static void kvm_uncoalesce_mmio_region(MemoryListener
*listener,
zone.addr = start;
zone.size = size;
-zone.pad = 0;
+zone.pio = 0;
(void)kvm_vm_ioctl(s, KVM_UNREGISTER_COALESCED_MMIO, );
}
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 98f389a..1cb0d41 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -420,13 +420,19 @@ struct kvm_run {
struct kvm_coalesced_mmio_zone {
__u64 addr;
__u32 size;
- __u32 pad;
+ union {
+ __u32 pad;
+ __u32 pio;
+ };
};
struct kvm_coalesced_mmio {
__u64 phys_addr;
__u32 len;
- __u32 pad;
+ union {
+ __u32 pad;
+ __u32 pio;
+ };
__u8 data[8];
};
@@ -949,6 +955,7 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_GET_MSR_FEATURES 153
#define KVM_CAP_HYPERV_EVENTFD 154
#define KVM_CAP_HYPERV_TLBFLUSH 155
+#define KVM_CAP_COALESCED_PIO 156
#ifdef KVM_CAP_IRQ_ROUTING
--
1.8.3.1
[Qemu-devel] [PATCH V5 3/4] target-i386: add rtc 0x70 port as coalesced_pio
Signed-off-by: Peng Hao
---
hw/timer/mc146818rtc.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/timer/mc146818rtc.c b/hw/timer/mc146818rtc.c
index 6f1f723..b19ef51 100644
--- a/hw/timer/mc146818rtc.c
+++ b/hw/timer/mc146818rtc.c
@@ -70,6 +70,7 @@ typedef struct RTCState {
ISADevice parent_obj;
MemoryRegion io;
+MemoryRegion coalesced_io;
uint8_t cmos_data[128];
uint8_t cmos_index;
int32_t base_year;
@@ -990,6 +991,13 @@ static void rtc_realizefn(DeviceState *dev, Error **errp)
memory_region_init_io(>io, OBJECT(s), _ops, s, "rtc", 2);
isa_register_ioport(isadev, >io, base);
+/* register rtc 0x70 port as coalesced_pio */
+memory_region_set_flush_coalesced(>io);
+memory_region_init_io(>coalesced_io, OBJECT(s), _ops,
+ s, "rtc1", 1);
+isa_register_ioport(isadev, >coalesced_io, base);
+memory_region_add_coalescing(>coalesced_io, 0, 1);
+
qdev_set_legacy_instance_id(dev, base, 3);
qemu_register_reset(rtc_reset, s);
--
1.8.3.1
[Qemu-devel] [PATCH V5 2/4] target-i386:add coalesced_pio API
Signed-off-by: Peng Hao
Reviewed-by: Eduardo Habkost
---
accel/kvm/kvm-all.c | 57 +++
include/exec/memory.h | 4 ++--
memory.c | 4 ++--
3 files changed, 57 insertions(+), 8 deletions(-)
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 4a3909d..11d8d78 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -78,6 +78,7 @@ struct KVMState
int fd;
int vmfd;
int coalesced_mmio;
+int coalesced_pio;
struct kvm_coalesced_mmio_ring *coalesced_mmio_ring;
bool coalesced_flush_in_progress;
int vcpu_events;
@@ -559,6 +560,45 @@ static void kvm_uncoalesce_mmio_region(MemoryListener
*listener,
}
}
+static void kvm_coalesce_pio_add(MemoryListener *listener,
+MemoryRegionSection *section,
+hwaddr start, hwaddr size)
+{
+KVMState *s = kvm_state;
+
+if (s->coalesced_pio) {
+struct kvm_coalesced_mmio_zone zone;
+
+zone.addr = start;
+zone.size = size;
+zone.pio = 1;
+
+(void)kvm_vm_ioctl(s, KVM_REGISTER_COALESCED_MMIO, );
+}
+}
+
+static void kvm_coalesce_pio_del(MemoryListener *listener,
+MemoryRegionSection *section,
+hwaddr start, hwaddr size)
+{
+KVMState *s = kvm_state;
+
+if (s->coalesced_pio) {
+struct kvm_coalesced_mmio_zone zone;
+
+zone.addr = start;
+zone.size = size;
+zone.pio = 1;
+
+(void)kvm_vm_ioctl(s, KVM_UNREGISTER_COALESCED_MMIO, );
+ }
+}
+
+static MemoryListener kvm_coalesced_pio_listener = {
+.coalesced_io_add = kvm_coalesce_pio_add,
+.coalesced_io_del = kvm_coalesce_pio_del,
+};
+
int kvm_check_extension(KVMState *s, unsigned int extension)
{
int ret;
@@ -1615,6 +1655,8 @@ static int kvm_init(MachineState *ms)
}
s->coalesced_mmio = kvm_check_extension(s, KVM_CAP_COALESCED_MMIO);
+s->coalesced_pio = s->coalesced_mmio &&
+ kvm_check_extension(s, KVM_CAP_COALESCED_PIO);
#ifdef KVM_CAP_VCPU_EVENTS
s->vcpu_events = kvm_check_extension(s, KVM_CAP_VCPU_EVENTS);
@@ -1687,13 +1729,15 @@ static int kvm_init(MachineState *ms)
s->memory_listener.listener.eventfd_add = kvm_mem_ioeventfd_add;
s->memory_listener.listener.eventfd_del = kvm_mem_ioeventfd_del;
}
-s->memory_listener.listener.coalesced_mmio_add = kvm_coalesce_mmio_region;
-s->memory_listener.listener.coalesced_mmio_del =
kvm_uncoalesce_mmio_region;
+s->memory_listener.listener.coalesced_io_add = kvm_coalesce_mmio_region;
+s->memory_listener.listener.coalesced_io_del = kvm_uncoalesce_mmio_region;
kvm_memory_listener_register(s, >memory_listener,
_space_memory, 0);
memory_listener_register(_io_listener,
_space_io);
+memory_listener_register(_coalesced_pio_listener,
+ _space_io);
s->many_ioeventfds = kvm_check_many_ioeventfds();
@@ -1775,8 +1819,13 @@ void kvm_flush_coalesced_mmio_buffer(void)
struct kvm_coalesced_mmio *ent;
ent = >coalesced_mmio[ring->first];
-
-cpu_physical_memory_write(ent->phys_addr, ent->data, ent->len);
+if (ent->pio == 1) {
+address_space_rw(_space_io, ent->phys_addr,
+ MEMTXATTRS_UNSPECIFIED, ent->data,
+ ent->len, true);
+} else {
+cpu_physical_memory_write(ent->phys_addr, ent->data, ent->len);
+}
smp_wmb();
ring->first = (ring->first + 1) % KVM_COALESCED_MMIO_MAX;
}
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 448d41a..4600fa3 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -410,9 +410,9 @@ struct MemoryListener {
bool match_data, uint64_t data, EventNotifier *e);
void (*eventfd_del)(MemoryListener *listener, MemoryRegionSection *section,
bool match_data, uint64_t data, EventNotifier *e);
-void (*coalesced_mmio_add)(MemoryListener *listener, MemoryRegionSection
*section,
+void (*coalesced_io_add)(MemoryListener *listener, MemoryRegionSection
*section,
hwaddr addr, hwaddr len);
-void (*coalesced_mmio_del)(MemoryListener *listener, MemoryRegionSection
*section,
+void (*coalesced_io_del)(MemoryListener *listener, MemoryRegionSection
*section,
hwaddr addr, hwaddr len);
/* Lower = earlier (during add), later (during del) */
unsigned priority;
diff --git a/memory.c b/memory.c
index e9cd446..8b0311e 100644
--- a/memory.c
+++ b/memory.c
@@ -2126,7 +2126,7 @@ static void
memory_region_u
[Qemu-devel] [PATCH V5 4/4] target-i386: add i440fx 0xcf8 port as coalesced_pio
Signed-off-by: Peng Hao --- hw/pci-host/piix.c | 4 1 file changed, 4 insertions(+) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 0e60834..da73743 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -327,6 +327,10 @@ static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) sysbus_add_io(sbd, 0xcfc, >data_mem); sysbus_init_ioports(sbd, 0xcfc, 4); + +/* register i440fx 0xcf8 port as coalesced pio */ +memory_region_set_flush_coalesced(>data_mem); +memory_region_add_coalescing(>conf_mem, 0, 4); } static void i440fx_realize(PCIDevice *dev, Error **errp) -- 1.8.3.1
[Qemu-devel] [PATCH V5 4/4] target-i386: add i440fx 0xcf8 port as coalesced_pio
Signed-off-by: Peng Hao Reviewed-by: Eduardo Habkost --- hw/pci-host/piix.c | 4 1 file changed, 4 insertions(+) diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index 0e60834..da73743 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -327,6 +327,10 @@ static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) sysbus_add_io(sbd, 0xcfc, >data_mem); sysbus_init_ioports(sbd, 0xcfc, 4); + +/* register i440fx 0xcf8 port as coalesced pio */ +memory_region_set_flush_coalesced(>data_mem); +memory_region_add_coalescing(>conf_mem, 0, 4); } static void i440fx_realize(PCIDevice *dev, Error **errp) -- 1.8.3.1
