MU_CLOCK_VIRTUAL) + DEFAULT_MUI);
+ qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) +
+pbdev->pci_group->zpci_group.mui);
break;
}
default:
Reviewed-by: Pierre Morel
--
Pierre Morel
IBM Lab Boeblingen
allow migration later.
Looks right to me.
--
Pierre Morel
IBM Lab Boeblingen
are intercepted
and must be emulated by the userland hypervizor.
Signed-off-by: Pierre Morel
---
hw/s390x/s390-virtio-ccw.c | 50 ++
include/hw/s390x/s390-virtio-ccw.h | 6
target/s390x/kvm/kvm.c | 15 +
3 files changed, 71 insertions(+)
diff
in a 64bit
unsigned long. Set on plug and clear on unplug of a CPU.
Signed-off-by: Pierre Morel
---
hw/s390x/cpu-topology.c | 361
hw/s390x/meson.build| 1 +
hw/s390x/s390-virtio-ccw.c | 4 +
include/hw/s390x/cpu-topology.h | 74
Both source and target must have the same configuration
regarding the activation of Perform Topology Function
and Store Topology System Information.
Signed-off-by: Pierre Morel
---
target/s390x/cpu.h | 2 ++
target/s390x/cpu_features_def.h.inc | 1 +
target/s390x/cpu_models.c
ng books and drawers levels
- NUMA using the -numa QEMU parameter.
- Topology information change for shared CPU
Regards,
Pierre
Pierre Morel (5):
linux-headers update
s390x: topology: CPU topology objects and structures
s390x: topology: implementating Store Topology System Information
s39
15_1_2 will be built.
Signed-off-by: Pierre Morel
---
target/s390x/cpu.h | 1 +
target/s390x/cpu_topology.c | 113
target/s390x/kvm/kvm.c | 5 ++
target/s390x/meson.build| 1 +
4 files changed, 120 insertions(+)
create mode 100644 target
Signed-off-by: Pierre Morel
---
linux-headers/linux/kvm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index bcaf66cc4d..38e96ea6f7 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -1112,6 +1112,7 @@ struct
On 10/13/21 09:25, Thomas Huth wrote:
On 16/09/2021 15.50, Pierre Morel wrote:
When the host supports the CPU topology facility, the PTF
instruction with function code 2 is interpreted by the SIE,
provided that the userland hypervizor activates the interpretation
by using
On 10/14/21 10:09, Pierre Morel wrote:
On 10/13/21 11:11, Thomas Huth wrote:
On 13/10/2021 09.55, Pierre Morel wrote:
On 10/13/21 09:25, Thomas Huth wrote:
On 16/09/2021 15.50, Pierre Morel wrote:
When the host supports the CPU topology facility, the PTF
instruction with function code
On 10/14/21 09:16, Thomas Huth wrote:
On 16/09/2021 15.50, Pierre Morel wrote:
We use new objects to have a dynamic administration of the CPU topology.
The highest level object in this implementation is the s390 book and
in this first implementation of CPU topology for S390 we have a single
On 10/13/21 11:11, Thomas Huth wrote:
On 13/10/2021 09.55, Pierre Morel wrote:
On 10/13/21 09:25, Thomas Huth wrote:
On 16/09/2021 15.50, Pierre Morel wrote:
When the host supports the CPU topology facility, the PTF
instruction with function code 2 is interpreted by the SIE,
provided
On 10/13/21 10:20, Thomas Huth wrote:
On 16/09/2021 15.50, Pierre Morel wrote:
The handling of STSI is enhanced with the interception of the
function code 15 for storing CPU topology.
Using the objects built during the pluging of CPU, we build the
SYSIB 15_1_x structures.
With this patch
On 10/13/21 09:25, Thomas Huth wrote:
On 16/09/2021 15.50, Pierre Morel wrote:
When the host supports the CPU topology facility, the PTF
instruction with function code 2 is interpreted by the SIE,
provided that the userland hypervizor activates the interpretation
by using
On 10/12/21 09:27, Thomas Huth wrote:
On 17/09/2021 14.06, Pierre Morel wrote:
CLP immediate commands allow to query the Logical Processor
available on the machine and to check for a specific one.
Let's add these commands.
Signed-off-by: Pierre Morel
---
hw/s390x/s390-pci-inst.c
On 9/29/21 10:12 AM, Thomas Huth wrote:
On 07/09/2021 14.45, Pierre Morel wrote:
On 9/7/21 9:32 AM, Thomas Huth wrote:
On 22/07/2021 19.42, Pierre Morel wrote:
We use new objects to have a dynamic administration of the CPU
topology.
The highier level object is the S390 book. In a first
immediate commands.
AFAIK only the basi processor, with Logical Processor Selector 0,
LPS==0, and the PCI processor, LPS==2, are currently available on
QEMU.
Pierre Morel (1):
s390x:clp: implementing CLP immediate commands
hw/s390x/s390-pci-inst.c | 33
CLP immediate commands allow to query the Logical Processor
available on the machine and to check for a specific one.
Let's add these commands.
Signed-off-by: Pierre Morel
---
hw/s390x/s390-pci-inst.c | 33
include/hw/s390x/s390-pci-inst.h | 5
in a 64bit
unsigned long. Set on plug and clear on unplug of a CPU.
Signed-off-by: Pierre Morel
---
hw/s390x/cpu-topology.c | 353
hw/s390x/meson.build| 1 +
hw/s390x/s390-virtio-ccw.c | 4 +
include/hw/s390x/cpu-topology.h | 67 ++
target
15_1_2 will be built.
Signed-off-by: Pierre Morel
---
target/s390x/kvm/kvm.c | 101 +
1 file changed, 101 insertions(+)
diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c
index dd036961fe..0a5f2aced2 100644
--- a/target/s390x/kvm/kvm.c
+++ b/target
are intercepted
and must be emulated by the userland hypervizor.
Signed-off-by: Pierre Morel
---
hw/s390x/s390-virtio-ccw.c | 36 ++
include/hw/s390x/s390-virtio-ccw.h | 6 +
target/s390x/kvm/kvm.c | 15 +
3 files changed, 57 insertions
pology information change for shared CPU
- NUMA using the -numa QEMU parameter.
Regards,
Pierre
Pierre Morel (4):
linux-headers update
s390x: kvm: topology: interception of PTF instruction
s390x: topology: CPU topology objects and structures
s390x: topology: implementating Store Topology Syst
Signed-off-by: Pierre Morel
---
linux-headers/linux/kvm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index bcaf66cc4d..38e96ea6f7 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -1112,6 +1112,7 @@ struct
On 9/7/21 9:32 AM, Thomas Huth wrote:
On 22/07/2021 19.42, Pierre Morel wrote:
We use new objects to have a dynamic administration of the CPU topology.
The highier level object is the S390 book. In a first implementation
I didn't spot any migration related code in here
On 9/7/21 10:00 AM, Thomas Huth wrote:
On 22/07/2021 19.42, Pierre Morel wrote:
The handling of STSI is enhenced with the interception of the
s/enhenced/enhanced/
yes, thanks
function code 15 for storing CPU topology.
...
+static void insert_stsi_15_1_x(S390CPU *cpu, int sel2
On 9/7/21 9:54 AM, Thomas Huth wrote:
On 22/07/2021 19.42, Pierre Morel wrote:
We define the CPU type Topology List Entry and the
Container type Topology List Entry to implement SYSIB 15.1.x
This patch will be squatched with the next patch.
Signed-off-by: Pierre Morel
---
target/s390x
On 9/7/21 9:46 AM, Thomas Huth wrote:
On 22/07/2021 19.42, Pierre Morel wrote:
We define the CPU type Topology List Entry and the
Container type Topology List Entry to implement SYSIB 15.1.x
This patch will be squatched with the next patch.
s/squatched/squashed/
... anyway, why did you
On 9/7/21 9:32 AM, Thomas Huth wrote:
On 22/07/2021 19.42, Pierre Morel wrote:
We use new objects to have a dynamic administration of the CPU topology.
The highier level object is the S390 book. In a first implementation
s/highier/higher/ ... or highest ?
thx I chose highest
And I
On 9/6/21 7:21 PM, Thomas Huth wrote:
On 22/07/2021 19.42, Pierre Morel wrote:
Interception of the PTF instruction depending on the new
KVM_CAP_S390_CPU_TOPOLOGY KVM extension.
Signed-off-by: Pierre Morel
---
hw/s390x/s390-virtio-ccw.c | 45
On 8/30/21 10:42 PM, Halil Pasic wrote:
On Mon, 30 Aug 2021 11:51:51 +0200
Christian Borntraeger wrote:
On 27.08.21 12:50, Pierre Morel wrote:
Hello All,
This series presents a VIRTIO test device which receives data on its
input channel and sends back a simple checksum for the data
On 8/30/21 11:51 AM, Christian Borntraeger wrote:
On 27.08.21 12:50, Pierre Morel wrote:
Hello All,
This series presents a VIRTIO test device which receives data on its
input channel and sends back a simple checksum for the data it received
on its output channel.
The goal is to allow
On 8/30/21 11:54 AM, Christian Borntraeger wrote:
On 26.08.21 11:22, Pierre Morel wrote:
a gentle ping :)
I would like if you have time, comments on the architecture I propose,
if the handling is done at the right level, KVM vs QEMU.
Do we expect changes in this series due
The virtio IDs depends on Linux tree...
Signed-off-by: Pierre Morel
---
include/standard-headers/linux/virtio_ids.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/standard-headers/linux/virtio_ids.h
b/include/standard-headers/linux/virtio_ids.h
index 4fe842c3a3..bf61801eeb 100644
This VIRTIO device receives data on its input channel
and emit a simple checksum for these data on its
output channel.
This allows a simple VIRTIO device driver to check the
VIRTIO initialization and various data transfer.
Signed-off-by: Pierre Morel
---
hw/s390x/meson.build| 1
.
For this I introduced a new device ID for the device and having no
Linux driver but a kvm-unit-test driver, I have the following
questions:
Is there another way to advertise new VIRTIO IDs but Linux?
If this QEMU test meet interest, should I write a Linux test program?
Regards,
Pierre
Pierre Morel (2
,
Regards,
Pierre
On 7/22/21 7:42 PM, Pierre Morel wrote:
Hi,
This series is a first part of the implementation of CPU topology
for S390 greatly reduced from the first spin.
In particular, we reduced the scope to the S390x specificities, removing
all code touching to SMP or NUMA, with the goal
use we end up not injecting an operand program exception.
Fixes: a54b8ac340c2 ("css: SCHIB measurement block origin must be aligned")
Cc: Halil Pasic
Cc: Cornelia Huck
Cc: Christian Borntraeger
Cc: Richard Henderson
Cc: Thomas Huth
Cc: Pierre Morel
Cc: qemu-s3...@nongnu.org
Signed-of
On 7/22/21 7:42 PM, Pierre Morel wrote:
Interception of the PTF instruction depending on the new
KVM_CAP_S390_CPU_TOPOLOGY KVM extension.
Signed-off-by: Pierre Morel
---
hw/s390x/s390-virtio-ccw.c | 45 ++
include/hw/s390x/s390-virtio-ccw.h | 7
on unplug of a CPU.
Signed-off-by: Pierre Morel
---
hw/s390x/cpu-topology.c | 334
hw/s390x/meson.build| 1 +
hw/s390x/s390-virtio-ccw.c | 4 +
include/hw/s390x/cpu-topology.h | 67 +++
4 files changed, 406 insertions(+)
create
Just as information, the linux header update patch is inside the
Linux patch series.
Signed-off-by: Pierre Morel
---
linux-headers/linux/kvm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index bcaf66cc4d..38e96ea6f7 100644
e that this is also the default behavior on the LPAR.
Regards,
Pierre
Pierre Morel (5):
s390x: kvm: topology: Linux header update
s390x: kvm: topology: interception of PTF instruction
s390x: topology: CPU topology objects and structures
s390x: topology: Topology list entries and SYSIB 15.x.x
We define the CPU type Topology List Entry and the
Container type Topology List Entry to implement SYSIB 15.1.x
This patch will be squatched with the next patch.
Signed-off-by: Pierre Morel
---
target/s390x/cpu.h | 44
1 file changed, 44 insertions
15_1_2 will be built.
Signed-off-by: Pierre Morel
---
target/s390x/kvm/kvm.c | 101 +
1 file changed, 101 insertions(+)
diff --git a/target/s390x/kvm/kvm.c b/target/s390x/kvm/kvm.c
index 9a0c13d4ac..0194756e6a 100644
--- a/target/s390x/kvm/kvm.c
+++ b/target
Interception of the PTF instruction depending on the new
KVM_CAP_S390_CPU_TOPOLOGY KVM extension.
Signed-off-by: Pierre Morel
---
hw/s390x/s390-virtio-ccw.c | 45 ++
include/hw/s390x/s390-virtio-ccw.h | 7 +
target/s390x/kvm/kvm.c | 21
: for patches that touch s390x.
Sure, I will. Sorry about the missing. :)
Thanks,
Yanan
.
And me too please.
Thanks
Pierre
--
Pierre Morel
IBM Lab Boeblingen
On 7/20/21 11:19 AM, Daniel P. Berrangé wrote:
On Tue, Jul 20, 2021 at 10:46:31AM +0200, Pierre Morel wrote:
On 7/20/21 10:20 AM, Cornelia Huck wrote:
On Tue, Jul 20 2021, Pierre Morel wrote:
On 7/19/21 5:50 PM, Cornelia Huck wrote:
On Fri, Jul 16 2021, Daniel P. Berrangé wrote
On 7/20/21 10:20 AM, Cornelia Huck wrote:
On Tue, Jul 20 2021, Pierre Morel wrote:
On 7/19/21 5:50 PM, Cornelia Huck wrote:
On Fri, Jul 16 2021, Daniel P. Berrangé wrote:
Is the book/drawer thing architecture specific, or is it machine
type / CPU specific. ie do /all/ the s390x machine
On 7/20/21 9:37 AM, Pierre Morel wrote:
On 7/19/21 5:52 PM, Daniel P. Berrangé wrote:
On Mon, Jul 19, 2021 at 05:43:29PM +0200, Cornelia Huck wrote:
(restored cc:s)
On Fri, Jul 16 2021, Pierre Morel wrote:
On 7/16/21 11:14 AM, Daniel P. Berrangé wrote:
I increasingly worry that we're
, Markus Armbruster wrote:
Pierre Morel writes:
On 7/15/21 8:16 AM, Markus Armbruster wrote:
Pierre Morel writes:
Drawers and Books are levels 4 and 3 of the S390 CPU
topology.
We allow the user to define these levels and we will
store the values inside the S390CcwMachineState.
Double
On 7/19/21 5:52 PM, Daniel P. Berrangé wrote:
On Mon, Jul 19, 2021 at 05:43:29PM +0200, Cornelia Huck wrote:
(restored cc:s)
On Fri, Jul 16 2021, Pierre Morel wrote:
On 7/16/21 11:14 AM, Daniel P. Berrangé wrote:
I increasingly worry that we're making a mistake by going down the
route
On 7/16/21 11:22 AM, Cornelia Huck wrote:
On Wed, Jul 14 2021, Pierre Morel wrote:
Interception of the PTF instruction depending on the new
KVM_CAP_S390_CPU_TOPOLOGY KVM extension.
Wasn't that the capability that you dropped?
yes,
Is PTF supposed to be always intercepting
On 7/16/21 11:24 AM, Cornelia Huck wrote:
On Wed, Jul 14 2021, Pierre Morel wrote:
The maximum nested topology entries is used by the guest to know
how many nested topology are available on the machine.
As we now implemented drawers and books above sockets and core
we can set the maximum
On 7/16/21 11:23 AM, Daniel P. Berrangé wrote:
On Thu, Jul 15, 2021 at 08:16:32AM +0200, Markus Armbruster wrote:
Pierre Morel writes:
Drawers and Books are levels 4 and 3 of the S390 CPU
topology.
We allow the user to define these levels and we will
store the values inside
On 7/16/21 11:14 AM, Daniel P. Berrangé wrote:
On Fri, Jul 16, 2021 at 10:54:08AM +0200, Cornelia Huck wrote:
On Wed, Jul 14 2021, Pierre Morel wrote:
We need a s390x dedicated SMP parsing to handle s390x specificities.
In this patch we only handle threads, cores and sockets for
s390x
On 7/16/21 10:54 AM, Cornelia Huck wrote:
On Wed, Jul 14 2021, Pierre Morel wrote:
We need a s390x dedicated SMP parsing to handle s390x specificities.
In this patch we only handle threads, cores and sockets for
s390x:
- do not support threads, we always have 1 single thread per core
On 7/15/21 8:16 AM, Markus Armbruster wrote:
Pierre Morel writes:
Drawers and Books are levels 4 and 3 of the S390 CPU
topology.
We allow the user to define these levels and we will
store the values inside the S390CcwMachineState.
Double-checking: are these members specific to S390
S390 uses 5 levels of CPU topology, we implement the four lower levels:
drawers, books, sockets and cores.
Until now drawers and books were not defined, this patch add the
definition for drawers and books to the machine.
Signed-off-by: Pierre Morel
---
hw/core/machine.c | 18
Interception of the PTF instruction depending on the new
KVM_CAP_S390_CPU_TOPOLOGY KVM extension.
A global value is used to remember if a Topology change occured since
the last interception of a PTF instruction with function code 0.
Signed-off-by: Pierre Morel
---
hw/s390x/cpu-topology.c
We add the possibility to define the CPU topology to QEMU S390x.
This allows the user chose which CPU in the topology is active.
A NUMA node is considered to be a socket and chosing the NUMA node
leads to chose the specific socket in a book inside a drawer.
Signed-off-by: Pierre Morel
---
hw
starting from the lowest ID to the greatest one.
Each CPU inside a socket will be represented by a bit in a 64bit
unsigned long. Set on plug and clear on unplug of a CPU.
Signed-off-by: Pierre Morel
---
hw/s390x/cpu-topology.c | 576
hw/s390x/meson.build
7:37:37yes yeshorizontal
95
38- -- -- ::: no yeshorizontal
8
# chcpu -e 38
- Documentation will come with the next iteration
Regards,
Pierre
Pierre Morel (9):
s390x: smp: s390x dedicated smp parsing
s390x: toplogy: adding drawers and books to smp p
The handling of STSI is enhenced with the interception of the
function code 15 for storing CPU topology.
Using the objects built during the pluging of CPU, we build the
SYSIB 15_1_x structures.
Signed-off-by: Pierre Morel
---
target/s390x/kvm/kvm.c | 222
We define the CPU type Topology List Entry and the
Container type Topology List Entry to implement SYSIB 15.1.x
This patch will be squatched with the next patch.
Signed-off-by: Pierre Morel
---
target/s390x/cpu.h | 44
1 file changed, 44 insertions
Drawers and Books are levels 4 and 3 of the S390 CPU
topology.
We allow the user to define these levels and we will
store the values inside the S390CcwMachineState.
Signed-off-by: Pierre Morel
---
hw/s390x/s390-virtio-ccw.c | 22 +++---
include/hw/s390x/s390-virtio-ccw.h
The maximum nested topology entries is used by the guest to know
how many nested topology are available on the machine.
As we now implemented drawers and books above sockets and core
we can set the maximum nested topology reported by SCLP to 4.
Signed-off-by: Pierre Morel
---
hw/s390x/sclp.c
from the standard smp_parse
functionement and reflect the CPU topology in the simple case
where all CPU belong to the same book.
Topology levels above sockets, i.e. books, drawers, are not
considered at this stage and will be introduced in a later patch.
Signed-off-by: Pierre Morel
---
hw/s390x
On 4/9/21 12:27 PM, Cornelia Huck wrote:
On Thu, 8 Apr 2021 18:32:09 +0200
Pierre Morel wrote:
ccw_dstream_read/write functions returned values are sometime
not taking into account and reported back to the upper level
of interpretation of CCW instructions.
It follows that accessing
On 4/9/21 10:49 AM, Cornelia Huck wrote:
On Fri, 9 Apr 2021 10:38:37 +0200
Halil Pasic wrote:
On Thu, 8 Apr 2021 18:32:09 +0200
Pierre Morel wrote:
ccw_dstream_read/write functions returned values are sometime
not taking into account and reported back to the upper level
that they
are often not checked for error in various places.
It follows that accessing an invalid address does not trigger a
subchannel status program check to the guest as it should.
Regards,
Pierre
Pierre Morel (1):
s390x: css: report errors from ccw_dstream_read/write
hw/char/terminal3270.c | 11
the return values of ccw_dstream_write[_buf] and
ccw_dstream_read[_buf] and report it to the caller.
Signed-off-by: Pierre Morel
---
hw/char/terminal3270.c | 11 +--
hw/s390x/3270-ccw.c| 5 +++-
hw/s390x/css.c | 14 +
hw/s390x/virtio-ccw.c | 66
On 4/8/21 3:23 PM, Cornelia Huck wrote:
On Thu, 8 Apr 2021 14:32:11 +0200
Pierre Morel wrote:
On 4/8/21 11:02 AM, Cornelia Huck wrote:
On Wed, 7 Apr 2021 19:47:11 +0200
Halil Pasic wrote:
So this begs the question, do we need this fixed for old releases as well?
My answer is yes we
nt?
1) let the 3270 decide for internal errors (-EIO) but return the error
for CSS errors in handle_payload_3270_write()
2) for senseid, always ask CSS to update the residual count
but only erase the senseid if the write succeeded
--
Pierre Morel
IBM Lab Boeblingen
On 4/6/21 5:03 PM, Cornelia Huck wrote:
On Tue, 6 Apr 2021 09:44:13 +0200
Pierre Morel wrote:
ccw_dstream_read/write functions returned values are sometime
not taking into account and reported back to the upper level
of interpretation of CCW instructions.
It follows that accessing
that they
are often not checked for error in various places.
It follows that accessing an invalid address does not trigger a
subchannel status program check to the guest as it should.
Regards,
Pierre
Pierre Morel (1):
s390x: css: report errors from ccw_dstream_read/write
hw/char/terminal3270.c | 11
the return values of ccw_dstream_write[_buf] and
ccw_dstream_read[_buf] and report it to the caller.
Signed-off-by: Pierre Morel
---
hw/char/terminal3270.c | 11 +--
hw/s390x/3270-ccw.c| 3 ++
hw/s390x/css.c | 16 +-
hw/s390x/virtio-ccw.c | 66
Pasic
-M: Pierre Morel
+M: Jason Herne
S: Supported
F: hw/s390x/ap-device.c
F: hw/s390x/ap-bridge.c
Acked-by: Pierre Morel
--
Pierre Morel
IBM Lab Boeblingen
On 2/19/21 2:41 PM, Thomas Huth wrote:
On 19/02/2021 14.39, Pierre Morel wrote:
The Measurement Block Origin inside the SCHIB is used when
Measurement Block format 1 is in used and must be aligned
on 64 bytes otherwise an operand exception is recognized
when issuing the Modify Sub CHannel
.
Regards,
Pierre
Pierre Morel (1):
css: SCHIB measurement block origin must be aligned
target/s390x/ioinst.c | 6 ++
1 file changed, 6 insertions(+)
--
2.25.1
The Measurement Block Origin inside the SCHIB is used when
Measurement Block format 1 is in used and must be aligned
on 64 bytes otherwise an operand exception is recognized
when issuing the Modify Sub CHannel (MSCH) instruction.
Signed-off-by: Pierre Morel
---
target/s390x/ioinst.c | 6
Hi,
By testing Measurement with KVM unit tests I fall on this:
we forgot to test the alignment of the MBO for measurement format 1.
The MB must be aligned on 128bits otherwise an operand exception
is recognized.
Regards,
Pierre
Pierre Morel (1):
css: SCHIB measurement block origin must
The Measurement Block Origin inside the SCHIB is used when
Mesurement Block format 1 is in used and must be aligned
on 128bits.
Signed-off-by: Pierre Morel
---
target/s390x/ioinst.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/s390x/ioinst.c b/target/s390x/ioinst.c
index
On 1/21/21 3:42 PM, Matthew Rosato wrote:
On 1/21/21 3:27 AM, Pierre Morel wrote:
On 1/20/21 9:29 PM, Matthew Rosato wrote:
On 1/20/21 2:18 PM, Pierre Morel wrote:
...snip...
So we have:
devices supporting MIO and MSIX
devices not supporting MIO nor MSIX
devices not supporting
On 1/21/21 2:37 PM, Niklas Schnelle wrote:
On 1/21/21 1:30 PM, Pierre Morel wrote:
Just wanted to say that we've had a very similar discussion with
Cornelia end of last year and came to the conclusion that explicitly
matching the PFT is likely the safest bet:
https://lkml.org/lkml/2020
On 1/21/21 10:58 AM, Niklas Schnelle wrote:
On 1/21/21 9:27 AM, Pierre Morel wrote:
On 1/20/21 9:29 PM, Matthew Rosato wrote:
On 1/20/21 2:18 PM, Pierre Morel wrote:
...snip...
So, I mean I can change the code to be more permissive in that way (allow any
device that doesn't have
On 1/20/21 9:29 PM, Matthew Rosato wrote:
On 1/20/21 2:18 PM, Pierre Morel wrote:
...snip...
So we have:
devices supporting MIO and MSIX
devices not supporting MIO nor MSIX
devices not supporting the use of PCISTG to emulate PCISTB
The first two are two different things indicated
On 1/20/21 4:59 PM, Matthew Rosato wrote:
On 1/20/21 9:45 AM, Pierre Morel wrote:
On 1/20/21 3:03 PM, Matthew Rosato wrote:
On 1/20/21 4:12 AM, Pierre Morel wrote:
On 1/19/21 9:44 PM, Matthew Rosato wrote:
Today, ISM devices are completely disallowed for vfio-pci
passthrough as
QEMU
On 1/20/21 3:03 PM, Matthew Rosato wrote:
On 1/20/21 4:12 AM, Pierre Morel wrote:
On 1/19/21 9:44 PM, Matthew Rosato wrote:
Today, ISM devices are completely disallowed for vfio-pci passthrough as
QEMU rejects the device due to an (inappropriate) MSI-X check. Removing
this fence, however
uld still fence this case.
Hi,
The choice of using the new VFIO region is made on the ISM PCI function
type (PFT), which makes the patch ISM specific, why don't we use here
the MIO bit common to any zPCI function and present in kernel to make
the choice?
Regards,
Pierre
--
Pierre Morel
IBM
On 12/18/20 6:05 PM, Pierre Morel wrote:
On 12/18/20 5:51 PM, Cornelia Huck wrote:
On Fri, 18 Dec 2020 17:40:50 +0100
Pierre Morel wrote:
On 12/18/20 4:32 PM, Cornelia Huck wrote:
On Fri, 18 Dec 2020 15:32:08 +0100
Pierre Morel wrote:
On 12/18/20 12:04 PM, Cornelia Huck wrote
On 12/18/20 5:51 PM, Cornelia Huck wrote:
On Fri, 18 Dec 2020 17:40:50 +0100
Pierre Morel wrote:
On 12/18/20 4:32 PM, Cornelia Huck wrote:
On Fri, 18 Dec 2020 15:32:08 +0100
Pierre Morel wrote:
On 12/18/20 12:04 PM, Cornelia Huck wrote:
On Fri, 18 Dec 2020 10:37:38 +0100
Pierre
On 12/18/20 4:32 PM, Cornelia Huck wrote:
On Fri, 18 Dec 2020 15:32:08 +0100
Pierre Morel wrote:
On 12/18/20 12:04 PM, Cornelia Huck wrote:
On Fri, 18 Dec 2020 10:37:38 +0100
Pierre Morel wrote:
On 12/17/20 11:16 PM, Matthew Rosato wrote:
In pcistb_service_handler, a call is made
On 12/18/20 12:04 PM, Cornelia Huck wrote:
On Fri, 18 Dec 2020 10:37:38 +0100
Pierre Morel wrote:
On 12/17/20 11:16 PM, Matthew Rosato wrote:
In pcistb_service_handler, a call is made to validate that the memory
region can be accessed. However, the call is made using the entire length
return 0;
+}
}
if (s390_cpu_virt_mem_read(cpu, gaddr, ar, buffer, len)) {
wouldn't it be made automatically by defining the io_region
max_access_size when reading the bars in clp_service_call?
--
Pierre Morel
IBM Lab Boeblingen
uint32_t fmt;
uint64_t reserved1;
#define CLP_REQ_QPCIG_MASK_PFGID 0xff
-uint32_t g;
+uint32_t g0 :24;
+uint32_t g :8;
uint32_t reserved2;
uint64_t reserved3;
} QEMU_PACKED ClpReqQueryPciGrp;
--
Pierre Morel
IBM Lab Boeblingen
On 2020-08-14 18:02, Pan Nengyuan wrote:
Missing g_error_free() in vfio_ap_get_group() error path. Fix that.
Reported-by: Euler Robot
Signed-off-by: Pan Nengyuan
---
Cc: Cornelia Huck
Cc: Thomas Huth
Cc: Christian Borntraeger
Cc: Tony Krowiak
Cc: Halil Pasic
Cc: Pierre Morel
Cc: Alex
we can fix this problem by forcing the is_virtfn bit.
AFAIU, our HW virtual function works a lot like a physical function.
Matthew Rosato (1):
s390x/pci: Enforce PCI_COMMAND_MEMORY for vfio-pci
hw/s390x/s390-pci-inst.c | 10 ++
1 file changed, 10 insertions(+)
Regards,
Pierre
and
then failing the transition sounds wrong to me.
The guest image is encrypted and the transition to PV is done by the
stage 3 boot loader, part of the loaded image, before Linux is started.
At this moment the guest is not aware of the virtio devices.
Regards,
Pierre
--
Pierre Morel
IBM Lab
:
Store the value of the variable + 1 as a string in a buffer
send back the buffer
- defines a Control Unit property of type CCW_PONG_CU_TYPE
for the guest to recognize the PONG device when using a
SENSE_ID command.
Pierre Morel (1):
s390x: css: pong, channel subsystem test device
.
Currently only the kvm-unit-test css test uses the PONG device.
Signed-off-by: Pierre Morel
---
default-configs/s390x-softmmu.mak | 1 +
hw/s390x/Kconfig | 3 +
hw/s390x/Makefile.objs| 1 +
hw/s390x/ccw-pong.c | 134
.
Currently only the kvm-unit-test css test uses the PONG device.
Signed-off-by: Pierre Morel
---
default-configs/s390x-softmmu.mak | 1 +
hw/s390x/Kconfig | 3 +
hw/s390x/Makefile.objs| 1 +
hw/s390x/ccw-pong.c | 140
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