Philippe suggested that I run the TCG tests for Hexagon. Thanks Philippe!!
I discovered that I'm not handling SIGSEGV properly. We pass other signal
tests, but not this one. I'm hoping someone can help. The first thing that I
realized is that I hadn't provided a tlb_fill function for
to answer them.
Taylor
-Original Message-
From: Philippe Mathieu-Daudé
Sent: Friday, November 1, 2019 1:30 PM
To: Taylor Simpson ; qemu-devel@nongnu.org
Cc: Alessandro Di Federico ; ni...@rev.ng; Niccolò Izzo
Subject: Re: QEMU for Qualcomm Hexagon - KVM Forum talk and code available
Hi
= 0; i < 4; i++) { \
tcg_gen_shli_tl(RdV, RdV, 8); \
tcg_gen_or_tl(RdV, RdV, tmp); \
} \
tcg_temp_free(tmp); \
}
From: Aleksandar Markovic
Sent: Monday, November 4, 2019 6:05 PM
To: Taylor Simpson
Cc: qemu-devel@nongnu.org; Alessandro Di Federico ; ni...@rev.ng;
Niccol
)
-
CAUTION: This email originated from outside of the organization.
-
Taylor Simpson writes:
> Philippe suggested that I run the TCG tests for Hexagon. Thanks Philippe!!
>
>
>
> I discovered that I
Responses below ...
Taylor
Taylor Simpson writes:
> I had discussions with several people at the KVM Forum, and I’ve been
> thinking about how to divide up the code for community review. Here is my
> proposal for the steps.
>
> 1. linux-user changes + linux-user/hex
Signed-off-by: Taylor Simpson
---
tests/tcg/multiarch/float_helpers.c | 13 -
tests/tcg/multiarch/linux-test.c| 2 +-
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/tests/tcg/multiarch/float_helpers.c
b/tests/tcg/multiarch/float_helpers.c
index 8ee7903..437247c
Signed-off-by: Taylor Simpson
---
tests/tcg/multiarch/float_helpers.c | 2 --
tests/tcg/multiarch/linux-test.c| 6 +-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/tests/tcg/multiarch/float_helpers.c
b/tests/tcg/multiarch/float_helpers.c
index 8ee7903..bc530e5 100644
generator.
I would love some feedback on this proposal. Hopefully, that is enough detail
so that people can comment. If anything isn’t clear, please ask questions.
Thanks,
Taylor
From: Qemu-devel On Behalf
Of Taylor Simpson
Sent: Tuesday, November 5, 2019 10:33 AM
To: Aleksandar Markovic
Cc
s "allowed to be null".
Taylor
-Original Message-
From: Alex Bennée
Sent: Friday, November 15, 2019 6:17 AM
To: Taylor Simpson
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH] Modify tests to work with clang
-
OK, I changed the code in github and will upstream it that way.
-Original Message-
From: Richard Henderson
Sent: Wednesday, November 13, 2019 3:10 PM
To: Taylor Simpson ; Alex Bennée
; qemu-devel@nongnu.org
Cc: Alessandro Di Federico ; ni...@rev.ng; Niccolò Izzo
; Aleksandar Markovic
the other team makes
changes to the code (either to fix bugs or add features), it will be easier to
identify the changes and bring them into qemu.
Taylor
-Original Message-
From: Aleksandar Markovic
Sent: Thursday, November 21, 2019 1:20 PM
To: Taylor Simpson
Cc: Laurent Vivier ; Riku
the gold standard
- more so than the PDF manual. Any changes to that code, including
reformatting, would put qemu at risk of not accurately emulating the processor.
Taylor
-Original Message-
From: Aleksandar Markovic
Sent: Thursday, November 21, 2019 2:45 PM
To: Taylor Simpson
Cc
e implication of having the common
code changes late is that code would compile and run only at the end of the
series.
Thanks,
Taylor
-Original Message-
From: Qemu-devel On Behalf
Of Taylor Simpson
Sent: Thursday, November 14, 2019 6:54 PM
To: Richard Henderson ; Alex Bennée
; qemu-dev
We would like inform the you that we will be doing a talk at the KVM Forum next
week on QEMU for Qualcomm Hexagon. Alessandro Di Federico, Niccolo Izzo, and I
have been working independently on implementations of the Hexagon target. We
plan to merge the implementations, have a community
_SIGRTMAX,
> [__SIGRTMAX] = __SIGRTMIN,
> +#ifdef TARGET_SIGNAL_TABLE_MODIFY
> +TARGET_SIGNAL_TABLE_MODIFY
Thanks,
Taylor
-Original Message-
From: Peter Maydell
Sent: Tuesday, November 19, 2019 1:31 PM
To: Taylor Simpson
Cc: Riku Voipio ; Laurent Vivier ; QEMU
Developers
Subject: R
--Original Message-
From: Laurent Vivier
Sent: Tuesday, November 19, 2019 12:13 PM
To: Taylor Simpson ; Philippe Mathieu-Daudé
; riku.voi...@iki.fi; qemu-devel@nongnu.org
Subject: Re: [PATCH] Add minimal Hexagon target - First in a series of patches
- linux-user changes + linux-user/hexagon
Signed-off-by: Taylor Simpson
---
configure | 9 +
default-configs/hexagon-linux-user.mak | 1 +
include/elf.h | 2 +
linux-user/elfload.c| 16 ++
linux-user/hexagon/cpu_loop.c | 103
Thanks for the feedback Richard.
Responses below ...
Thanks,
Taylor
-Original Message-
From: Richard Henderson
Sent: Tuesday, November 19, 2019 1:34 PM
To: Taylor Simpson ; laur...@vivier.eu;
riku.voi...@iki.fi; qemu-devel@nongnu.org
Subject: Re: [PATCH] Add minimal Hexagon target
How was this solved for other targets?
-Original Message-
From: Peter Maydell
Sent: Wednesday, November 20, 2019 5:01 AM
To: Laurent Vivier
Cc: Taylor Simpson ; Riku Voipio ;
QEMU Developers
Subject: Re: [PATCH] Hexagon: Swap SIGRGMAX-1 and SIGRTMIN+1
On Wed, 20 Nov 2019 at 10:54
Responses inline ...
Thanks,
Taylor
-Original Message-
From: Richard Henderson
Sent: Wednesday, November 20, 2019 2:07 AM
To: Taylor Simpson ; laur...@vivier.eu;
riku.voi...@iki.fi; qemu-devel@nongnu.org
Subject: Re: [PATCH] Add minimal Hexagon target - First in a series of patches
Is there a precedent for this? I'm OK with DEBUG_HEX, but I assumed reviewers
wouldn't approve
#ifdef FIXME
#define DEBUG_HEX
#endif
Taylor
-Original Message-
From: Richard Henderson
Sent: Wednesday, November 20, 2019 3:02 AM
To: Laurent Vivier ; Taylor Simpson ;
Philippe Mathieu
OK, I'll modify to follow the mips approach.
Taylor
-Original Message-
From: Laurent Vivier
Sent: Wednesday, November 20, 2019 8:15 AM
To: Taylor Simpson ; Richard Henderson
; Philippe Mathieu-Daudé ;
riku.voi...@iki.fi; qemu-devel@nongnu.org
Subject: Re: [PATCH] Add minimal Hexagon
Are you saying there's a way to tell qemu to put the stack at a certain
location? Or are you suggesting we do something on the hardware side?
Taylor
-Original Message-
From: Richard Henderson
Sent: Wednesday, November 20, 2019 8:43 AM
To: Taylor Simpson ; laur...@vivier.eu;
riku.voi
h one should contain the changes to common
files (e.g., configure)? Also, note that we won't be able to build until both
patches are merged. Is that OK?
Thanks,
Taylor
-Original Message-
From: Philippe Mathieu-Daudé
Sent: Tuesday, November 19, 2019 9:19 AM
To: Taylor Simpson ; laur...@
Signed-off-by: Taylor Simpson
---
linux-user/signal.c | 8
1 file changed, 8 insertions(+)
diff --git a/linux-user/signal.c b/linux-user/signal.c
index 5ca6d62..ce3d27f 100644
--- a/linux-user/signal.c
+++ b/linux-user/signal.c
@@ -72,6 +72,14 @@ static uint8_t
Signed-off-by: Taylor Simpson
---
target/hexagon/opcodes.c | 223 +++
target/hexagon/opcodes.h | 67 ++
2 files changed, 290 insertions(+)
create mode 100644 target/hexagon/opcodes.c
create mode 100644 target/hexagon/opcodes.h
diff
The insn_t and packet_t are the interface between instruction decoding and
TCG code generation
Signed-off-by: Taylor Simpson
---
target/hexagon/insn.h | 133 ++
1 file changed, 133 insertions(+)
create mode 100644 target/hexagon/insn.h
diff
Changes to packet semantics to support HVX
Signed-off-by: Taylor Simpson
---
target/hexagon/translate.c | 174 +
target/hexagon/translate.h | 30
2 files changed, 204 insertions(+)
diff --git a/target/hexagon/translate.c b/target/hexagon
Various forms of declare, read, write, free
Signed-off-by: Taylor Simpson
---
target/hexagon/macros.h | 388
1 file changed, 388 insertions(+)
create mode 100644 target/hexagon/macros.h
diff --git a/target/hexagon/macros.h b/target/hexagon
Run the C preprocessor across the instruction definition and encoding
files to expand macros and prepare the iset.py file. The resulting
fill contains python data structures used to build the decode tree.
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_dectree_import.c | 205
Read the instruction memory
Create a packet data structure
Generate TCG code for the start of the packet
Invoke the generate function for each instruction
Generate TCG code for the end of the packet
Signed-off-by: Taylor Simpson
---
target/hexagon/translate.c | 732
Override compare, transfer, conditional jump instructions
Signed-off-by: Taylor Simpson
---
target/hexagon/helper_overrides.h | 119 ++
1 file changed, 119 insertions(+)
diff --git a/target/hexagon/helper_overrides.h
b/target/hexagon/helper_overrides.h
Signed-off-by: Taylor Simpson
---
target/hexagon/mmvec/macros.h | 436 ++
1 file changed, 436 insertions(+)
diff --git a/target/hexagon/mmvec/macros.h b/target/hexagon/mmvec/macros.h
index 80adb83..93d86e7 100644
--- a/target/hexagon/mmvec/macros.h
+++ b
Imported from the Hexagon architecture library
imported/macros.def Scalar core macro definitions
The macro definition files specify instruction attributes that are applied
to each instruction that reverences the macro.
Signed-off-by: Taylor Simpson
---
target/hexagon/imported
Helpers for reading and writing registers
Helpers for getting and setting parts of values (e.g., set bit)
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr_helpers.h | 323
1 file changed, 323 insertions(+)
create mode 100644 target/hexagon
Signed-off-by: Taylor Simpson
---
target/hexagon/Makefile.objs | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/target/hexagon/Makefile.objs b/target/hexagon/Makefile.objs
index efcf510..3ff59e4 100644
--- a/target/hexagon/Makefile.objs
+++ b/target/hexagon
HVX is a set of wide vector instructions. Machine state includes
vector registers (VRegs)
vector predicate registers (QRegs)
temporary registers for packet semantics
store buffer (masked stores and scatter/gather)
Signed-off-by: Taylor Simpson
---
target/hexagon/cpu.c
Signed-off-by: Taylor Simpson
---
target/hexagon/imported/allextenc.def| 20 +
target/hexagon/imported/encode.def | 1 +
target/hexagon/imported/mmvec/encode_ext.def | 830 +++
3 files changed, 851 insertions(+)
create mode 100644 target/hexagon
Add HVX support to the semantics generator
Signed-off-by: Taylor Simpson
---
target/hexagon/do_qemu.py | 175 ++---
target/hexagon/gen_semantics.c | 9 +++
2 files changed, 171 insertions(+), 13 deletions(-)
diff --git a/target/hexagon/do_qemu.py b
Signed-off-by: Taylor Simpson
---
target/hexagon/gdbstub.c | 62
1 file changed, 62 insertions(+)
diff --git a/target/hexagon/gdbstub.c b/target/hexagon/gdbstub.c
index f07cb9a..e97b0af 100644
--- a/target/hexagon/gdbstub.c
+++ b/target/hexagon
Override predicated store instructions
Signed-off-by: Taylor Simpson
---
target/hexagon/helper_overrides.h | 54 +++
1 file changed, 54 insertions(+)
diff --git a/target/hexagon/helper_overrides.h
b/target/hexagon/helper_overrides.h
index 648fc5d..9791d33
Override predicated load instructions
Signed-off-by: Taylor Simpson
---
target/hexagon/helper_overrides.h | 235 ++
1 file changed, 235 insertions(+)
diff --git a/target/hexagon/helper_overrides.h
b/target/hexagon/helper_overrides.h
index 553..673b7a5
Helpers for instructions overriden for optimization
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr_helpers.h | 314
1 file changed, 314 insertions(+)
diff --git a/target/hexagon/genptr_helpers.h b/target/hexagon/genptr_helpers.h
index 85b449a
-niccolo-izzo-revng-taylor-simpson-qualcomm-innovation-center
The patches up to and including "Hexagon build infractructure" implement the
base Hexagon core and the remainder add HVX. Once the build infrastructure
patch is applied, you can build and qemu will execute non-HVX Hexagon programs
Override instructions to speed up qemu
Signed-off-by: Taylor Simpson
---
target/hexagon/helper_overrides.h | 97 +++
1 file changed, 97 insertions(+)
diff --git a/target/hexagon/helper_overrides.h
b/target/hexagon/helper_overrides.h
index e544dd5..52e4a47
Add CPU state header, CPU definitions and initialization routines
Signed-off-by: Taylor Simpson
---
target/hexagon/cpu-param.h | 26
target/hexagon/cpu.c | 304 +
target/hexagon/cpu.h | 165
target/hexagon
Data for printing (disassembling) each instruction (format string + operands)
Signed-off-by: Taylor Simpson
---
target/hexagon/do_qemu.py | 151 ++
1 file changed, 151 insertions(+)
diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py
Gives a default definition of fWRAP_ for each instruction
Signed-off-by: Taylor Simpson
---
target/hexagon/do_qemu.py | 14 ++
1 file changed, 14 insertions(+)
diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py
index 992dbc3..43acdd7 100755
--- a/target/hexagon
For each instruction we create
DEF_HELPER function prototype
TCG code to generate call to helper
Helper definition
Signed-off-by: Taylor Simpson
---
target/hexagon/do_qemu.py | 773 ++
1 file changed, 773 insertions(+)
create mode 100755
Helpers referenced in macros.h
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr_helpers.h | 67 +
1 file changed, 67 insertions(+)
diff --git a/target/hexagon/genptr_helpers.h b/target/hexagon/genptr_helpers.h
index 27f965a..85b449a 100644
Signed-off-by: Taylor Simpson
---
target/hexagon/attribs.h | 32
target/hexagon/attribs_def.h | 404 +++
2 files changed, 436 insertions(+)
create mode 100644 target/hexagon/attribs.h
create mode 100644 target/hexagon/attribs_def.h
diff --git
Imported from the Hexagon architecture library
Signed-off-by: Taylor Simpson
---
target/hexagon/imported/iclass.def | 52 ++
1 file changed, 52 insertions(+)
create mode 100644 target/hexagon/imported/iclass.def
diff --git a/target/hexagon/imported
Lists the register and immediate operands for each instruction
Signed-off-by: Taylor Simpson
---
target/hexagon/do_qemu.py | 86 +++
1 file changed, 86 insertions(+)
diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py
index f297931
Signed-off-by: Taylor Simpson
---
target/hexagon/macros.h | +++
1 file changed, insertions(+)
diff --git a/target/hexagon/macros.h b/target/hexagon/macros.h
index 4399585..e89fe4c 100644
--- a/target/hexagon/macros.h
+++ b/target/hexagon
Utility functions called by various instructions
Signed-off-by: Taylor Simpson
---
target/hexagon/arch.c | 664 +
target/hexagon/arch.h | 62
target/hexagon/conv_emu.c | 370 +++
target/hexagon/conv_emu.h | 50 +++
target/hexagon
the macro.
Signed-off-by: Taylor Simpson
---
target/hexagon/imported/allext_macros.def | 25 +
target/hexagon/imported/mmvec/macros.def | 1110 +
2 files changed, 1135 insertions(+)
create mode 100644 target/hexagon/imported/allext_macros.def
create mode 100755
extenders
Separate subinsn's into two instructions
Break compare-jumps into two instructions
Create instructions for :endloop
Signed-off-by: Taylor Simpson
---
target/hexagon/decode.c | 773
target/hexagon/decode.h | 39 +++
target
Override load instructions
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr.c | 1 +
target/hexagon/helper_overrides.h | 404 ++
2 files changed, 405 insertions(+)
create mode 100644 target/hexagon/helper_overrides.h
diff --git a/target
Override memop instructions
Signed-off-by: Taylor Simpson
---
target/hexagon/helper_overrides.h | 60 +++
1 file changed, 60 insertions(+)
diff --git a/target/hexagon/helper_overrides.h
b/target/hexagon/helper_overrides.h
index 9791d33..f023442 100644
The majority of helpers are generated. Define the helper functions needed
then include the generated file
Signed-off-by: Taylor Simpson
---
target/hexagon/helper.h| 37
target/hexagon/op_helper.c | 432 +
2 files changed, 469 insertions
Override store instructions
Signed-off-by: Taylor Simpson
---
target/hexagon/helper_overrides.h | 241 ++
1 file changed, 241 insertions(+)
diff --git a/target/hexagon/helper_overrides.h
b/target/hexagon/helper_overrides.h
index 673b7a5..648fc5d 100644
Include the generated files and set up the data structures
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr.c | 60 +
target/hexagon/genptr.h | 25 +
2 files changed, 85 insertions(+)
create mode 100644 target/hexagon
Add Taylor Simpson as the Hexagon target maintainer
Signed-off-by: Taylor Simpson
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e72b5e5..f48c564 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -172,6 +172,14 @@ F: include/hw/cris/
F
with each macro.
Signed-off-by: Taylor Simpson
---
target/hexagon/gen_semantics.c | 92 ++
1 file changed, 92 insertions(+)
create mode 100644 target/hexagon/gen_semantics.c
diff --git a/target/hexagon/gen_semantics.c b/target/hexagon/gen_semantics.c
new file
Define EM_HEXAGON 164
Signed-off-by: Taylor Simpson
---
include/elf.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/elf.h b/include/elf.h
index 8fbfe60..d51e7d4 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -170,6 +170,8 @@ typedef struct mips_elf_abiflags_v0 {
#define
Gives a list of all the opcodes
Signed-off-by: Taylor Simpson
---
target/hexagon/do_qemu.py | 12
1 file changed, 12 insertions(+)
diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py
index 43acdd7..5439964 100755
--- a/target/hexagon/do_qemu.py
+++ b/target/hexagon
Python script that emits the decode tree in dectree_generated.h.
Signed-off-by: Taylor Simpson
---
target/hexagon/dectree.py | 354 ++
1 file changed, 354 insertions(+)
create mode 100755 target/hexagon/dectree.py
diff --git a/target/hexagon
Override mathematical operations with more than one definition
Signed-off-by: Taylor Simpson
---
target/hexagon/helper_overrides.h | 30 ++
1 file changed, 30 insertions(+)
diff --git a/target/hexagon/helper_overrides.h
b/target/hexagon/helper_overrides.h
index
Override miscellaneous instructions identified during profiling
Signed-off-by: Taylor Simpson
---
target/hexagon/helper_overrides.h | 296 ++
1 file changed, 296 insertions(+)
diff --git a/target/hexagon/helper_overrides.h
b/target/hexagon
Helpers for load-locked/store-conditional
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr_helpers.h | 52 +
1 file changed, 52 insertions(+)
diff --git a/target/hexagon/genptr_helpers.h b/target/hexagon/genptr_helpers.h
index 2b91fdb..b780522
Signed-off-by: Taylor Simpson
---
target/hexagon/helper.h| 1 +
target/hexagon/op_helper.c | 75 ++
2 files changed, 76 insertions(+)
diff --git a/target/hexagon/helper.h b/target/hexagon/helper.h
index 5dc0f71..3e4728d 100644
--- a/target
Used to determine legal VLIW slots for each instruction
Signed-off-by: Taylor Simpson
---
target/hexagon/iclass.c | 109
target/hexagon/iclass.h | 46
2 files changed, 155 insertions(+)
create mode 100644 target/hexagon
Signed-off-by: Taylor Simpson
---
target/hexagon/decode.c | 23 +-
target/hexagon/mmvec/decode_ext_mmvec.c | 673
target/hexagon/mmvec/decode_ext_mmvec.h | 24 ++
target/hexagon/q6v_decode.c | 14 +
4 files changed, 732 insertions
Override compound compare and jump instructions
Signed-off-by: Taylor Simpson
---
target/hexagon/helper_overrides.h | 105 ++
1 file changed, 105 insertions(+)
diff --git a/target/hexagon/helper_overrides.h
b/target/hexagon/helper_overrides.h
index 52e4a47
Override dczeroa, allocframe, and return instructions
Signed-off-by: Taylor Simpson
---
target/hexagon/helper_overrides.h | 209 ++
1 file changed, 209 insertions(+)
diff --git a/target/hexagon/helper_overrides.h
b/target/hexagon/helper_overrides.h
index
Lists all the attributes associated with each instruction
Signed-off-by: Taylor Simpson
---
target/hexagon/do_qemu.py | 13 +
1 file changed, 13 insertions(+)
diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py
index 5439964..f297931 100755
--- a/target/hexagon
Declare bitfields within registers such as user status register (USR)
Signed-off-by: Taylor Simpson
---
target/hexagon/reg_fields.c | 28 +++
target/hexagon/reg_fields.h | 40 +++
target/hexagon/reg_fields_def.h | 109
3
The Hexagon disassembler calls disassemble_hexagon to decode a packet
and format it for printing
Signed-off-by: Taylor Simpson
---
disas/Makefile.objs | 1 +
disas/hexagon.c | 56 +
include/disas/dis-asm.h | 1 +
3 files changed, 58
Signed-off-by: Taylor Simpson
---
target/hexagon/printinsn.c | 93 ++
target/hexagon/printinsn.h | 26 +
2 files changed, 119 insertions(+)
create mode 100644 target/hexagon/printinsn.c
create mode 100644 target/hexagon/printinsn.h
diff
Signed-off-by: Taylor Simpson
---
target/hexagon/hex_regs.h | 97 +++
1 file changed, 97 insertions(+)
create mode 100644 target/hexagon/hex_regs.h
diff --git a/target/hexagon/hex_regs.h b/target/hexagon/hex_regs.h
new file mode 100644
index 000
Define types used in files imported from the Hexagon architecture library
Signed-off-by: Taylor Simpson
---
target/hexagon/hex_arch_types.h | 42 +
1 file changed, 42 insertions(+)
create mode 100644 target/hexagon/hex_arch_types.h
diff --git a/target
GDB register read and write routines
Signed-off-by: Taylor Simpson
---
target/hexagon/cpu.c | 3 +++
target/hexagon/gdbstub.c | 49
2 files changed, 52 insertions(+)
create mode 100644 target/hexagon/gdbstub.c
diff --git a/target/hexagon
Certain operand types represent a non-contiguous set of values.
For example, the compound compare-and-jump instruction can only access
registers R0-R7 and R16-23.
This table represents the mapping from the encoding to the actual values.
Signed-off-by: Taylor Simpson
---
target/hexagon/regmap.h
Implementation of Linux user emulation for RISC-V
Some common files modified in addition to new files in linux-user/hexagon
Signed-off-by: Taylor Simpson
---
linux-user/elfload.c| 16 ++
linux-user/hexagon/cpu_loop.c | 173 ++
linux-user/hexagon/signal.c
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr.c | 1 +
target/hexagon/genptr_helpers.h | 189
2 files changed, 190 insertions(+)
diff --git a/target/hexagon/genptr.c b/target/hexagon/genptr.c
index 30319b5..3da0018 100644
--- a/target
Helpers for store instructions
Signed-off-by: Taylor Simpson
---
target/hexagon/genptr_helpers.h | 77 +
1 file changed, 77 insertions(+)
diff --git a/target/hexagon/genptr_helpers.h b/target/hexagon/genptr_helpers.h
index b780522..27f965a 100644
Various forms of declare, read, write, free for HVX operands
Signed-off-by: Taylor Simpson
---
target/hexagon/mmvec/macros.h | 232 ++
1 file changed, 232 insertions(+)
create mode 100644 target/hexagon/mmvec/macros.h
diff --git a/target/hexagon/mmvec
Functions to support scatter/gather
Signed-off-by: Taylor Simpson
---
target/hexagon/mmvec/system_ext_mmvec.c | 265
target/hexagon/mmvec/system_ext_mmvec.h | 38 +
2 files changed, 303 insertions(+)
create mode 100644 target/hexagon/mmvec
Reviewed-by: Taylor Simpson
> -Original Message-
> From: Richard Henderson
> Sent: Tuesday, February 11, 2020 8:52 PM
> To: qemu-devel@nongnu.org
> Cc: peter.mayd...@linaro.org; alex.ben...@linaro.org; Taylor Simpson
>
> Subject: [PATCH 1/2] tcg: Add tcg_gen_
Reviewed-by: Taylor Simpson
> -Original Message-
> From: Richard Henderson
> Sent: Tuesday, February 11, 2020 8:52 PM
> To: qemu-devel@nongnu.org
> Cc: peter.mayd...@linaro.org; alex.ben...@linaro.org; Taylor Simpson
>
> Subject: [PATCH 2/2] target/arm: Use tcg_g
> -Original Message-
> From: Philippe Mathieu-Daudé
> Sent: Tuesday, February 11, 2020 1:41 AM
> To: Taylor Simpson ; qemu-devel@nongnu.org
> Cc: richard.hender...@linaro.org; laur...@vivier.eu; riku.voi...@iki.fi;
> aleksandar.m.m...@gmail.com
> Subject: Re: [RFC
Tested-by: Taylor Simpson
> -Original Message-
> From: Laurent Vivier
> Sent: Wednesday, February 12, 2020 6:57 AM
> To: qemu-devel@nongnu.org
> Cc: Aleksandar Markovic ; Laurent Vivier
> ; Matus Kysel ;
> milos.stojano...@rt-rk.com; Riku Voipio ; Josh Kunz
>
Define EM_HEXAGON 164
Signed-off-by: Taylor Simpson
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
---
include/elf.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/elf.h b/include/elf.h
index 8fbfe60..d51e7d4 100644
--- a/include/elf.h
+++ b/include/elf.h
Gives a list of all the opcodes
Signed-off-by: Taylor Simpson
---
target/hexagon/do_qemu.py | 12
1 file changed, 12 insertions(+)
diff --git a/target/hexagon/do_qemu.py b/target/hexagon/do_qemu.py
index 3f52ef3..107e1e8 100755
--- a/target/hexagon/do_qemu.py
+++ b/target/hexagon
Signed-off-by: Taylor Simpson
---
target/hexagon/hex_regs.h | 99 +++
1 file changed, 99 insertions(+)
create mode 100644 target/hexagon/hex_regs.h
diff --git a/target/hexagon/hex_regs.h b/target/hexagon/hex_regs.h
new file mode 100644
index 000
The insn_t and packet_t are the interface between instruction decoding and
TCG code generation
Signed-off-by: Taylor Simpson
---
target/hexagon/insn.h | 133 ++
1 file changed, 133 insertions(+)
create mode 100644 target/hexagon/insn.h
diff
Signed-off-by: Taylor Simpson
---
target/hexagon/printinsn.h | 26 +
target/hexagon/printinsn.c | 91 ++
2 files changed, 117 insertions(+)
create mode 100644 target/hexagon/printinsn.h
create mode 100644 target/hexagon/printinsn.c
diff
extenders
Separate subinsn's into two instructions
Break compare-jumps into two instructions
Create instructions for :endloop
Signed-off-by: Taylor Simpson
---
target/hexagon/decode.h | 39 +++
target/hexagon/decode.c | 769
target
Used to determine legal VLIW slots for each instruction
Signed-off-by: Taylor Simpson
---
target/hexagon/iclass.h | 46 +
target/hexagon/iclass.c | 107
2 files changed, 153 insertions(+)
create mode 100644 target/hexagon
Python script that emits the decode tree in dectree_generated.h.
Tested-by: Philippe Mathieu-Daudé
---
target/hexagon/dectree.py | 353 ++
1 file changed, 353 insertions(+)
create mode 100755 target/hexagon/dectree.py
diff --git
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