of
a mandatory 64MB one to save memory.
Signed-off-by: Xiang Zheng
---
This patch might be insufficient since it also needs to modify the flash size
in ACPI and DTB.
BTW, I don't understand why it requires the two NOR images to be exactly 64MB
in size when using -pflash.
---
hw/arm/virt.c | 11
Hi Laszlo and Markus,
Thanks for your useful suggestions and comments! :)
On 2019/3/27 2:36, Markus Armbruster wrote:
> Laszlo Ersek writes:
>
>> On 03/26/19 17:39, Markus Armbruster wrote:
>>> Laszlo Ersek writes:
>>
With the dynamic sizing in QEMU (which, IIRC, I had originally
On 2019/4/3 23:35, Laszlo Ersek wrote:
>> I thought about your comments and wrote the following patch (just for test)
>> which uses a file mapping to replace the anonymous mapping. UEFI seems to
>> work
>> fine. So why not use a file mapping to read or write a pflash device?
> Honestly I can't
There is a small window between the twice blk_is_available in
scsi_disk_emulate_command which would cause crash due to the later
assertion if the remote cdrom is detached in this window.
So this patch replaces assertions with return to avoid qemu crash.
Signed-off-by: Xiang Zheng
---
The qemu
Hi Kevin,
On 2019/4/9 16:28, Kevin Wolf wrote:
> Am 09.04.2019 um 08:01 hat Markus Armbruster geschrieben:
>> László's last sentence below is "This really needs the attention of the
>> block people." Cc'ing some.
>>
>> Laszlo Ersek writes:
>&g
On 2019/4/9 0:14, Laszlo Ersek wrote:
> On 04/08/19 15:43, Xiang Zheng wrote:
>>
>> On 2019/4/3 23:35, Laszlo Ersek wrote:
>>>> I thought about your comments and wrote the following patch (just for test)
>>>> which uses a file mapping to replace the anon
On 2019/4/12 9:52, Xiang Zheng wrote:
> On 2019/4/11 20:22, Kevin Wolf wrote:
>> Okay, so your problem is that blk_pread() writes to the whole buffer,
>> writing explicit zeroes for unallocated parts of the image, while you
>> would like to leave those parts of the buffer
On 2019/4/11 15:15, Markus Armbruster wrote:
>> For some historical reasons such as compatibility and extensibility[2], we
>> restrict both their size to 64MB -- both UEFI and qemu have cold hard
>> constants.
> These reasons aren't historical. But they're valid, and that's all that
> matters
On 2019/4/12 18:57, Kevin Wolf wrote:
> Am 12.04.2019 um 11:50 hat Xiang Zheng geschrieben:
>>
>> On 2019/4/12 9:52, Xiang Zheng wrote:
>>> On 2019/4/11 20:22, Kevin Wolf wrote:
>>>> Okay, so your problem is that blk_pread() writes to the whole buffer,
>>
ds reading the former, but
>>> still reads the latter.
>>>
>>> Xiang Zheng writes:
>>>
>>>> Currently we fill the memory space with two 64MB NOR images when
>>>> using persistent UEFI variables on virt board. Actually we only use
>>>&
On 2019/5/10 23:16, Markus Armbruster wrote:
> Xiang Zheng writes:
>
>> On 2019/5/9 19:59, Markus Armbruster wrote:
>>> Xiang Zheng writes:
>>>
>>>> On 2019/5/8 21:20, Markus Armbruster wrote:
>>>>> Laszlo Ersek writes:
>&g
On 2019/5/9 19:59, Markus Armbruster wrote:
> Xiang Zheng writes:
>
>> On 2019/5/8 21:20, Markus Armbruster wrote:
>>> Laszlo Ersek writes:
>>>
>>>> Hi Markus,
>>>>
>>>> On 05/07/19 20:01, Markus Armbruster wrote:
>
On 2019/5/5 23:37, Peter Maydell wrote:
> On Sun, 5 May 2019 at 08:02, Xiang Zheng wrote:
>>
>> Currently we fill the memory space with two 64MB NOR images when
>> using persistent UEFI variables on virt board. Actually we only use
>> a very small(non-zero) part o
the non-zero part
into memory. This requires pflash devices to use sparse files for
backends.
Suggested-by: Kevin Wolf
Signed-off-by: Xiang Zheng
---
hw/block/block.c | 40 +++-
1 file changed, 39 insertions(+), 1 deletion(-)
diff --git a/hw/block/block.c b/hw
Ping?
On 2019/4/15 10:39, Xiang Zheng wrote:
> On 2019/4/12 18:57, Kevin Wolf wrote:
>> Am 12.04.2019 um 11:50 hat Xiang Zheng geschrieben:
>>>
>>> On 2019/4/12 9:52, Xiang Zheng wrote:
>>>> On 2019/4/11 20:22, Kevin Wolf wrote:
>>>>> Okay, s
On 2019/4/11 20:22, Kevin Wolf wrote:
> Okay, so your problem is that blk_pread() writes to the whole buffer,
> writing explicit zeroes for unallocated parts of the image, while you
> would like to leave those parts of the buffer untouched so that we don't
> actually allocate the memory, but can
From: Dongjiu Geng
Support RAS Virtualization feature since version 4.2, disable it by
default in the old versions. Also add a machine option which allows user
to enable it explicitly.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
hw/arm/virt.c | 33
.
The ESR_ELx.DFSC is set to synchronous external abort(0x10), and
ESR_ELx.FnV is set to not valid(0x1), which will tell guest that FAR is
not valid and hold an UNKNOWN value. These values will be set to KVM
register structures through KVM_SET_ONE_REG IOCTL.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
From: Dongjiu Geng
Add APEI/GHES detailed design document
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
docs/specs/acpi_hest_ghes.txt | 88 +++
1 file changed, 88 insertions(+)
create mode 100644 docs/specs/acpi_hest_ghes.txt
diff --git a/docs
In the ARMv8 platform, the CPU error types are synchronous external abort(SEA)
and SError Interrupt (SEI). If exception happens in guest, sometimes it's better
for guest to perform the recovery, because host does not know the detailed
information of guest. For example, if an exception happens in a
to
handle the memory errors.
This patch follows the spec ACPI 6.2 to build the Hardware Error Source
table. For more detailed information, please refer to document:
docs/specs/acpi_hest_ghes.txt
Suggested-by: Laszlo Ersek
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
default
is delivered to
Qemu, Qemu records this error address into guest APEI GHES memory and
notifes guest using Synchronous-External-Abort(SEA).
Suggested-by: James Morse
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
hw/acpi/acpi_ghes.c | 252
From: Dongjiu Geng
kvm_hwpoison_page_add() and kvm_unpoison_all() will both be used by X86
and ARM platforms, so moving them into "include/sysemu/kvm_int.h" to
avoid duplicate code.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
accel/kvm/kvm-all.c
Hi all,
This patch series has been tested for both TCG and KVM scenes.
1) Test for TCG:
- Re-compile qemu after applying the patch refered to
https://patchwork.kernel.org/cover/10942757/#22640271).
- Use command line shown below to start qemu:
./qemu-system-aarch64 \
Hi Peter, thanks for your review!
On 2019/9/19 21:25, Peter Maydell wrote:
> On Fri, 6 Sep 2019 at 09:33, Xiang Zheng wrote:
>>
>> From: Dongjiu Geng
>>
>> Add APEI/GHES detailed design document
>>
>> Signed-off-by: Dongjiu Geng
>> Sign
On 2019/9/27 22:02, Peter Maydell wrote:
> On Fri, 6 Sep 2019 at 09:33, Xiang Zheng wrote:
>>
>> From: Dongjiu Geng
>>
>> Support RAS Virtualization feature since version 4.2, disable it by
>> default in the old versions. Also add a machine option which allow
On 2019/10/27 18:14, Michael S. Tsirkin wrote:
> On Sat, Oct 26, 2019 at 11:24:45AM +0800, Xiang Zheng wrote:
>> From: Dongjiu Geng
>>
>> This patch implements APEI GHES Table generation via fw_cfg blobs. Now
>> it only supports ARMv8 SEA, a type of GHESv2 error so
From: Dongjiu Geng
Add APEI/GHES detailed design document
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
Reviewed-by: Michael S. Tsirkin
---
docs/specs/acpi_hest_ghes.rst | 95 +++
docs/specs/index.rst | 1 +
2 files changed, 96 insertions
From: Dongjiu Geng
I and Xiang are willing to review the APEI-related patches and
volunteer as the reviewers for the APEI/GHES part.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
From: Dongjiu Geng
RAS Virtualization feature is not supported now, so add a RAS machine
option and disable it by default.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
hw/arm/virt.c | 23 +++
include/hw/arm/virt.h | 1 +
2 files changed, 24
On 2019/11/8 16:11, gengdongjiu wrote:
> On 2019/11/4 20:14, Xiang Zheng wrote:
>> From: Dongjiu Geng
>>
>> This patch implements APEI GHES Table generation via fw_cfg blobs. Now
>> it only supports ARMv8 SEA, a type of GHESv2 error source. Afterwards,
>>
will be set to KVM
register structures through KVM_SET_ONE_REG IOCTL.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
Reviewed-by: Michael S. Tsirkin
---
hw/acpi/acpi_ghes.c | 297
include/hw/acpi/acpi_ghes.h | 4 +
include/sysemu/kvm.h| 3
to
handle the memory errors.
This patch follows the spec ACPI 6.2 to build the Hardware Error Source
table. For more detailed information, please refer to document:
docs/specs/acpi_hest_ghes.rst
Suggested-by: Laszlo Ersek
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
Reviewed
, so let's register the
kvm_unpoison_all() function in the generic kvm_init() function.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
accel/kvm/kvm-all.c | 36
include/sysemu/kvm_int.h | 12
target/i386/kvm.c
In the ARMv8 platform, the CPU error types are synchronous external abort(SEA)
and SError Interrupt (SEI). If exception happens in guest, sometimes it's better
for guest to perform the recovery, because host does not know the detailed
information of guest. For example, if an exception happens in a
The default machine type on aarch64 is not set which causes error in
qtest_init(). Here we use the "virt" machine as the default machine
type on aarch64.
Signed-off-by: Xiang Zheng
---
tests/fw_cfg-test.c | 65 +++--
1 file changed, 51 inserti
Rename pc_fw_cfg_* to fw_cfg_* to make them common for other
architectures so that we can run fw_cfg tests on aarch64.
Signed-off-by: Xiang Zheng
---
tests/fw_cfg-test.c | 48
tests/hd-geo-test.c | 6 ++---
tests/libqos/fw_cfg.h| 20
There are quite a few tests disabled on AArch64 such as fw_cfg-tests.
This patch series fix some problems in test code and adapt it to
virt machine.
Xiang Zheng (5):
tests: fw_cfg: Rename pc_fw_cfg_* to fw_cfg_*
tests: fw_cfg: Support read/write of fw_cfg registers on aarch64
tests: fw_cfg
I'm not sure whether it's neccesary to add FW_CFG_RAM_SIZE and
FW_CFG_MAX_CPUS into fw_cfg on virt machine. This patch just makes
the fw_cfg-test happy.
Signed-off-by: Xiang Zheng
---
hw/arm/virt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index
On 2019/11/27 22:17, Beata Michalska wrote:
> On Wed, 27 Nov 2019 at 13:03, Igor Mammedov wrote:
>>
>> On Wed, 27 Nov 2019 20:47:15 +0800
>> Xiang Zheng wrote:
>>
>>> Hi Beata,
>>>
>>> Thanks for you review!
>>>
>>> On 20
On 2019/11/27 22:17, Beata Michalska wrote:
> Hi
>
> On Wed, 27 Nov 2019 at 12:47, Xiang Zheng wrote:
>>
>> Hi Beata,
>>
>> Thanks for you review!
>>
> YAW
>
>> On 2019/11/22 23:47, Beata Michalska wrote:
>>> Hi,
>>>
Now turn on the fw_cfg test for aarch64.
Signed-off-by: Xiang Zheng
---
tests/Makefile.include | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/Makefile.include b/tests/Makefile.include
index 8566f5f119..180e0ed2b7 100644
--- a/tests/Makefile.include
+++ b/tests/Makefile.include
Refer to the fw_cfg registers locations of x86 and arm in
docs/specs/fw_cfg.txt, the test codes need to differ on the addresses
for read/write.
Besides, fix the endian problems in mm_fw_cfg_select().
Signed-off-by: Xiang Zheng
---
tests/libqos/fw_cfg.c | 17 +++--
1 file changed
to
handle the memory errors.
This patch follows the spec ACPI 6.2 to build the Hardware Error Source
table. For more detailed information, please refer to document:
docs/specs/acpi_hest_ghes.rst
Suggested-by: Laszlo Ersek
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
default
, so let's register the
kvm_unpoison_all() function in the generic kvm_init() function.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
accel/kvm/kvm-all.c | 36
include/sysemu/kvm_int.h | 12
target/i386/kvm.c
will be set to KVM
register structures through KVM_SET_ONE_REG IOCTL.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
hw/acpi/acpi_ghes.c | 259
include/hw/acpi/acpi_ghes.h | 42 +++
include/sysemu/kvm.h| 3 +-
target/arm
From: Dongjiu Geng
RAS Virtualization feature is not supported now, so add a RAS machine
option and disable it by default.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
hw/arm/virt.c | 23 +++
include/hw/arm/virt.h | 1 +
2 files changed, 24
From: Dongjiu Geng
Add APEI/GHES detailed design document
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
docs/specs/acpi_hest_ghes.rst | 94 +++
docs/specs/index.rst | 1 +
2 files changed, 95 insertions(+)
create mode 100644
In the ARMv8 platform, the CPU error types are synchronous external abort(SEA)
and SError Interrupt (SEI). If exception happens in guest, sometimes it's better
for guest to perform the recovery, because host does not know the detailed
information of guest. For example, if an exception happens in a
On 2019/10/27 18:17, Michael S. Tsirkin wrote:
> On Sat, Oct 26, 2019 at 11:24:42AM +0800, Xiang Zheng wrote:
>> In the ARMv8 platform, the CPU error types are synchronous external
>> abort(SEA)
>> and SError Interrupt (SEI). If exception happens in guest, some
On 2019/10/15 23:08, Peter Maydell wrote:
> On Tue, 15 Oct 2019 at 15:02, Xiang Zheng wrote:
>>
>> From: Dongjiu Geng
>>
>> Add APEI/GHES detailed design document
>>
>> Signed-off-by: Dongjiu Geng
>> Signed-off-by: Xiang Zheng
On 2019/10/15 22:48, Peter Maydell wrote:
> On Tue, 15 Oct 2019 at 15:02, Xiang Zheng wrote:
>>
>> From: Dongjiu Geng
>>
>> Add a SIGBUS signal handler. In this handler, it checks the SIGBUS type,
>> translates the host VA delivered by host to guest PA, th
On 2019/10/15 22:52, Peter Maydell wrote:
> On Tue, 15 Oct 2019 at 15:02, Xiang Zheng wrote:
>>
>> From: Dongjiu Geng
>>
>> This patch implements APEI GHES Table generation via fw_cfg blobs. Now
>> it only supports ARMv8 SEA, a type of GHESv2 error sou
From: Dongjiu Geng
RAS Virtualization feature is not supported now, so add a RAS machine
option and disable it by default.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
hw/arm/virt.c | 23 +++
include/hw/arm/virt.h | 1 +
2 files changed, 24
In the ARMv8 platform, the CPU error types are synchronous external abort(SEA)
and SError Interrupt (SEI). If exception happens in guest, sometimes it's better
for guest to perform the recovery, because host does not know the detailed
information of guest. For example, if an exception happens in a
From: Dongjiu Geng
Add APEI/GHES detailed design document
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
docs/specs/acpi_hest_ghes.rst | 95 +++
docs/specs/index.rst | 1 +
2 files changed, 96 insertions(+)
create mode 100644 docs/specs
will be set to KVM
register structures through KVM_SET_ONE_REG IOCTL.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
hw/acpi/acpi_ghes.c | 259
include/hw/acpi/acpi_ghes.h | 42 ++
include/sysemu/kvm.h| 3 +-
target/arm/cpu.h
to
handle the memory errors.
This patch follows the spec ACPI 6.2 to build the Hardware Error Source
table. For more detailed information, please refer to document:
docs/specs/acpi_hest_ghes.rst
Suggested-by: Laszlo Ersek
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
default
, so let's register the
kvm_unpoison_all() function in the generic kvm_init() function.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
accel/kvm/kvm-all.c | 36
include/sysemu/kvm_int.h | 12
target/i386/kvm.c
Hi Igor,
Thanks for your review!
Since the series of patches are going to be merged, we will address your
comments by follow up patches.
On 2019/11/15 17:44, Igor Mammedov wrote:
> On Mon, 11 Nov 2019 09:40:44 +0800
> Xiang Zheng wrote:
>
>> From: Dongjiu Geng
>>
>
Hi,
On 2019/11/16 0:37, Igor Mammedov wrote:
> On Mon, 11 Nov 2019 09:40:47 +0800
> Xiang Zheng wrote:
>
>> From: Dongjiu Geng
>>
>> Add a SIGBUS signal handler. In this handler, it checks the SIGBUS type,
>> translates the host VA delivered by host to guest P
will be set to KVM
register structures through KVM_SET_ONE_REG IOCTL.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
hw/acpi/acpi_ghes.c | 297
include/hw/acpi/acpi_ghes.h | 4 +
include/sysemu/kvm.h| 3 +-
target/arm/cpu.h
to
handle the memory errors.
This patch follows the spec ACPI 6.2 to build the Hardware Error Source
table. For more detailed information, please refer to document:
docs/specs/acpi_hest_ghes.rst
Suggested-by: Laszlo Ersek
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
default
From: Dongjiu Geng
Add APEI/GHES detailed design document
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
docs/specs/acpi_hest_ghes.rst | 95 +++
docs/specs/index.rst | 1 +
2 files changed, 96 insertions(+)
create mode 100644 docs/specs
, so let's register the
kvm_unpoison_all() function in the generic kvm_init() function.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
accel/kvm/kvm-all.c | 36
include/sysemu/kvm_int.h | 12
target/i386/kvm.c
From: Dongjiu Geng
I and Xiang are willing to review the APEI-related patches and
volunteer as the reviewers for the APEI/GHES part.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
From: Dongjiu Geng
RAS Virtualization feature is not supported now, so add a RAS machine
option and disable it by default.
Signed-off-by: Dongjiu Geng
Signed-off-by: Xiang Zheng
---
hw/arm/virt.c | 23 +++
include/hw/arm/virt.h | 1 +
2 files changed, 24
In the ARMv8 platform, the CPU error types are synchronous external abort(SEA)
and SError Interrupt (SEI). If exception happens in guest, sometimes it's better
for guest to perform the recovery, because host does not know the detailed
information of guest. For example, if an exception happens in a
Hi Beata,
Thanks for you review!
On 2019/11/22 23:47, Beata Michalska wrote:
> Hi,
>
> On Mon, 11 Nov 2019 at 01:48, Xiang Zheng wrote:
>>
>> From: Dongjiu Geng
>>
>> Add a SIGBUS signal handler. In this handler, it checks the SIGBUS type,
>> translates
Hi Michael,
Thanks for your review!
On 2019/9/27 23:43, Michael S. Tsirkin wrote:
> On Fri, Sep 06, 2019 at 04:31:49PM +0800, Xiang Zheng wrote:
>> From: Dongjiu Geng
>>
>> This patch implements APEI GHES Table generation via fw_cfg blobs. Now
>> it only supports
On 2019/9/27 21:19, Peter Maydell wrote:
> On Fri, 6 Sep 2019 at 09:33, Xiang Zheng wrote:
>>
>> From: Dongjiu Geng
>>
>> kvm_hwpoison_page_add() and kvm_unpoison_all() will both be used by X86
>> and ARM platforms, so moving them into "include/sysemu
On 2019/9/27 21:33, Peter Maydell wrote:
> On Fri, 6 Sep 2019 at 09:33, Xiang Zheng wrote:
>>
>> From: Dongjiu Geng
>>
>> Introduce kvm_inject_arm_sea() function in which we will setup the type
>> of exception and the syndrome information in order to inject
Hi Igor,
Thanks for your review!
On 2019/10/4 16:20, Igor Mammedov wrote:
> On Fri, 6 Sep 2019 16:31:48 +0800
> Xiang Zheng wrote:
>
>> From: Dongjiu Geng
>>
> [...]
>> +
>> +(9) When QEMU gets SIGBUS from the kernel, QEMU formats the CPER right into
&g
On 2019/9/27 21:57, Peter Maydell wrote:
> On Fri, 6 Sep 2019 at 09:33, Xiang Zheng wrote:
>>
>> From: Dongjiu Geng
>>
>> Add a SIGBUS signal handler. In this handler, it checks the SIGBUS type,
>> translates the host VA delivered by host to guest PA, then fi
On 2019/10/8 15:45, Michael S. Tsirkin wrote:
> On Tue, Oct 08, 2019 at 02:00:56PM +0800, Xiang Zheng wrote:
>> Hi Michael,
>>
>> Thanks for your review!
>>
>> On 2019/9/27 23:43, Michael S. Tsirkin wrote:
>>> On Fri, Sep 06, 2019 at 04:31:49PM +0800,
On 2019/12/3 20:32, Peter Maydell wrote:
> On Tue, 3 Dec 2019 at 12:29, Xiang Zheng wrote:
>>
>> I'm not sure whether it's neccesary to add FW_CFG_RAM_SIZE and
>> FW_CFG_MAX_CPUS into fw_cfg on virt machine. This patch just makes
>> the fw_cfg-test happy.
>&
On 2019/12/3 20:34, Peter Maydell wrote:
> On Tue, 3 Dec 2019 at 12:29, Xiang Zheng wrote:
>>
>> Rename pc_fw_cfg_* to fw_cfg_* to make them common for other
>> architectures so that we can run fw_cfg tests on aarch64.
>>
>> Signed-off-by: Xiang Z
On 2019/12/3 21:01, Thomas Huth wrote:
> On 03/12/2019 13.27, Xiang Zheng wrote:
>> There are quite a few tests disabled on AArch64 such as fw_cfg-tests.
>> This patch series fix some problems in test code and adapt it to
>> virt machine.
>>
>> Xiang Zhen
Hi Kirti and Yan,
How can I test this patch series on my SR-IOV devices?
I have looked through Yan's pathes for i40e VF live migration support：
https://patchwork.kernel.org/patch/11375177/
However, I cannot find the detailed implementation about device state
saving/restoring and
Thank you very much, Kirti and Yan!
On 2020/5/18 11:36, Yan Zhao wrote:
> On Mon, May 18, 2020 at 10:39:52AM +0800, Xiang Zheng wrote:
>> Hi Kirti and Yan,
>>
>> How can I test this patch series on my SR-IOV devices?
>> I have looked through Yan's pathes for i40
Hi Alex,
Thank you for your suggestion.
On 2020/7/22 6:43, Alex Williamson wrote:
> On Tue, 21 Jul 2020 10:43:21 +0800
> Xiang Zheng wrote:
>
>> Hi Kirti,
>>
>> Sorry to disturb you since this patch set has been merged, and I cannot
>> receive the qemu
Hi Kirti,
Sorry to disturb you since this patch set has been merged, and I cannot
receive the qemu-side emails about this patch set.
We are going to support migration for VFIO devices which support dirty
pages tracking.
And we also plan to leverage SMMU HTTU feature to do the dirty pages
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