Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/Kconfig | 4 ++
hw/loongarch/fw_cfg.c| 33 ++
hw/loongarch/fw_cfg.h| 15 +++
hw/loongarch/loongson3.c | 76 +++-
hw/loongarch
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu-csr.h | 236 +
target/loongarch/cpu.c | 35 ++
target/loongarch/cpu.h | 57 +
3 files changed, 328 insertions(+)
create mode 100644 target/loongarch/cpu-csr.h
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 8 +++
docs/system/loongarch/loongson3.rst | 37 +
target/loongarch/README | 28 ++
3 files changed, 73 insertions(+)
create mode
This includes:
- TLBSRCH
- TLBRD
- TLBWR
- TLBFILL
- TLBCLR
- TLBFLUSH
- INVTLB
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/disas.c | 17 +
target/loongarch/helper.h | 12 +
.../insn_trans/trans_privileged.c.inc
This includes:
-RDTIME{L/H}.W
-RDTIME.D
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/helper.h | 1 +
target/loongarch/insn_trans/trans_extra.c.inc | 32 +++
target/loongarch/op_helper.c | 6
target
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 3 ++
target/loongarch/internals.h | 4 ++
target/loongarch/machine.c | 85
target/loongarch/meson.build | 6 +++
4 files changed, 98
This patch add ls7a rtc device support.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS| 1 +
hw/loongarch/Kconfig | 1 +
hw/loongarch/loongson3.c | 4 +
hw/rtc/Kconfig | 3 +
hw/rtc/ls7a_rtc.c | 323
This patch realize the IPI interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 2 +
hw/intc/Kconfig | 3 +
hw/intc/loongarch_ipi.c | 164
hw/intc/meson.build
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
softmmu/qdev-monitor.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 01f3834db5..49491d74a1 100644
--- a/softmmu/qdev-monitor.c
+++ b/softmmu/qdev-monitor.c
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu-param.h | 2 +-
target/loongarch/cpu.c| 30
target/loongarch/cpu.h| 42 -
target/loongarch/internals.h | 9 +
target/loongarch/machine.c| 17 ++
target/loongarch/meson.build
This includes:
- IOCSR{RD/WR}.{B/H/W/D}
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.h| 4 +
target/loongarch/disas.c | 8 +
target/loongarch/helper.h | 2 +
.../insn_trans
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
qapi/machine-target.json | 6 --
target/loongarch/cpu.c | 26 ++
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/qapi/machine-target.json b/qapi/machine
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c | 81
include/hw/loongarch/loongarch.h | 5 ++
2 files changed, 86 insertions(+)
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
index 2795fcc895
This patch add the irq hierarchy for the virt board.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS| 1 +
hw/loongarch/loongson3.c | 99 ++
include/hw/pci-host/ls7a.h | 30
3 files changed, 130 insertions
This includes:
- CSRRD
- CSRWR
- CSRXCHG
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.h| 88
target/loongarch/csr_helper.c | 112
target/loongarch/disas.c | 15
are emulated.
More detailed info you can see
https://github.com/loongson/LoongArch-Documentation
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 3 +
.../devices/loongarch64-softmmu/default.mak | 3 +
configs/targets/loongarch64
1.Add uart,virtio-net,vga and usb for 3A5000.
2.Add irq set and map for the pci host. Non pci device
use irq 0-16, pci device use 16-64.
3.Add some unimplented device to emulate guest unused
memory space.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/Kconfig | 7
This patch add ls7a rtc device support.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS| 1 +
hw/loongarch/Kconfig | 1 +
hw/loongarch/loongson3.c | 4 +
hw/rtc/Kconfig | 3 +
hw/rtc/ls7a_rtc.c | 323
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 8 +++
docs/system/loongarch/loongson3.rst | 37 +
target/loongarch/README | 28 ++
3 files changed, 73 insertions(+)
create mode
This includes:
-CACOP
-LDDIR
-LDPTE
-ERTN
-DBCL
-IDLE
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.h| 2 +
target/loongarch/disas.c | 17
target/loongarch/helper.h | 4 +
.../insn_trans
are emulated.
More detailed info you can see
https://github.com/loongson/LoongArch-Documentation
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 3 +
.../devices/loongarch64-softmmu/default.mak | 3 +
configs/targets/loongarch64
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 2 +
configs/targets/loongarch64-softmmu.mak | 1 +
gdb-xml/loongarch-base64.xml| 44 +++
gdb-xml/loongarch-fpu64.xml | 57 ++
target/loongarch/cpu.c
son.git/tree/Documentation/loongarch?h=loongarch-next
2.https://github.com/loongson/LoongArch-Documentation
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/hw/loongarch/loongson3.c b/hw/loongar
Add a simple acpi model for LoongArch cpu
More complex functions will be added later
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 2 +
hw/acpi/Kconfig | 4 +
hw/acpi/ls7a.c | 374 ++
hw/acpi
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu-param.h | 2 +-
target/loongarch/cpu.c| 30
target/loongarch/cpu.h| 42 -
target/loongarch/internals.h | 9 +
target/loongarch/machine.c| 17 ++
target/loongarch/meson.build
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/Kconfig | 4 ++
hw/loongarch/fw_cfg.c| 33 ++
hw/loongarch/fw_cfg.h| 15 +++
hw/loongarch/loongson3.c | 76 +++-
hw/loongarch
This includes:
- TLBSRCH
- TLBRD
- TLBWR
- TLBFILL
- TLBCLR
- TLBFLUSH
- INVTLB
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/disas.c | 17 +
target/loongarch/helper.h | 12 +
.../insn_trans/trans_privileged.c.inc
This patch add the irq hierarchy for the virt board.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS| 1 +
hw/loongarch/loongson3.c | 99 ++
include/hw/pci-host/ls7a.h | 30
3 files changed, 130 insertions
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/Kconfig | 1 +
hw/loongarch/loongson3.c | 43
include/hw/loongarch/loongarch.h | 1 +
3 files changed, 45 insertions(+)
diff --git a/hw/loongarch/Kconfig b/hw/loongarch
This patch realize the IPI interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 2 +
hw/intc/Kconfig | 3 +
hw/intc/loongarch_ipi.c | 164
hw/intc/meson.build
- We write a very minimal softmmu harness.
- This is a very simple smoke test with no need to run a full Linux/kernel.
- The Makefile.softmmu-target record the rule to run.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
MAINTAINERS | 1 +
tests/tcg
This includes:
- IOCSR{RD/WR}.{B/H/W/D}
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.h| 4 +
target/loongarch/disas.c | 8 +
target/loongarch/helper.h | 2 +
.../insn_trans
1.This patch Add loongarch interrupt and exception handle.
2.Rename the user excp to the exccode from the csr defintions.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
linux-user/loongarch64/cpu_loop.c | 8 +-
target/loongarch/cpu.c| 260
Add tree nodes for 3A5000 device tree.
- cpu nodes;
- fw_cfg nodes;
- pcie nodes.
The lastest loongarch bios have supported fdt.
- https://github.com/loongson/edk2
- https://github.com/loongson/edk2-platforms
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c
This includes:
- CSRRD
- CSRWR
- CSRXCHG
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.h| 88
target/loongarch/csr_helper.c | 112
target/loongarch/disas.c | 15
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/constant_timer.c | 62 +++
target/loongarch/cpu.h| 10 +
target/loongarch/meson.build | 1 +
3 files changed, 73 insertions(+)
create mode 100644 target/loongarch
This patch realize PCH-MSI interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig | 5 ++
hw/intc/loongarch_pch_msi.c | 75 +
hw/intc/meson.build | 1 +
hw/intc/trace-events
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c | 81
include/hw/loongarch/loongarch.h | 5 ++
2 files changed, 86 insertions(+)
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
index 2795fcc895
This patch realize the EIOINTC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig| 3 +
hw/intc/loongarch_extioi.c | 408 +
hw/intc/meson.build| 1 +
hw/intc/trace-events
me emulate errors when use the kernel from the github.
5.Adjust some format problem and the Naming problem
6.Others mainly follow Richard's code review comments.
Please help review!
Thanks
Xiaojuan Yang (29):
target/loongarch: Add system emulation introduction
target/loongarch: Add CSRs definitio
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu-csr.h | 236 +
target/loongarch/cpu.c | 35 ++
target/loongarch/cpu.h | 57 +
3 files changed, 328 insertions(+)
create mode 100644 target/loongarch/cpu-csr.h
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
qapi/machine-target.json | 6 --
target/loongarch/cpu.c | 26 ++
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/qapi/machine-target.json b/qapi/machine
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 3 ++
target/loongarch/internals.h | 4 ++
target/loongarch/machine.c | 85
target/loongarch/meson.build | 6 +++
4 files changed, 98
This patch realize the PCH-PIC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig | 4 +
hw/intc/loongarch_pch_pic.c | 488
hw/intc/meson.build | 1 +
hw/intc/trace-events
This includes:
-RDTIME{L/H}.W
-RDTIME.D
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/helper.h | 1 +
target/loongarch/insn_trans/trans_extra.c.inc | 32 +++
target/loongarch/op_helper.c | 6
target
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
softmmu/qdev-monitor.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 12fe60c467..bb5897fc76 100644
--- a/softmmu/qdev-monitor.c
+++ b/softmmu/qdev-monitor.c
ome format problem and the Naming problem
6.Others mainly follow Richard's code review comments.
Please help review!
Thanks
Xiaojuan Yang (30):
target/loongarch: Add system emulation introduction
target/loongarch: Add CSRs definition
target/loongarch: Add basic vmstate description of CPU
This includes:
- TLBSRCH
- TLBRD
- TLBWR
- TLBFILL
- TLBCLR
- TLBFLUSH
- INVTLB
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/disas.c | 17 +
target/loongarch/helper.h | 12 +
.../insn_trans/trans_privileged.c.inc
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/Kconfig | 4
hw/loongarch/fw_cfg.c| 33 ++
hw/loongarch/fw_cfg.h| 15 ++
hw/loongarch/loongson3.c | 35
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c | 81
include/hw/loongarch/loongarch.h | 5 ++
2 files changed, 86 insertions(+)
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
index ef46a5cfc4
This patch add the irq hierarchy for the virt board.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c | 88 ++
include/hw/pci-host/ls7a.h | 13 ++
2 files changed, 101 insertions(+)
diff --git a/hw/loongarch/loongson3
are emulated.
More detailed info you can see
https://github.com/loongson/LoongArch-Documentation
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
.../devices/loongarch64-softmmu/default.mak | 3 +
configs/targets/loongarch64-softmmu.mak | 3 +
hw/Kconfig
This patch realize the EIOINTC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig| 3 +
hw/intc/loongarch_extioi.c | 409 +
hw/intc/meson.build| 1 +
hw/intc/trace-events
Add tree nodes for 3A5000 device tree.
- cpu nodes;
- fw_cfg nodes;
- pcie nodes.
The lastest loongarch bios have supported fdt.
- https://github.com/loongson/edk2
- https://github.com/loongson/edk2-platforms
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c
ome format problem and the Naming problem
6.Others mainly follow Richard's code review comments.
Please help review!
Thanks
Xiaojuan Yang (30):
target/loongarch: Add system emulation introduction
target/loongarch: Add CSRs definition
target/loongarch: Add basic vmstate description of CPU
This includes:
- IOCSR{RD/WR}.{B/H/W/D}
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.c| 8 +
target/loongarch/cpu.h| 4 +
target/loongarch/disas.c | 8 +
target/loongarch/helper.h
son.git/tree/Documentation/loongarch?h=loongarch-next
2.https://github.com/loongson/LoongArch-Documentation
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/hw/loongarch/loongson3.c b/
This patch add ls7a rtc device support.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/Kconfig | 1 +
hw/loongarch/loongson3.c | 4 +
hw/rtc/Kconfig | 3 +
hw/rtc/ls7a_rtc.c | 322 +
hw/rtc
This patch realize the IPI interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig | 3 +
hw/intc/loongarch_ipi.c | 164
hw/intc/meson.build | 1 +
hw/intc/trace-events
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
qapi/machine-target.json | 6 --
target/loongarch/cpu.c | 26 ++
2 files changed, 30 insertions(+), 2 deletions(-)
diff --git a/qapi/machine-target.json b/qapi/machine
interrupt sources.
For more detailed info about ls7a1000 you can see the doc at
https://github.com/loongson/LoongArch-Documentation/releases/latest/
download/Loongson-7A1000-usermanual-2.00-EN.pdf
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/pci-host/Kconfig| 4 +
hw/pci-host
This patch realize the PCH-PIC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig | 4 +
hw/intc/loongarch_pch_pic.c | 488
hw/intc/meson.build | 1 +
hw/intc/trace-events
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu-csr.h | 236 +
target/loongarch/cpu.c | 35 ++
target/loongarch/cpu.h | 57 +
3 files changed, 328 insertions(+)
create mode 100644 target/loongarch/cpu-csr.h
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
docs/system/loongarch/loongson3.rst | 78 +
target/loongarch/README | 28 +++
2 files changed, 106 insertions(+)
create mode 100644 docs/system/loongarch/loongson3.rst
diff --git a/docs
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 3 ++
target/loongarch/internals.h | 4 ++
target/loongarch/machine.c | 85
target/loongarch/meson.build | 6 +++
4 files changed, 98
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/constant_timer.c | 62 +++
target/loongarch/cpu.h| 10 +
target/loongarch/meson.build | 1 +
3 files changed, 73 insertions(+)
create mode 100644 target/loongarch
1.This patch Add loongarch interrupt and exception handle.
2.Rename the user excp to the exccode from the csr defintions.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
linux-user/loongarch64/cpu_loop.c | 8 +-
target/loongarch/cpu.c| 251
This includes:
-RDTIME{L/H}.W
-RDTIME.D
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/helper.h | 1 +
target/loongarch/insn_trans/trans_extra.c.inc | 32 +++
target/loongarch/op_helper.c | 6
target
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
softmmu/qdev-monitor.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 01f3834db5..49491d74a1 100644
--- a/softmmu/qdev-monitor.c
+++ b/softmmu/qdev-monitor.c
Add a simple acpi model for LoongArch cpu
More complex functions will be added later
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/acpi/Kconfig | 4 +
hw/acpi/ls7a.c | 374 ++
hw/acpi/meson.build | 1 +
hw
- We write a very minimal softmmu harness.
- This is a very simple smoke test with no need to run a full Linux/kernel.
- The Makefile.softmmu-target record the rule to run.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
tests/tcg/loongarch64/Makefile.softmmu-target | 33
1.Add uart,virtio-net,vga and usb for 3A5000.
2.Add irq set and map for the pci host. Non pci device
use irq 0-16, pci device use 16-64.
3.Add some unimplented device to emulate guest unused
memory space.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/Kconfig | 7
This includes:
-CACOP
-LDDIR
-LDPTE
-ERTN
-DBCL
-IDLE
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.h| 2 +
target/loongarch/disas.c | 17
target/loongarch/helper.h | 4 +
.../insn_trans
This includes:
- CSRRD
- CSRWR
- CSRXCHG
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.h| 88
target/loongarch/csr_helper.c | 112
target/loongarch/disas.c | 15
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu-param.h | 2 +-
target/loongarch/cpu.c| 30
target/loongarch/cpu.h| 42 -
target/loongarch/internals.h | 9 +
target/loongarch/machine.c| 17 ++
target/loongarch/meson.build
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
configs/targets/loongarch64-softmmu.mak | 1 +
gdb-xml/loongarch-base64.xml| 43 +++
gdb-xml/loongarch-fpu64.xml | 57 +++
target/loongarch/cpu.c | 7 ++
target/loongarch
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/Kconfig | 1 +
hw/loongarch/loongson3.c | 42
include/hw/loongarch/loongarch.h | 1 +
3 files changed, 44 insertions(+)
diff --git a/hw/loongarch/Kconfig b/hw/loongarch
This patch realize PCH-MSI interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig | 5 ++
hw/intc/loongarch_pch_msi.c | 75 +
hw/intc/meson.build | 1 +
hw/intc/trace-events
- We write a very minimal softmmu harness.
- This is a very simple smoke test with no need to run a full Linux/kernel.
- The Makefile.softmmu-target record the rule to run.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
tests/tcg/loongarch64/Makefile.softmmu-target | 33
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
configs/targets/loongarch64-softmmu.mak | 1 +
gdb-xml/loongarch-base64.xml| 43 +++
gdb-xml/loongarch-fpu64.xml | 57 +++
target/loongarch/cpu.c | 7 ++
target/loongarch
This patch introduces basic TLB interfaces.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu-param.h | 2 +-
target/loongarch/cpu.c| 32
target/loongarch/cpu.h| 45 -
target/loongarch/internals.h | 10 ++
target/loongarch/machine.c
This includes:
-CACOP
-LDDIR
-LDPTE
-ERTN
-DBCL
-IDLE
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.h | 2 +
target/loongarch/disas.c | 17
target/loongarch/helper.h| 4 +
target/loongarch
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/Kconfig | 4
hw/loongarch/fw_cfg.c| 33 ++
hw/loongarch/fw_cfg.h| 15 ++
hw/loongarch/loongson3.c | 35
Add tree nodes for 3A5000 device tree.
- cpu nodes;
- fw_cfg nodes;
- pcie nodes.
The lastest loongarch bios have supported fdt.
- https://github.com/loongson/edk2
- https://github.com/loongson/edk2-platforms
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c
This patch realize the PCH-PIC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig | 4 +
hw/intc/loongarch_pch_pic.c | 428
hw/intc/meson.build | 1 +
hw/intc/trace-events
.
Please help review!
Thanks
Xiaojuan Yang (30):
target/loongarch: Update README
target/loongarch: Add CSR registers definition
target/loongarch: Add basic vmstate description of CPU.
target/loongarch: Implement qmp_query_cpu_definitions()
target/loongarch: Add constant timer support
This includes:
- TLBSRCH
- TLBRD
- TLBWR
- TLBFILL
- TLBCLR
- TLBFLUSH
- INVTLB
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/disas.c | 17 +
target/loongarch/helper.h| 12 +
target/loongarch/insn_trans/trans_core.c.inc
This includes:
- CSRRD
- CSRWR
- CSRXCHG
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.h | 88 +
target/loongarch/csr_helper.c| 112 +
target/loongarch/disas.c | 15
This patch realize the IPI interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig | 3 +
hw/intc/loongarch_ipi.c | 164
hw/intc/meson.build | 1 +
hw/intc/trace-events
This patch add ls7a rtc device support.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/Kconfig | 1 +
hw/loongarch/loongson3.c | 4 +
hw/rtc/Kconfig | 3 +
hw/rtc/ls7a_rtc.c | 322 +
hw/rtc
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c | 81
include/hw/loongarch/loongarch.h | 5 ++
2 files changed, 86 insertions(+)
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
index 31c285a74d
This patch add the irq hierarchy for the virt board.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c | 85 ++
include/hw/pci-host/ls7a.h | 13 ++
2 files changed, 98 insertions(+)
diff --git a/hw/loongarch/loongson3.c
This includes:
- IOCSR{RD/WR}.{B/H/W/D}
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu.c | 8 ++
target/loongarch/cpu.h | 4 +
target/loongarch/disas.c | 8 ++
target/loongarch/helper.h
This patch introduce qmp_query_cpu_definitions interface.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
qapi/machine-target.json | 6 --
target/loongarch/cpu.c | 26 ++
2 files changed, 30 insertions(+), 2 deletions
son.git/tree/Documentation/loongarch?h=loongarch-next
2.https://github.com/loongson/LoongArch-Documentation
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/loongarch/loongson3.c | 24
1 file changed, 24 insertions(+)
diff --git a/hw/loongarch/loongson3.c b/hw/loongar
1.This patch Add loongarch interrupt and exception handle.
2.Rename the user excp to the exccode from the csr defintions.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
linux-user/loongarch64/cpu_loop.c | 8 +-
target/loongarch/cpu.c| 252
are emulated.
More detailed info you can see
https://github.com/loongson/LoongArch-Documentation
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
.../devices/loongarch64-softmmu/default.mak | 3 +
configs/targets/loongarch64-softmmu.mak | 3 +
hw/Kconfig
This patch realize the EIOINTC interrupt controller.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
hw/intc/Kconfig| 3 +
hw/intc/loongarch_extioi.c | 376 +
hw/intc/meson.build| 1 +
hw/intc/trace-events
1.Define All the CSR registers and its field.
2.Set some default csr values.
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
---
target/loongarch/cpu-csr.h | 236 +
target/loongarch/cpu.c | 35 ++
target/loongarch/cpu.h | 57 +
3
This patch introduce vmstate_loongarch_cpu
Signed-off-by: Xiaojuan Yang
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
---
target/loongarch/cpu.c | 3 ++
target/loongarch/internals.h | 4 ++
target/loongarch/machine.c | 84
target
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