cpu = SPARC_CPU(cpu_create(cpu_type));
+cpu = SPARC_CPU(object_new(cpu_type));
qdev_init_gpio_in_named(DEVICE(cpu), sparc64_cpu_set_ivec_irq,
"ivec-irq", IVEC_MAX);
+qdev_realize(DEVICE(cpu), NULL, _fatal);
env = >env;
env->tick = cpu_timer_create("tick", cpu, tick_irq,
Reviewed-by: Damien Hedde
atal);
for (i = 0; i < IOAPIC_NUM_PINS; i++) {
qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]);
}
-pci_realize_and_unref(lpc, host_bus, _fatal);
rtc_state = ISA_DEVICE(object_resolve_path_component(OBJECT(lpc), "rtc"));
Reviewed-by: Damien Hedde
On 1/29/24 16:35, Hannes Reinecke wrote:
On 1/29/24 14:13, Damien Hedde wrote:
On 1/24/24 08:47, Hannes Reinecke wrote:
On 1/24/24 07:52, Philippe Mathieu-Daudé wrote:
Hi Hannes,
[+Markus as QOM/QDev rubber duck]
On 23/1/24 13:40, Hannes Reinecke wrote:
On 1/23/24 11:59, Damien Hedde
On 1/24/24 08:47, Hannes Reinecke wrote:
On 1/24/24 07:52, Philippe Mathieu-Daudé wrote:
Hi Hannes,
[+Markus as QOM/QDev rubber duck]
On 23/1/24 13:40, Hannes Reinecke wrote:
On 1/23/24 11:59, Damien Hedde wrote:
Hi all,
We are currently looking into hotplugging nvme devices
Hi all,
We are currently looking into hotplugging nvme devices and it is currently not
possible:
When nvme was introduced 2 years ago, the feature was disabled.
> commit cc6fb6bc506e6c47ed604fcb7b7413dff0b7d845
> Author: Klaus Jensen
> Date: Tue Jul 6 10:48:40 2021 +0200
>
>hw/nvme: mark
Also update mailmap
Signed-off-by: Damien Hedde
---
MAINTAINERS | 2 +-
.mailmap| 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 96e25f62ac..ceeda49d49 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3321,7 +3321,7 @@ F: .gitlab-ci.d
On 5/31/22 22:43, Mark Cave-Ayland wrote:
On 31/05/2022 10:22, Damien Hedde wrote:
On 5/31/22 10:00, Mark Cave-Ayland wrote:
On 30/05/2022 15:05, Damien Hedde wrote:
On 5/30/22 12:25, Peter Maydell wrote:
On Mon, 30 May 2022 at 10:50, Damien Hedde
wrote:
TYPE_SYS_BUS_DEVICE also comes
On 5/31/22 10:00, Mark Cave-Ayland wrote:
On 30/05/2022 15:05, Damien Hedde wrote:
On 5/30/22 12:25, Peter Maydell wrote:
On Mon, 30 May 2022 at 10:50, Damien Hedde
wrote:
TYPE_SYS_BUS_DEVICE also comes with reset support.
If a device is on not on any bus it is not reached by the root
On 5/30/22 12:25, Peter Maydell wrote:
On Mon, 30 May 2022 at 10:50, Damien Hedde wrote:
TYPE_SYS_BUS_DEVICE also comes with reset support.
If a device is on not on any bus it is not reached by the root sysbus
reset which propagates to every device (and other sub-buses).
Even if we move all
On 5/25/22 21:20, Mark Cave-Ayland wrote:
On 25/05/2022 12:45, Peter Maydell wrote:
On Wed, 25 May 2022 at 10:51, Damien Hedde
wrote:
On 5/24/22 19:44, Mark Cave-Ayland wrote:
Sorry for coming late into this series, however one of the things I've
been thinking about a lot recently
On 5/25/22 18:06, Daniel P. Berrangé wrote:
On Wed, Mar 16, 2022 at 10:54:55AM +0100, Damien Hedde wrote:
+def raw_load(file: TextIO) -> List[QMPMessage]:
+"""parse a raw qmp command file.
+
+JSON formatted commands can expand on several lines but must
+be s
On 5/25/22 13:45, Peter Maydell wrote:
On Wed, 25 May 2022 at 10:51, Damien Hedde wrote:
On 5/24/22 19:44, Mark Cave-Ayland wrote:
Sorry for coming late into this series, however one of the things I've
been thinking about a lot recently is that with the advent of QOM and
qdev, is there really
On 5/24/22 19:44, Mark Cave-Ayland wrote:
On 24/05/2022 14:48, Damien Hedde wrote:
Hi all,
This series is about enabling to plug sysbus devices with
device_add QAPI command. I've put RFC because, there are several
options and I would like to know if you think the current version
is ok
devices can not be
hot-plugged because the sysbus bus does not support it.
Signed-off-by: Damien Hedde
Reviewed-by: Philippe Mathieu-Daudé
---
v5:
+ fix commit message (Philippe)
---
hw/core/null-machine.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/core/null-machine.c b/hw/core
the priority parameter to 0.
This commit is a preparation to further use of this function in the
context of qapi command which needs error handling support.
Signed-off-by: Damien Hedde
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: David Hildenbrand
Reviewed-by: Alistair Francis
---
v5:
+ rebase
a machine
from scratch as there is no qapi-way of doing a memory mapping.
Signed-off-by: Damien Hedde
---
Cc: Alistair Francis
v5:
+ bump version to 7.1
v4:
+ integrate priority parameter
+ use 'unstable' feature flag instead of 'x-' prefix
+ bump version to 7.0
+ dropped Alistair's reviewed
series
does not make much sense without the ability to cold plug with device_add
first.
Thanks for your feedback,
--
Damien
Damien Hedde (3):
none-machine: allow cold plugging sysbus devices
softmmu/memory: add memory_region_try_add_subregion function
add sysbus-mmio-map qapi command
q
of a "global" variable.
In consequence, there are no complex side effects involved and we can
safely move them from outside the -device option loop to the inner
function.
Signed-off-by: Damien Hedde
---
I see 2 other ways to handle this:
1. Adding a new option to device_add.
We could add a n
phase_get() returns the current phase, we'll use it in next
commit.
Signed-off-by: Damien Hedde
Reviewed-by: Philippe Mathieu-Daudé
---
include/hw/qdev-core.h | 19 +++
hw/core/qdev.c | 5 +
2 files changed, 24 insertions(+)
diff --git a/include/hw/qdev-core.h b
Signed-off-by: Damien Hedde
---
v5:
+ refactor to avoid indentation change
---
include/hw/qdev-core.h | 14 +
softmmu/vl.c | 46 ++
2 files changed, 60 insertions(+)
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
/qdev.json:61). The option is added there solely to
document the intent.
For the same reason, the flags have to be explicitly set in
monitor_init_qmp_commands() when the device_add command is registered.
Signed-off-by: Mirela Grujic
Signed-off-by: Damien Hedde
---
v4:
+ use phase_until()
+ add missing
Damien
v5:
+ refactor patch 2 to avoid indentation changes
v4:
https://lore.kernel.org/qemu-devel/20220223090706.4888-1-damien.he...@greensocs.com/
[1]: https://github.com/GreenSocs/qemu-qmp-machines
Damien Hedde (5):
machine: add phase_get() and document phase_check()/advance()
machine: int
Instead of checking the phase everytime, just store the result
in a flag. We will use more of it in the following commit.
Signed-off-by: Damien Hedde
Reviewed-by: Philippe Mathieu-Daudé
---
softmmu/qdev-monitor.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/softmmu
upport cold plugging a device
using qapi (which will be introduced in a following commit). For this
we need fine grain control of the phase.
Signed-off-by: Damien Hedde
Reviewed-by: Philippe Mathieu-Daudé
---
v5: update due to refactor of previous commit
---
softmmu/vl.
On 5/9/22 10:46, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé
"qom/object.h" doesn't need to include itself.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Damien Hedde
---
include/qom/object.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/i
On 4/17/22 19:44, Richard Henderson wrote:
There is no branch prediction in TCG, therefore there is no
need to actually include the context number into the predictor.
Therefore all we need to do is add the state for SCXTNUM_ELx. >
Signed-off-by: Richard Henderson
---
v2: Update
Any feedback ?
--
Thanks,
On 4/22/22 16:28, Damien Hedde wrote:
Document the 3 life cycles cases that can happen with devices.
Signed-off-by: Damien Hedde
---
Hi all,
It's been a few weeks I wanted to propose this in order to sort
out what should be done to make a 'user-creatable' device
when neon is disabled.
Note that other arm cpus seem to follow this. For example cortex-a55 is
like cortex-a53 and cortex-a76/cortex-a710 are like cortex-a57/a72.
Signed-off-by: Damien Hedde
---
v2: also clear SHA3 / SM3 / SM4 (Richard)
---
target/arm/cpu.c | 9 +
1 file changed, 9
is disabled.
Note that other arm cpus seem to follow this. For example cortex-a55 is
like cortex-a53 and cortex-a76 is like cortex-57/72.
Signed-off-by: Damien Hedde
---
Note: if we wanted to provide such configuration, we could have a
has_crypto property/feature to represent this.
---
target/arm/cpu.c
Document the 3 life cycles cases that can happen with devices.
Signed-off-by: Damien Hedde
---
Hi all,
It's been a few weeks I wanted to propose this in order to sort
out what should be done to make a 'user-creatable' device.
This is a follow up of [1] in which Peter asked for this point
On 4/21/22 17:51, Peter Maydell wrote:
On Wed, 30 Mar 2022 at 13:56, Damien Hedde wrote:
Hi,
This series add devices to be able to user-create (coldplug) cpu
clusters. The existing cpu cluster dictates how cpus are exposed
in gdb, but it does not handle the cpu objects creation
On 4/21/22 17:59, Peter Maydell wrote:
On Thu, 31 Mar 2022 at 13:19, Damien Hedde wrote:
This flag will be used in device_add to check if
the device needs special allowance from the machine
model.
It will replace the current check based only on the
device being a TYPE_SYB_BUS_DEVICE
On 4/16/22 19:52, Philippe Mathieu-Daudé wrote:
On 30/3/22 14:56, Damien Hedde wrote:
This object will be a _cpu-cluster_ generalization and
is meant to allow create cpus of the same type.
The main goal is that this object, on contrary to _cpu-cluster-_,
can be used to dynamically create
n "machine topology's cluster" be a 1-1 match with a gdb inferior ?
Thanks,
Damien
On 3/30/22 14:56, Damien Hedde wrote:
Hi,
This series add devices to be able to user-create (coldplug) cpu
clusters. The existing cpu cluster dictates how cpus are exposed
in gdb, but it does not handle the
On 4/6/22 10:14, chenxiang via wrote:
From: Xiang Chen
Right now the trace of vfio_region_sparse_mmap_entry is as follows:
vfio_region_sparse_mmap_entry sparse entry 0 [0x1000 - 0x9000]
Actually the range it wants to show is [0x1000 - 0x8fff]，so fix it.
Signed-off-by: Xiang Chen
---
_FORMAT
+": %s: %s\n", t / G_USEC_PER_SEC, t % G_USEC_PER_SEC,
+level_str, msg);
fflush(s->log_file);
}
}
Reviewed-by: Damien Hedde
--
Damien
On 4/5/22 16:29, oxr...@gmx.us wrote:
From: Lucas Ramage
Buglink: https://gitlab.com/qemu-project/qemu/-/issues/527
Signed-off-by: Lucas Ramage
Provided 2 minors tweaks (see below: missing empty line, and empty line
at EOF),
Reviewed-by: Damien Hedde
Note that I'm not competent
On 4/5/22 07:41, Markus Armbruster wrote:
Daniel P. Berrangé writes:
On Wed, Mar 16, 2022 at 10:54:55AM +0100, Damien Hedde wrote:
It takes an input file containing raw qmp commands (concatenated json
dicts) and send all commands one by one to a qmp server. When one
command fails
ly; micro updates will
+always be bugfixes, and minor updates will be reserved for backwards
+compatible feature changes.
+
+
Changelog
-
Looks reasonable to me.
Reviewed-by: Damien Hedde
On 4/4/22 22:34, John Snow wrote:
On Wed, Mar 16, 2022 at 5:55 AM Damien Hedde wrote:
It takes an input file containing raw qmp commands (concatenated json
dicts) and send all commands one by one to a qmp server. When one
command fails, it exits.
As a convenience, it can also wrap
Reviewed-by: Damien Hedde
On 4/1/22 21:02, Richard Henderson wrote:
Coverity reports out-of-bound accesses here. This should be a
false positive due to how the index is decoded from MemOpIdx.
Fixes: Coverity CID 1487201
Signed-off-by: Richard Henderson
---
plugins/api.c | 2 ++
1 file
i++) {
tmp = do_fldt(env, ptr, retaddr);
Reviewed-by: Damien Hedde
On 3/24/22 19:15, Zongyuan Li wrote:
Signed-off-by: Zongyuan Li
---
hw/arm/exynos4210.c | 26 +++
hw/intc/exynos4210_combiner.c | 81 +++
hw/intc/exynos4210_gic.c | 36 +---
include/hw/arm/exynos4210.h | 11 ++---
On 4/1/22 08:29, Klaus Jensen wrote:
On Mar 31 15:32, Corey Minyard wrote:
On Thu, Mar 31, 2022 at 06:57:33PM +0200, Klaus Jensen wrote:
From: Klaus Jensen
Hi all,
This RFC series adds I2C "slave mode" support for the Aspeed I2C
controller as well as the necessary infrastructure in the
Reviewed-by: Damien Hedde
On 3/31/22 15:56, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
It's not the way it is usually written (see https://clang.llvm.org/).
Signed-off-by: Marc-André Lureau
---
docs/devel/style.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion
Reviewed-by: Damien Hedde
On 3/31/22 15:56, marcandre.lur...@redhat.com wrote:
From: Marc-André Lureau
According to our configure checks, this is the list of supported
compilers.
Signed-off-by: Marc-André Lureau
---
docs/about/build-platforms.rst | 10 ++
1 file changed, 10
All callsite are updated to the new function name
"machine_class_allow_dynamic_device"
Signed-off-by: Damien Hedde
Reviewed-by: Philippe Mathieu-Daudé
---
hw/arm/virt.c | 10 +-
hw/i386/microvm.c | 2 +-
hw/i386/pc_piix.c | 4 ++--
hw/i38
This flag will be used in device_add to check if
the device needs special allowance from the machine
model.
It will replace the current check based only on the
device being a TYPE_SYB_BUS_DEVICE.
Signed-off-by: Damien Hedde
---
v2:
+ change the flag name and put it just below user_creatable
Now we have renamed all calls to these old functions, we
can delete the temporary inline we've defined.
Signed-off-by: Damien Hedde
Reviewed-by: Philippe Mathieu-Daudé
---
include/hw/boards.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/include/hw/boards.h b/include/hw
devices like
these developed in the following series:
https://lore.kernel.org/qemu-devel/20220330125639.201937-1-damien.he...@greensocs.com/
Patches 1 and 3 lack a review.
Thanks,
--
Damien
v2:
+ update the flag name and put it just below user_creatable (Philippe)
Damien Hedde (5):
qdev: add
The list will now accept any device (not only sysbus devices) so
we rename the related code and documentation.
Create some temporary inline functions with old names until
we've udpated callsites as well.
Signed-off-by: Damien Hedde
Reviewed-by: Philippe Mathieu-Daudé
---
include/hw/boards.h
Instead of checking if the device is a sysbus device, just check
the newly added flag in device class.
Signed-off-by: Damien Hedde
---
v2: update the flag name
---
softmmu/qdev-monitor.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/softmmu/qdev-monitor.c b
On 3/31/22 12:21, Philippe Mathieu-Daudé wrote:
On 30/3/22 18:12, Damien Hedde wrote:
This flag will be used in device_add to check if
the device needs special allowance from the machine
model.
It will replace the current check based only on the
device being a TYPE_SYB_BUS_DEVICE.
Signed
Now we have renamed all call to these old functions, we
can delete the temporary inline we've defined.
Signed-off-by: Damien Hedde
---
include/hw/boards.h | 10 --
1 file changed, 10 deletions(-)
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 9ce7d705c9..7efba048e9 100644
The list will now accept any device (not only sysbus devices) so
we rename the related code and documentation.
Create some temporary inline functions with old names until
we've udpated callsites as well.
Signed-off-by: Damien Hedde
---
include/hw/boards.h | 50
This flag will be used in device_add to check if
the device needs special allowance from the machine
model.
It will replace the current check based only on the
device being a TYPE_SYB_BUS_DEVICE.
Signed-off-by: Damien Hedde
---
include/hw/qdev-core.h | 6 ++
hw/core/qdev.c | 1
Signed-off-by: Damien Hedde
---
softmmu/qdev-monitor.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 12fe60c467..94e5f35127 100644
--- a/softmmu/qdev-monitor.c
+++ b/softmmu/qdev-monitor.c
@@ -258,12 +258,12
All callsite are updated to the new function name
"machine_class_allow_dynamic_device"
Signed-off-by: Damien Hedde
---
hw/arm/virt.c | 10 +-
hw/i386/microvm.c | 2 +-
hw/i386/pc_piix.c | 4 ++--
hw/i386/pc_q35.c| 8 --
devices like
these developed in the following series:
https://lore.kernel.org/qemu-devel/20220330125639.201937-1-damien.he...@greensocs.com/
Thanks,
--
Damien
Damien Hedde (5):
qdev: add uc_requires_machine_allowance flag
machine: update machine allowed list related functions/fields
qdev
Now that we updated all riscv machines, we can remove
the temporary realize helper and the alias property.
Signed-off-by: Damien Hedde
---
include/hw/riscv/riscv_hart.h | 3 ---
hw/riscv/riscv_hart.c | 14 --
2 files changed, 17 deletions(-)
diff --git a/include/hw/riscv
Add cpus into the "machine core" subset along with cpu
cluster and add myself as reviewer.
Signed-off-by: Damien Hedde
---
Should we put all cpu groups in the same subset ?
hw/cpu/cluster
hw/cpu/cpus
hw/arm/arm_cpus
hw/riscv/riscv_array
---
MAINTAINERS | 3 +++
1 file changed, 3
dded cluster as it is equivalent.
Signed-off-by: Damien Hedde
---
hw/riscv/opentitan.c | 4 ++--
hw/riscv/shakti_c.c | 4 ++--
hw/riscv/sifive_e.c | 4 ++--
hw/riscv/spike.c | 5 +++--
hw/riscv/virt.c | 5 +++--
5 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/hw/r
+ Use riscv_array_get_num_harts instead of accessing num_harts field.
+ Use riscv_array_get_hart instead of accessing harts field.
+ Use riscv_hart_array_realize instead of sysbus_realize.
Signed-off-by: Damien Hedde
---
hw/riscv/virt.c | 76 ++---
1
qom-path of cpus are changed:
+ "apu-cluster/apu-cpu[n]" to "apu/cpu[n]"
+ "rpu-cluster/rpu-cpu[n]" to "rpu/cpu[n]"
Signed-off-by: Damien Hedde
---
include/hw/arm/xlnx-zynqmp.h | 8 +--
hw/arm/xlnx-zynqmp.c | 121 +--
-cpus" to "/path/to/e-cpus"
+ "/path/to/u-cluster/u-cpus" to "/path/to/u-cpus"
Signed-off-by: Damien Hedde
---
If keeping the qom-paths is necessary we can add a container as
a replacement of the cluster.
---
include/hw/riscv/microchip_pfsoc.h | 2 --
include/hw/r
This is a drastic update: qom-path of riscv harts are changed
by this patch from "/path/to/array/hart[n]" to "/path/to/array/cpu[n]".
This object is now not anymore a SYS_BUS_DEVICE.
Signed-off-by: Damien Hedde
---
I expect it is an issue regarding migration of riscv mach
+ Use riscv_array_get_hart instead of accessing harts field.
+ Use riscv_hart_array_realize instead of sysbus_realize.
spike and virt machines will be handled separately in following
commits.
Signed-off-by: Damien Hedde
---
hw/riscv/boot.c| 2 +-
hw/riscv/microchip_pfsoc.c | 4
+ Use riscv_array_get_num_harts instead of accessing num_harts field.
+ Use riscv_array_get_hart instead of accessing harts field.
+ Use riscv_hart_array_realize instead of sysbus_realize.
Signed-off-by: Damien Hedde
---
hw/riscv/spike.c | 15 ---
1 file changed, 8 insertions(+), 7
This object can be used to create a group of homogeneous
arm cpus.
Signed-off-by: Damien Hedde
---
include/hw/arm/arm_cpus.h | 45
hw/arm/arm_cpus.c | 63 +++
hw/arm/meson.build| 1 +
3 files changed, 109
).
+ a helper function to get an hart from the array (the current storage
array field will be removed).
+ a helper function to get the number of harts in an array (the current
field will be removed).
Signed-off-by: Damien Hedde
---
include/hw/riscv/riscv_hart.h | 19 +++
hw/riscv
The gdbstub will only handle _cpus_ object having set
the _is_cluster_ flag.
Signed-off-by: Damien Hedde
---
gdbstub.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/gdbstub.c b/gdbstub.c
index c8375e3c3f..0b3e943f95 100644
--- a/gdbstub.c
+++ b/gdbstub.c
Signed-off-by: Damien Hedde
---
include/hw/cpu/cluster.h | 7 ---
hw/cpu/cluster.c | 7 ---
2 files changed, 14 deletions(-)
diff --git a/include/hw/cpu/cluster.h b/include/hw/cpu/cluster.h
index 2125765f21..6704434cc0 100644
--- a/include/hw/cpu/cluster.h
+++ b/include/hw/cpu
Can be used to initialize the same property on all
cpus.
Signed-off-by: Damien Hedde
---
include/hw/cpu/cpus.h | 3 +++
hw/cpu/cpus.c | 5 +
2 files changed, 8 insertions(+)
diff --git a/include/hw/cpu/cpus.h b/include/hw/cpu/cpus.h
index 295d7537e2..7e89a0d018 100644
--- a/include
.
Therefore we add a new type solving all this constraints.
_cpu-cluster_ will be updated to inherit from this class
in following commits.
Signed-off-by: Damien Hedde
---
include/hw/cpu/cpus.h | 71 +++
hw/cpu/cpus.c | 127
Some group of cpus need to form a cpu cluster to be exposed
in gdb as inferiors.
Note: 'is_cluster' field is required at least to
transition the riscv_hart_array (see following commits about that)
Signed-off-by: Damien Hedde
---
include/hw/cpu/cpus.h | 19 +
hw/cpu/cpus.c
Drop the cluster-id property as base class defines one.
cluster_id field is temporarily kept until gdbstub
is updated.
Signed-off-by: Damien Hedde
---
include/hw/cpu/cluster.h | 17 ++--
hw/cpu/cluster.c | 58 +---
2 files changed, 46
Signed-off-by: Damien Hedde
---
include/hw/core/cpu.h| 6 ++
include/hw/cpu/cluster.h | 6 --
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 136973655c..38c72cbda1 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw
updates the riscv_array. It was already used to
create cpus but was not a cpu cluster.
Thanks for any comments,
--
Damien
Damien Hedde (18):
define MAX_CLUSTERS in cpu.h instead of cluster.h
hw/cpu/cpus: introduce _cpus_ device
hw/cpu/cpus: prepare to handle cpu clusters
hw/cpu/cluster: make
,
--
Damien
On 2/23/22 10:06, Damien Hedde wrote:
phase_until() is implemented in vl.c and is meant to be used
to make startup progress up to a specified phase being reached().
At this point, no behavior change is introduced: phase_until()
only supports a single double transition corresponding
On 3/16/22 11:24, Daniel P. Berrangé wrote:
On Wed, Mar 16, 2022 at 10:54:55AM +0100, Damien Hedde wrote:
It takes an input file containing raw qmp commands (concatenated json
dicts) and send all commands one by one to a qmp server. When one
command fails, it exits.
As a convenience, it can
only when the qemu process terminates.
Signed-off-by: Damien Hedde
---
Hi all,
Following our discussion, I've started this. What do you think ?
I tried to follow Daniel's qmp-shell-wrap. I think it is
better to have similar options (eg: logging). There is also room
for factorizing code if we
On 3/3/22 14:32, Philippe Mathieu-Daudé wrote:
On 23/2/22 10:12, Damien Hedde wrote:
Hi Philippe,
I suppose it is ok if I change your mail in the reviewed by ?
No, the email is fine (git tools should take care of using the
correct email via the .mailmap entry, see commit 90f285fd83
On 3/3/22 15:59, Philippe Mathieu-Daudé wrote:
On 23/2/22 10:07, Damien Hedde wrote:
This command allows to map an mmio region of sysbus device onto
the system memory. Its behavior mimics the sysbus_mmio_map()
function apart from the automatic unmap (the C function unmaps
the region
On 3/3/22 15:41, Philippe Mathieu-Daudé wrote:
On 23/2/22 10:07, Damien Hedde wrote:
Add the property to configure a the base address of the ram.
The default value remains zero.
This commit is needed to use the 'none' machine as a base, and
subsequently to dynamically populate it using qapi
Ping !
It would be good to have some feedback on 1st and 2nd part.
Thanks,
Damien
On 2/23/22 10:06, Damien Hedde wrote:
Hi,
This series adds initial support to build a machine using QMP/QAPI
commands. With this series, one can start from the 'none' machine,
create cpus, sysbus devices
On 2/25/22 12:38, Igor Mammedov wrote:
On Thu, 24 Feb 2022 12:43:21 +0100
Damien Hedde wrote:
On 2/24/22 10:55, Igor Mammedov wrote:
On Wed, 23 Feb 2022 11:19:49 +0100
Damien Hedde wrote:
On 2/23/22 10:44, Igor Mammedov wrote:
On Wed, 23 Feb 2022 10:07:05 +0100
Damien Hedde wrote
On 2/24/22 10:55, Igor Mammedov wrote:
On Wed, 23 Feb 2022 11:19:49 +0100
Damien Hedde wrote:
On 2/23/22 10:44, Igor Mammedov wrote:
On Wed, 23 Feb 2022 10:07:05 +0100
Damien Hedde wrote:
This device can be used to create a memory wrapped into a
sysbus device.
This device has one
On 2/23/22 19:20, John Snow wrote:
On Wed, Feb 23, 2022 at 12:09 PM Damien Hedde
wrote:
On 2/23/22 17:18, John Snow wrote:
On Wed, Feb 23, 2022 at 10:44 AM Daniel P. Berrangé wrote:
On Wed, Feb 23, 2022 at 10:41:11AM -0500, John Snow wrote:
On Wed, Feb 23, 2022 at 10:27 AM Daniel P
, 2022 at 10:55 AM Damien Hedde
wrote:
This option makes qmp_shell exit (with error code 1)
as soon as one of the following error occurs:
+ command parsing error
+ disconnection
+ command failure (response is an error)
_execute_cmd() method now returns None or the response
so
On 2/23/22 17:43, Damien Hedde wrote:
On 2/23/22 16:44, Daniel P. Berrangé wrote:
On Wed, Feb 23, 2022 at 10:41:11AM -0500, John Snow wrote:
On Wed, Feb 23, 2022 at 10:27 AM Daniel P. Berrangé
wrote:
On Wed, Feb 23, 2022 at 10:22:11AM -0500, John Snow wrote:
On Mon, Feb 21, 2022 at 10
On 2/23/22 16:44, Daniel P. Berrangé wrote:
On Wed, Feb 23, 2022 at 10:41:11AM -0500, John Snow wrote:
On Wed, Feb 23, 2022 at 10:27 AM Daniel P. Berrangé wrote:
On Wed, Feb 23, 2022 at 10:22:11AM -0500, John Snow wrote:
On Mon, Feb 21, 2022 at 10:55 AM Damien Hedde
wrote:
This option
On 2/23/22 10:44, Igor Mammedov wrote:
On Wed, 23 Feb 2022 10:07:05 +0100
Damien Hedde wrote:
This device can be used to create a memory wrapped into a
sysbus device.
This device has one property 'readonly' which allows
to choose between a ram or a rom.
The purpose for this device
On 2/22/22 11:31, Daniel P. Berrangé wrote:
On Tue, Feb 22, 2022 at 10:38:09AM +0100, Damien Hedde wrote:
Here I just wanted to propose a simple way to just send a
bunch of commands from a source file and stop if something unexpected
happens.
Only goal is to be able to share a file
The none machine was using the parent state structure.
We'll need a custom state to add a field in the following commit.
Signed-off-by: Damien Hedde
---
hw/core/null-machine.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/hw/core/null-machine.c b
phase_get() returns the current phase, we'll use it in next
commit.
Signed-off-by: Damien Hedde
---
include/hw/qdev-core.h | 19 +++
hw/core/qdev.c | 5 +
2 files changed, 24 insertions(+)
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
index
the priority parameter to 0.
This commit is a preparation to further use of this function in the
context of qapi command which needs error handling support.
Signed-off-by: Damien Hedde
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: David Hildenbrand
Reviewed-by: Alistair Francis
---
include/exec
upport cold plugging a device
using qapi (which will be introduced in a following commit). For this
we need fine grain control of the phase.
Signed-off-by: Damien Hedde
---
softmmu/vl.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/softmmu/vl.c b/softmmu/vl.c
Hi Philippe,
I suppose it is ok if I change your mail in the reviewed by ?
Thanks,
Damien
On 2/23/22 10:07, Damien Hedde wrote:
It allows adding a subregion to a memory region with error handling.
Like memory_region_add_subregion_overlap(), it handles priority as
well. Apart from the error
a machine
from scratch as there is no qapi-way of doing a memory mapping.
Signed-off-by: Damien Hedde
---
Cc: Alistair Francis
v4:
+ integrate priority parameter
+ use 'unstable' feature flag instead of 'x-' prefix
+ bump version to 7.0
+ dropped Alistair's reviewed-by as a consequence
Instead of checking the phase everytime, just store the result
in a flag. We will use more of it in the following commit.
Signed-off-by: Damien Hedde
---
softmmu/qdev-monitor.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev
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