[PATCH] target/riscv: PMP violation due to wrong size parameter

of the range, as `addr - 1` is not in the range. In order to fix, we just assume that all bytes from addr to the end of the page will be accessed if the size is unknown. Signed-off-by: Dayeol Lee Reviewed-by: Richard Henderson --- target/riscv/pmp.c | 13 - 1 file changed, 12 insertions

Re: [PATCH] target/riscv: PMP violation due to wrong size parameter

e let me know so that I can fix. > > Thank you! > > Sorry, I dropped this one. It's in the patch queue now. We should also > check > for size==0 in pmp_hart_has_privs(), as that won't work. LMK if you want > to > send a patch for that. > > > > > D

Re: [PATCH] target/riscv: PMP violation due to wrong size parameter

Hi, Could this patch go through? If not please let me know so that I can fix. Thank you! Dayeol On Sat, Oct 12, 2019, 11:30 AM Dayeol Lee wrote: > No it doesn't mean that. > But the following code will make the size TARGET_PAGE_SIZE - (page offset) > if the address is no

Re: [PATCH] target/riscv: PMP violation due to wrong size parameter

ary? Is there a > guarantee somewhere that size=0 means that the access is naturally aligned? > > Jonathan > > > On Fri, Oct 11, 2019 at 7:14 PM Dayeol Lee wrote: > >> riscv_cpu_tlb_fill() uses the `size` parameter to check PMP violation >> using pmp_hart_has_privs()

Re: [PATCH v2 1/1] target/riscv/pmp: Fix bug preventing

Hi, Alistair, Thank you for reminding me. I already had the local patch, so I re-submitted the patch. Please let me know if that's fair enough (or you have any other comments) Thanks, Dayeol On Fri, Oct 11, 2019 at 3:24 PM Alistair Francis wrote: > On Sun, Oct 6, 2019 at 1:32 AM Chris

[PATCH] target/riscv: PMP violation due to wrong size parameter

of the range, as `addr - 1` is not in the range. In order to fix, we just assume that all bytes from addr to the end of the page will be accessed if the size is unknown. Signed-off-by: Dayeol Lee Reviewed-by: Richard Henderson --- target/riscv/cpu_helper.c | 13 - 1 file changed, 12

Re: [PATCH] target/riscv: PMP violation due to wrong size parameter

On Mon, Oct 7, 2019 at 11:25 AM Richard Henderson < richard.hender...@linaro.org> wrote: > On 10/7/19 10:19 AM, Dayeol Lee wrote: > > Thank you very much for the clarification! > > > > I found tlb_set_page with size != TARGET_PAGE_SIZE makes the translation > way &

Re: [PATCH] target/riscv: PMP violation due to wrong size parameter

as possible. Any thoughts would be appreciated! On Mon, Oct 7, 2019, 6:00 AM Richard Henderson wrote: > On 10/6/19 10:28 PM, Dayeol Lee wrote: > > riscv_cpu_tlb_fill() uses the `size` parameter to check PMP violation > > using pmp_hart_has_privs(). > > However, the size passed f

[PATCH] target/riscv: PMP violation due to wrong size parameter

. In order to fix, simply correct the size to 4 if the access_type is MMU_INST_FETCH. Signed-off-by: Dayeol Lee --- target/riscv/cpu.h| 1 + target/riscv/cpu_helper.c | 9 - 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index

Re: [Qemu-devel] [PATCH] target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64

Hi, I submitted the patch, but just found this has been already fixed by Michael Clark and pushed to riscv/riscv-qemu https://github.com/riscv/riscv-qemu/pull/166 but not in the upstream. Do we still need this patch? Thanks, Dayeol On Fri, Oct 26, 2018 at 11:04 AM Dayeol Lee wrote

[Qemu-devel] [PATCH] target/riscv/pmp.c: pmpcfg_csr_read returns bogus value on RV64

of the CSR being wrong. Signed-off-by: Dayeol Lee Reviewed-by: Palmer Dabbelt --- target/riscv/pmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index c828950..3d3906a 100644 --- a/target/riscv/pmp.c +++ b/target/riscv/pmp.c @@ -33

[Qemu-devel] [PATCH] [PATCH] target/riscv/pmp.c: pmpcfg_csr_read return type demotion

There is a data type demotion bug in target/riscv/pmp.c When the target_ulong is 8 bytes, pmpcfg_csr_read returns only lower 4 bytes. --- target/riscv/pmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index c828950..4b6c20e 100644

[Qemu-devel] [PATCH] target/riscv/pmp.c: Fix PMP NAPOT decoding bug

According to the RISC-V priv. v1.10 ISA document, pmpaddr register stores (base_addr | (size/2 - 1)) >> 2 for a NAPOT-encoded address. However, the current code decodes (base_addr | (size - 1)) >> 3 which leads to a wrong base address and size. Signed-off-by: Dayeol Lee Reviewed-

[Qemu-devel] [PATCH] target/riscv/pmp.c: Fix PMP range boundary address bug

pmp_is_in_range(env, i, addr + size) returns 0 whereas pmp_is_in_range(env, i, addr) returns 1. Signed-off-by: Dayeol Lee Reviewed-by: Alistair Francis --- target/riscv/pmp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index c4c6b09