> > The current implementation will disable the guest Intel PT feature if
> > the Intel PT LIP feature is supported on the host, but the LIP feature
> > is comming soon(e.g. SnowRidge and later).
> >
> > This patch will make the guest LIP feature configurable and Intel PT
> > feature can be
> -Original Message-
> From: Eduardo Habkost
> Sent: Wednesday, December 2, 2020 5:12 AM
> To: Kang, Luwei
> Cc: pbonz...@redhat.com; r...@twiddle.net; qemu-devel@nongnu.org
> Subject: Re: [PATCH 1/2] i386/cpu: Add the Intel PT capabilities checking
> before
>
> -Original Message-
> From: Kang, Luwei
> Sent: Wednesday, October 14, 2020 4:05 PM
> To: pbonz...@redhat.com; r...@twiddle.net; ehabk...@redhat.com
> Cc: qemu-devel@nongnu.org; Kang, Luwei
> Subject: [PATCH 2/2] i386/cpu: Make the Intel PT LIP feature configurabl
> > PTWRITE provides a mechanism by which software can instrument the
> > Intel PT trace. The current implementation will mask off this feature
> > when the PTWRITE is supported on the host because of the Intel PT
> > CPUID is a constant value(ICX CPUID) in qemu. This patch will expose
> > the
> >> No, if a feature cannot be emulated, that means it cannot be enabled
> >> unless it matches the host. That's generally not a problem since
> >> Intel PT is usually used only with "-cpu host".
> >>
> > The limitation of LIP in qemu will mask off the Intel PT in KVM guest
> > even with "-cpu
> > > No, it's not possible. KVM doesn't have a say on what the
> > > processor writes in the tracing packets.
> > > >>> Can KVM refuse to enable packet generation if CSbase is not zero
> > > >>> and CPUID.(EAX=14H,ECX=0)[bit 31] seen by guest is different from
> host?
> > > >>
> > > >>
> No, it's not possible. KVM doesn't have a say on what the
> processor writes in the tracing packets.
> >>> Can KVM refuse to enable packet generation if CSbase is not zero and
> >>> CPUID.(EAX=14H,ECX=0)[bit 31] seen by guest is different from host?
> >>
> >> Yes, but the processor
> >> No, it's not possible. KVM doesn't have a say on what the processor
> >> writes in the tracing packets.
> > Can KVM refuse to enable packet generation if CSbase is not zero and
> > CPUID.(EAX=14H,ECX=0)[bit 31] seen by guest is different from host?
>
> Yes, but the processor could change
> > > > > > Hi Eduardo,
> > > > > > This patch set will remove some limitations of Intel PT
> > > > > > CPUID
> > > information.
> > > > > > 1. The "IP payloads" feature will disable the Intel PT in
> > > > > > guests and it will be
> > > > > coming soon.
> > > > > > 2. To make the
> > > > Hi Eduardo,
> > > > This patch set will remove some limitations of Intel PT CPUID
> information.
> > > > 1. The "IP payloads" feature will disable the Intel PT in
> > > > guests and it will be
> > > coming soon.
> > > > 2. To make the live migration safe, we set the Intel PT
automatically when available. With this series,
> the
> request in the BZ stops making sense (because intel-pt won't be migration-safe
> anymore), but I'm not sure yet that's really the plan.
>
>
> >
> > Thanks,
> > Luwei Kang
> >
> > > -Original Messag
nal Message-
> From: Eduardo Habkost
> Sent: Saturday, September 19, 2020 6:03 AM
> To: Kang, Luwei
> Cc: pbonz...@redhat.com; r...@twiddle.net; qemu-devel@nongnu.org; Strong,
> Beeman ; Jiri Denemark
> ; Robert Hoo
> Subject: Re: [PATCH v1 0/3] Remove the limitation of In
> -Original Message-
> From: Kang, Luwei
> Sent: Tuesday, February 25, 2020 5:38 AM
> To: pbonz...@redhat.com; r...@twiddle.net; ehabk...@redhat.com
> Cc: qemu-devel@nongnu.org; Strong, Beeman ;
> Kang, Luwei
> Subject: [PATCH v1 0/3] Remove the limitation o
> > The CPUID level need to be set to 0x14 manually on old machine-type if
> > Intel PT is enabled in guest. e.g. in Qemu 3.1 -machine pc-i440fx-3.1
> > -cpu qemu64,+intel-pt will be CPUID[0].EAX(level)=7 and
> > CPUID[7].EBX[25](intel-pt)=1.
> >
> > Some Intel PT capabilities are exposed by leaf
> > > > > > > > f9f4cd1..097c953 100644
> > > > > > > > --- a/target/i386/kvm.c
> > > > > > > > +++ b/target/i386/kvm.c
> > > > > > > > @@ -1811,6 +1811,25 @@ static int kvm_put_msrs(X86CPU *cpu, int
> > > > > > > > level)
> > > > > > > > kvm_msr_entry_add(cpu,
> > > > > > f9f4cd1..097c953 100644
> > > > > > --- a/target/i386/kvm.c
> > > > > > +++ b/target/i386/kvm.c
> > > > > > @@ -1811,6 +1811,25 @@ static int kvm_put_msrs(X86CPU *cpu, int
> > > > > > level)
> > > > > > kvm_msr_entry_add(cpu, MSR_MTRRphysMask(i), mask);
> > > > > >
> > > > f9f4cd1..097c953 100644
> > > > --- a/target/i386/kvm.c
> > > > +++ b/target/i386/kvm.c
> > > > @@ -1811,6 +1811,25 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
> > > > kvm_msr_entry_add(cpu, MSR_MTRRphysMask(i), mask);
> > > > }
> > > > }
> > >
qemu> > diff --git a/target/i386/kvm.c b/target/i386/kvm.c index
> > f9f4cd1..097c953 100644
> > --- a/target/i386/kvm.c
> > +++ b/target/i386/kvm.c
> > @@ -1811,6 +1811,25 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
> > kvm_msr_entry_add(cpu, MSR_MTRRphysMask(i), mask);
>
> -Original Message-
> From: Paolo Bonzini [mailto:pbonz...@redhat.com]
> Sent: Thursday, February 28, 2019 7:02 PM
> To: Kang, Luwei ; m...@redhat.com;
> marcel.apfelb...@gmail.com; r...@twiddle.net; ehabk...@redhat.com
> Cc: qemu-devel@nongnu.org
> Subject
> -Original Message-
> From: Kang, Luwei
> Sent: Wednesday, January 30, 2019 7:53 AM
> To: m...@redhat.com; marcel.apfelb...@gmail.com; pbonz...@redhat.com;
> r...@twiddle.net; ehabk...@redhat.com
> Cc: qemu-devel@nongnu.org; Kang, Luwei
> Subject: [PAT
> -Original Message-
> From: Kang, Luwei
> Sent: Wednesday, January 30, 2019 7:53 AM
> To: m...@redhat.com; marcel.apfelb...@gmail.com; pbonz...@redhat.com;
> r...@twiddle.net; ehabk...@redhat.com
> Cc: qemu-devel@nongnu.org; Kang, Luwei
> Subject: [PAT
> > > > > > Intel Processor Trace required CPUID[0x14] but the cpuid level
> > > > > > is 0xd when create a kvm guest with e.g. "-cpu qemu64,+intel-pt".
> > > > > >
> > > > > > Signed-off-by: Luwei Kang
> > > > > > ---
> > > > > > target/i386/cpu.c | 7 +++
> > > > > > 1 file changed, 7
> > > > Intel Processor Trace required CPUID[0x14] but the cpuid level is
> > > > 0xd when create a kvm guest with e.g. "-cpu qemu64,+intel-pt".
> > > >
> > > > Signed-off-by: Luwei Kang
> > > > ---
> > > > target/i386/cpu.c | 7 +++
> > > > 1 file changed, 7 insertions(+)
> > > >
> > > >
> > Intel Processor Trace required CPUID[0x14] but the cpuid level is 0xd
> > when create a kvm guest with e.g. "-cpu qemu64,+intel-pt".
> >
> > Signed-off-by: Luwei Kang
> > ---
> > target/i386/cpu.c | 7 +++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/target/i386/cpu.c
> > On 25/12/18 09:23, Kang, Luwei wrote:
> > >> From: Qemu-devel
> > >> [mailto:qemu-devel-bounces+luwei.kang=intel@nongnu.org] On
> > >> Behalf Of Paolo Bonzini
> > >> Sent: Friday, December 21, 2018 8:44 PM
> > >>
> On 25/12/18 09:23, Kang, Luwei wrote:
> >> From: Qemu-devel
> >> [mailto:qemu-devel-bounces+luwei.kang=intel@nongnu.org] On Behalf
> >> Of Paolo Bonzini
> >> Sent: Friday, December 21, 2018 8:44 PM
> >> To: qemu-devel@nongnu.org
>
> From: Qemu-devel [mailto:qemu-devel-bounces+luwei.kang=intel@nongnu.org]
> On Behalf Of Paolo Bonzini
> Sent: Friday, December 21, 2018 8:44 PM
> To: qemu-devel@nongnu.org
> Cc: ehabk...@redhat.com; qemu-sta...@nongnu.org
> Subject: [Qemu-devel] [PATCH] i386: mark the 'INTEL_PT' CPUID bit
> > > > +if (!eax_0 ||
> > > > + ((ebx_0 & INTEL_PT_MINIMAL_EBX) != INTEL_PT_MINIMAL_EBX) ||
> > > > + ((ecx_0 & INTEL_PT_MINIMAL_ECX) != INTEL_PT_MINIMAL_ECX) ||
> > > > + ((eax_1 & INTEL_PT_MTC_BITMAP) != INTEL_PT_MTC_BITMAP) ||
> > > > + ((eax_1 &
> > +
> > +if (!eax_0 ||
> > + ((ebx_0 & INTEL_PT_MINIMAL_EBX) != INTEL_PT_MINIMAL_EBX) ||
> > + ((ecx_0 & INTEL_PT_MINIMAL_ECX) != INTEL_PT_MINIMAL_ECX) ||
> > + ((eax_1 & INTEL_PT_MTC_BITMAP) != INTEL_PT_MTC_BITMAP) ||
> > + ((eax_1 &
> On Wed, Jan 31, 2018 at 11:57:45PM +0800, Luwei Kang wrote:
> > From: Chao Peng
> >
> > Expose Intel Processor Trace feature to guest.
> >
> > To make Intel PT live migration safe and get same CPUID information
> > with same CPU model on diffrent host. CPUID[14] is
> > From: Chao Peng
> >
> > Expose Intel Processor Trace feature to guest.
> >
> > In order to make this feature migration-safe, new feature word
> > information "FEAT_INTEL_PT_EBX" and "FEAT_INTEL_PT_ECX" be added.
> > Some constant value initialized in
> > On 18/01/2018 14:24, Eduardo Habkost wrote:
> > > However, if there's a simple way to make it possible to migrate
> > > between hosts with different CPUID[14h] data, it would be even
> > > better. With the current KVM intel-pt implementation, what happens
> > > if the CPUID[14h] data seen by
> > On Thu, Jan 18, 2018 at 03:44:49PM +0100, Paolo Bonzini wrote:
> >> On 18/01/2018 15:37, Eduardo Habkost wrote:
> >>> On Thu, Jan 18, 2018 at 02:39:57PM +0100, Paolo Bonzini wrote:
> On 18/01/2018 14:24, Eduardo Habkost wrote:
> > However, if there's a simple way to make it possible
> > > > > > On Mon, Jan 15, 2018 at 12:04:55 -0200, Eduardo Habkost wrote:
> > > > > > > CCing libvirt developers.
> > > > > > ...
> > > > > > > This case is slightly more problematic, however: the new
> > > > > > > feature is actually migratable (under very controlled
> > > > > > > circumstances)
> > > > On Mon, Jan 15, 2018 at 12:04:55 -0200, Eduardo Habkost wrote:
> > > > > CCing libvirt developers.
> > > > ...
> > > > > This case is slightly more problematic, however: the new feature
> > > > > is actually migratable (under very controlled circumstances)
> > > > > because of patch 2/2,
> > On Mon, Jan 15, 2018 at 12:04:55 -0200, Eduardo Habkost wrote:
> > > CCing libvirt developers.
> > ...
> > > This case is slightly more problematic, however: the new feature is
> > > actually migratable (under very controlled circumstances) because of
> > > patch 2/2, but it is not
> > From: Chao Peng
> >
> > Expose Intel Processor Trace feature to guest.
> >
> > Signed-off-by: Chao Peng
> > Signed-off-by: Luwei Kang
> > ---
> > target/i386/cpu.c | 19 ++- target/i386/cpu.h |
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