Re: [Qemu-devel] qemu qemu-doc.texi vl.c
Applied on stable branch. 2008/1/13, Andrzej Zaborowski <[EMAIL PROTECTED]>: > CVSROOT:/sources/qemu > Module name:qemu > Changes by: Andrzej Zaborowski 08/01/14 02:56:53 > > Modified files: > . : qemu-doc.texi vl.c > > Log message: > Change -drive parsing so that paths don't have to be double-escaped > (Laurent Vivier, Johannes Schindelin) > > CVSWeb URLs: > http://cvs.savannah.gnu.org/viewcvs/qemu/qemu-doc.texi?cvsroot=qemu&r1=1.176&r2=1.177 > http://cvs.savannah.gnu.org/viewcvs/qemu/vl.c?cvsroot=qemu&r1=1.395&r2=1.396 > > >
Re: [Qemu-devel] qemu block-vmdk.c
Applied on stable branch. 2008/1/14, Andrzej Zaborowski <[EMAIL PROTECTED]>: > CVSROOT:/sources/qemu > Module name:qemu > Changes by: Andrzej Zaborowski 08/01/14 03:48:37 > > Modified files: > . : block-vmdk.c > > Log message: > Add a path length check to prevent heap overflow (Eric Milliken). > > CVSWeb URLs: > http://cvs.savannah.gnu.org/viewcvs/qemu/block-vmdk.c?cvsroot=qemu&r1=1.18&r2=1.19 > > >
Re: [Qemu-devel] qemu/hw vmware_vga.c
Applied on stable branch. 2008/1/13, Andrzej Zaborowski <[EMAIL PROTECTED]>: > CVSROOT:/sources/qemu > Module name:qemu > Changes by: Andrzej Zaborowski 08/01/14 01:52:52 > > Modified files: > hw : vmware_vga.c > > Log message: > Register io ports as selected by PCI config in VMware SVGA. > Should prevent segfaults with RTL8139. > > CVSWeb URLs: > http://cvs.savannah.gnu.org/viewcvs/qemu/hw/vmware_vga.c?cvsroot=qemu&r1=1.5&r2=1.6 > > >
Re: [Qemu-devel] Qemu 0.9.1 stable branch
> So, Lauros, seems like all the commits since 0.9.1 (including the two new > ones, "Fix typo which broke MIPS32R2 64-bit FPU support" and "qemu > manpage: describe arguments of usbdevice option, by Aurelien Jarno") are > candidates for the stable branch... applied. Lauro
[Qemu-devel] Qemu bug track
I've set up an experimental bug track for Qemu stable branch. If the community wants it can be used for qemu head too. If the community agrees, I will do the configuration to send an email to qemu mailing list when a bug is opened. Let me know if someone (especially the developers that have write permission on cvs) wants permission on bug track administration. The bug track: https://launchpad.net/qemu Lauro
Re: [Qemu-devel] [PATCH] zero/NULL fixes.
I think these patches are important bugfixes and they should be applied on the qemu head. They fix some LTP tests. Lauro 2007/12/11, Thayne Harbaugh <[EMAIL PROTECTED]>: > The EFAULT changes use a result of NULL to detect a failure from lock*() > functions. There are syscalls that accept NULL as a valid argument and > now the syscalls return -EFAULT. These patches allow appropriate > syscalls to accept NULL. > > I have put together a regression test harness wrapped around the Linux > Test Project (LTP). I've been able to find regressions that were caused > by the EFAULT changes. It's more exhaustive than running an ls > executable and has helped find existing bugs as well as regressions. It > will run regression tests for multiple architectures. > > I'll be sending a few more patches for this same type of regression. I > should also be sending in the test harness once I've worked out a few > more details. > >
[Qemu-devel] Qemu 0.9.1 stable branch
As discussed yesterday in the qemu irc channel, I've created a stable branch for qemu 0.9.1. This branch will follow two basic rules: 1. Only fixes will be applied. 2. Patches will be applied only after they are applied on qemu head. The repository is http://repo.or.cz/w/qemu/qemu_0_9_1_stable.git Any help (indicating patches that should be applied on this branch) is welcomed. Thanks, Lauro
Re: [Qemu-devel] Request for Qemu bugzilla
> The main limiting factor is a volunteer to do the work. You can always do > an "unofficial" bugfix-only release and get it blessed later. (That's how > the Windows and MacOS X binary releases seem to work.) I would like to volunteer me to maintain a stable branch (and eventually a bug track) . In 2008, I will work full time on qemu and I will need a stable version. Lauro Ramos Venancio OpenBossa Labs - Instituto Nokia de Tecnologia Recife - Brazil
[Qemu-devel] [patch] fix getgroups and getgroups32 syscalls
The attached patch fixes a bug in getgroups and getgroups32 syscalls.
The current implementation returns error when size=0.
According the manual:
" If size is zero, list is not modified, but the total number of
supplementary group IDs for the process is returned."
--
Lauro Ramos Venancio
OpenBossa Labs - Instituto Nokia de Tecnologia
Recife - Brazil
Index: qemu-arm-eabi/linux-user/syscall.c
===
--- qemu-arm-eabi.orig/linux-user/syscall.c 2007-12-07 19:59:03.0 -0300
+++ qemu-arm-eabi/linux-user/syscall.c 2007-12-07 20:01:47.0 -0300
@@ -5024,12 +5024,13 @@
{
int gidsetsize = arg1;
uint16_t *target_grouplist;
-gid_t *grouplist;
+gid_t *grouplist = NULL;
int i;
-grouplist = alloca(gidsetsize * sizeof(gid_t));
+if (gidsetsize)
+grouplist = alloca(gidsetsize * sizeof(gid_t));
ret = get_errno(getgroups(gidsetsize, grouplist));
-if (!is_error(ret)) {
+if (gidsetsize && !is_error(ret)) {
target_grouplist = lock_user(VERIFY_WRITE, arg2, gidsetsize * 2, 0);
if (!target_grouplist)
goto efault;
@@ -5174,12 +5175,13 @@
{
int gidsetsize = arg1;
uint32_t *target_grouplist;
-gid_t *grouplist;
+gid_t *grouplist = NULL;
int i;
-grouplist = alloca(gidsetsize * sizeof(gid_t));
+if (gidsetsize)
+grouplist = alloca(gidsetsize * sizeof(gid_t));
ret = get_errno(getgroups(gidsetsize, grouplist));
-if (!is_error(ret)) {
+if (gidsetsize && !is_error(ret)) {
target_grouplist = lock_user(VERIFY_WRITE, arg2, gidsetsize * 4, 0);
if (!target_grouplist) {
ret = -TARGET_EFAULT;
Re: [Qemu-devel] Qemu ARM EABI project
Hi Paul, > Why don't you just fix whatever's wrong with normal qemu? Because some patches are not good enough to be applied in the mainstream version. Other patches was not applied because the developers that have write permission on CVS didn't have time to analyze them. The TLS patch is yours and it has never been applied. I think this project contributes to QEMU as it groups and updates the patches, making easier to test and apply them to the mainstream. This project will be dead in the near future when these patches are available in the mainstream QEMU. -- Lauro Ramos Venancio OpenBossa Labs - Instituto Nokia de Tecnologia Recife - Brazil
[Qemu-devel] Qemu ARM EABI project
Hi all, I'm creating a project in Sourceforge to maintain a bleeding edge version of QEMU for ARM-EABI programs. The main idea is to keep up to date the ARM EABI patches. This project will be specially useful for Maemo developers and Scratchbox users as it provides an alternative (newer) version of QEMU. For more details: http://qemu-arm-eabi.sf.net/. The current QEMU-ARM-EABI version was synchronized last wednesday with QEMU CVS and it's working well. It was tested with Maemo/Scratchbox and Mamona. Contributions are welcome. -- Lauro Ramos Venancio OpenBossa Labs - Instituto Nokia de Tecnologia Recife - Brazil
[Qemu-devel] [patch] inotify syscalls
The attached patch implements the inotify syscalls.
inotify.c is a test program.
Example:
$ arm-linux-gcc inotify.c -o test -static
$ qemu-arm test file &
[4] 13882
wd = 1
$ echo aaa > file
Event on 1 mask 2(IN_MODIFY)
Event on 1 mask 20(IN_OPEN)
Event on 1 mask 8(IN_CLOSE_WRITE)
Event on 1 mask 20(IN_OPEN)
Event on 1 mask 1(IN_ACCESS)
Event on 1 mask 10(IN_CLOSE_NOWRITE)
$ chmod a+rwx file
Event on 1 mask 4(IN_ATTRIB)
Lauro Ramos Venancio
OpenBossa Labs
Instituto Nokia de Tecnologia
Recife - Brazil
#include
#include
#include
#include
#include
#include
#include
void print_event(uint32_t event) {
if (event & IN_ACCESS)
printf("IN_ACCESS");
else if (event & IN_ATTRIB)
printf("IN_ATTRIB");
else if (event & IN_CLOSE_WRITE)
printf("IN_CLOSE_WRITE");
else if (event & IN_CLOSE_NOWRITE)
printf("IN_CLOSE_NOWRITE");
else if (event & IN_CREATE)
printf("IN_CREATE");
else if (event & IN_DELETE)
printf("IN_DELETE");
else if (event & IN_DELETE_SELF)
printf("IN_DELETE_SELF");
else if (event & IN_MODIFY)
printf("IN_MODIFY");
else if (event & IN_MOVE_SELF)
printf("IN_MOVE_SELF");
else if (event & IN_MOVED_FROM)
printf("IN_MOVED_FROM");
else if (event & IN_MOVED_TO)
printf("IN_MOVED_TO");
else if (event & IN_OPEN)
printf("IN_OPEN");
}
int main(int argc, char *argv[]) {
int fd, wd, bytes_read;
struct pollfd pfd;
struct inotify_event event;
if(0 > (fd = inotify_init())) {
printf("Error on notify init: %d\n", fd);
exit(-1);
}
if(argc < 2) {
printf("Usage: %s \n", argv[0]);
exit(-1);
}
if(0 > (wd = inotify_add_watch(fd, argv[1], IN_ALL_EVENTS))) {
printf("Error on add watch: %d\n", wd);
exit(-1);
}
printf("wd = %d\n", wd);
pfd.fd = fd;
pfd.events = POLLIN | POLLERR | POLLNVAL;
while(1) {
if(0 > poll(&pfd, 1, -1)) {
printf("Error on poll: %s\n", strerror(errno));
exit(-1);
}
if(pfd.revents & POLLIN) {
bytes_read = read(fd, &event,
sizeof(struct inotify_event));
if(bytes_read < 0) {
printf("Error reading some bytes and stuff:"
"%s\n", strerror(bytes_read));
} else {
printf("Event on %ld mask %lx(",
event.wd, event.mask);
print_event(event.mask);
printf(")\n");
}
}
}
}
Index: linux-user/syscall.c
===
RCS file: /sources/qemu/qemu/linux-user/syscall.c,v
retrieving revision 1.121
diff -u -r1.121 syscall.c
--- linux-user/syscall.c 17 Sep 2007 08:09:50 - 1.121
+++ linux-user/syscall.c 21 Sep 2007 19:18:25 -
@@ -47,6 +47,7 @@
#include
#include
#include
+#include
#include
#include
//#include
@@ -4652,7 +4653,23 @@
case TARGET_NR_set_robust_list:
goto unimplemented_nowarn;
#endif
-
+#ifdef TARGET_NR_inotify_init
+case TARGET_NR_inotify_init:
+ret = get_errno(inotify_init());
+break;
+#endif
+#ifdef TARGET_NR_inotify_add_watch
+case TARGET_NR_inotify_add_watch:
+p = lock_user_string(arg2);
+ret = get_errno(inotify_add_watch(arg1, path(p), arg3));
+unlock_user(p, arg2, 0);
+break;
+#endif
+#ifdef TARGET_NR_inotify_rm_watch
+case TARGET_NR_inotify_rm_watch:
+ret = get_errno(inotify_rm_watch(arg1, arg2));
+break;
+#endif
default:
unimplemented:
gemu_log("qemu: Unsupported syscall: %d\n", num);
Re: [Qemu-devel] Nokia N770 and/or N800 emulation
Hi Warner, I've just started a project to implement the OMAP processor on QEMU. This project is part of Mamona (http://dev.openbossa.org/trac/mamona) and I'm continuing the Andrzej Zaborowski's work. I've already implemented the OMAP 16xx interrupt handler, GPIO and other minor things. I'm close to make the OMAP H3 Dev Board ethernet works. I'm starting by the OMAP H3 implementation, but the main target is to implement the N770/N800 emulation. There are some legal constraints to implement the N800 emulation, but we will try to solve them in the future. You can download the code using "svn co http://dev.openbossa.org/svn/mamona/qemu-omap/trunk";. To browse the source, go to http://dev.openbossa.org/trac/mamona/browser/qemu-omap/trunk Contributions are welcome. In few days, I will make a more complete announce. Lauro Ramos Venancio OpenBossa Labs Instituto Nokia de Tecnologia Recife - Brazil 2007/9/1, M. Warner Losh <[EMAIL PROTECTED]>: > Is anybody working on N770 and/or N800 emulation for qemu? > > Warner > > >
[Qemu-devel] [ARM patch] fix BLX
The attached patch fixes a bug in execution of "blx lr". Current behavior: lr <- pc branch lr Expected behavior: temp <- lr lr <- pc branch temp Lauro Index: target-arm/translate.c === RCS file: /sources/qemu/qemu/target-arm/translate.c,v retrieving revision 1.51 diff -u -r1.51 translate.c --- target-arm/translate.c 1 May 2007 01:28:01 - 1.51 +++ target-arm/translate.c 8 Jun 2007 23:28:59 - @@ -2325,9 +2325,9 @@ /* branch link/exchange thumb (blx) */ val = (uint32_t)s->pc; -gen_op_movl_T0_im(val); -gen_movl_reg_T0(s, 14); +gen_op_movl_T1_im(val); gen_movl_T0_reg(s, rm); +gen_movl_reg_T1(s, 14); gen_bx(s); break; case 0x5: /* saturating add/subtract */
Re: [Qemu-devel] qemu-arm: wrong execution of post-indexed loads when Rm and Rd are the same register
I'm sending a new version of the patch that uses Base Restored data
abort model.
Lauro
diff -ru qemu-0.9.0.orig/target-arm/translate.c qemu-0.9.0/target-arm/translate.c
--- qemu-0.9.0.orig/target-arm/translate.c 2007-03-16 11:41:28.0 -0300
+++ qemu-0.9.0/target-arm/translate.c 2007-03-16 14:59:40.0 -0300
@@ -1556,7 +1556,6 @@
gen_ldst(ldsw, s);
break;
}
-gen_movl_reg_T0(s, rd);
} else if (sh & 2) {
/* doubleword */
if (sh & 1) {
@@ -1572,7 +1571,7 @@
gen_movl_reg_T0(s, rd);
gen_op_addl_T1_im(4);
gen_ldst(ldl, s);
-gen_movl_reg_T0(s, rd + 1);
+++rd;
}
address_offset = -4;
} else {
@@ -1588,6 +1587,12 @@
gen_op_addl_T1_im(address_offset);
gen_movl_reg_T1(s, rn);
}
+
+if ((insn & (1 << 20)) ||
+((!(insn & (1 << 20)))&&((sh & 3) == 2))) {
+/* load */
+gen_movl_reg_T0(s, rd);
+}
}
break;
case 0x4:
@@ -1630,10 +1635,6 @@
gen_op_ldl_kernel();
}
#endif
-if (rd == 15)
-gen_bx(s);
-else
-gen_movl_reg_T0(s, rd);
} else {
/* store */
gen_movl_T0_reg(s, rd);
@@ -1662,6 +1663,13 @@
} else if (insn & (1 << 21))
gen_movl_reg_T1(s, rn); {
}
+if (insn & (1 << 20)) {
+/* load */
+if (rd == 15)
+gen_bx(s);
+else
+gen_movl_reg_T0(s, rd);
+}
break;
case 0x08:
case 0x09:
Only in qemu-0.9.0/target-arm: translate.c~
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[Qemu-devel] Re: qemu-arm: wrong execution of post-indexed loads when Rm and Rd are the same register
Now sending the attachment. :)
Lauro
On Thu, 2007-03-15 at 16:35 -0300, Lauro Ramos Venancio wrote:
> Qemu-arm is wrongly executing post-indexed loads when Rm and Rd are
> the same register. For example:
>
> ldr r0, [r1], +r0
>
> Current behavior:
> r0 <- [r1]
> r1 <- r1 + r0
>
> Expected behavior:
> addr <- r1
> r1 <- r1 + r0
> r0 <- [addr]
>
> The attached patch fixes this bug. Patched by me and Rodrigo Vivi.
> This patch was made based on qemu 0.9.
>
>
> Lauro Venancio
--- target-arm/op.c.orig 2007-03-09 18:40:02.0 -0300
+++ target-arm/op.c 2007-03-09 18:40:27.0 -0300
@@ -106,6 +106,11 @@ void OPPROTO op_movl_T0_T1(void)
T0 = T1;
}
+void OPPROTO op_movl_T1_T0(void)
+{
+T1 = T0;
+}
+
void OPPROTO op_movl_T1_im(void)
{
T1 = PARAM1;
--- target-arm/translate.c.orig 2007-03-09 18:40:02.0 -0300
+++ target-arm/translate.c 2007-03-09 18:40:32.0 -0300
@@ -383,23 +383,19 @@ static inline void gen_add_data_offset(D
}
}
-static inline void gen_add_datah_offset(DisasContext *s, unsigned int insn,
-int extra)
+static inline void gen_add_datah_offset(DisasContext *s, unsigned int insn)
{
int val, rm;
if (insn & (1 << 22)) {
/* immediate */
val = (insn & 0xf) | ((insn >> 4) & 0xf0);
-val += extra;
if (!(insn & (1 << 23)))
val = -val;
if (val != 0)
gen_op_addl_T1_im(val);
} else {
/* register */
-if (extra)
-gen_op_addl_T1_im(extra);
rm = (insn) & 0xf;
gen_movl_T2_reg(s, rm);
if (!(insn & (1 << 23)))
@@ -1534,14 +1530,17 @@ static void disas_arm_insn(CPUState * en
}
}
} else {
-int address_offset;
/* Misc load/store */
rn = (insn >> 16) & 0xf;
rd = (insn >> 12) & 0xf;
gen_movl_T1_reg(s, rn);
-if (insn & (1 << 24))
-gen_add_datah_offset(s, insn, 0);
-address_offset = 0;
+gen_movl_T0_reg(s, rn);
+gen_add_datah_offset(s, insn);
+/* writeback */
+if (!(insn & (1 << 24))||(insn & (1 << 21)))
+ gen_movl_reg_T1(s, rn);
+if (!(insn & (1 << 24))) /* pos-indexed */
+ gen_op_movl_T1_T0();
if (insn & (1 << 20)) {
/* load */
switch(sh) {
@@ -1574,20 +1573,11 @@ static void disas_arm_insn(CPUState * en
gen_ldst(ldl, s);
gen_movl_reg_T0(s, rd + 1);
}
-address_offset = -4;
} else {
/* store */
gen_movl_T0_reg(s, rd);
gen_ldst(stw, s);
}
-if (!(insn & (1 << 24))) {
-gen_add_datah_offset(s, insn, address_offset);
-gen_movl_reg_T1(s, rn);
-} else if (insn & (1 << 21)) {
-if (address_offset)
-gen_op_addl_T1_im(address_offset);
-gen_movl_reg_T1(s, rn);
-}
}
break;
case 0x4:
@@ -1607,9 +1597,14 @@ static void disas_arm_insn(CPUState * en
rn = (insn >> 16) & 0xf;
rd = (insn >> 12) & 0xf;
gen_movl_T1_reg(s, rn);
+ gen_movl_T0_reg(s, rn);
i = (IS_USER(s) || (insn & 0x0120) == 0x0020);
-if (insn & (1 << 24))
gen_add_data_offset(s, insn);
+ /* writeback */
+ if (!(insn & (1 << 24))||(insn & (1 << 21)))
+ gen_movl_reg_T1(s, rn);
+ if (!(insn & (1 << 24))) /* pos-indexed */
+ gen_op_movl_T1_T0();
if (insn & (1 << 20)) {
/* load */
#if defined(CONFIG_USER_ONLY)
@@ -1656,12 +1651,6 @@ static void disas_arm_insn(CPUState * en
}
#endif
}
-if (!(insn & (1 << 24))) {
-gen_add_data_offset(s, insn);
-gen_movl_reg_T1(s, rn);
-} else if (insn & (1 << 21))
-gen_movl_reg_T1(s, rn); {
-}
break;
case 0x08:
case 0x09:
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[Qemu-devel] qemu-arm: wrong execution of post-indexed loads when Rm and Rd are the same register
Qemu-arm is wrongly executing post-indexed loads when Rm and Rd are the same register. For example: ldr r0, [r1], +r0 Current behavior: r0 <- [r1] r1 <- r1 + r0 Expected behavior: addr <- r1 r1 <- r1 + r0 r0 <- [addr] The attached patch fixes this bug. Patched by me and Rodrigo Vivi. This patch was made based on qemu 0.9. Lauro Venancio ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
