of the packet has its own CMD A command, with
its own buffer size and start offset.
Also update extraction of fields from the CMD A word to use extract32().
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/net/lan9118.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw
. Since the Linux driver
was unaffected by these bugs I am inferring that it is using a single
buffer for each packet.
Changes since V1:
* use extract32() instead of shift/mask for CMD A field extraction
* compute number of valid bytes in word at beginning of block
Roy Franz (2):
Fix lan9118 TX
to the hardware in the command. This
resulted in extra bytes being inserted into the middle of multi-buffer
packets when the non-final buffers had non-32bit aligned ending addresses.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/net/lan9118.c |2 +-
1 file changed, 1 insertion(+), 1
On Fri, Dec 27, 2013 at 5:25 PM, Peter Crosthwaite
peter.crosthwa...@xilinx.com wrote:
On Sat, Dec 21, 2013 at 4:26 AM, Roy Franz roy.fr...@linaro.org wrote:
The 9118 ethernet controller supports transmission of multi-buffer packets
with arbitrary byte alignment of the start and end bytes. All
of the packet has its own CMD A command, with
its own buffer size and start offset.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/net/lan9118.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c
index 2315f99..c5d6f14 100644
--- a/hw/net
. Since the Linux driver
was unaffected by these bugs I am inferring that it is using a single
buffer for each packet.
Roy Franz (2):
Fix lan9118 TX CMD A handling
Fix lan9118 buffer length handling
hw/net/lan9118.c |7 +++
1 file changed, 3 insertions(+), 4 deletions
to the hardware in the command. This
resulted in extra bytes being inserted into the middle of multi-buffer
packets when the non-final buffers had non-32bit aligned ending addresses.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/net/lan9118.c |3 +--
1 file changed, 1 insertion(+), 2
On Thu, Dec 12, 2013 at 9:37 AM, Peter Maydell peter.mayd...@linaro.org wrote:
On 12 December 2013 17:26, Peter Maydell peter.mayd...@linaro.org wrote:
On 5 December 2013 21:35, Roy Franz roy.fr...@linaro.org wrote:
For handling CFI and device ID reads, we need to not only know the
width
with 2
16 bit devices on it.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/block/pflash_cfi01.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index a0d7a16..a458ad6 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block
that also support x8 mode. When configured for x8
operation these devices respond to CFI and device ID requests differently
than native x8 NOR parts.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/block/pflash_cfi01.c |9 +
1 file changed, 9 insertions(+)
diff --git a/hw/block
Rename the 'width' member of the pflash_t structure
in preparation for adding a bank_width member.
Signed-off-by: Roy Franz roy.fr...@linaro.org
Reviewed-by: Peter Maydell peter.mayd...@linaro.org
---
hw/block/pflash_cfi01.c | 17 +
1 file changed, 9 insertions(+), 8 deletions
, as the existing definition was 'wrong' in order
to return the expected results with the broken device ID code.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/arm/vexpress.c |6 +--
hw/block/pflash_cfi01.c | 107 ++-
2 files changed, 90
specific flash init
routine rather than passing long argument list.
* Fix typo in comment.
Changes from v1:
* Add device-width property and use this to mask write length instead
of devices mas write length
* Update vexpress init code to set device-width to proper value.
Roy Franz (7):
rename
in an earlier patch in this series so
this is the only board currently affected.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/block/pflash_cfi01.c | 103 ++-
1 file changed, 92 insertions(+), 11 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw
-by: Roy Franz roy.fr...@linaro.org
---
hw/block/pflash_cfi01.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index a458ad6..82a2519 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -193,9
Create vexpress specific pflash registration
function which properly configures the device-width
of 16 bits (2 bytes) for the NOR flash on the
vexpress platform. This change is required for
buffered flash writes to work properly.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/arm
On Thu, Nov 28, 2013 at 11:03 AM, Peter Maydell
peter.mayd...@linaro.org wrote:
On 22 October 2013 17:35, Roy Franz roy.fr...@linaro.org wrote:
The width of the devices that make up the flash interface
is required to mask certain commands, in particular the
write length for buffered writes
On Tue, Dec 3, 2013 at 12:27 PM, Peter Maydell peter.mayd...@linaro.org wrote:
On 3 December 2013 20:12, Roy Franz roy.fr...@linaro.org wrote:
On Thu, Nov 28, 2013 at 11:03 AM, Peter Maydell
peter.mayd...@linaro.org wrote:
Other than this and the status (which you deal with in
the other patch
On Thu, Nov 28, 2013 at 11:10 AM, Peter Maydell
peter.mayd...@linaro.org wrote:
On 22 October 2013 17:35, Roy Franz roy.fr...@linaro.org wrote:
Now that we know how wide each flash device that makes up the bank is,
return status for each device in the bank. Leave existing code
that treats 32
widths are 2, it repeats the status assuming 16 bit device
width, which preserves the current behavior for 32 bit wide banks.
The existing behavior will be preserved for all platforms that don't
set different device and bank widths.
Thanks,
Roy
On Tue, Oct 22, 2013 at 9:35 AM, Roy Franz roy.fr
with 2
16 bit devices on it.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/block/pflash_cfi01.c |5 +
1 file changed, 5 insertions(+)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index d5e366d..cda8289 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block
Rename the 'width' member of the pflash_t structuer
in preparation for adding a bank_width member.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/block/pflash_cfi01.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block
passing long argument list.
* Fix typo in comment.
Changes from v1:
* Add device-width property and use this to mask write length instead
of devices mas write length
* Update vexpress init code to set device-width to proper value.
Roy Franz (4):
rename pflash_t member width to bank_width
Add
-by: Roy Franz roy.fr...@linaro.org
---
hw/block/pflash_cfi01.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index cda8289..aa2cbbc 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -191,9
Create vexpress specific pflash registration
function which properly configures the device-width
of 16 bits (2 bytes) for the NOR flash on the
vexpress platform. This change is required for
buffered flash writes to work properly.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/arm
with 2
16 bit devices on it.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/block/pflash_cfi01.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index 018a967..cda8289 100644
--- a/hw/block
Create vexpress specific pflash registration
function which properly configures the device-width
of 16 bits (2 bytes) for the NOR flash on the
vexpress platform. This change is required for
buffered flash writes to work properly.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/arm
to set device-width to proper value.
Roy Franz (2):
Add device-width property to pflash_cfi01
Set proper device-width for vexpress flash
hw/arm/vexpress.c | 43 +--
hw/block/pflash_cfi01.c | 21 +
2 files changed, 46
On Fri, Oct 18, 2013 at 6:36 AM, Peter Maydell peter.mayd...@linaro.org wrote:
On 18 October 2013 12:38, Stefan Hajnoczi stefa...@gmail.com wrote:
On Thu, Oct 17, 2013 at 07:30:02PM -0700, Roy Franz wrote:
For buffered writes, mask the length with the maximum supported
length
On Fri, Oct 18, 2013 at 7:01 AM, Peter Maydell peter.mayd...@linaro.org wrote:
On 18 October 2013 14:54, Roy Franz roy.fr...@linaro.org wrote:
On Fri, Oct 18, 2013 at 6:36 AM, Peter Maydell peter.mayd...@linaro.org
wrote:
Probably instead of a single width property we should have two
On Fri, Oct 18, 2013 at 7:11 AM, Peter Maydell peter.mayd...@linaro.org wrote:
On 18 October 2013 15:05, Roy Franz roy.fr...@linaro.org wrote:
On Fri, Oct 18, 2013 at 7:01 AM, Peter Maydell peter.mayd...@linaro.org
wrote:
Yes, you should make the default for the device-width property
From: Grant Likely grant.lik...@linaro.org
The kernel parameter is not used when booting using firmware
such as UEFI. The firmware image is supplied with the -pflash
parameter, and the -kernel parameter should not be required since
the kernel will be loaded by the firmware.
Signed-off-by: Roy
with 2
16 bit devices on it.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/block/pflash_cfi01.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index 018a967..cda8289 100644
--- a/hw/block
this to mask write length instead
of devices mas write length
* Update vexpress init code to set device-width to proper value.
Roy Franz (2):
Add device-width property to pflash_cfi01
Set proper device-width for vexpress flash
hw/arm/vexpress.c | 38
Create vexpress specific pflash registration
function which properly configures the device-width
of 16 bits (2 bytes) for the NOR flash on the
vexpress platform. This change is required for
buffered flash writes to work properly.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/arm
On Fri, Oct 18, 2013 at 7:05 AM, Peter Maydell peter.mayd...@linaro.org wrote:
On 17 October 2013 11:38, Peter Maydell peter.mayd...@linaro.org wrote:
On 10 July 2013 05:23, peter.crosthwa...@xilinx.com wrote:
From: Nathan Rossi nathan.ro...@xilinx.com
Added Vector Base Address remapping on
, and without this mask the two lengths are interpreted
as a single 32 bit value that is very large.
Signed-off-by: Roy Franz roy.fr...@linaro.org
---
hw/block/pflash_cfi01.c |1 +
1 file changed, 1 insertion(+)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index 018a967..a364cca
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