Re: [Qemu-devel] [RFC v5 0/6] pci_expander_brdige: support separate pci domain for pxb-pcie

Hi Marcel, Marcel Apfelbaum 于2018年9月20日周四 下午2:39写道： > > Hi Zihan, > > On 09/18/2018 04:41 PM, Michael S. Tsirkin wrote: > > Cc Laine, Eric for an opinion about the management interface. > > > > On Mon, Sep 17, 2018 at 10:57:31PM +0800, Zihan Yang wrote: > >

Re: [Qemu-devel] [RFC v5 0/6] pci_expander_brdige: support separate pci domain for pxb-pcie

Marcel Apfelbaum 于2018年9月20日周四 下午2:41写道： > > Hi Zihan, Gerd > > On 09/20/2018 09:09 AM, Gerd Hoffmann wrote: > As for the management, will some checks when adding mcfg be enough for > management? Or I can maintain a variable to indicate how many space > have been consumed and warn

Re: [Qemu-devel] [RFC v5 0/6] pci_expander_brdige: support separate pci domain for pxb-pcie

Gerd Hoffmann 于2018年9月19日周三 下午12:26写道： > > > > > 2. Only 4x devices is supported, you need to be careful not to overuse > > > > > > Could you elaborate on this please? What happens if you are not careful? > > > How does management know what the limits are? > > > > It means the user might use more

Re: [Qemu-devel] [RFC v5 0/6] pci_expander_brdige: support separate pci domain for pxb-pcie

Michael S. Tsirkin 于2018年9月18日周二 下午9:41写道： > > Cc Laine, Eric for an opinion about the management interface. > > On Mon, Sep 17, 2018 at 10:57:31PM +0800, Zihan Yang wrote: > > Hi all > > > > Here is a minimal working version of supporting multiple pci domains.

Re: [Qemu-devel] [RFC v5 1/6] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

Gerd Hoffmann 于2018年9月18日周二 下午1:09写道： > > Hi, > > > +static void pxb_pcie_host_get_mmcfg_base(Object *obj, Visitor *v, const > > char *name, > > > +void *opaque, Error **errp) > > +{ > > +PCIExpressHost *e =

[Qemu-devel] [RFC v5 5/6] pci_expander_bridge: add config_write callback for pxb-pcie

This allows SeaBIOS to configure MCFG base during initialization. The mcfg size is calculated using based on desired bus number Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 37 + include/hw/pci-bridge/pci_expander_bridge.h | 7

[Qemu-devel] [RFC v5 4/6] i386/acpi-build: describe new pci domain in AML

Describe new pci segments of host bridges in AML as new pci devices, with _SEG and _BBN to let them be in DSDT. Signed-off-by: Zihan Yang --- hw/i386/acpi-build.c | 53 +--- 1 file changed, 30 insertions(+), 23 deletions(-) diff --git a/hw/i386

[Qemu-devel] [RFC v5 0/6] pci_expander_brdige: support separate pci domain for pxb-pcie

evice on pcie.0 bus v2 <- v1: - Allow user to configure whether to put pxb-pcie into seperate domain - Add AML description part of each host bridge - Modify the location of MCFG space to between RAM hotplug and pci hole64 Many thanks to Please let me know if you have any suggestions. Zihan Yang

[Qemu-devel] [RFC v5 1/6] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, add a new type TYPE_PXB_PCIE_HOST to better utilize ECAM of PCIe Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 86 +++-- 1 file changed, 82 insertions(+), 4 deletions

[Qemu-devel] [RFC v5 2/6] pci_expander_bridge: add domain_nr and max_bus property for pxb-pcie

-range of busses(e.g. [3,9]), this is when max_bus becomes useful. By reducing the memory each domain consumes, we can support more domains in a limited space. Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 23 +-- 1 file changed, 21 insertions(+), 2 deletions

[Qemu-devel] [RFC v5 6/6] pci_expander_bridge: inform seabios of desired mcfg size via hidden bar

pxb-pcie may only consumes a subset of 256 busses in a pci domain, but seabios does not know it unless pxb-pcies passes it to seabios. This patch places desired mcfg size into a hidden pci bar. The size is calculated based on desired bus number of a pxb-pcie Signed-off-by: Zihan Yang --- hw/pci

[Qemu-devel] [RFC v5 3/6] acpi-build: allocate mcfg for pxb-pcie host bridges

in pci domain 0 under q35 host Signed-off-by: Zihan Yang --- hw/i386/acpi-build.c| 109 +--- hw/pci-bridge/pci_expander_bridge.c | 51 + hw/pci/pci.c| 30 +++- include/hw/pci-bridge

Re: [Qemu-devel] [SeaBIOS] [RFC v2 0/3] Support multiple pci domains in pci_device

Gerd Hoffmann 于2018年8月27日周一 上午7:04写道： > > Hi, > > > > However, QEMU only binds port 0xcf8 and 0xcfc to > > > bus pcie.0. To avoid bus confliction, we should use other port pairs for > > > busses under new domains. > > > > I would skip support for IO based configuration and use only MMCONFIG >

Re: [Qemu-devel] [RFC v4 1/6] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

Marcel Apfelbaum 于2018年8月25日周六 下午8:08写道： > > Hi Zihan, > > On 08/19/2018 04:51 AM, Zihan Yang wrote: > > Hi Marcel, > > > > Marcel Apfelbaum 于2018年8月18日周六 上午1:14写道： > >> Hi Zihan, > >> > >> On 08/09/2018 09:33 AM, Zihan Ya

Re: [Qemu-devel] [RFC v4 3/6] i386/acpi-build: describe new pci domain in AML

Marcel Apfelbaum 于2018年8月25日周六 下午7:58写道： > > > > On 08/19/2018 05:00 AM, Zihan Yang wrote: > > Marcel Apfelbaum 于2018年8月18日周六 上午1:49写道： > >> > >> > >> On 08/09/2018 09:34 AM, Zihan Yang wrote: > >>> Describe new pci segments of host br

Re: [Qemu-devel] [RFC v4 6/6] i386/acpi-build: pxb-pcie start bus should always be 0 in separate pci domain

Marcel Apfelbaum 于2018年8月18日周六 上午1:54写道： > > > > On 08/09/2018 09:35 AM, Zihan Yang wrote: > > The bus_nr indicates the bus number of pxb-pcie under pcie.0, but since pxb > > host can be put into different pci domain, the start bus should always be 0 > > I am not

Re: [Qemu-devel] [RFC v4 5/6] pci_expander_bridge: Add ioport for pxb host bus

Marcel Apfelbaum 于2018年8月18日周六 上午1:52写道： > > > > On 08/09/2018 09:35 AM, Zihan Yang wrote: > > This enables seabios to read config file in pxb host bus other than sysbus > > > > Signed-off-by: Zihan Yang > > --- > > hw/pci-bridge/pci_expander_bridge.c

Re: [Qemu-devel] [RFC v4 3/6] i386/acpi-build: describe new pci domain in AML

Marcel Apfelbaum 于2018年8月18日周六 上午1:49写道： > > > > On 08/09/2018 09:34 AM, Zihan Yang wrote: > > Describe new pci segments of host bridges in AML as new pci devices, > > with _SEG and _BBN to let them be in DSDT. > > > > Besides, bus_nr indicates the bus

Re: [Qemu-devel] [RFC v4 2/6] acpi-build: allocate mcfg for pxb-pcie host bridges

Marcel Apfelbaum 于2018年8月18日周六 上午1:41写道： > > Hi Zihan, > > On 08/09/2018 09:33 AM, Zihan Yang wrote: > > Allocate new segment for pxb-pcie host bridges in MCFG table, and reserve > > corresponding MCFG space for them. This allows user-defined pxb-pcie > > host bri

Re: [Qemu-devel] [RFC v4 1/6] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

Hi Marcel, Marcel Apfelbaum 于2018年8月18日周六 上午1:14写道： > > Hi Zihan, > > On 08/09/2018 09:33 AM, Zihan Yang wrote: > > The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, > > change it to a new type TYPE_PXB_PCIE_HOST to better utilize ECAM of

Re: [Qemu-devel] [RFC v4 0/6] pci_expander_brdige: Support pxb-pcie host bridge into separate pci domain

HI all, Sorry about unthreaded messages, I forgot to add the in-reply-to field in the email. Future patches will be threaded, but as for this patch, you can refer to the following links [RFC 1/6] http://lists.nongnu.org/archive/html/qemu-devel/2018-08/msg01364.html [RFC 2/6]

Re: [Qemu-devel] [RFC v4 1/6] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

Eric Blake 于2018年8月9日周四 下午9:23写道： > > On 08/09/2018 01:33 AM, Zihan Yang wrote: > > The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, > > change it to a new type TYPE_PXB_PCIE_HOST to better utilize ECAM of PCIe > > meta-comment: > > Your me

[Qemu-devel] [RFC v4 2/6] acpi-build: allocate mcfg for pxb-pcie host bridges

the first element when traversing the list, because q35 host is inserted beofre pxb-pcie hosts Signed-off-by: Zihan Yang --- hw/i386/acpi-build.c| 116 +++- hw/i386/pc.c| 14 +++- hw/pci-bridge/pci_expander_bridge.c

[Qemu-devel] [RFC v4 4/6] pci_expander_bridge: Add config_read callback

This allows SeaBIOS to retrieve MCFG base and size when it initializes pxb host bridges. A backlink to PXBPCIEHost is added in PXBDev to achieve above goal Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 55 + include/hw/pci-bridge

[Qemu-devel] [RFC v4 6/6] i386/acpi-build: pxb-pcie start bus should always be 0 in separate pci domain

The bus_nr indicates the bus number of pxb-pcie under pcie.0, but since pxb host can be put into different pci domain, the start bus should always be 0 Signed-off-by: Zihan Yang --- hw/i386/acpi-build.c| 14 ++ hw/pci-bridge/pci_expander_bridge.c | 10 +- 2

[Qemu-devel] [RFC v4 5/6] pci_expander_bridge: Add ioport for pxb host bus

This enables seabios to read config file in pxb host bus other than sysbus Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 15 +++ include/hw/pci-bridge/pci_expander_bridge.h | 3 +++ 2 files changed, 18 insertions(+) diff --git a/hw/pci-bridge

[Qemu-devel] [RFC v4 3/6] i386/acpi-build: describe new pci domain in AML

Describe new pci segments of host bridges in AML as new pci devices, with _SEG and _BBN to let them be in DSDT. Besides, bus_nr indicates the bus number of pxb-pcie under pcie.0 bus, but since we put it into separate domain, it should be zero, which is equal to BBN. Signed-off-by: Zihan Yang

[Qemu-devel] [RFC v4 1/6] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, change it to a new type TYPE_PXB_PCIE_HOST to better utilize ECAM of PCIe Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 127 ++-- 1 file changed, 122 insertions(+), 5

[Qemu-devel] [RFC v4 0/6] pci_expander_brdige: Support pxb-pcie host bridge into separate pci domain

te domain - Add AML description part of each host bridge - Modify the location of MCFG space to between RAM hotplug and pci hole64 Zihan Yang (6): pci_expander_bridge: add type TYPE_PXB_PCIE_HOST acpi-build: allocate mcfg for pxb-pcie host bridges i386/acpi-build: describe ne

[Qemu-devel] [Bug 1785670] Re: Guest(ubuntu 18.04) crashes when trying uploading file

Glad to see such a quick fix, and ASAN looks like a great tool :) -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1785670 Title: Guest(ubuntu 18.04) crashes when trying uploading file Status in

Re: [Qemu-devel] [RFC v3 1/6] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

Marcel Apfelbaum 于2018年8月6日周一 下午7:46写道： > > > > On 08/02/2018 05:45 AM, Zihan Yang wrote: > > The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, > > change it to a new type TYPE_PXB_PCIE_HOST to better utilize ECAM of PCIe > > After an o

[Qemu-devel] [Bug 1785670] Re: Guest(ubuntu 18.04) crashes when trying uploading file

It's indeed e1000e specific, when I change e1000e to e1000, I can upload file freely. Looks like there is an overflow somewhere in e1000e that corrupted the heap chunk header. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU.

[Qemu-devel] [Bug 1785670] [NEW] Guest(ubuntu 18.04) crashes when trying uploading file

Public bug reported: I speficy slirp network, and I can open websites, git clone repos. But when I try to upload a file to slack, or try to do a git push, it crashes. My host is ubuntu 16.04 with kernel 4.15.0-29-generic, and qemu is latest source in git(commit 1fb57da72ae0886e). The command I

[Qemu-devel] [RFC v3 6/6] pci_expander_bridge: add start_bus property

The former bus_nr property indicates the bus number of pxb-pcie device on pcie.0 bus, not the Base Bus Number of pxb-pcie host bridge. Use start_bus property to represent this BBN when building acpi table Signed-off-by: Zihan Yang --- hw/i386/acpi-build.c| 22

[Qemu-devel] [RFC v3 4/6] pci_expander_bridge: Add config_read callback

This allows SeaBIOS to retrieve MCFG base and size when it initializes pxb host bridges. A backlink to PXBPCIEHost is added in PXBDev to achieve above goal Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 55 + include/hw/pci-bridge

[Qemu-devel] [RFC v3 2/6] acpi-build: allocate mcfg for pxb-pcie host bridges

the first element when traversing the list, because q35 host is inserted beofre pxb-pcie hosts Signed-off-by: Zihan Yang --- hw/i386/acpi-build.c| 115 +++- hw/i386/pc.c| 14 +++- hw/pci-bridge/pci_expander_bridge.c

[Qemu-devel] [RFC v3 0/6] pci_expander_brdige: Put pxb-pcie host bridge into separate pci domain

evice on pcie.0 bus v2 <- v1: - Allow user to configure whether to put pxb-pcie into seperate domain - Add AML description part of each host bridge - Modify the location of MCFG space to between RAM hotplug and pci hole64 Zihan Yang (6): pci_expander_bridge: add type TYPE_PXB_PCIE_H

[Qemu-devel] [RFC v3 5/6] pci_expander_bridge: Add ioport for pxb host bus

This enables seabios to read config file in pxb host bus other than sysbus Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 15 +++ include/hw/pci-bridge/pci_expander_bridge.h | 3 +++ 2 files changed, 18 insertions(+) diff --git a/hw/pci-bridge

[Qemu-devel] [RFC v3 1/6] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, change it to a new type TYPE_PXB_PCIE_HOST to better utilize ECAM of PCIe Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 127 ++-- 1 file changed, 122 insertions(+), 5

[Qemu-devel] [RFC v3 6/6] pci_expander_bridge: add start_bus property

The former bus_nr property indicates the bus number of pxb-pcie device on pcie.0 bus, not the Base Bus Number of pxb-pcie host bridge. Use start_bus property to represent this BBN when building acpi table Signed-off-by: Zihan Yang --- hw/i386/acpi-build.c| 22

[Qemu-devel] [RFC v3 1/6] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, change it to a new type TYPE_PXB_PCIE_HOST to better utilize ECAM of PCIe Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 127 ++-- 1 file changed, 122 insertions(+), 5

[Qemu-devel] [RFC v3 5/6] pci_expander_bridge: Add ioport for pxb host bus

This enables seabios to read config file in pxb host bus other than sysbus Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 15 +++ include/hw/pci-bridge/pci_expander_bridge.h | 3 +++ 2 files changed, 18 insertions(+) diff --git a/hw/pci-bridge

[Qemu-devel] [RFC v3 4/6] pci_expander_bridge: Add config_read callback

This allows SeaBIOS to retrieve MCFG base and size when it initializes pxb host bridges. A backlink to PXBPCIEHost is added in PXBDev to achieve above goal Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 55 + include/hw/pci-bridge

[Qemu-devel] [RFC v3 3/6] i386/acpi-build: describe new pci domain in AML

Describe new pci segments of host bridges in AML as new pci devices, with _SEG and _BBN to let them be in DSDT Signed-off-by: Zihan Yang --- hw/i386/acpi-build.c | 78 +++- 1 file changed, 53 insertions(+), 25 deletions(-) diff --git a/hw/i386

[Qemu-devel] [RFC v3 3/6] i386/acpi-build: describe new pci domain in AML

Describe new pci segments of host bridges in AML as new pci devices, with _SEG and _BBN to let them be in DSDT Signed-off-by: Zihan Yang --- hw/i386/acpi-build.c | 78 +++- 1 file changed, 53 insertions(+), 25 deletions(-) diff --git a/hw/i386

[Qemu-devel] [RFC v3 0/6] pci_expander_brdige: Put pxb-pcie host bridge into separate pci domain

v1: - Allow user to configure whether to put pxb-pcie into seperate domain - Add AML description part of each host bridge - Modify the location of MCFG space to between RAM hotplug and pci hole64 Zihan Yang (6): pci_expander_bridge: add type TYPE_PXB_PCIE_HOST acpi-build: allocate mcfg for pxb-p

[Qemu-devel] [RFC v3 2/6] acpi-build: allocate mcfg for pxb-pcie host bridges

the first element when traversing the list, because q35 host is inserted beofre pxb-pcie hosts Signed-off-by: Zihan Yang --- hw/i386/acpi-build.c| 115 +++- hw/i386/pc.c| 14 +++- hw/pci-bridge/pci_expander_bridge.c

Re: [Qemu-devel] [RFC v2 3/3] acpi-build: describe new pci domain in AML

Marcel Apfelbaum 于2018年6月20日周三 下午3:46写道： > > > > On 06/12/2018 12:13 PM, Zihan Yang wrote: > > Describe new pci segments of host bridges in AML. The host bridge list is > > replaced by QTAILQ to let q35 host be processed first in every traverse > > > > Signed-

Re: [Qemu-devel] [RFC v2 2/3] acpi-build: allocate mcfg for pxb-pcie host bridges

Thanks for your review. Marcel Apfelbaum 于2018年6月20日周三 下午3:41写道： > > > > On 06/12/2018 12:13 PM, Zihan Yang wrote: > > Allocate new segment for pxb-pcie host bridges in MCFG table, and reserve > > corresponding MCFG space for them. This allows user-defined pxb-pcie >

Re: [Qemu-devel] [RFC v2 1/3] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

Marcel Apfelbaum 于2018年6月20日周三 下午2:38写道： > > > > On 06/12/2018 12:13 PM, Zihan Yang wrote: > > The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, > > add a new type TYPE_PXB_PCIE_HOST to better utilize the ECAM of PCIe > > > > Signed-

Re: [Qemu-devel] [RFC v2 1/3] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

Michael S. Tsirkin 于2018年6月13日周三 下午10:46写道： > > On Wed, Jun 13, 2018 at 04:23:40PM +0800, Zihan Yang wrote: > > Michael S. Tsirkin 于2018年6月12日周二 下午9:43写道： > > > > > > On Tue, Jun 12, 2018 at 05:13:22PM +0800, Zihan Yang wrote: > > > >

Re: [Qemu-devel] [RFC v2 1/3] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

Michael S. Tsirkin 于2018年6月12日周二 下午9:43写道： > > On Tue, Jun 12, 2018 at 05:13:22PM +0800, Zihan Yang wrote: > > The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, > > add a new type TYPE_PXB_PCIE_HOST to better utilize the ECAM of PCIe > > >

[Qemu-devel] [RFC v2 3/3] acpi-build: describe new pci domain in AML

Describe new pci segments of host bridges in AML. The host bridge list is replaced by QTAILQ to let q35 host be processed first in every traverse Signed-off-by: Zihan Yang --- hw/i386/acpi-build.c | 69 ++- hw/pci/pci.c | 9

[Qemu-devel] [RFC v2 1/3] pci_expander_bridge: add type TYPE_PXB_PCIE_HOST

The inner host bridge created by pxb-pcie is TYPE_PXB_PCI_HOST by default, add a new type TYPE_PXB_PCIE_HOST to better utilize the ECAM of PCIe Signed-off-by: Zihan Yang --- hw/pci-bridge/pci_expander_bridge.c | 118 ++-- 1 file changed, 114 insertions(+), 4

[Qemu-devel] [RFC v2 0/3] pci_expander_brdige: Put pxb-pcie host bridge into separate pci domain

n RAM hotplug and pci hole64 Zihan Yang (3): pci_expander_bridge: add type TYPE_PXB_PCIE_HOST acpi-build: allocate mcfg for pxb-pcie host bridges acpi-build: describe new pci domain in AML hw/i386/acpi-build.c| 162

Re: [Qemu-devel] QEMU: Multiple PCI domains for x86 PCI Express Machine (Q35)

virtualization base on QEMU in Dell EMC. >> >> From https://www.outreachy.org. we find that you are working on the >> Multiple PCI domain feature which we think may be very helpful to our >> current work. >> > > We are glad you are considering using the

Re: [Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

2018-05-24 1:33 GMT+08:00 Marcel Apfelbaum : > >> * IOMMUs cannot span domains either, so bringing new domains introduces >> the need >> to add a VT-d DHRD or vIOMMU per PCIe domain > > > Not really, you may have PCI domains not associated to an vIOMMU. As a first >

Re: [Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

> > The original purpose was just to support multiple segments in Intel > > Q35 archtecure for PCIe topology, which makes bus number a less scarce > > resource. The patches are very primitive and many things are left for > > firmware to finish(the initial plan was to implement it in SeaBIOS), > >

Re: [Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

Hi all, Thanks for all your comments and suggestions, I wasn't expecting so many professional reviewers. Some of the things you mentioned are beyond my knowledge right now. Please correct me if I'm wrong below. The original purpose was just to support multiple segments in Intel Q35 archtecure

Re: [Qemu-devel] [RFC 0/3] pci_expander_brdige: Put pxb host bridge into separate pci domain

> Maybe we should add a parameter to the pxb-pci device specifying the PCI domain > instead of adding it on the fly. It will help ensuring the PCI domain will not change over > time due to code changes.In this case "bus sharing" should be off. For the moment > the pxb devices get the bus range

Re: [Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

> An interesting point is if we want to limit the MMFCG size for PXBs, as we may not be > interested to use all the buses in a specific domain. OK, perhaps providing an option for the user to specify the desired bus numbers? > For each bus we require some address space that remains unused. Does

Re: [Qemu-devel] [RFC 2/3] pci: Link pci_host_bridges with QTAILQ

> have no objection here, we'll see later how the modification helps. The purpose is to place the q35 host at the start of queue. In the original QLIST, when a new pxb host is added, q35 host will be bumped to the end end list. By replacing it with QTAILQ, we can always get q35 host bridges

Re: [Qemu-devel] [RFC 1/3] pci_expander_bridge: reserve enough mcfg space for pxb host

Hi Marcel, Thanks a lot for your feedback. > I don't think we should try to place the MMCFGs before 4G even if there > is enough room. Is better to place them always after 4G. > > "above_4g_mem" PCI hole it is reserved for PCI devices hotplug. We cannot use if for > MMCFGs. What I think we can

[Qemu-devel] [RFC 3/3] acpi-build: allocate mcfg for multiple host bridges

Currently only q35 host bridge us allocated space in MCFG table. To put pxb host into sepratate pci domain, each of them should have its own configuration space int MCFG table Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.com> --- hw/i386/acpi-build.

[Qemu-devel] [RFC 0/3] pci_expander_brdige: Put pxb host bridge into separate pci domain

before, that all pci expander bridges stay in the same pci domain as a35 host. Zihan Yang (3): pci_expander_bridge: reserve enough mcfg space for pxb host pci: Link pci_host_bridges with QTAILQ acpi-build: allocate mcfg for multiple host bridges hw/i386/acpi-build.c

[Qemu-devel] [RFC 2/3] pci: Link pci_host_bridges with QTAILQ

QLIST will place the original q35 host bridge at the end of list because it is added first. Replace it with QTAILQ to make q35 at the first of queue, which makes it convinient and compatible when there are pxb hosts other than q35 hosts Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.

[Qemu-devel] [RFC 1/3] pci_expander_bridge: reserve enough mcfg space for pxb host

if there is enough memory to reserve for them Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.com> --- hw/i386/pc.c| 5 ++ hw/pci-bridge/pci_expander_bridge.c | 96 - include/hw/pci-bridge/pci_expander_bridge.h | 7 +++ 3 files c

[Qemu-devel] [PATCH v2] hw/pci-host/q35: Replace hardcoded value with macro

During smram region initialization some addresses are hardcoded, replace them with macro to be more clear to readers. Previous patch forgets about one value and exceeds the line limit of 90 characters. The v2 breaks a few long lines Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.com> -

[Qemu-devel] [PATCH] hw/pci-host/q35: Replace hardcoded value with macro

Currently part of mch_realize uses hardcoded value when initializing smram regions. Use macro to be more clear to code readers Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.com> --- hw/pci-host/q35.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/pc

Re: [Qemu-devel] [PATCH 0/2] vmmouse: convert qdev pointer property to QOM link relationship

a specific header at last, although I'm not sure whether we will really need more macros in the future. P.S. I forgot to cc to qemu-devel, so I resend one. I apologize if two identical emails look confusing to you. 2018-03-08 4:27 GMT+08:00 Philippe Mathieu-Daudé <f4...@amsat.org>: > Hi Z

Re: [Qemu-devel] [PATCH 0/2] vmmouse: convert qdev pointer property to QOM link relationship

Hi all, this is a bitesized patch from me a while ago, it seems a little old but I wonder if there is any opinion about it? Is it still valid? Thanks. 2018-02-04 15:28 GMT+08:00 Zihan Yang <whois.zihan.y...@gmail.com>: > The ps2_mouse property of vmmouse is still pointer t

Re: [Qemu-devel] [PATCH] RAMList: replace QemuMutex with CompatGMutex

nt now. 2018-02-14 18:13 GMT+08:00 Paolo Bonzini <pbonz...@redhat.com>: > On 14/02/2018 09:49, Zihan Yang wrote: > > change the mutex member in RAMList structure from QemuMutex to > CompatGMutex. > > qemu_mutex_init() is just deleted instead of being replaced with > g_mutex_in

[Qemu-devel] [PATCH] RAMList: replace QemuMutex with CompatGMutex

change the mutex member in RAMList structure from QemuMutex to CompatGMutex. qemu_mutex_init() is just deleted instead of being replaced with g_mutex_init() because there is no need to do initialize a mutex that is statically allocated. Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.

[Qemu-devel] [PATCH 2/2] vmmouse: change qdev pointer property to qom link

The ps2_mouse property of vmmouse is still pointer type which is defined by DEFINE_PROP_PTR. But qdev pointer property should be avoided. Convert it into QOM link relationship Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.com> --- hw/i386/pc.c | 2 +- hw/i386/vmmouse.

[Qemu-devel] [PATCH 1/2] hw/input/pckdb: put TYPE_I8042 into a single header file

This allows the macro to be used elsewhere, for example, when adding link property to vmmouse object. Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.com> --- hw/input/pckbd.c | 2 +- hw/input/pckbd.h | 6 ++ 2 files changed, 7 insertions(+), 1 deletion(-) create mode 100644 hw

[Qemu-devel] [PATCH 0/2] vmmouse: convert qdev pointer property to QOM link relationship

in another file. The first patch put this macro into a single header file so that the macro can be used elsewhere. The second patch does the actual work. Zihan Yang (2): hw/input/pckdb: put TYPE_I8042 into a single header file vmmouse: change qdev pointer property to qom link hw/i386/pc.c | 2

[Qemu-devel] [PATCH] net/socket: change net_socket_listen_init to use qemu-socket functions

net_socket_listen_init directly uses parse_host_port, bind and listen, change it to use functions in include/qemu/sockets.h Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.com> --- net/socket.c | 30 +- 1 file changed, 9 insertions(+), 21 deletions(-) diff

[Qemu-devel] Fwd: [RFC 2/4] qemu-socket: Allow custom socket options in socket_connect

Hi, Daniel >You've added all this extra functionality to pass arbitrary >options, but then not used it in any of the later patches. >We've been trying to remove complexity from this code, so >I'm not in favour of adding new functionality that is not >even used. You are right, unused

[Qemu-devel] [RFC 2/4] qemu-socket: Allow custom socket options in socket_connect

pointer. Note the caller who wants a non-blocking socket should always check the errno after socket_connect returns to see if the connection is really established or still inprogress. Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.com> --- block/sheepdog.c | 2 +- block

[Qemu-devel] [RFC 3/4] net/socket: change net_socket_listen_init to use functions in include/qemu/sockets.h

Some functions in net/socket.c still uses bind/connect/listen directly. Change it to use functions in include/qemu/sockets.h Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.com> --- net/socket.c | 41 + 1 file changed, 21 insertions(+), 20 del

[Qemu-devel] [RFC 1/4] qemu-socket: Allow custom socket option in socket_listen

by providing a NULL pointer. Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.com> --- include/qemu/sockets.h | 17 +++- io/channel-socket.c| 2 +- qga/channel-posix.c| 2 +- util/qemu-sockets.c| 74 ++ 4 files chang

[Qemu-devel] [RFC 0/4] Allow custom socket option in socket_listen and socket_connect

using a non-blocking socket. It does not have to in other cases. Zihan Yang (4): qemu-socket: Allow custom socket option in socket_listen qemu-socket: Allow custom socket options in socket_connect net/socket: change net_socket_listen_init to use functions in include/qemu/sockets.h net

[Qemu-devel] [RFC 4/4] net/socket: change net_socket_connect_init to use functions in sockets.h

net_socket_connect_init still uses parse_host_port() and connect() directly. Convert it into functions in include/qemu/sockets.h Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.com> --- net/socket.c | 52 +++- 1 file changed, 23 insertions(

[Qemu-devel] [PATCH 3/3] hw/s390: replace exit with unrealize during class init of virtio-ccw

Currently the virtio_ccw_device_class_init function sets dc->exit, which is the exit callback of DeviceClass. It should be converted to dc->unrealize since exit callback of DeviceClass will be removed in the future. Signed-off-by: Zihan Yang <tgny...@gmail.com> --- hw/s390x/virt

[Qemu-devel] [PATCH 2/3] hw/s390x: make virtio_ccw_exit function in virtio-ccw return void

Only virtio_ccw_exit and the exit callback in VirtIOCCWDeviceClass are converted to void in this patch. 'virtio_ccw_busdev_exit' belongs to DeviceClass so it still returns int, DeviceClass::exit will return void in future patches. Signed-off-by: Zihan Yang <tgny...@gmail.com> --- hw/s390x/

[Qemu-devel] [PATCH 1/3] hw/char/sclp*: remove console_exit function in sclp

Currently the console_exit function in sclpconsole-lm.c and sclpconsole.c does nothing, so remove them and convert the callback in SCLPEventClass to void. Since there is a NULL check on the DeviceClass exit callback, it should be ok to simply remove them. Signed-off-by: Zihan Yang <t

[Qemu-devel] [PATCH 0/3] hw: make *_exit return void/convert to unrealize in sclp/virtio-ccw

in the class init function of virtio-ccw, because the exit callback of DeviceClass will be removed in the future. Zihan Yang (3): hw/char/sclp*: remove console_exit function in sclp hw/s390x: make virtio_ccw_exit function in virtio-ccw return void hw/s390: replace exit with unrealize during class

Re: [Qemu-devel] [PATCH 1/5] hw/char: remove console_exit function in sclp

OK, sorry for the confusion, I will give a new patch series. I'm not very familiar with the conventions so I wonder if someone could help clarify some principles for me. I'd like to replace all the init/exit callback of DeviceClass to realize/unrealize, and convert return type of exit callback of

[Qemu-devel] [PATCH 2/5] hw/s390x: make virtio_ccw_exit function in virtio-ccw return void

Only virtio_ccw_exit and the callback in VirtIOCCWDeviceClass are converted to void in this patch. 'virtio_ccw_busdev_exit' belongs to DeviceClass so it still returns int at present, DeviceClass::exit will return void in another patch. Signed-off-by: Zihan Yang <tgny...@gmail.com> --- hw

[Qemu-devel] [PATCH 4/5] hw/audio: replace exit with unrealize in hda_codec_device_class_init

The exit callback of DeviceClass will be removed in the future, so convert to unrealize in the init functioin Signed-off-by: Zihan Yang <tgny...@gmail.com> --- hw/audio/intel-hda.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/audio/intel-hda.c b/hw/audio

[Qemu-devel] [PATCH 3/5] hw/s390: convert exit to unrealize in virtio_ccw_device_class_init

Currently the virtio_ccw_device_class_init function sets dc->exit, the exit callback of DeviceClass. It should be converted to dc->unrealize since exit callback of DeviceClass will be removed in the future. Signed-off-by: Zihan Yang <tgny...@gmail.com> --- hw/s390x/virtio-ccw.c | 5 +

[Qemu-devel] [PATCH 5/5] hw/audio: convert exit callback in HDACodecDeviceClass to void

The exit callback always return 0, convert it to void Signed-off-by: Zihan Yang <tgny...@gmail.com> --- hw/audio/hda-codec.c | 3 +-- hw/audio/intel-hda.h | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/audio/hda-codec.c b/hw/audio/hda-codec.c index 52d4640..5

[Qemu-devel] [PATCH 1/5] hw/char: remove console_exit function in sclp

-by: Zihan Yang <tgny...@gmail.com> --- hw/char/sclpconsole-lm.c | 6 -- hw/char/sclpconsole.c | 6 -- hw/s390x/event-facility.c | 6 +- include/hw/s390x/event-facility.h | 2 +- 4 files changed, 2 insertions(+), 18 deletions(-) diff --git a/h

Re: [Qemu-devel] [PATCH] hw: make *_exit functions return void

Cornelia Huck <cornelia.h...@de.ibm.com>: > On Sun, 16 Apr 2017 20:26:01 +0800 > Zihan Yang <tgny...@gmail.com> wrote: > > > According to the second suggestion listed on Dead code Removal > > of BiteSizedTasks, I modify some *_exit functions to make them

[Qemu-devel] [PATCH 2/2] hw/s390x: make virtio_ccw_exit function in virtio-ccw return void

some other folders like hw/audio. Signed-off-by: Zihan Yang <tgny...@gmail.com> --- hw/s390x/event-facility.c | 6 +- hw/s390x/virtio-ccw.c | 6 +++--- hw/s390x/virtio-ccw.h | 2 +- 3 files changed, 5 insertions(+), 9 deletions(-) diff --git a/hw/s390x/event-facility.c b/hw

[Qemu-devel] [PATCH 1/2] hw/char: remove console_exit function in sclp

Currently, the console_exit function in sclpconsole-lm.c and sclpconsole.c does nothing, just remove them. Since there is a NULL check on the DeviceClass exit callback as suggested by Frederic Konrad, it should be safe to simply remove them. Signed-off-by: Zihan Yang <t

[Qemu-devel] [PATCH] hw: make *_exit functions return void

-by: Zihan Yang <tgny...@gmail.com> --- hw/audio/hda-codec.c | 3 +-- hw/audio/intel-hda.c | 3 +-- hw/audio/intel-hda.h | 2 +- hw/char/sclpconsole-lm.c | 3 +-- hw/char/sclpconsole.c | 3 +-- hw/core/qdev.c| 6 +---